CN110083480A - A kind of configurable multi-functional data processing unit - Google Patents
A kind of configurable multi-functional data processing unit Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/062—Securing storage systems
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
- G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1044—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices with specific ECC/EDC distribution
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The present invention provides a kind of configurable multi-functional data processing units, it applies and includes in data center server comprising primary processor, memory, flash memory and mechanical hard disk, wherein, including data processing unit, between data processing unit connection and memory and flash memory；Data processing unit includes multiple data processing subelements；Each data processing subelement includes: application processor；Memory is connect with application processor, and application processor is the pending data in memory to be loaded onto memory；Multiple auxiliary processing modules, auxiliary processing module are connect with application processor respectively；Processing result is stored in flash memory by application processor and/or auxiliary processing module to be handled the pending data in memory to form processing result.The beneficial effect of its technical solution is, overcomes and needs to provide multiple memories in existing central server and power consumption of internal memory caused by primary processor handles data is larger and process performance decline problem.
Description
Technical field
The present invention relates to field of communication technology more particularly to a kind of configurable multi-functional data processing units.
Background technique
With the development of information technology and the arrival of the internet of things era, numerous terminal devices produces a large amount of number
According to these data need to handle and store by central server, the structure of server such as Fig. 1 institute in available data center
Show comprising following components, primary processor, memory 2, flash memory 4 and mechanical hard disk 5.Primary processor generally uses advanced work
The processor for the x86 framework that (14nm, 10nm, 7nm) is manufactured under skill, for example Xeon series, memory 2 are DRAM, are also first
Into technique under manufacture, for obtaining higher access speed and performance, flash memory 4 can be solid state hard disk, or eMMC,
For the storage of data, mechanical hard disk 5 is generally used for the backup and storage of data.Existing a large amount of data are usually by data
The processor in server in the heart executes in memory, on the one hand needs to consume a large amount of power consumption, and processor and memory
Cost it is also relatively high, when data volume is increasing, it is necessary to more and more processors and memory handle data,
And then lead to central server cost increase；It is existing largely about machine learning, artificial intelligence and data mining simultaneously
Algorithm all 1 executed in memory 2 using processing, due to interior saving as volatibility, in the unexpected power down of central server or
The result that these algorithms obtain after person's system crash will directly lose, and make troubles to user.
Summary of the invention
For central server in the prior art when handling data the existing above problem, one kind is now provided and is intended to pass through
Multiple data processing subelements in data processing unit can be handled pending data, and then can reduce central server
In memory pressure that data are handled, and data processing subelement the result of processing can be stored in flash memory can
The multi-functional data processing unit of configuration.
Specific technical solution is as follows:
A kind of configurable multi-functional data processing unit is applied in data center server, data center's clothes
Business device includes primary processor, memory, flash memory and mechanical hard disk, wherein including a data processing unit, the data processing
Between unit connection and the memory and the flash memory；
The data processing unit includes multiple data processing subelements；
Each data processing subelement includes:
Application processor；
Memory is connect with the application processor, and the application processor is to by the number to be processed in the memory
According to being loaded onto the memory；
Multiple auxiliary processing modules, multiple auxiliary processing modules are connect with the application processor respectively；
The application processor and/or the auxiliary processing module are to the pending data in the memory
It is handled to form a processing result, and the processing result is stored in the flash memory.
Preferably, the flash memory includes one first encrypting module, and first encrypting module is to the number to be processed
According to being encrypted or decrypted；
Each auxiliary processing module includes a programmable gate array and a self-learning module；
The application processor and/or the programmable logic gate array to form one second encrypting module to configure,
The pending data is encrypted or decrypted by second encrypting module；
The application processor is also to judge whether the security level of the pending data meets default safety etc.
Grade；
If so, after being encrypted by first encrypting module to the pending data, then pass through the second encryption mould
Block encrypts the pending data again；
If it is not, only being encrypted by first encrypting module to the pending data.
Preferably, the flash memory include one first correction module, the correction module to the pending data into
Row error correction；
Each auxiliary processing module includes a programmable gate array and a self-learning module；
The application processor and/or the programmable logic gate array to form one second correction module to configure,
Error correction is carried out to the pending data by second encrypting module.
The application processor also judges to the type to the pending data；
If one first crucial rating-type data, the pending data is entangled by first correction module
After mistake, then passes through the second correction module and error correction is carried out again to the pending data after error correction；
If one second crucial rating-type data, only the pending data is carried out by first correction module
Error correction.
Preferably, each memory includes a nonvolatile memory and a volatile memory,
The application processor also judges to the type to the pending data:
If a third key rating-type data, then the application processor saves the pending data to described
In nonvolatile memory；
Error correction is carried out to the pending data by first correction module first, includes an error correction in the flash memory
Controller, if first controller generate error correction bit be greater than first correction module institute energy error correction a standard digit；
The application processor calls second correction module to carry out error correction to the pending data.
Preferably, each auxiliary processing module includes a programmable gate array and a self-learning module；
Each memory includes a nonvolatile memory and a volatile memory；
The application processor and/or the programmable logic gate array also to form a garbage reclamation mould to configure
Block；Data file is preserved in the flash memory；
The data of the application processor and/or the programmable logic gate array also to access user
The access frequent degree of file is recorded；
The garbage reclamation module according to the record data file minimum to access frequent degree to carry out
It deletes.
Preferably, the application processor and/or the programmable logic gate array according to the access to record
Access to the data file
Frequent degree is classified；
If the access frequent degree of the data file is the first estate, and the data file is pre- less than one first
If presently described data file is stored in the volatile memory when value；
If the access frequent degree of the data file is the second grade, and the data file is greater than described second
Presently described data file is stored in the nonvolatile memory when preset value.
Preferably, each auxiliary processing module includes a programmable gate array and a self-learning module；
The application processor and/or the programmable gate array to form a detection module to edit；
The detection module forms feature note to detect the application program that different user executes under different time sections
Record, and feature record is stored in described non-volatile deposit in memory；
The application processor and/or the programmable gate array according to feature record to judge currently
Whether the application program accesses more than a preset threshold flash memory；
If so, executing the current application program by the application processor；
If it is not, the current application program then executed by the primary processor.
Preferably, a client is also included at least, the client is connect with the central server, and the client is used
The central server is sent to the phonetic order for inputting user；
The phonetic order is converted to retrieval text by the central server, and according to the retrieval text return one with
The relevant retrieval content of the retrieval text is to the client；
The client selects a specified content to be sent to the central server in the retrieval content；
The application processor and/or the programmable gate array and the self-learning module are to described instruction
Content is marked；
The application processor and/or the programmable gate array and the self-learning module are also to label
Described instruction content carries out feature extraction, and the described instruction content with common trait is associated.
Preferably, the self-learning module is the non-volatile self-learning module based on novel memory devices.
Preferably, the nonvolatile memory is phase transition storage, resistance-variable storing device, magnetic memory and ferroelectricity storage
Any one in device.
Above-mentioned technical proposal has the following advantages that or the utility model has the advantages that by multiple data processing subelement, can to it is multiple to
Processing data handled, and and by processing formed processing result be stored in flash memory, overcome prior art center service
Need to provide multiple memories in device and under power consumption of internal memory caused by primary processor handles data is larger and process performance
Drop problem.
Detailed description of the invention
With reference to appended attached drawing, more fully to describe the embodiment of the present invention.However, appended attached drawing be merely to illustrate and
It illustrates, and is not meant to limit the scope of the invention.
Fig. 1 is the structural schematic diagram of background technology part central server；
Fig. 2 is a kind of structural schematic diagram of the embodiment of configurable multi-functional data processing unit of the present invention；
Fig. 3 is in a kind of embodiment of configurable multi-functional data processing unit of the present invention, and the structure about flash memory is shown
It is intended to；
Fig. 4 is in a kind of embodiment of configurable multi-functional data processing unit of the present invention, about auxiliary processing module
Structural schematic diagram.
Appended drawing reference indicates；
1, primary processor；2, memory；3, data processing unit；4 flash memories；5, mechanical hard disk；31, data processing subelement；
311, application processor；312, nonvolatile memory；313, volatile memory；314, auxiliary processing module；41, first adds
Close module；42, the first wrong module；43, error correction controller；3141, programmable gate array；3142, self-learning module.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art without creative labor it is obtained it is all its
His embodiment, shall fall within the protection scope of the present invention.
It should be noted that in the absence of conflict, the feature in embodiment and embodiment in the present invention can phase
Mutually combination.
The present invention will be further explained below with reference to the attached drawings and specific examples, but not as the limitation of the invention.
It include a kind of configurable multi-functional data processing unit in technical solution of the present invention.
As shown in Fig. 2, a kind of embodiment of configurable multi-functional data processing unit, is applied to data center server
In, data center server includes primary processor 1, memory 2, flash memory 4 and mechanical hard disk 5, wherein provides a data processing
Unit 3, between the connection of data processing unit 3 and memory 2 and flash memory 4；
Data processing unit 3 includes multiple data processing subelements 31；
Each data processing subelement 31 includes:
Application processor 311；
Memory is connect with application processor 311, and application processor 311 is to load the pending data in memory 2
Into memory；
Multiple auxiliary processing modules 314 connect, and multiple auxiliary processing modules 314 are connect with application processor 311 respectively；
Application processor 311, auxiliary processing module 314 are to handle to be formed the pending data in memory
One processing result, and processing result is stored in flash memory 4；
It further include by application processor 311 or auxiliary processing module 314 individually to the progress to be processed in memory
Processing result is stored in flash memory 4 by processing with forming a processing result；
For in the prior art, data center server data are handled be processor by being provided with and
Memory 2 needs to consume a large amount of power consumptions, and the bigger memory 2 and primary processor 1 that need to be equipped with of data processing amount existing for being handled
Also the just corresponding rising increased and then lead to data center server cost；
By the way that data processing unit 3 is arranged between the memory 2 in data center server and flash memory 4 in the present invention,
Middle data processing unit 3 includes multiple data processing subelements 31；
Each data processing subelement 31, application processor 311；
Memory is connect with application processor 311, and application processor 311 is to load the pending data in memory 2
Into memory；
Multiple auxiliary processing modules 314, multiple auxiliary processing modules 314 are connect with application processor 311 respectively；
The pending data in memory is handled with shape by application processor 311 and auxiliary processing module 314
It is stored in flash memory 4 at a processing result, and by processing result；
Wherein, further include by auxiliary processing module 314 or auxiliary processing module 314 individually in memory wait locate
Reason data are handled to form a processing result, and processing result is stored in flash memory 4.
Wherein, multiple data processing units 3 can handle a large amount of data, effectively share data center's clothes
The pressure that primary processor 1 and memory 2 handle data in business device.
It should be noted that application processor in above-mentioned each data processing subelement 31 in above-mentioned technical proposal
311, the performance of application processor 311 wants low for the primary processor 1 in data center server, but at power dissipation ratio
Reason device is low, and application processor 311 can be the 311 (Application of application processor in the mobile devices such as mobile phone or plate
Processor, AP), for example application processor 311 under the non-advanced technologies of Hai Si semiconductor company, Huawei, come from spreadtrum
Application processor 311 under the non-advanced technologies of company or the application processor produced under the non-advanced technologies of Apple Inc.
311, or the processor of x86 framework, such as 286,386 series.
In a kind of preferably embodiment, as shown in Figure 3 to Figure 4, flash memory 4 includes one first encrypting module 41, and first
Encrypting module 41 is to encrypt pending data or be decrypted；
Each auxiliary processing module 314 includes a programmable gate array 3141 and a self-learning module 3142；
Application processor 311, programmable logic gate array 3141 to form one second encrypting module to configure, and pass through
Two encrypting modules are encrypted or are decrypted to pending data；
Also the second encrypting module can be formed by processor or the configuration of programmable logic gate array 3141, pass through second
Encrypting module is encrypted or is decrypted to pending data；
Application processor 311 is also to judge whether the security level of pending data meets the grades such as a default safety；
If so, after being encrypted by the first encrypting module 41 to pending data, then treated by the second encrypting module
Processing data are encrypted again；
If it is not, only being encrypted by the first encrypting module 41 to pending data.
In above-mentioned technical proposal, programmable gate array 3141 (FPGA) can be programmable for the volatibility based on SRAM
Logic gate array 3141, or based on novel memory devices (such as phase transition storage, resistance-variable storing device, magnetic memory and iron
Electrical storage etc.) nonvolatile programmable logic gate array 3141 (nvFPGA)；
Optimal programmable gate array 3141 is nonvolatile programmable logic gate array 3141, programmable gate
Array 3141 can according to need the interface protocol for being programmed for different functions, for example being programmed for different, for connecting different associations
The flash memory 4 of view blocks, for example a part of programmable gate array 3141 is programmed for 4.0 agreement of eMMC, and a part is programmed for eMMC
5.0 agreements, another part are programmed for UFS agreement, and such server can connect connecing with different agreement for different vendor
The eMMC product of mouth.
EMMC (Embedded Multi Media Card) is that MMC association concludes, mainly for mobile phone or tablet computer etc.
The embedded memory standard specification of product.
It should be noted that prevent the data of user to be stolen currently in order to guarantee the safety of storing data, it is general to use
Enciphering and deciphering algorithm stores again after being encrypted to data, and current solid state hard disk or eMMC be stuck in data storage when it is general
Encryption and decryption is carried out using hardware module, i.e., data is carried out plus is solved using solid state hard disk or eMMC card built-in encrypting module
It is close, but it is open to attack to carry out encryption and decryption operation to data using built-in encrypting module, once key is obtained by attacker
It arrives, then consequence is hardly imaginable.
Therefore the present invention is i.e. above-mentioned on the basis of original solid state hard disk or eMMC carry out encryption and decryption with hardware module
Flash memory 4 in the first encrypting module 41 carry out the operation of encryption and decryption, recycle configurable multi-functional data to handle subelement 31
In application processor 311, programmable gate array 31413211 stores again after carrying out secondary encryption to data；
After secondary encryption only can also being carried out to data by application processor 311 or programmable gate array 3141
It is storing；
Finally ensure the safety of user data, enciphering and deciphering algorithm is by application processor 311, programmable gate array 3141
It realizes；
It can also only be realized by application processor 311 or programmable gate array 3141；
Existing mode is very flexible and changeable, no matter realizes in which way, can switch enciphering and deciphering algorithm as needed,
Guarantee the safety of user data to the greatest extent.
The invention proposes a kind of security strategy of multi-layer, the security strategy of multi-layer includes at least two level securities, the
Level-one security algorithm is by the hardware enciphering and deciphering module realization in solid state hard disk or eMMC card, i.e., the first above-mentioned encrypting module 41
It realizes；
Second level security algorithm is by application processor 311, the programmable gate array in data processing subelement 31
3141 editors form the second encrypting module and realize；
It, can be with using the security strategy of multi-layer proposed by the present invention for safety required for different user data
Different security levels is taken, if the data of user are sensitive data (such as customer transaction data), the security level needed
Height, if the data of user are general data, needs lower safety then just using two levels of security strategy,
So just use first order security level.
For specific sensitive data, if user is very high to the reading data speed requirement of these data,
Under the premise of user agrees to, the present invention can also only take first order security level according to the demand of user, skip second level peace
Congruent grade, it is ensured that user data is read faster, to meet the different demands of user.
In a kind of preferably embodiment, flash memory 4 includes one first correction module 42, and correction module is to to be processed
Data carry out error correction；
Each auxiliary processing module 314 includes a programmable gate array 3141 and a self-learning module 3142；
Application processor 311 and/or programmable logic gate array 3141 to form one second correction module to configure, and lead to
It crosses the second encrypting module and error correction is carried out to pending data.
Above-mentioned application processing 311 and programmable gate array 3141 may be performed simultaneously configuration and form the second error correction mould
Block, or separate configuration alone and form the second correction module.
Also one second correction module only can be formed by application processor or the configuration of programmable gate array 3141, led to
It crosses the second encrypting module and error correction is carried out to pending data.
Application processor 311 also judges to the type to pending data；
If one first crucial rating-type data, after carrying out error correction to pending data by the first correction module 42,
Error correction is carried out to the pending data after error correction by the second correction module again again；
If one second crucial rating-type data, error correction is only carried out to pending data by the first correction module 42.
In a kind of preferably embodiment, each memory includes 313 nonvolatile memory of a volatile memory
313 and a volatile memory 313, application processor 311 also judge to the type to pending data:
If a third key rating-type data, then application processor 311, which saves pending data to volatibility, deposits
In 313 nonvolatile memory 313 of reservoir；
Error correction is carried out to pending data by the first correction module 42 first, includes an error correction controller 43 in flash memory 4,
If the first controller generate error correction bit be greater than the first correction module 42 institute energy error correction a standard digit；
Application processor 311 calls the second correction module to carry out error correction to pending data.
In above-mentioned technical proposal, current flash memory 4 or mechanical hard disk 5 generally have to guarantee the reliabilities of data
Error checking and correction (ECC, Error Correcting Code error checking and correction) module are used for the inspection of error in data
With error correction, the ECC module of memory can be by hardware realization or software realization two ways, with hardware realization ECC's at present
Advantage is that speed is fast, the disadvantage is that the area that will cause memory becomes larger, it is ECC algorithm by main with the advantages of software realization ECC
Reason device 1 executes, and not will increase the area of memory, but the speed that processor executes is lower with respect to for hardware realization, i.e. property
It can be lower.
No matter hardware realization ECC or software realization ECC, with the growth of time, the digit that mistake occurs is more and more,
And the ability of ECC error correction is certain, that is to say, that ECC completely can not all correct the position of mistake.
The invention proposes a kind of methods that criticality according to data uses different brackets ECC, and using different
Backup method, for improving the reliability of data.
Application processor 311, programmable gate array 3141 and the root first of self-learning module 3142 first in the present invention
According to user behavior and data it is crucial whether, the data of user are divided into critical data, general data and non-critical data.
For the critical data of different user, we carry out error correction using two-stage ECC, guarantee the standard of user's critical data
Really, the first order is ECC module present in storage network；Wherein storage network is primarily referred to as multiple flash memories 4 and multiple machinery
Hard disk 5 forms；
The ECC algorithm that the second level is realized by application processor 311, programmable gate array 31413211, can also only lead to
Cross the ECC algorithm that application processor 311 or programmable gate array 3141 are realized；
For the critical data of user, error correction is not carried out merely with hardware ECC module existing for storage network itself, together
The ECC that Shi Liyong application processor 311, programmable gate array 31413211 are realized carries out error correction.
For the critical data (< 3%) of user, 3 to 5 are backed up in 4 product of flash memory different in storage network 4 first
Part (for example backing up in the eMMC of different manufacturers), then for the critical data of user, we use two-stage ECC to entangle
Mistake guarantees being absolutely correct for user's critical data.
For non-critical data (> 70%), such as film, the data of music class, even if there is the mistake of certain digit,
Very big influence will not be caused to user experience, only carry out error correction using hardware ECC module existing for flash memory 4 itself, so that it may
It meets the needs of users.
For general data (3%~70%), in order to guarantee in the case where the unexpected power down of server or collapse suddenly
Data it is complete, first by two parts to three parts of user data backup, such as by data backup portion into flash memory 4, then in addition
Portion backups in 313 nonvolatile memory 312 of volatile memory together with corresponding ECC algorithm.
, application processor 311 is by corresponding ECC algorithm from volatile
Property 313 nonvolatile memory 312 of memory in move on to storage network 4 in, when storage network in flash memory 4 or mechanical hard disk 5
Controller reporting occur mistake digit be greater than the digit that the ECC module in flash memory 4 or mechanical hard disk 5 can correct
Afterwards, application processor 311 reads in storage network correspondingly ECC algorithm and guarantees user data for correcting the mistake of generation
Accuracy.
In a kind of preferably embodiment, each auxiliary processing module 314 includes a programmable gate array 3141
An and self-learning module 3142；
Each memory includes a nonvolatile memory 312 and a volatile memory 313；
Application processor 311, programmable logic gate array 3141 also to form a garbage reclamation module to configure；
Also rubbish time also only can be formed to configure by application processor 311 or programmable logic gate array 3141
Receive module；
Data file is preserved in flash memory 4；
Application processor 311, programmable logic gate array 3141 are also to the visit of the data file accessed user
Ask that frequent degree is recorded；
The data text that only user can be accessed by application processor 311 or programmable logic gate array 3141 well
The access frequent degree of part is recorded；
Garbage reclamation module according to the record data file minimum to access frequent degree to delete.
In above-mentioned technical proposal, for 4 product of flash memory, when data are updated, usually update
A new address is written in data, original data is designated as in vain, while the corresponding relationship of more new data and address, rather than
It is updated on original address, in this way increasing with data write-in, then just having the ground on more and more addresses
Location be it is invalid, these invalid data become rubbish, therefore just need a garbage reclamation mechanism (Garbage
Collection, GC).
Garbage reclamation is that effective Page (record) in all Block (subregion) is merged into a new Block (to divide
Area) in, and old Block is wiped, reserve more free time Block (subregion).
The invention proposes a global garbage reclamation mechanisms.Application processor in i.e. sharp data processing subelement 31
311, programmable gate array 3141 realizes garbage collection algorithms, thus to data invalid in the flash memory 4 in storage network
Carry out garbage reclamation.
Assuming that the flash memory 4 in storage network 4 is made of N (N > 2) a eMMC, these eMMC are from different manufacturers, interface
Agreement is also not quite similar, and the application processor 311, programmable gate array 3141 in data processing subelement 31 are by certain
The user behavior analysis of time obtains the frequent degree that user reads data.
After a certain period of time, the M eMMC (N > M > 1) in this N number of eMMC needs to carry out garbage reclamation, according to the present invention in
The analysis of application processor 311, programmable gate array 31413211, discovery M need to have portion in the eMMC of garbage reclamation
Single cent part belongs to the file that a period of time (nearest one week) often reads and writes recently, therefore before garbage reclamation, by this part number
According to being transported in volatile memory 313 or nonvolatile memory 312, if this M need in the eMMC of garbage reclamation
Without the file that a period of time often reads and writes recently, then directly carrying out garbage reclamation there is no need to carry out any operation.
We can use application processor 311 in disconnection mode before garbage reclamation to data generation mistake simultaneously
The case where and the digit that can correct of ECC module counted.
By application processor 311, there is a situation where mistake, the longevity of the available block for statistical data in disconnection mode
Situation is ordered, if there are many number of errors that the statistics of application processor 311 show that data occur on the block, the residue of the block
Erasable number is with regard to fewer, therefore the application processor 311 in the present invention can make garbage reclamation have self-test function.
Count the digit that the ECC module in storage network can correct in disconnection mode by application processor 311, such as
The digit that mistake occurs for fruit is greater than the digit that ECC can be corrected, then being decided whether according to the significance level of data using second
Grade ECC carries out error correction.
In a kind of preferably embodiment, application processor 311, programmable logic gate array 3141 are to according to visit
Ask that record is classified the access frequent degree of data file；
It can also be by processor 311 or programmable logic gate array 3141 individually according to access record to data text
The access frequent degree of part is classified；
If the access frequent degree of data file is the first estate, and when data file is less than first preset value, will be current
Data file is stored in volatile memory 313；
If the access frequent degree of data file is the second grade, and data file when being greater than the second preset value by current number
It is stored in nonvolatile memory 312 according to file.
In above-mentioned technical proposal, in order to accelerate the reading speed of data, in the present invention according to the key of user data with
It is no, take different read methods.
Reading for critical data still will be corrected by the ECC algorithm of two level securities and two-stage；
Reading for non-critical data can directly skip the second level security and second to accelerate the speed read
Grade ECC algorithm directly moves data from storage network into memory 2.
And for the general data of user, can behavior according to user and needs, a part of general data can be straight
The ECC algorithm for skipping encryption and decryption operation and the second level is connect, directly moves data into memory 2 from storage network, and for surplus
Under general data pass through the second level security and the second level also according to original method ECC algorithm after move storage net again
In network.
The self study of application processor 311, programmable gate array 3141 and self study unit by certain time, root
According to the read-write frequent degree of user and the behavior of user, the data of user are divided into dsc data, cold data,
Wherein, dsc data indicates the highest data of access degree, the cold data data minimum to access degree；
Read most frequent random read-write for user and size of data D is directly deposited in volatile less than the data of X (D < X)
Property memory 313 in, for user read most frequent and size of data D be greater than X be less than Y (X < D < Y) data, can directly jump
Second level ECC algorithm and the second level security are crossed, for relatively hot data and data D size is greater than the data of Y (D > Y), will
Data are stored in 313 nonvolatile memory 312 of volatile memory, because depositing from volatile memory 313 is non-volatile
The time that data are read in reservoir 312 is smaller than the delay for reading data from storage network, therefore by storing data in easily
It can reduce the time that data are read from storage network in the property lost 313 nonvolatile memory 312 of memory.
In a kind of preferably embodiment, each auxiliary processing module 314 includes a programmable gate array 3141
An and self-learning module 3142；
Application processor 311, programmable gate array 3141 to form a detection module to edit；
Detection module forms feature record to detect the application program that different user executes under different time sections, and
Feature record is stored in non-volatile deposit in memory；
Application processor 311, programmable gate array 3141 are to judge current application program according to feature record
Whether flash memory 4 is accessed more than a preset threshold；
If so, executing current application program by application processor 311；
If it is not, the current application program then executed by primary processor 1.
In above-mentioned technical proposal, the self-learning algorithm of user behavior characteristics all at present is typically all to pass through in server
Primary processor 1, graphics processor and memory 2 execute, this can bring about a large amount of power consumption and cost problem.
The present invention proposes a kind of offline self-learning method using can configure multi-functional 3 structure of data processing unit,
We are further elaborated and apply to this offline self-learning method herein.Firstly, by being mentioned using the present invention
Application processor 311 out by certain time execute correspondingly monitoring program be used to monitor different user (User) in difference
The behavior situation (Hobby) of period (Time) interior different application (Application), passes through the self study of this period
The behavioural characteristic of user is divided into two kinds of situations, the situation more demanding to primary processor 1 (CPU) and to flash memory 4 access compare
Frequent situation.Then the correspondingly behavioural characteristic of the application programs different in different time period of different user is written easy
In the property lost 313 nonvolatile memory 312 of memory.It is specific as shown in table 1.
For example the operation program of the 8:00~9:00 operation of user A in the morning is A_X, the behavioural characteristic of the application program is
Flash memory 44 is accessed frequently, therefore application program A_X is executed by application processor 311, programmable gate array 3141；
The operation program that 11:00~12:00 of the user A in the morning is run is A_Y, and the behavioural characteristic of the application program is pair
Primary processor 1 is more demanding, therefore application program A_Y should be executed by primary processor 1.
For user B, the application program of morning 8:00~12:00 operation is B_Y, the behavioural characteristic of the application program
To be more demanding to primary processor 1, therefore application program should be executed by primary processor 1；
The application program of 13:00~21:00 operation is B_Z, and the behavioural characteristic of the application program is to access frequency to flash memory 44
It is numerous, therefore the application program should be executed by application processor 311, programmable gate array 31413211.
If it find that the behavioural characteristic of user is to the higher situation of processor requirement, then when the login phase of the user
The application program answered will just be executed by processor, if it find that user is more frequent to access storage network, then the user
Corresponding application program will just be executed by application processor 311 of the invention, programmable gate array 3141 when login.
Shown in specific step is as follows:
Step 1: application processor 311 and/or programmable gate array 3141 execute monitoring program, monitor different use
Family different time different application；
Step 2: by the self study of certain time, the behavior of different user different time sections different application is special
Sign is recorded；
Step 3: user logs in；
Step 4: according to the user of login, period, application program judges the behavioural characteristic of application program；
Step 5: corresponding executive mode is selected according to behavioural characteristic；
If the behavioural characteristic of the application program of login user be to storage network access frequently, the application program by
Application processor 311 and/or programmable gate array 3141 execute；
If the behavioural characteristic of the application program of login user is, the application program more demanding to primary processor 1
It is handled and is executed by primary processor 1, wherein it should be noted that above-mentioned application processor 311 and programmable gate array 3141
It can be by being performed simultaneously, or only one of execute.
In a kind of preferably embodiment, a client is also included at least, client is connect with central server, client
The phonetic order to input user is held to be sent to central server；
Phonetic order is converted to retrieval text by central server, and related to retrieval text according to the return one of retrieval text
Retrieval content to client；
Client one specified content of selection in retrieval content is sent to central server；
Application processor 311, programmable gate array 3141 and self-learning module 3142 are to carry out command content
Label；
Application processor 311, programmable gate array 3141 and self-learning module 3142 are also to the instruction to label
Content carries out feature extraction, and the command content with common trait is associated.
In above-mentioned technical proposal, in current wired home, user wants to obtain certain content, such as game, film etc.,
The content for wanting search is inputted generally by user speech, then the voice of user can be inputted and be converted to corresponding text by GPU
These contents will be returned to the client of user if finding and meeting the content of user demand by word, then removal search again, by
User makes a choice.
The tall and handsome product SHIELD reached is exactly to utilize voice input content, then converts speech into text by GPU and carries out
Search, while CPU/GPU is utilized, (central processing unit (CPU, CentralProcessing Unit) is one piece ultra-large
Integrated circuit is the arithmetic core (Core) and control core (Control Unit) of a computer.Its function is mainly
Data in interpretive machine instruction and processing computer software.
Graphics processor (Graphics Processing Unit, abbreviation: GPU), also known as shows core, visual processes
Device, display chip are one kind specially in PC, work station, game machine and some mobile devices (such as tablet computer, intelligence
Mobile phone etc.) on image operation work microprocessor.)
The content that corresponding machine learning algorithm searches for user is executed to learn.It is this to execute phase using CPU/GPU
Self-learning algorithm is answered to still fall within volatibility self study, simultaneously because CPU/GPU and DRAM will consume a large amount of power consumption and cost.
The present invention proposes a kind of side of classification and analysis that content is carried out using configurable multi-functional data processing unit 3
Method, basic principle are using application processor 311 and/or programmable gate array 3141 and self-learning module 3142 to user
The content selected after search is classified and is analyzed, i.e., the classification and analysis of content under off-line mode.
Specifically it can comprise the following steps that
Step 1: the user of client inputs the content accordingly to be searched by voice；
Step 2: the voice input of user is converted to corresponding text by the GPU in server-side；
We should be noted that the system in server-side is not aware that the accurate answer of the wanted problem of user herein, such as
User searches for " most melodious music ", then system can will only score relatively high, the music that user prefers returns to user,
The most desired answer of these music not necessarily user；
Step 3: the CPU in server-side is searched in the information that content supplier provides, and the content searched
The client for returning to user, the content for returning to user client is basic brief introduction, such as a list, such as the following table 2 institute
Show:
| Content | Brief introduction |
| Content A | The brief introduction of content A |
| Content B | The brief introduction of content B |
| Content C | The brief introduction of content C |
| …… | …… |
Table 2
The range of selection is reduced in this list for user, is inputted by the secondary click of user or voice, thus
The content most desired to user.
To note here is that partial content therein, other may be only existed in content supplier's memory 2 at this time
Content is simultaneously not present in memory 2, therefore while user carries out secondary click or voice inputs, system will just be stored in sudden strain of a muscle
The other content deposited in 4 or mechanical hard disk 5 is moved in memory 2.
For example return in the list of user that there are five candidate items, i.e. A, B, C, D and E, but A, C are only existed in memory 2
And E, therefore when user carries out secondary click or voice inputs, system moves the B being stored in flash memory 4 and D
In memory 2.
Step 4: user is clicked by 2 times or voice input selects corresponding content；
Step 5: application processor 311 and/or programmable gate array 3141 and self-learning module 3142 are according to user
Input and last selection learnt, it is tagged in the content that user finally selects, and have corresponding mark with other
The content of label carries out arrangement classification, and analyzes.
In this respect, it is noted that application processor 311 and/or programmable gate array 3141 and self-learning module 3142 are
The study carried out in disconnection mode, labels, classified finishing and analysis.
It is given one example below to illustrate.If user A inputs " action movie the most nice recently " by voice, first
GPU converts speech into text, returns to client in the form of a list after then searching for, as shown in table 3:
| Content | Brief introduction |
| Action movie A | The brief introduction of action movie A |
| Action movie B | The brief introduction of action movie B |
| Action movie C | The brief introduction of action movie C |
| Action movie D | The brief introduction of action movie D |
Table 3
User is clicked by 2 times or voice input selects " action movie B ", then primary processor 1 will play user
" the action movie B " of selection, while application processor 311 and/or programmable gate array 3141 and self-learning module 3142
It was found that the protagonist of action movie B is performer X, then application processor 311 and/or programmable gate array 3141 and self study
Module 3142 is just tagged by other films of action movie B and performer X, facilitates the lookup of other users, for use
Family provide preferably service, wherein it should be noted that above-mentioned application processor 311 and programmable gate array 3141 can
By being performed simultaneously, or only, one of those is executed.
In a kind of preferably embodiment, self-learning module 3142 is the non-volatile self study based on novel memory devices
Module 3142.
In a kind of preferably embodiment, 313 nonvolatile memory 312 of volatile memory be phase transition storage,
Any one in resistance-variable storing device, magnetic memory and ferroelectric memory.
In above-mentioned technical proposal, handle subelement in memory in volatile memory 31334 be DRAM, for and
Application processor 311 handles related pending data together, in volatile memory 313 (DRAM) and memory 2 here
DRAM is different, and the DRAM in memory 2 is manufactured by advanced technologies, because it works together with processor, it is therefore desirable to
High reading speed, so it is with DDR4 DDR5 agreement, although and handling the volatile memory 313 in subelement
For DRAM, but it is the DRAM of depreciation technique manufacture, and agreement is DDR or DDR2.
Handling the nonvolatile memory 312 in subelement can be novel nonvolatile memory 312, for example phase transformation is deposited
Reservoir, resistance-variable storing device, magnetic memory and ferroelectric memory etc., or the flash memory 4 of SLC, non-volatile memories here
The reading speed of device 312 is faster than the reading speed of flash memory 4 and mechanical hard disk 5.
A large amount of 4 product of flash memory and the composition storage network of mechanical hard disk 5, such as SSD or eMMC, store in network 4
Face may include 4 product of flash memory of distinct interface different agreement, for example have eMMC 4.0, eMMC 5.0 and UFS interface association
4 product of flash memory of view.
The foregoing is merely preferred embodiments of the present invention, are not intended to limit embodiments of the present invention and protection model
It encloses, to those skilled in the art, should can appreciate that all with made by description of the invention and diagramatic content
Equivalent replacement and obviously change obtained scheme, should all be included within the scope of the present invention.
Claims (10)
1. a kind of configurable multi-functional data processing unit is applied in data center server, the data center services
Device includes primary processor, memory, flash memory and mechanical hard disk, which is characterized in that including a data processing unit, the data
Between processing unit connection and the memory and the flash memory；
The data processing unit includes multiple data processing subelements；
Each data processing subelement includes:
Application processor；
Memory is connect with the application processor, and the application processor is to add the pending data in the memory
It is loaded onto the memory；
Multiple auxiliary processing modules, multiple auxiliary processing modules are connect with the application processor respectively；
The application processor and/or the auxiliary processing module are to carry out the pending data in the memory
The processing result is stored in the flash memory by processing with forming a processing result.
2. multi-functional data processing unit according to claim 1, which is characterized in that the flash memory includes one first encryption
Module, first encrypting module is to be encrypted or be decrypted to the pending data；
Each auxiliary processing module includes a programmable gate array and a self-learning module；
The application processor and/or the programmable logic gate array to form one second encrypting module to configure, and pass through
Second encrypting module is encrypted or is decrypted to the pending data；
The application processor is also to judge whether the security level of the pending data meets a default security level；
If so, after being encrypted by first encrypting module to the pending data, then pass through the second encrypting module pair
The pending data is encrypted again；
If it is not, only being encrypted by first encrypting module to the pending data.
3. multi-functional data processing unit according to claim 1, which is characterized in that the flash memory includes one first error correction
Module, the correction module is to carry out error correction to the pending data；
Each auxiliary processing module includes a programmable gate array and a self-learning module；
The application processor and/or the programmable logic gate array to form one second correction module to configure, and pass through
Second encrypting module carries out error correction to the pending data.
The application processor also judges to the type to the pending data；
If one first crucial rating-type data, error correction is carried out to the pending data by first correction module
Afterwards, then by the second correction module error correction is carried out again to the pending data after error correction；
If one second crucial rating-type data, only the pending data is entangled by first correction module
It is wrong.
4. multi-functional data processing unit according to claim 3, which is characterized in that each memory includes one
Nonvolatile memory and a volatile memory,
The application processor also judges to the type to the pending data:
If a third key rating-type data, then the application processor saves the pending data to described non-easy
In the property lost memory；
Error correction is carried out to the pending data by first correction module first, includes a false detection in the flash memory
Device, if first controller generate error correction bit be greater than first correction module institute energy error correction a standard digit；
The application processor calls second correction module to carry out error correction to the pending data.
5. multi-functional data processing unit according to claim 1, which is characterized in that each auxiliary processing module packet
Include a programmable gate array and a self-learning module；
Each memory includes a nonvolatile memory and a volatile memory；
The application processor and/or the programmable logic gate array also to form a garbage reclamation module to configure；Institute
It states and preserves data file in flash memory；
The data file of the application processor and/or the programmable logic gate array also to access user
Access frequent degree recorded；
The garbage reclamation module according to the record data file minimum to access frequent degree to delete.
6. multi-functional data processing unit according to claim 5, which is characterized in that the application processor and/or institute
Programmable logic gate array is stated to be classified according to access record to the access frequent degree of the data file；
If the access frequent degree of the data file is the first estate, and the data file is less than one first preset value
When presently described data file is stored in the volatile memory；
If the access frequent degree of the data file is the second grade, and the data file is greater than described second and presets
Presently described data file is stored in the nonvolatile memory when value.
7. multi-functional data processing unit according to claim 1, which is characterized in that each auxiliary processing module packet
Include a programmable gate array and a self-learning module；
The application processor and/or the programmable gate array to form a detection module to edit；
The detection module forms feature record to detect the application program that different user executes under different time sections, and
Feature record is stored in described non-volatile deposit in memory；
The application processor and/or the programmable gate array are to according to feature record judgement currently
Whether application program accesses more than a preset threshold flash memory；
If so, executing the current application program by the application processor；
If it is not, the current application program then executed by the primary processor.
8. multi-functional data processing unit according to claim 1, which is characterized in that also include at least a client, institute
It states client to connect with the central server, the client is sent in described to the phonetic order for inputting user
Central server；
The phonetic order is converted to retrieval text by the central server, and according to the retrieval text return one with it is described
The relevant retrieval content of text is retrieved to the client；
The client selects a specified content to be sent to the central server in the retrieval content；
The application processor and/or the programmable gate array and the self-learning module are to described instruction content
It is marked；
The application processor and/or the programmable gate array and the self-learning module are also to described in label
Command content carries out feature extraction, and the described instruction content with common trait is associated.
9. according to the multi-functional data processing unit any in claim 2,3,5,7 or 8, which is characterized in that the self-study
Habit module is the non-volatile self-learning module based on novel memory devices.
10. the multi-functional data processing unit according to claim 3 or 5, which is characterized in that the nonvolatile memory
For any one in phase transition storage, resistance-variable storing device, magnetic memory and ferroelectric memory.
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| CN109599155A (en) * | 2018-12-10 | 2019-04-09 | 上海新储集成电路有限公司 | A kind of intelligent service system and method applied to medical data center |
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| CN104158875A (en) * | 2014-08-12 | 2014-11-19 | 上海新储集成电路有限公司 | Method and system for sharing and reducing tasks of data center server |
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