CN110176908B - Switched capacitor integrator based on dynamic amplifier - Google Patents
Switched capacitor integrator based on dynamic amplifier Download PDFInfo
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Abstract
一种基于动态放大器的开关电容积分器,包括:动态放大器,用于放大输入信号,动态放大器包括运算放大模块和尾部电流偏置模块,其中,运算放大模块用于提供预定的放大增益,尾部电流偏置模块用于为运算放大模块提供偏置电流,以确定运算放大模块的直流工作点;两开关电容网络,分别设于动态放大器的正向输入端和反向输入端,用于在第一状态时对输入信号进行采样,并在第二状态时将采样后的信号输入至动态放大器;两积分电容,分别连接于动态放大器的正向输入端和反向输出端以及反向输入端和正向输出端,用于对采样后的信号进行积分。通过采用无电容负载的动态放大器,极大地降低了功率消耗。
A switched capacitor integrator based on a dynamic amplifier, comprising: a dynamic amplifier for amplifying an input signal, the dynamic amplifier comprising an operational amplifier module and a tail current bias module, wherein the operational amplifier module is used to provide a predetermined amplification gain, and the tail current The bias module is used to provide bias current for the operational amplifier module to determine the DC operating point of the operational amplifier module; two switched capacitor networks, respectively set at the forward input end and the reverse input end of the dynamic amplifier, are used for the first In the second state, the input signal is sampled, and in the second state, the sampled signal is input to the dynamic amplifier; two integral capacitors are respectively connected to the forward input terminal and the reverse output terminal of the dynamic amplifier, as well as the reverse input terminal and the forward direction. The output terminal is used to integrate the sampled signal. Power consumption is greatly reduced by using dynamic amplifiers without capacitive loads.
Description
技术领域technical field
本公开涉及集成电路技术领域,具体地,涉及一种基于动态放大器的开关电容积分器。The present disclosure relates to the technical field of integrated circuits, and in particular, to a switched capacitor integrator based on a dynamic amplifier.
背景技术Background technique
开关电容积分器在模拟滤波器、模拟数字转换器中有着广泛应用,传统的基于动态放大器的开关电容积分器功耗高,而动态放大器没有静态功耗,其开关工作的特点,使其适合开关电容积分器。但普通的动态放大器中有电容负载,额外增加了功率消耗。Switched capacitor integrators are widely used in analog filters and analog-to-digital converters. Traditional switched capacitor integrators based on dynamic amplifiers have high power consumption, while dynamic amplifiers have no static power consumption. The characteristics of their switching operations make them suitable for switching. Capacitive integrator. But ordinary dynamic amplifiers have capacitive loads, which add extra power consumption.
发明内容SUMMARY OF THE INVENTION
(一)要解决的技术问题(1) Technical problems to be solved
基于上述问题,本公开提供了一种基于动态放大器的开关电容积分器,其动态放大器不采用负载大电容,可以降低积分器的功率损耗并提高积分器的增益。Based on the above problems, the present disclosure provides a switched capacitor integrator based on a dynamic amplifier. The dynamic amplifier does not use a large load capacitance, which can reduce the power loss of the integrator and improve the gain of the integrator.
(二)技术方案(2) Technical solutions
本公开提供了一种基于动态放大器的开关电容积分器,包括:动态放大器,用于放大输入信号,包括运算放大模块和尾部电流偏置模块,其中,所述运算放大模块用于提供预定的放大增益,所述尾部电流偏置模块用于为所述运算放大模块提供偏置电流,以确定所述运算放大模块的直流工作点;两开关电容网络,分别设于所述动态放大器的正向输入端和反向输入端,用于在第一状态时对所述输入信号进行采样,并在第二状态时将采样后的信号输入至所述动态放大器;两积分电容,分别连接于所述动态放大器的正向输入端和反向输出端以及反向输入端和正向输出端,用于对所述采样后的信号进行积分。The present disclosure provides a switched capacitor integrator based on a dynamic amplifier, comprising: a dynamic amplifier for amplifying an input signal, including an operational amplifier module and a tail current bias module, wherein the operational amplifier module is used to provide a predetermined amplification gain, the tail current bias module is used to provide bias current for the operational amplifier module to determine the DC operating point of the operational amplifier module; two switched capacitor networks are respectively set at the forward input of the dynamic amplifier terminal and reverse input terminal, used for sampling the input signal in the first state, and inputting the sampled signal to the dynamic amplifier in the second state; two integrating capacitors, respectively connected to the dynamic amplifier The forward input end and the reverse output end and the reverse input end and the forward output end of the amplifier are used for integrating the sampled signal.
可选地,所述运算放大模块包括四个MOS场效应管,分别为M1、M2、MC1以及MC2,以及包括两个MOS开关Φrst,所述M1和M2的栅极分别为所述反向输入端和正向输入端,所述M1和M2的源极相连,所述M1和M2的的漏极分别与所述MC1和MC2的源极连接,所述MC1和MC2的漏极分别为所述正向输出端和反向输出端,并分别通过一MOS开关Φrst与参考电压VDD相连,所述MC1与MC2的栅极相连。Optionally, the operational amplifier module includes four MOS field effect transistors, M 1 , M 2 , M C1 and M C2 respectively, and two MOS switches Φ rst , the gates of the M 1 and M 2 are are respectively the reverse input terminal and the forward input terminal, the sources of M 1 and M 2 are connected, and the drain electrodes of M 1 and M 2 are respectively connected to the sources of M C1 and M C2 , The drains of the M C1 and M C2 are respectively the forward output terminal and the reverse output terminal, and are respectively connected to the reference voltage V DD through a MOS switch Φ rst , and the M C1 is connected to the gate of the M C2 . .
可选地,所述运算放大模块还包括两偏置电容,分别为Cb1与Cb2,所述Cb1与Cb2串联,且所述Cb1与Cb2相连的一端与所述MC1和MC2的栅极相连,所述Cb1的另一端与所述正向输出端连接,所述Cb2的另一端与所述反向输出端连接。Optionally, the operational amplifier module further includes two bias capacitors, namely C b1 and C b2 , the C b1 and C b2 are connected in series, and the end connected to the C b1 and C b2 is connected to the M C1 and C b2 . The gate of M C2 is connected to the gate, the other end of the C b1 is connected to the forward output end, and the other end of the C b2 is connected to the reverse output end.
可选地,所述尾部电流偏置模块包括一MOS开关Φen、MOS场效应管MT1、MT2以及一电阻RB1,所述MT1和MT2的栅极连接后与所述电阻RB1的一端连接,所述MT1和MT2的源极与地连接,所述MT1的漏极与所述电阻RB1的一端连接,所述电阻RB1的另一端与一预设电压连接,所述MT2的漏极通过所述MOS开关Φen与所述M1与M2的源极连接。Optionally, the tail current bias module includes a MOS switch Φ en , MOS field effect transistors M T1 , M T2 and a resistor R B1 , and the gates of the M T1 and M T2 are connected to the resistor R after being connected. One end of B1 is connected, the sources of MT1 and MT2 are connected to ground, the drain of MT1 is connected to one end of the resistor RB1 , and the other end of the resistor RB1 is connected to a preset voltage , the drain of the M T2 is connected to the sources of the M 1 and M 2 through the MOS switch Φ en .
可选地,每一所述开关电容网络包括一电容C、MOS开关Φ1、MOS开关Φ1e、MOS开关Φ2以及MOS开关Φ2e,所述电容C一端与所述MOS开关Φ1连接,另一端通过所述MOS开关Φ2e与所述运算放大模块的正向输入端或反向输入端连接,所述电容C的一端还通过MOS开关Φ2与第一共模输入电压连接,所述电容C的另一端还通过MOS开关Φ1e与第二共模输入电压连接。Optionally, each of the switched capacitor networks includes a capacitor C, a MOS switch Φ 1 , a MOS switch Φ 1e , a MOS switch Φ 2 and a MOS switch Φ 2e , and one end of the capacitor C is connected to the MOS switch Φ 1 , The other end is connected to the forward input end or the reverse input end of the operational amplifier module through the MOS switch Φ 2e , and one end of the capacitor C is also connected to the first common-mode input voltage through the MOS switch Φ 2 , the The other end of the capacitor C is also connected to the second common mode input voltage through the MOS switch Φ 1e .
可选地,还包括外置时钟,用于产生时钟信号以控制所述MOS开关Φ1、MOS开关Φ1e、MOS开关Φ2、MOS开关Φ2e、MOS开关Φrst以及MOS开关Φen。Optionally, an external clock is also included for generating a clock signal to control the MOS switch Φ 1 , MOS switch Φ 1e , MOS switch Φ 2 , MOS switch Φ 2e , MOS switch Φ rst and MOS switch Φ en .
可选地,所述第一状态为所述MOS开关Φ1e和MOS开关Φ1处于工作状态,所述第二状态为所述MOS开关Φ2e和MOS开关Φ2处于工作状态,所述第二状态工作于所述第一状态之后。Optionally, the first state is that the MOS switch Φ 1e and the MOS switch Φ 1 are in an operating state, the second state is that the MOS switch Φ 2e and the MOS switch Φ 2 are in an operating state, and the second state is that the MOS switch Φ 2e and the MOS switch Φ 2 are in an operating state. A state operates after the first state.
可选地,所述MOS开关Φ1e超前于MOS开关Φ1工作,其工作频率均为3.072MHz;所述MOS开关Φ2e超前于MOS开关Φ2工作,其工作频率均为3.072MHz。Optionally, the MOS switch Φ1e works ahead of the MOS switch Φ1, and its operating frequency is both 3.072 MHz; the MOS switch Φ2e works ahead of the MOS switch Φ2, and its operating frequency is both 3.072 MHz.
可选地,所述MOS开关Φen连续工作于MOS开关Φrst之后,且所述MOS开关Φen和MOS开关Φrst的总工作区间与所述MOS开关Φ2或Φ2e的工作区间一致。Optionally, the MOS switch Φ en continuously operates after the MOS switch Φ rst , and the total operating interval of the MOS switch Φ en and the MOS switch Φ rst is consistent with the operating interval of the MOS switch Φ 2 or Φ 2e .
可选地,所述外置时钟的工作频率为6.144MHz。Optionally, the operating frequency of the external clock is 6.144MHz.
(三)有益效果(3) Beneficial effects
本公开提供的基于动态放大器的开关电容积分器,具有以下有益效果:The switched capacitor integrator based on the dynamic amplifier provided by the present disclosure has the following beneficial effects:
(1)本公开的动态放大器中不存在大的负载电容,节省了电路面积和复杂度,并节省了无用的功率消耗;(1) There is no large load capacitance in the dynamic amplifier of the present disclosure, which saves circuit area and complexity, and saves useless power consumption;
(2)通过将动态放大器中传统的PMOS负载改为MOS开关,可以将放大器的增益提高2倍左右,改善了积分器的精度,并且可以增大放大器的摆幅,提高了积分器的线性度。(2) By changing the traditional PMOS load in the dynamic amplifier to a MOS switch, the gain of the amplifier can be increased by about 2 times, the accuracy of the integrator can be improved, the swing of the amplifier can be increased, and the linearity of the integrator can be improved .
附图说明Description of drawings
图1示意性示出了本公开实施例提供的基于动态放大器的开关电容积分器的结构示意图。FIG. 1 schematically shows a schematic structural diagram of a dynamic amplifier-based switched capacitor integrator provided by an embodiment of the present disclosure.
图2示意性示出了本公开实施例提供的动态放大器的详细结构示意图。FIG. 2 schematically shows a detailed structural diagram of a dynamic amplifier provided by an embodiment of the present disclosure.
图3示意性示出了本公开实施例提供的外置时钟工作时序示意图。FIG. 3 schematically shows a schematic diagram of a working sequence of an external clock provided by an embodiment of the present disclosure.
具体实施方式Detailed ways
为使本发明的目的、技术方案和优点更加清楚明白,以下结合具体实施例,并参照附图,对本发明进一步详细说明。In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to specific embodiments and accompanying drawings.
开关电容积分器是一种常见的模拟电路模块,在模拟集成滤波器和模拟数字转换器中被广泛使用,传统的开关电容积分电路通常采用普通动态放大器作为有源放大元件,其功率消耗往往很大,在本公开的实施例中,提供了一种基于动态放大器的开关电容积分器,以降低积分器的功率消耗。Switched capacitor integrator is a common analog circuit module, which is widely used in analog integrated filters and analog-to-digital converters. Traditional switched capacitor integrator circuits usually use ordinary dynamic amplifiers as active amplifying components, and their power consumption is often very high. Large, in an embodiment of the present disclosure, a dynamic amplifier based switched capacitor integrator is provided to reduce the power consumption of the integrator.
参阅图1,结合图2和图3,对本公开中基于动态放大器的开关电容积分器进行详细说明。Referring to FIG. 1 , in conjunction with FIGS. 2 and 3 , the dynamic amplifier-based switched capacitor integrator in the present disclosure will be described in detail.
如图1所示,本实施例中基于动态放大器的开关电容积分器包括动态放大器、两开关电容网络和两积分电容。As shown in FIG. 1 , the switched capacitor integrator based on the dynamic amplifier in this embodiment includes a dynamic amplifier, two switched capacitor networks and two integrating capacitors.
动态放大器用于放大输入信号,其包括运算放大模块和尾部电流偏置模块,其中,动态放大器用于提供预定的增益以放大输入信号,尾部电流偏置模块用于为运算放大模块提供偏置电流,以确定运算放大模块的直流工作点,从而使得运算放大模块开始工作,具体地,参阅图2。The dynamic amplifier is used to amplify the input signal, which includes an operational amplifier module and a tail current bias module, wherein the dynamic amplifier is used to provide a predetermined gain to amplify the input signal, and the tail current bias module is used to provide bias current for the operational amplifier module , to determine the DC operating point of the operational amplifier module, so that the operational amplifier module starts to work, specifically, refer to FIG. 2 .
运算放大模块包括四个MOS场效应管,分别为M1、M2、MC1以及MC2,以及两MOS开关Φrst,其中,四个MOS场效应管构成了共源共栅结构,可以在不引入额外极点的前提下,提供较大增益。与传统动态放大器相比,本实施例中的动态放大器不包括PMOS电流源负载,而由两个复位用MOS开关Φrst代替,用于将输出电压复位至电源电压,设置动态放大器工作的初始条件。M1与M2相邻设置,M1与M2的栅极分别为该运算放大模块的反向输入端和正向输入端,M1与M2的源极相互连接,M1与M2的漏极分别与MC1与MC2的源极连接,MC1与MC2的漏极分别为正向输出端和反向输出端,并分别通过一MOS开关Φrst与参考电压VDD连接,当MOS开关Φrst接通时,将运算放大模块的反向输出端和正向输出端复位至参考电压,MC1与MC2的栅极相互连接。The operational amplifier module includes four MOS field effect transistors, namely M 1 , M 2 , M C1 and M C2 , and two MOS switches Φ rst , wherein the four MOS field effect transistors form a cascode structure, which can be used in Provides greater gain without introducing additional poles. Compared with the traditional dynamic amplifier, the dynamic amplifier in this embodiment does not include a PMOS current source load, but is replaced by two reset MOS switches Φ rst , which are used to reset the output voltage to the power supply voltage and set the initial conditions for the dynamic amplifier to work. . M 1 and M 2 are arranged adjacent to each other, the gates of M 1 and M 2 are respectively the reverse input terminal and the forward input terminal of the operational amplifier module, the sources of M 1 and M 2 are connected to each other, and the gates of M 1 and M 2 are connected to each other. The drains are respectively connected with the sources of M C1 and M C2 , and the drains of M C1 and M C2 are respectively the forward output terminal and the reverse output terminal, and are respectively connected to the reference voltage V DD through a MOS switch Φ rst , when When the MOS switch Φ rst is turned on, the reverse output terminal and the forward output terminal of the operational amplifier module are reset to the reference voltage, and the gates of M C1 and M C2 are connected to each other.
该运算放大模块还包括两偏置电容,分别为电容Cb1与电容Cb2,该两个偏置电容的电容较小,电容Cb1与电容Cb2串联,且电容Cb1的一端与正向输出端Von连接,电容Cb1的另一端与MC1或MC2的栅极连接;电容Cb2的一端与反向输出端Vop连接,电容Cb2的另一端与MC1或MC2的栅极连接。用于为MC1或MC2提供动态偏置电压,因其容值较小,不会恶化积分器的建立特性。The operational amplifier module further includes two bias capacitors, namely a capacitor C b1 and a capacitor C b2 , the capacitances of the two bias capacitors are relatively small, the capacitor C b1 and the capacitor C b2 are connected in series, and one end of the capacitor C b1 is connected to the forward direction The output terminal Von is connected, and the other end of the capacitor C b1 is connected to the gate of M C1 or M C2 ; one end of the capacitor C b2 is connected to the reverse output terminal Vop, and the other end of the capacitor C b2 is connected to the gate of M C1 or M C2 connect. It is used to provide a dynamic bias voltage for M C1 or M C2 because its small capacitance does not degrade the settling characteristics of the integrator.
尾部电流偏置模块包括一MOS开关Φen,MOS场效应管MT1和MT2以及一偏置电阻RB1,MOS场效应管MT1和MT2构成电流镜,MT1和MT2的栅极连接后与电阻RB1的一端连接,MT1和MT2的源极与地连接,MT1的漏极与电阻RB1的一端连接,电阻RB1的另一端与一预设电压连接,MT2的漏极通过一MOS开关Φen与M1与M2的源极连接。在MOS开关Φrst闭合时,开关将正向输出端Von和反向输出端Vop复位至参考电压VDD,随后当MOS开关Φen闭合时,尾电流偏置模块被接入电路,提供下沉电流,从而该动态放大器开始工作。The tail current bias module includes a MOS switch Φ en , MOS field effect transistors M T1 and M T2 and a bias resistor R B1 , the MOS field effect transistors M T1 and M T2 form a current mirror, and the gates of M T1 and M T2 After connection, it is connected to one end of the resistor R B1 , the sources of M T1 and M T2 are connected to the ground, the drain of M T1 is connected to one end of the resistor R B1 , the other end of the resistor R B1 is connected to a preset voltage, and the M T2 The drain of M 1 is connected to the source of M 1 and M 2 through a MOS switch Φ en . When the MOS switch Φ rst is closed, the switch resets the forward output terminal Von and the reverse output terminal Vop to the reference voltage V DD , and then when the MOS switch Φ en is closed, the tail current bias module is connected to the circuit to provide sinking current, so that the dynamic amplifier starts to work.
本公开实施例公开的动态放大器的工作相分为共模和差模两部分,就共模而言下沉电流会将Von和反向输出端Vop的电压拉低,直到一个合适的输出共模电压上,本公开实施例中优选为VDD/2,与此同时,输入差模信号,可以通过积分电容CInp和CInn上建立差模输出电压,完成积分功能。The working phase of the dynamic amplifier disclosed in the embodiments of the present disclosure is divided into two parts: common mode and differential mode. In terms of common mode, the sinking current will pull down the voltages of Von and the reverse output terminal Vop until a suitable output common mode is reached. In terms of voltage, in the embodiment of the present disclosure, it is preferably V DD /2. At the same time, a differential mode signal is input, and a differential mode output voltage can be established on the integrating capacitors C Inp and C Inn to complete the integration function.
两开关电容网络,分别设于动态放大器的正向输入端和反向输入端,用于在第一状态时对输入信号进行采样,并在第二状态时将采样后的信号输入至动态放大器,具体地,参阅图1。Two switched capacitor networks, respectively set at the forward input terminal and the reverse input terminal of the dynamic amplifier, are used to sample the input signal in the first state, and input the sampled signal to the dynamic amplifier in the second state, Specifically, see FIG. 1 .
两开关电容网络分别为正向输入端开关电容网络和反向输入端开关电容网络,正向输入端开关电容网络包括一电容C、MOS开关Φ1、MOS开关Φ1e、MOS开关Φ2以及MOS开关Φ2e,电容C一端与MOS开关Φ1连接,另一端通过MOS开关Φ2e与运算放大模块的正向输入端或反向输入端连接,电容C的一端还通过MOS开关Φ2与第一共模输入电压连接,电容C的另一端还通过MOS开关Φ1e与第二共模输入电压连接;反向输入端开关电容网络包括一电容C、MOS开关Φ1、MOS开关Φ1e、MOS开关Φ2以及MOS开关Φ2e,电容C一端与MOS开关Φ1连接,另一端通过MOS开关Φ2e与运算放大模块的正向输入端或反向输入端连接,电容C的一端还通过MOS开关Φ2与第一共模输入电压连接,电容C的另一端还通过MOS开关Φ1e与第二共模输入电压连接。第一状态为MOS开关Φ1e和MOS开关Φ1处于工作状态,此时通过电容C对输入信号进行采样,第二状态为MOS开关Φ2e和MOS开关Φ2处于工作状态,此时将电容C采样所得信号转移至积分电容中并进行放大,且第二状态工作于第一状态之后。The two switched capacitor networks are respectively a forward input switched capacitor network and a reverse input switched capacitor network. The forward input switched capacitor network includes a capacitor C, a MOS switch Φ 1 , a MOS switch Φ 1e , a MOS switch Φ 2 and a MOS Switch Φ 2e , one end of the capacitor C is connected to the MOS switch Φ 1 , the other end is connected to the forward input terminal or the reverse input terminal of the operational amplifier module through the MOS switch Φ 2e , and one end of the capacitor C is also connected to the first through the MOS switch Φ 2 . The common mode input voltage is connected, and the other end of the capacitor C is also connected to the second common mode input voltage through the MOS switch Φ 1e ; the switched capacitor network of the reverse input terminal includes a capacitor C, a MOS switch Φ 1 , a MOS switch Φ 1e , a MOS switch Φ 2 and the MOS switch Φ 2e , one end of the capacitor C is connected to the MOS switch Φ 1 , the other end is connected to the forward input terminal or the reverse input terminal of the operational amplifier module through the MOS switch Φ 2e , and one end of the capacitor C is also connected to the MOS switch Φ. 2 is connected to the first common mode input voltage, and the other end of the capacitor C is also connected to the second common mode input voltage through the MOS switch Φ 1e . The first state is that the MOS switch Φ 1e and the MOS switch Φ 1 are in the working state, and the input signal is sampled through the capacitor C at this time, and the second state is that the MOS switch Φ 2e and the MOS switch Φ 2 are in the working state, and the capacitor C The sampled signal is transferred to the integrating capacitor and amplified, and the second state operates after the first state.
两积分电容,分别连接于动态放大器的正向输入端和反向输出端以及连接于动态放大器反向输入端和正向输出端,用于对采样后的信号进行积分。具体地,本实施例中的两积分电容分别为CInp和CInn,其中,CInp跨接于动态放大器反向输入端和正向输出端之间,CInn跨接于动态放大器正向输入端和反向输出端之间。The two integrating capacitors are respectively connected to the forward input terminal and the reverse output terminal of the dynamic amplifier and to the reverse input terminal and the forward output terminal of the dynamic amplifier, and are used for integrating the sampled signal. Specifically, the two integrating capacitors in this embodiment are C Inp and C Inn respectively, wherein C Inp is connected between the reverse input terminal and the forward output terminal of the dynamic amplifier, and C Inn is connected across the forward input terminal of the dynamic amplifier and the reverse output.
本实施例中,基于动态放大器的开关电容积分器还包括一外置时钟FCLK,用于产生时钟信号以控制MOS开关Φ1、MOS开关Φ1e、MOS开关Φ2、MOS开关Φ2e、MOS开关Φrst以及MOS开关Φen,其提供的时钟信号参阅图3。本实施例中的外置时钟FCLK的频率为6.144MHz,MOS开关Φ1e超前于MOS开关Φ1工作,其工作频率均为3.072MHz;MOS开关Φ2e超前于MOS开关Φ2工作,其工作频率均为3.072MHz,可以满足对24KHz带宽的音频信号的64倍过采样率,MOS开关Φ1与MOS开关Φ2不交叠。MOS开关Φen连续工作于MOS开关Φrst之后,且MOS开关Φen和MOS开关Φrst的总工作区间与MOS开关Φ2或Φ2e的工作区间一致,可以保证采样电容和积分电容在接通瞬间不会由于电荷共享在输出节点发生大的瞬态电压的跌落。In this embodiment, the switched capacitor integrator based on the dynamic amplifier further includes an external clock F CLK for generating a clock signal to control the MOS switch Φ 1 , the MOS switch Φ 1e , the MOS switch Φ 2 , the MOS switch Φ 2e , the MOS switch Φ 2e , and the MOS switch Φ 2e . The clock signal provided by the switch Φ rst and the MOS switch Φ en is shown in FIG. 3 . The frequency of the external clock F CLK in this embodiment is 6.144 MHz, the MOS switch Φ 1e works ahead of the MOS switch Φ 1 , and its operating frequency is both 3.072 MHz; the MOS switch Φ 2e works ahead of the MOS switch Φ 2 , and its working frequency is 3.072 MHz. The frequencies are both 3.072MHz, which can satisfy the oversampling rate of 64 times for the audio signal with the bandwidth of 24KHz, and the MOS switch Φ 1 and the MOS switch Φ 2 do not overlap. The MOS switch Φ en works continuously after the MOS switch Φ rst , and the total operating range of the MOS switch Φ en and the MOS switch Φ rst is consistent with the operating range of the MOS switch Φ 2 or Φ 2e , which can ensure that the sampling capacitor and the integrating capacitor are turned on. A large transient voltage drop at the output node does not occur instantaneously due to charge sharing.
本公开实施例提供的开关电容积分器为全差分结构,整个开关电容积分器的工作分为采样相和转移放大相,其中,采样相由MOS开关Φ1控制,转移放大相由MOS开关Φ2控制,两个电容C为采样电容,Φ1e和Φ1相比,边沿较早到来,可以减少电荷注入效应对线性度的影响,这是一种底板采样技术。两个采样电容C和积分电容CInp、CInn构成电容反馈网络,借助动态放大器较高的小信号电压增益,会在其输入端形成“虚短”效应,从而采样电容在采样相采集到的信号电荷会被迫转移到积分电容上,从而完成了积分功能。The switched capacitor integrator provided by the embodiment of the present disclosure has a fully differential structure, and the work of the entire switched capacitor integrator is divided into a sampling phase and a transfer amplifying phase, wherein the sampling phase is controlled by the MOS switch Φ 1 , and the transfer amplifying phase is controlled by the MOS switch Φ 2 Control, the two capacitors C are sampling capacitors. Compared with Φ 1e and Φ 1 , the edge arrives earlier, which can reduce the influence of the charge injection effect on the linearity. This is a backplane sampling technology. The two sampling capacitors C and the integrating capacitors C Inp and C Inn form a capacitive feedback network. With the help of the high small-signal voltage gain of the dynamic amplifier, a "virtual short" effect will be formed at the input end of the dynamic amplifier, so that the sampling capacitor collects the signal in the sampling phase. The signal charge will be forced to transfer to the integrating capacitor, thus completing the integrating function.
至此,已经结合附图对本实施例进行了详细描述。依据以上描述,本领域技术人员应当对本公开中基于动态放大器的开关电容积分器有了清楚的认识。本公开实施例提供一种基于动态放大器的开关电容积分器,和传统放大器相比动态放大器的使用可以减少积分器的功率消耗。同时,本公开通过合适的时序安排,可以移除动态放大器的大负载电容,进一步减少了功耗。So far, the present embodiment has been described in detail with reference to the accompanying drawings. Based on the above description, those skilled in the art should have a clear understanding of the dynamic amplifier-based switched capacitor integrator in the present disclosure. Embodiments of the present disclosure provide a switched capacitor integrator based on a dynamic amplifier. Compared with a traditional amplifier, the use of the dynamic amplifier can reduce the power consumption of the integrator. At the same time, the present disclosure can remove the large load capacitance of the dynamic amplifier through proper timing arrangement, and further reduce the power consumption.
以上所述的具体实施例,对本发明的目的、技术方案和有益效果进行了进一步详细说明,所应理解的是,以上所述仅为本发明的具体实施例而已,并不用于限制本发明,凡在本发明的精神和原则之内,所做的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。The specific embodiments described above further describe the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above descriptions are only specific embodiments of the present invention, and are not intended to limit the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4520283A (en) * | 1981-09-01 | 1985-05-28 | Itsuo Sasaki | Band pass filter with a switched capacitor |
| US6344767B1 (en) * | 2000-01-28 | 2002-02-05 | The Hong Kong University Of Science And Technology | Switched-opamp technique for low-voltage switched capacitor circuits |
| CN1933324A (en) * | 2005-09-12 | 2007-03-21 | 三洋电机株式会社 | Differential operational amplifier |
| CN101625718A (en) * | 2009-06-19 | 2010-01-13 | 复旦大学 | Double sampling integrator |
| CN109474249A (en) * | 2018-09-25 | 2019-03-15 | 东南大学 | High Gain and High Linearity Dynamic Amplifier for ADC |
-
2019
- 2019-05-20 CN CN201910421155.5A patent/CN110176908B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4520283A (en) * | 1981-09-01 | 1985-05-28 | Itsuo Sasaki | Band pass filter with a switched capacitor |
| US6344767B1 (en) * | 2000-01-28 | 2002-02-05 | The Hong Kong University Of Science And Technology | Switched-opamp technique for low-voltage switched capacitor circuits |
| CN1933324A (en) * | 2005-09-12 | 2007-03-21 | 三洋电机株式会社 | Differential operational amplifier |
| CN101625718A (en) * | 2009-06-19 | 2010-01-13 | 复旦大学 | Double sampling integrator |
| CN109474249A (en) * | 2018-09-25 | 2019-03-15 | 东南大学 | High Gain and High Linearity Dynamic Amplifier for ADC |
Non-Patent Citations (1)
| Title |
|---|
| Modeling of Non-Ideal Switch-Capacitor Integrator and Its Effect on Baseband Sigma-Delta Modulator Stability and Output Dynamic Range;Pooya Torkzadeh等;《2005 International Conference on Microelectronics》;20060213;正文摘要部分和第Ⅰ、Ⅱ节,图1、2 * |
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