CN110311053A - Display panel and manufacturing method thereof - Google Patents
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
- H10K50/11—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
- H10K50/115—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising active inorganic nanostructures, e.g. luminescent quantum dots
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
- H10K50/11—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
- H10K50/125—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light
- H10K50/13—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
- H10K50/131—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit with spacer layers between the electroluminescent layers
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
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- H10K50/80—Constructional details
- H10K50/84—Passivation; Containers; Encapsulations
- H10K50/842—Containers
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/122—Pixel-defining structures or layers, e.g. banks
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- H—ELECTRICITY
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/30—Devices specially adapted for multicolour light emission
- H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
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- H—ELECTRICITY
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
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- Chemical & Material Sciences (AREA)
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Abstract
本发明提供了一种显示面板及其制造方法,所述制造方法包括如下步骤:提供驱动背板和发光基板,所述驱动背板上设置有第一键合金属层,所述发光基板上设置有第二键合金属层;将所述驱动背板的第一键合金属层与所述发光基板的第二键合金属层进行金属键合,形成金属键合层;图形化所述发光基板和所述金属键合层,形成像素阵列;在所述像素阵列外侧形成薄膜封装层,所述薄膜封装层完全覆盖所述像素阵列;在所述薄膜封装层的顶部形成像素定义层,并在所述像素定义层内形成量子点,从而形成多色显示。本发明的显示面板及其制造方法突破了高像素密度的高精度金属掩膜板的物理极限,可实现2000及更高像素密度的显示。
The present invention provides a display panel and a manufacturing method thereof. The manufacturing method includes the following steps: providing a driving backplane and a light-emitting substrate, the driving backplane is provided with a first bonding metal layer, and the light-emitting substrate is provided with There is a second bonding metal layer; the first bonding metal layer of the driving backplane is metal-bonded with the second bonding metal layer of the light-emitting substrate to form a metal bonding layer; patterning the light-emitting substrate and the metal bonding layer to form a pixel array; a thin film encapsulation layer is formed outside the pixel array, and the thin film encapsulation layer completely covers the pixel array; a pixel definition layer is formed on the top of the thin film encapsulation layer, and Quantum dots are formed in the pixel definition layer to form a multi-color display. The display panel and its manufacturing method of the present invention break through the physical limit of high-pixel-density and high-precision metal mask plates, and can realize display with 2000 and higher pixel density.
Description
技术领域technical field
本发明涉及一种显示面板及其制造方法,尤其涉及一种高像素密度的显示面板及其制造方法。The invention relates to a display panel and a manufacturing method thereof, in particular to a display panel with high pixel density and a manufacturing method thereof.
背景技术Background technique
目前的OLED显示屏体大多采用蒸镀不同OLED材料实现OLED图形化,这种方法在像素密度低于700时是没有问题的,但是当像素密度高于800时,现有的制造技术将进入物理瓶颈。Most of the current OLED display body uses evaporation of different OLED materials to achieve OLED patterning. This method is no problem when the pixel density is lower than 700, but when the pixel density is higher than 800, the existing manufacturing technology will enter the physical bottleneck.
因此,实现高像素密度的多彩显示,是目前急需解决的技术问题。Therefore, realizing a colorful display with high pixel density is an urgent technical problem to be solved at present.
发明内容Contents of the invention
本发明的目的在于提供一种显示面板的制造方法,其在像素定义层内形成量子点,可以实现高分辨率显示面板的多色显示。The object of the present invention is to provide a method for manufacturing a display panel, which forms quantum dots in the pixel definition layer, and can realize multi-color display of a high-resolution display panel.
为实现上述目的,本发明提供了一种显示面板的制造方法,主要包括如下步骤:In order to achieve the above object, the present invention provides a method for manufacturing a display panel, which mainly includes the following steps:
提供驱动背板和发光基板,所述驱动背板上设置有第一键合金属层,所述发光基板上设置有第二键合金属层;Provide a driving backplane and a light-emitting substrate, the driving backplane is provided with a first bonding metal layer, and the light-emitting substrate is provided with a second bonding metal layer;
将所述驱动背板的第一键合金属层与所述发光基板的第二键合金属层进行金属键合,形成金属键合层;performing metal bonding on the first bonding metal layer of the driving backplane and the second bonding metal layer of the light-emitting substrate to form a metal bonding layer;
图形化所述发光基板和所述金属键合层,形成像素阵列;patterning the light-emitting substrate and the metal bonding layer to form a pixel array;
在所述像素阵列的外侧形成薄膜封装层,所述薄膜封装层完全覆盖所述像素阵列;forming a thin film encapsulation layer outside the pixel array, the thin film encapsulation layer completely covering the pixel array;
在所述薄膜封装层的顶部形成像素定义层,并在所述像素定义层内形成量子点,以形成多色显示。A pixel definition layer is formed on top of the thin film encapsulation layer, and quantum dots are formed in the pixel definition layer to form a multi-color display.
作为本发明的进一步改进,所述像素阵列采用黄光和蚀刻工艺形成。As a further improvement of the present invention, the pixel array is formed by yellow light and etching process.
作为本发明的进一步改进,所述像素定义层采用黄光工艺和蚀刻工艺形成。As a further improvement of the present invention, the pixel definition layer is formed by yellow light process and etching process.
作为本发明的进一步改进,在所述像素定义层内形成量子点的同时还在量子点之间形成黑色矩阵。As a further improvement of the present invention, while forming the quantum dots in the pixel definition layer, a black matrix is also formed between the quantum dots.
作为本发明的进一步改进,所述量子点及所述黑色矩阵采用电流体打印工艺形成。As a further improvement of the present invention, the quantum dots and the black matrix are formed by an electrofluidic printing process.
本发明的目的还在于提供一种显示面板,其在像素定义层内设有量子点,可以实现高分辨率显示面板的多色显示。The purpose of the present invention is also to provide a display panel, which is provided with quantum dots in the pixel definition layer, which can realize multi-color display of the high-resolution display panel.
为实现上述目的,本发明提供了一种显示面板,包括驱动背板、设置在所述驱动背板上的像素阵列、及设置在所述像素阵列的外侧并完全覆盖所述像素阵列的薄膜封装层,所述显示面板还包括设置在所述薄膜封装层顶部的像素定义层、及设置在所述像素定义层内的量子点,以形成多色显示。In order to achieve the above object, the present invention provides a display panel, including a driving backplane, a pixel array arranged on the driving backplane, and a thin film package arranged outside the pixel array and completely covering the pixel array layer, and the display panel further includes a pixel definition layer arranged on top of the thin film encapsulation layer, and quantum dots arranged in the pixel definition layer to form a multi-color display.
作为本发明的进一步改进,所述量子点包括红色量子点和绿色量子点。As a further improvement of the present invention, the quantum dots include red quantum dots and green quantum dots.
作为本发明的进一步改进,所述显示面板进一步包括设置在所述像素定义层内并位于所述红色量子点与绿色量子点之间的黑色矩阵。As a further improvement of the present invention, the display panel further includes a black matrix disposed in the pixel definition layer and between the red quantum dots and the green quantum dots.
作为本发明的进一步改进,所述显示面板进一步包括设置在所述量子点的顶侧的绝缘保护层。As a further improvement of the present invention, the display panel further includes an insulating protection layer disposed on the top side of the quantum dots.
作为本发明的进一步改进,所述显示面板进一步包括玻璃盖板,所述玻璃盖板封装在所述绝缘保护层的顶部并完全覆盖所述绝缘保护层。As a further improvement of the present invention, the display panel further includes a glass cover, the glass cover is packaged on top of the insulating protection layer and completely covers the insulating protection layer.
本发明的有益效果是:本发明显示面板的制造方法在薄膜封装层的顶部形成像素定义层及位于像素定义层内的量子点,从而使得该方法制造的显示面板形成多色显示,进一步采用黄光、刻蚀工艺实现高像素的显示面板图形化,突破了高像素密度的高精度金属掩膜板的物理极限,可实现2000及更高像素密度的显示。The beneficial effects of the present invention are: the manufacturing method of the display panel of the present invention forms a pixel definition layer and quantum dots located in the pixel definition layer on the top of the thin film encapsulation layer, so that the display panel manufactured by this method forms a multi-color display, and further uses yellow The optical and etching process realizes the patterning of high-pixel display panels, breaks through the physical limit of high-pixel-density high-precision metal masks, and can realize displays with 2000 and higher pixel densities.
附图说明Description of drawings
图1是符合本发明显示面板的驱动背板和发光基板键合前的示意图。FIG. 1 is a schematic diagram of a driving backplane and a light-emitting substrate of a display panel according to the present invention before bonding.
图2是图1所示的显示面板的驱动背板和发光基板键合后的示意图。FIG. 2 is a schematic diagram of a driving backplane and a light-emitting substrate of the display panel shown in FIG. 1 after bonding.
图3是移除图2中发光基板的衬底的示意图。FIG. 3 is a schematic diagram of removing the substrate of the light-emitting substrate in FIG. 2 .
图4是在图3所示的显示面板上形成光阻层的示意图。FIG. 4 is a schematic diagram of forming a photoresist layer on the display panel shown in FIG. 3 .
图5是在图4所示的显示面板上形成发光阵列及相应排布金属键合阵列的示意图。FIG. 5 is a schematic diagram of forming a light-emitting array and a corresponding arrangement of metal bonding arrays on the display panel shown in FIG. 4 .
图6是在图5所示的显示面板的发光阵列相应的金属键合阵列上形成绝缘层的示意图。FIG. 6 is a schematic diagram of forming an insulating layer on the metal bonding array corresponding to the light emitting array of the display panel shown in FIG. 5 .
图7是在图6所示的显示面板的绝缘层上形成开口的示意图。FIG. 7 is a schematic diagram of forming openings on the insulating layer of the display panel shown in FIG. 6 .
图8是在图7所示的显示面板的绝缘层上形成金属层的示意图。FIG. 8 is a schematic diagram of forming a metal layer on the insulating layer of the display panel shown in FIG. 7 .
图9是在图8所示的显示面板上形成薄膜封装层的示意图。FIG. 9 is a schematic diagram of forming a thin film encapsulation layer on the display panel shown in FIG. 8 .
图10是在图9所示的显示面板的薄膜封装层的顶部形成像素定义层的示意图。FIG. 10 is a schematic diagram of forming a pixel definition layer on top of the thin film encapsulation layer of the display panel shown in FIG. 9 .
图11是在图10所示的显示面板的像素定义层内形成量子点及黑色矩阵的示意图。FIG. 11 is a schematic diagram of forming quantum dots and a black matrix in the pixel definition layer of the display panel shown in FIG. 10 .
图12是在图11所示的显示面板的量子点及黑色矩阵的顶侧形成绝缘保护层的示意图。FIG. 12 is a schematic diagram of forming an insulating protection layer on the top side of the quantum dots and the black matrix of the display panel shown in FIG. 11 .
图13是在图12所示的显示面板的绝缘保护层的顶侧封装玻璃盖板的示意图。FIG. 13 is a schematic diagram of encapsulating a glass cover on the top side of the insulating protection layer of the display panel shown in FIG. 12 .
具体实施方式Detailed ways
为使本申请的目的、技术方案及效果更加清楚、明确,以下参照附图并举实施例对本申请进一步详细说明。In order to make the purpose, technical solution and effect of the present application more clear and definite, the present application will be further described in detail below with reference to the accompanying drawings and examples.
请参阅图1-13,本申请提供了一种显示面板100的制造方法,如下方法步骤是所述显示面板100的制造方法的一种优选实施方式,在该实施方式中,所述显示面板100的制造方法主要包括如下步骤:1-13, the present application provides a method for manufacturing a display panel 100, the following method steps are a preferred implementation of the method for manufacturing the display panel 100, in this embodiment, the display panel 100 The manufacturing method mainly comprises the following steps:
提供驱动背板10和发光基板20。其中,所述驱动背板10包括驱动电路阵列101,在所述驱动背板10上设置有第一键合金属层31,所述发光基板20上设置有第二键合金属层32。具体地,本申请所用发光基板20基于微型发光二极管(Micro Light Emitting Diode,Micro-LED)技术,其选用多量子阱(Multiple Quantum Well,MQW)结构发光,具有高亮度、高响应速度、低功耗、长寿命等优点。A driving backplane 10 and a light emitting substrate 20 are provided. Wherein, the driving backplane 10 includes a driving circuit array 101 , a first bonding metal layer 31 is disposed on the driving backplane 10 , and a second bonding metal layer 32 is disposed on the light emitting substrate 20 . Specifically, the light-emitting substrate 20 used in this application is based on Micro Light Emitting Diode (Micro-LED) technology, which uses a Multiple Quantum Well (Multiple Quantum Well, MQW) structure to emit light, with high brightness, high response speed, and low power consumption. consumption, long life and other advantages.
将所述驱动背板10的第一键合金属层31与所述发光基板20的第二键合金属层32进行金属键合,形成金属键合层30。其中,所述第一键合金属层31与所述第二键合金属层32的厚度相同或不同,键合后形成的金属键合层30的厚度可以是所述第一键合金属层31或第二键合金属层32其中之一的厚度的两倍或三倍。本发明选用金属键合的方式连接所述驱动背板10和所述发光基板20,相较现有的先做好Micro-LED器件再转移至驱动背板上的技术,避免了批量转移中的对位精度等问题。Metal bonding is performed between the first bonding metal layer 31 of the driving backplane 10 and the second bonding metal layer 32 of the light emitting substrate 20 to form a metal bonding layer 30 . Wherein, the thickness of the first bonding metal layer 31 and the second bonding metal layer 32 are the same or different, and the thickness of the metal bonding layer 30 formed after bonding may be the thickness of the first bonding metal layer 31 Or twice or three times the thickness of one of the second bonding metal layers 32 . The present invention uses metal bonding to connect the driving backplane 10 and the light-emitting substrate 20. Compared with the existing technology of making Micro-LED devices first and then transferring them to the driving backplane, it avoids the problems in batch transfer. Alignment accuracy and other issues.
图形化所述发光基板20和所述金属键合层30,以形成需要的像素阵列210,及与所述像素阵列210对应的金属键合阵列301,所述金属键合阵列301可作为阳极。其中,可利用黄光和蚀刻工艺图形化所述发光基板20和所述金属键合层30,以形成需要的像素阵列210和金属键合阵列301。相较现有的利用掩膜板采用蒸镀工艺实现OLED图形化的方案,本申请能够做到更小尺寸的像素,在显示面板尺寸相同的情况下,能够提高像素密度(Pixels PerInch,PPI)。The light-emitting substrate 20 and the metal bonding layer 30 are patterned to form a required pixel array 210 and a metal bonding array 301 corresponding to the pixel array 210, and the metal bonding array 301 can be used as an anode. Wherein, the light-emitting substrate 20 and the metal bonding layer 30 can be patterned by using yellow light and etching process to form the required pixel array 210 and metal bonding array 301 . Compared with the existing scheme of using a mask plate to realize OLED patterning by evaporation process, this application can achieve smaller-sized pixels, and can increase the pixel density (Pixels PerInch, PPI) under the condition of the same display panel size .
在所述像素阵列210的外侧形成薄膜封装层60,所述薄膜封装层60完全覆盖所述像素阵列210。在所述薄膜封装层60的顶部形成像素定义层61,并在所述像素定义层61内形成量子点50,从而形成多色显示。A thin film encapsulation layer 60 is formed outside the pixel array 210 , and the thin film encapsulation layer 60 completely covers the pixel array 210 . A pixel definition layer 61 is formed on the top of the thin film encapsulation layer 60, and quantum dots 50 are formed in the pixel definition layer 61, thereby forming a multi-color display.
在所述像素定义层61内对应像素阵列210的至少部分位置形成量子点50,以形成多色显示。其中,所述发光基板20发出的光经过所述量子点50后发出不同颜色的光,从而实现多色显示。具体地,该实施方式的量子点50包括可发出红光R的红色量子点51,及可发出绿光G的绿色量子点52,所述发光基板20可直接发出蓝光B,从而,所制得的显示面板100具有RGB三色显示。Quantum dots 50 are formed in at least part of the pixel array 210 in the pixel definition layer 61 to form a multi-color display. Wherein, the light emitted by the light-emitting substrate 20 passes through the quantum dots 50 and emits light of different colors, thereby realizing multi-color display. Specifically, the quantum dots 50 of this embodiment include red quantum dots 51 that can emit red light R, and green quantum dots 52 that can emit green light G, and the light-emitting substrate 20 can directly emit blue light B, thus, the obtained The display panel 100 has RGB three-color display.
下面对本申请的所述显示面板100的制造方法及结构进行详细描述。The manufacturing method and structure of the display panel 100 of the present application will be described in detail below.
请参阅图1,所述驱动背板10上设置有对应像素阵列210的驱动电路阵列101,用于与相应的所述像素阵列210电连接,以为所述像素阵列210提供驱动电压,进而控制所述像素阵列210的发光。所述驱动背板10可以是柔性背板或者是刚性背板,在此不做限定。Please refer to FIG. 1 , the drive backplane 10 is provided with a drive circuit array 101 corresponding to the pixel array 210, which is used to electrically connect with the corresponding pixel array 210, so as to provide a drive voltage for the pixel array 210, and then control the pixel array 210. The light emission of the pixel array 210 is described. The driving backplane 10 may be a flexible backplane or a rigid backplane, which is not limited here.
所述驱动背板10上形成有第一键合金属层31。其中,所述第一键合金属层31的材料可以是金(Au)、铜(Cu)、镓(GA)、镍(Ni)等金属,也可以是这些金属的合金,如镍-金合金等。所形成的第一键合金属层31的厚度为800~1200nm。可以利用沉积或蒸镀的方式形成所述第一键合金属层31,具体地,所述沉积方式可以选用原子层沉积(ALD)、化学气相沉积(CVD)、物理气相沉积(PVD)等合适的方式。A first bonding metal layer 31 is formed on the driving backplane 10 . Wherein, the material of the first bonding metal layer 31 may be metals such as gold (Au), copper (Cu), gallium (GA), nickel (Ni), or an alloy of these metals, such as a nickel-gold alloy Wait. The formed first bonding metal layer 31 has a thickness of 800-1200 nm. The first bonding metal layer 31 can be formed by deposition or evaporation. Specifically, the deposition method can be selected from atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), etc. The way.
所述发光基板20包括衬底21及设置在所述衬底21上的发光层22,所述第二键合金属层32设置在所述发光层22的与所述衬底21相对的另一侧。所述发光层22包括依次设置在所述衬底21上的第一半导体层220、设置在所述第一半导体层220上的多量子阱层221及设置在所述多量子阱层221上的第二半导体层222。所述第二半导体层222与所述第二键合金属层32电连接。The light-emitting substrate 20 includes a substrate 21 and a light-emitting layer 22 disposed on the substrate 21, and the second bonding metal layer 32 is disposed on the other side of the light-emitting layer 22 opposite to the substrate 21. side. The luminescent layer 22 includes a first semiconductor layer 220 sequentially arranged on the substrate 21, a multiple quantum well layer 221 arranged on the first semiconductor layer 220, and a multiquantum well layer 221 arranged on the multiple quantum well layer 221. The second semiconductor layer 222 . The second semiconductor layer 222 is electrically connected to the second bonding metal layer 32 .
在本实施例中,所述第一半导体层220是N型半导体层,所述第二半导体层222是P型半导体层。在不同的实施例中可以选用不同的半导体材料制成,例如可以是N型氮化镓(GaN)、P型氮化镓(GaN),N型铝(Al)掺杂的氮化镓(AlGaN)、P型铝(Al)掺杂的氮化镓(AlGaN),P型镁(Mg)掺杂的氮化镓、N型硅(Si)掺杂的氮化镓等。所述多量子阱层221可以是由依次重复排列的氮化铟镓/氮化镓(InGaN/GaN)层组合成的氮化镓量子阱层。在其他实施方式中,所述第一半导体层220、所述第二半导体层222和所述多量子阱层221的材料还可根据显示面板的实际需求设置,在此不作限定。In this embodiment, the first semiconductor layer 220 is an N-type semiconductor layer, and the second semiconductor layer 222 is a P-type semiconductor layer. In different embodiments, different semiconductor materials can be selected, for example, N-type gallium nitride (GaN), P-type gallium nitride (GaN), N-type aluminum (Al) doped gallium nitride (AlGaN) ), P-type aluminum (Al)-doped gallium nitride (AlGaN), P-type magnesium (Mg)-doped gallium nitride, N-type silicon (Si)-doped gallium nitride, etc. The multiple quantum well layer 221 may be a gallium nitride quantum well layer composed of indium gallium nitride/gallium nitride (InGaN/GaN) layers arranged repeatedly in sequence. In other implementation manners, the materials of the first semiconductor layer 220 , the second semiconductor layer 222 and the multiple quantum well layer 221 can also be set according to the actual requirements of the display panel, which is not limited here.
P型的第二半导体层222、多量子阱层221和N型的第一半导体层220构成发光PN结,通过所述第二半导体层222和所述第一半导体层220分别与两侧的电极电连接,可将上述发光PN结电连接到驱动电路中,从而实现通过驱动电路给发光PN结施加电压。当驱动电路给发光PN结施加电压时,N型的第一半导体层220中产生电子注入到所述多量子阱层221中,P型的第二半导体层222中产生空穴注入到所述多量子阱层221中;随后,在所述多量子阱层221内,所述电子和所述空穴复合而发出光子,完成电能到光能的转换,实现所述发光层22的发光。The P-type second semiconductor layer 222, the multi-quantum well layer 221, and the N-type first semiconductor layer 220 form a light-emitting PN junction, and the second semiconductor layer 222 and the first semiconductor layer 220 are respectively connected to the electrodes on both sides. For electrical connection, the above light-emitting PN junction can be electrically connected to the driving circuit, so as to apply voltage to the light-emitting PN junction through the driving circuit. When the drive circuit applies a voltage to the light-emitting PN junction, electrons are injected into the multi-quantum well layer 221 in the N-type first semiconductor layer 220, and holes are injected into the multi-quantum well layer 221 in the P-type second semiconductor layer 222. In the quantum well layer 221 ; subsequently, in the multi-quantum well layer 221 , the electrons and the holes recombine to emit photons, completing the conversion of electrical energy into light energy, and realizing the light emission of the light emitting layer 22 .
其中,因为氮化镓基材料难以在玻璃基板上直接生长出来,所以衬底21一般为蓝宝石衬底,这是因为蓝宝石的稳定性很好、机械强度高,能够运用在高温生长过程中,在蓝宝石衬底上外延生长晶体时能够得到晶体质量较好的晶体;且蓝宝石衬底的生产技术成熟、器件质量较好、易于处理和清洗。当然,在其他实施方式中,也可以选用硅基基板(如碳化硅(SiC)衬底或者硅(Si)衬底)或氮化镓(GaN)基板等,还可以是其它可用的衬底材料,在此不作限定。Among them, because gallium nitride-based materials are difficult to grow directly on a glass substrate, the substrate 21 is generally a sapphire substrate. This is because sapphire has good stability and high mechanical strength, and can be used in the high-temperature growth process. Crystals with better crystal quality can be obtained when crystals are epitaxially grown on sapphire substrates; and the production technology of sapphire substrates is mature, the device quality is better, and it is easy to handle and clean. Of course, in other embodiments, silicon-based substrates (such as silicon carbide (SiC) substrates or silicon (Si) substrates) or gallium nitride (GaN) substrates can also be selected, and other available substrate materials can also be used. , is not limited here.
所述第二键合金属层32与所述第一键合金属层31的材质、厚度可以相同也可以不同,优选地,所述第二键合金属层32与所述第一键合金属层31的材质相同,这样能够增强所述第二键合金属层32与所述第一键合金属层31的结合强度,防止层间分离,提高器件的稳定性。同样地,也可以选用沉积或蒸镀的方式形成所述第二键合金属层32,具体请参阅上述实施方式的描述,在此不再赘述。The material and thickness of the second bonding metal layer 32 and the first bonding metal layer 31 may be the same or different. Preferably, the second bonding metal layer 32 and the first bonding metal layer 31 are made of the same material, so that the bonding strength between the second bonding metal layer 32 and the first bonding metal layer 31 can be enhanced, interlayer separation can be prevented, and the stability of the device can be improved. Likewise, the second bonding metal layer 32 can also be formed by deposition or vapor deposition. For details, please refer to the description of the above-mentioned embodiment, and details will not be repeated here.
请参阅图1及图2,将所述驱动背板10的第一键合金属层31与所述发光基板20的第二键合金属层32贴合,在预定温度、压力作用下将第一键合金属层31与第二键合金属层32键合到一起,形成金属键合层30。Please refer to FIG. 1 and FIG. 2, the first bonding metal layer 31 of the driving backplane 10 is bonded to the second bonding metal layer 32 of the light-emitting substrate 20, and the first The bonding metal layer 31 and the second bonding metal layer 32 are bonded together to form the metal bonding layer 30 .
请参阅图3所示,为去除所述发光基板20的衬底21的示意图。去除所述发光基板20的衬底21时,可利用如激光剥离的方式剥离衬底21,当然,也可以采用其他方式剥离衬底21,在此不作限定。Please refer to FIG. 3 , which is a schematic diagram of removing the substrate 21 of the light-emitting substrate 20 . When removing the substrate 21 of the light-emitting substrate 20 , the substrate 21 may be peeled off by means such as laser lift-off. Of course, the substrate 21 may also be peeled off by other methods, which are not limited herein.
请参阅图4及图5,图4是所述发光基板20去除衬底21后在所述第一半导体层220上形成光阻层223的示意图,图5是进一步利用黄光工艺图形化所述发光基板20。具体地,在所述第一半导体层220上形成光阻层223,然后曝光、显影得到所述光阻层图案,其中,光阻层图案与像素阵列210的排布方式相对应。然后以图形化后的光阻层223为掩膜蚀刻所述发光基板20及所述金属键合层30,形成发光阵列201及相应排布的金属键合阵列301,所述金属键合阵列301可作为阳极。具体可利用反应离子刻蚀(Reactive Ion Etching,RIE)的方式蚀刻所述发光基板20及所述金属键合层30,在蚀刻时,可采用自对准原理进行定位。当然,在其他实施方式中,也可以选择其他方式进行蚀刻。Please refer to FIG. 4 and FIG. 5. FIG. 4 is a schematic diagram of forming a photoresist layer 223 on the first semiconductor layer 220 after the substrate 21 is removed from the light-emitting substrate 20. FIG. Light emitting substrate 20. Specifically, a photoresist layer 223 is formed on the first semiconductor layer 220 , and then exposed and developed to obtain the photoresist layer pattern, wherein the photoresist layer pattern corresponds to the arrangement of the pixel array 210 . Then use the patterned photoresist layer 223 as a mask to etch the light-emitting substrate 20 and the metal bonding layer 30 to form a light-emitting array 201 and a correspondingly arranged metal bonding array 301. The metal bonding array 301 Can be used as anode. Specifically, the light-emitting substrate 20 and the metal bonding layer 30 can be etched by reactive ion etching (RIE), and the positioning can be performed by using the principle of self-alignment during etching. Certainly, in other implementation manners, other methods may also be selected for etching.
请参阅图6,在所述发光阵列201和相应的金属键合阵列301上形成绝缘层224。所述绝缘层224覆盖所述发光阵列201及金属键合阵列301。所述绝缘层224的厚度是50nm。所述绝缘层224可以选用原子层沉积(ALD)、化学气相沉积(CVD)、物理气相沉积(PVD)等方式。所述绝缘层224的材料可以为无机材料,无机材料可以是以下材料中的一种或多种:Al2O3、TiO2、ZrO2、MgO、HFO2、Ta2O5、Si3N4、AlN、SiN、SiNO、SiO、SiO2、SiC、SiCNx、ITO、IZO等。Referring to FIG. 6 , an insulating layer 224 is formed on the light emitting array 201 and the corresponding metal bonding array 301 . The insulating layer 224 covers the light emitting array 201 and the metal bonding array 301 . The thickness of the insulating layer 224 is 50nm. The insulating layer 224 can be selected by means of atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), and the like. The material of the insulating layer 224 can be an inorganic material, and the inorganic material can be one or more of the following materials: Al2O3, TiO2, ZrO2, MgO, HFO2, Ta2O5, Si3N4, AlN, SiN, SiNO, SiO, SiO2, SiC, SiCNx, ITO, IZO, etc.
请参阅图7,在所述绝缘层224上形成开口225,较佳的,可利用前述的黄光工艺及RIE方式在所述绝缘层224上形成所述开口225。具体方法与前面类似,在此不再赘述。Referring to FIG. 7 , an opening 225 is formed on the insulating layer 224 . Preferably, the opening 225 can be formed on the insulating layer 224 by using the aforementioned yellow light process and RIE method. The specific method is similar to the above, and will not be repeated here.
请参阅图8,在所述绝缘层224上形成金属层40,所述金属层40的厚度为10nm,可利用原子层沉积(ALD)、化学气相沉积(CVD)、物理气相沉积(PVD)的方式形成。所述金属层40的材料可以是铝(Al)、银(Ag)等,所述金属层40可作为阴极。Referring to FIG. 8, a metal layer 40 is formed on the insulating layer 224. The thickness of the metal layer 40 is 10nm, which can be obtained by atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD) way to form. The material of the metal layer 40 can be aluminum (Al), silver (Ag), etc., and the metal layer 40 can be used as a cathode.
在该实施方式中,选用黄光、刻蚀工艺实现像素阵列210的图形化,能够制造更小尺寸的像素。如该方法中,图形化后的金属键合层30的宽度可窄至5μm,所制得的像素间距为24μm,子像素间距为8μm,进而能够制得高达3000PPI的显示面板。而现有的利用蒸镀不同OLED材料实现OLED图形化的方法,只能做到700~800PPI。这是因为蒸镀OLED材料时需要使用高精度金属掩膜板(Fine Metal Mask,FMM),但是FMM存在物理极限,开口间距最小只能做到10~15μm。而本发明利用黄光工艺图形化像素阵列210时,图形间的间距可做到纳米级别,通过该方法,能够在显示面板尺寸一定的情况下,制得高PPI的显示面板。In this embodiment, the patterning of the pixel array 210 is realized by using yellow light and etching process, so that pixels of smaller size can be manufactured. For example, in this method, the width of the patterned metal bonding layer 30 can be as narrow as 5 μm, the pixel pitch is 24 μm, and the sub-pixel pitch is 8 μm, so that a display panel up to 3000 PPI can be produced. However, the existing method of realizing OLED patterning by vapor deposition of different OLED materials can only achieve 700-800PPI. This is because a high-precision metal mask (Fine Metal Mask, FMM) needs to be used when evaporating OLED materials, but FMM has a physical limit, and the minimum opening pitch can only be 10-15 μm. However, when the present invention uses the yellow light process to pattern the pixel array 210, the distance between the patterns can be at the nanometer level. Through this method, a display panel with a high PPI can be produced with a certain size of the display panel.
请参阅图9,为形成薄膜封装层60的示意图。所形成的薄膜封装层60可完全覆盖像素阵列210,以阻隔水汽、氧气,保护像素阵列210。所述薄膜封装层60一般包括有机封装层和无机封装层,无机封装层对水汽、氧气有很好的阻隔性能;有机封装层的存在可以使器件表面平整度更好,有利于后续无机封装层的形成,同时有机封装层的抗弯折性能比较好。Please refer to FIG. 9 , which is a schematic diagram of forming the thin film encapsulation layer 60 . The formed thin film encapsulation layer 60 can completely cover the pixel array 210 to block moisture and oxygen and protect the pixel array 210 . The thin-film encapsulation layer 60 generally includes an organic encapsulation layer and an inorganic encapsulation layer. The inorganic encapsulation layer has good barrier properties to water vapor and oxygen; The formation of the organic encapsulation layer is relatively good at the same time.
请参阅图10,采用前述的黄光工艺和RIE方式,在所述薄膜封装层60的顶部形成像素定义层61。具体方法与前面类似,在此不再赘述。Referring to FIG. 10 , a pixel definition layer 61 is formed on the top of the thin film encapsulation layer 60 by using the aforementioned yellow light process and RIE method. The specific method is similar to the above, and will not be repeated here.
请参阅图11,在所述像素定义层61内形成量子点50及黑色矩阵70(Black Matrix,BM)。所述量子点50设置在部分所述开口225的正上方。具体地,所述量子点50及黑色矩阵70采用电流体打印工艺形成。所述量子点50包括可发出红光R的红色量子点51及可发出绿光G的绿色量子点52。在该实施方式中,所述多量子阱层221的发光颜色为蓝色,从而未设置量子点50的发光区域可直接发出蓝光B,实现RGB三色显示。Referring to FIG. 11 , quantum dots 50 and a black matrix 70 (Black Matrix, BM) are formed in the pixel definition layer 61 . The quantum dots 50 are disposed right above part of the openings 225 . Specifically, the quantum dots 50 and the black matrix 70 are formed by an electrofluidic printing process. The quantum dots 50 include red quantum dots 51 capable of emitting red light R and green quantum dots 52 capable of emitting green light G. In this embodiment, the emission color of the multi-quantum well layer 221 is blue, so that the emission region not provided with quantum dots 50 can directly emit blue light B to realize RGB three-color display.
具体地,多量子阱层221采用的是无机材料,不存在寿命短和稳定性差的问题。尤其是基于氮化镓(GaN)材料的多量子阱层221,GaN作为宽禁带半导体,在蓝光发光部分有先天优势,发光效率可以达到400lM/w,亮度高,耗电量低,寿命长,是最理想的蓝光发光材料。Specifically, the multi-quantum well layer 221 is made of inorganic materials, which does not have the problems of short lifetime and poor stability. Especially the multi-quantum well layer 221 based on gallium nitride (GaN) material, GaN, as a wide bandgap semiconductor, has inherent advantages in the blue light emitting part, the luminous efficiency can reach 400lM/w, high brightness, low power consumption, and long life , is the most ideal blue light emitting material.
请参阅图12,进一步在所述量子点50及黑色矩阵70的顶部形成绝缘保护层53。所述绝缘保护层53覆盖所述量子点50及黑色矩阵70。所述绝缘保护层53的厚度是50nm。所述绝缘保护层53可以选用原子层沉积(ALD)、化学气相沉积(CVD)、物理气相沉积(PVD)等方式。所述绝缘保护层53的材料可以为无机材料,无机材料可以是以下材料中的一种或多种:Al2O3、TiO2、ZrO2、MgO、HFO2、Ta2O5、Si3N4、AlN、SiN、SiNO、SiO、SiO2、SiC、SiCNx、ITO、IZO等。Referring to FIG. 12 , an insulating protective layer 53 is further formed on top of the quantum dots 50 and the black matrix 70 . The insulating protection layer 53 covers the quantum dots 50 and the black matrix 70 . The thickness of the insulating protection layer 53 is 50nm. The insulating protection layer 53 can be selected by means of atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), and the like. The material of the insulating protection layer 53 can be an inorganic material, and the inorganic material can be one or more of the following materials: Al2O3, TiO2, ZrO2, MgO, HFO2, Ta2O5, Si3N4, AlN, SiN, SiNO, SiO, SiO2 , SiC, SiCNx, ITO, IZO, etc.
请参阅图13,进一步在所述绝缘保护层53的顶部封装玻璃盖板80,所述玻璃盖板80完全覆盖所述绝缘保护层53。所述玻璃盖板80通过在绝缘保护层53外围涂覆UV胶90粘结固定,以保护量子点50。Referring to FIG. 13 , a glass cover 80 is further encapsulated on the top of the insulating protection layer 53 , and the glass cover 80 completely covers the insulating protection layer 53 . The glass cover 80 is bonded and fixed by coating UV glue 90 on the periphery of the insulating protection layer 53 to protect the quantum dots 50 .
以上,本申请所提供的显示面板100的制造方法,结合高分辨率驱动背板10,可实现2000PPI及以上的高分辨率显示面板100的制造,制造过程中选用黄光、刻蚀工艺实现高PPI的像素阵列图形化,不再受限于FMM的物理极限。同时,在薄膜封装层60的顶部形成像素定义层61,并在像素定义层61内采用电流体打印工艺形成红色量子点51和绿色量子点52,以实现红色和绿色发光,进而实现RGB三色显示。另外,本申请提供的方法将驱动背板10与发光基板20直接键合,相较现有的先做好Micro-LED器件再转移至驱动背板上的技术,避免了批量转移中的对位精度等问题。As mentioned above, the manufacturing method of the display panel 100 provided in this application, combined with the high-resolution drive backplane 10, can realize the manufacture of the high-resolution display panel 100 of 2000PPI and above. PPI's pixel array patterning is no longer limited by the physical limits of FMM. At the same time, a pixel definition layer 61 is formed on the top of the thin film encapsulation layer 60, and red quantum dots 51 and green quantum dots 52 are formed in the pixel definition layer 61 by an electrofluidic printing process to realize red and green light emission, thereby realizing RGB three colors show. In addition, the method provided by this application directly bonds the driving backplane 10 and the light-emitting substrate 20. Compared with the existing technology of making Micro-LED devices first and then transferring them to the driving backplane, it avoids alignment in batch transfer. accuracy issues.
基于此,本申请还提供了一种显示面板100,所述显示面板100包括驱动背板10、设置在所述驱动背板10上的像素阵列210、及设置在所述像素阵列210的外侧并完全覆盖所述像素阵列210的薄膜封装层60,所述显示面板100进一步包括设置在所述薄膜封装层60顶部的像素定义层61、及设置在所述像素定义层61内的量子点50,进而形成多色显示。Based on this, the present application also provides a display panel 100, the display panel 100 includes a driving backplane 10, a pixel array 210 disposed on the driving backplane 10, and a pixel array 210 disposed outside the pixel array 210 and The thin film encapsulation layer 60 that completely covers the pixel array 210, the display panel 100 further includes a pixel definition layer 61 disposed on top of the thin film encapsulation layer 60, and quantum dots 50 disposed in the pixel definition layer 61, Further, a multi-color display is formed.
其中,所述量子点50包括可发出红光R的红色量子点51及可发出绿光G的绿色量子点52,所述像素阵列210的发光颜色为蓝色B,继而可实现RGB三色显示。Wherein, the quantum dots 50 include red quantum dots 51 that can emit red light R and green quantum dots 52 that can emit green light G, and the light emission color of the pixel array 210 is blue B, and then RGB three-color display can be realized .
所述显示面板100进一步包括设置在所述像素定义层61内并位于所述红色量子点51与绿色量子点52之间的黑色矩阵70。The display panel 100 further includes a black matrix 70 disposed in the pixel definition layer 61 and between the red quantum dots 51 and the green quantum dots 52 .
所述显示面板100进一步包括设置在所述量子点50的顶侧的绝缘保护层53。具体结构请参阅图12,具体结构描述请参阅上述实施方式的描述,在此不再赘述。The display panel 100 further includes an insulating protective layer 53 disposed on the top side of the quantum dots 50 . For the specific structure, please refer to FIG. 12 , and for the specific structure description, please refer to the description of the above-mentioned embodiment, and details will not be repeated here.
所述显示面板100进一步包括玻璃盖板80,所述玻璃盖板80通过UV胶90封装在绝缘保护层53的顶部并完全覆盖所述绝缘保护层53。The display panel 100 further includes a glass cover 80 , the glass cover 80 is encapsulated on top of the insulating protection layer 53 by UV glue 90 and completely covers the insulating protection layer 53 .
本发明的显示面板100具有高PPI,显示效果更好,可以作为AR及VR等设备的显示屏。The display panel 100 of the present invention has high PPI and better display effect, and can be used as a display screen of AR and VR devices.
以上所述仅为本申请的实施方式,并非因此限制本申请的专利范围,凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。The above is only the implementation of the application, and does not limit the patent scope of the application. Any equivalent structure or equivalent process conversion made by using the specification and drawings of the application, or directly or indirectly used in other related technologies fields, all of which are equally included in the scope of patent protection of the present invention.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111580270A (en) * | 2020-06-08 | 2020-08-25 | 昆山梦显电子科技有限公司 | Display panel based on eye tracking technology, preparation method thereof, and display device |
| CN111580269A (en) * | 2020-06-08 | 2020-08-25 | 昆山梦显电子科技有限公司 | Display panel based on eye tracking technology, preparation method thereof, and display device |
| WO2021004141A1 (en) * | 2019-07-09 | 2021-01-14 | 昆山梦显电子科技有限公司 | Display panel and manufacturing method therefor |
| CN115148867A (en) * | 2022-07-04 | 2022-10-04 | 深圳市思坦科技有限公司 | Flexible Micro-LED, preparation method thereof and display device |
| US20230165049A1 (en) * | 2019-11-13 | 2023-05-25 | Kunshan Fantaview Electronic Technology Co., Ltd. | Method of manufacturing high-resolution micro-oled and display module |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100078656A1 (en) * | 2008-09-30 | 2010-04-01 | Seoul Opto Device Co., Ltd. | Light emitting device and method of fabricating the same |
| US20150144974A1 (en) * | 2012-05-21 | 2015-05-28 | Xiamen Sanan Optoelectronics Technology Co., Ltd. | Vertical Type AC-LED Device and Manufacturing Method Thereof |
| CN109742200A (en) * | 2019-01-11 | 2019-05-10 | 京东方科技集团股份有限公司 | Method for preparing a display panel, display panel and display device |
| CN109860241A (en) * | 2018-12-29 | 2019-06-07 | 昆山维信诺科技有限公司 | High-resolution Micro-OLED display module and preparation method thereof |
-
2019
- 2019-07-09 CN CN201910613942.XA patent/CN110311053A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100078656A1 (en) * | 2008-09-30 | 2010-04-01 | Seoul Opto Device Co., Ltd. | Light emitting device and method of fabricating the same |
| US20150144974A1 (en) * | 2012-05-21 | 2015-05-28 | Xiamen Sanan Optoelectronics Technology Co., Ltd. | Vertical Type AC-LED Device and Manufacturing Method Thereof |
| CN109860241A (en) * | 2018-12-29 | 2019-06-07 | 昆山维信诺科技有限公司 | High-resolution Micro-OLED display module and preparation method thereof |
| CN109742200A (en) * | 2019-01-11 | 2019-05-10 | 京东方科技集团股份有限公司 | Method for preparing a display panel, display panel and display device |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2021004141A1 (en) * | 2019-07-09 | 2021-01-14 | 昆山梦显电子科技有限公司 | Display panel and manufacturing method therefor |
| US11915962B2 (en) | 2019-07-09 | 2024-02-27 | Kunshan Fantaview Electronic Technology Co., Ltd. | High-resolution micro-LED display panel and manufacturing method of the same |
| US20230165049A1 (en) * | 2019-11-13 | 2023-05-25 | Kunshan Fantaview Electronic Technology Co., Ltd. | Method of manufacturing high-resolution micro-oled and display module |
| CN111580270A (en) * | 2020-06-08 | 2020-08-25 | 昆山梦显电子科技有限公司 | Display panel based on eye tracking technology, preparation method thereof, and display device |
| CN111580269A (en) * | 2020-06-08 | 2020-08-25 | 昆山梦显电子科技有限公司 | Display panel based on eye tracking technology, preparation method thereof, and display device |
| CN115148867A (en) * | 2022-07-04 | 2022-10-04 | 深圳市思坦科技有限公司 | Flexible Micro-LED, preparation method thereof and display device |
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