CN110391308B - Flat panel detector and manufacturing method thereof - Google Patents

Abstract

The present invention provides a flat panel detector and a manufacturing method thereof. A flat panel detector includes a TFT device with a semiconductor layer, a first insulating layer covering the TFT device, an interlayer insulating layer on the first insulating layer, and an interlayer insulating layer located between the layers. A cathode electrode on the insulating layer and connected to the TFT device, a photoelectric conversion layer on the cathode electrode; and a blocking layer on the interlayer insulating layer; at least part of the blocking layer is in a floating state, and at least part of the blocking layer is located in the directly above the semiconductor layer. A blocking layer is arranged on the flat panel detector of the present invention, and at least part of the blocking layer is located directly above the semiconductor layer. The blocking layer can block the influence of hydrogen diffusion on the semiconductor layer when the photoelectric conversion layer is formed, and can also block the X-ray or ambient light from affecting the semiconductor layer. influences.

Description

A flat panel detector and its manufacturing method

technical field

The present invention relates to the technical field of flat panel detectors, in particular to a flat panel detector and a manufacturing method thereof.

Background technique

The X-ray of the flat panel detector is first converted into visible light by the fluorescent medium material, then the visible light signal is converted into an electrical signal by the photosensitive element, and finally the analog electrical signal is converted into a digital signal by A/D.

As shown in FIG. 1, the flat panel detector includes a gate 10, a gate insulating layer 20 covering the gate 10, a semiconductor layer 30 on the gate insulating layer 20, an etch stop layer 40 covering the semiconductor layer 30, The source and drain electrodes 51 and 52 of the etch barrier layer 40 are both in contact with the semiconductor layer 30, the first insulating layer 60 covering the source electrode 51 and the drain electrode 52, the interlayer insulating layer 70 on the first insulating layer 60, the The cathode electrode 80 on the interlayer insulating layer 70 and connected to the drain electrode 52 after passing through the first insulating layer 60 and the interlayer insulating layer 70, a photoelectric conversion layer (PIN, Photo Diode) 90 on the cathode electrode 80, and a photoelectric conversion layer 90 on the cathode electrode 80. Anode electrode 100 on conversion layer 90 .

The semiconductor layer 30 needs to isolate hydrogen ions during the fabrication process to prevent the properties of the semiconductor material from changing. During the fabrication of the photoelectric conversion layer 90 , a large amount of hydrogen needs to be used. If hydrogen ions diffuse into the semiconductor layer 30 , the TFT device may fail in severe cases.

The flat panel detector needs to irradiate the detection panel under X-ray or visible light. The ambient light is irradiated on the semiconductor layer 30. Due to the illumination, the leakage current of the TFT increases and the Vth drifts, which reduces the detection sensitivity of the photodetector and improves the interference of noise.

SUMMARY OF THE INVENTION

The object of the present invention is to provide a flat panel detector and a method for manufacturing the same which block the influence of various substances on the semiconductor layer.

The present invention provides a flat panel detector, which includes a TFT device with a semiconductor layer, a first insulating layer covering the TFT device, an interlayer insulating layer on the first insulating layer, and an interlayer insulating layer on the interlayer insulating layer and connected to the TFT device. The cathode electrode, the photoelectric conversion layer located on the cathode electrode; also includes a blocking layer located on the interlayer insulating layer; at least part of the blocking layer is in a floating state, and at least part of the blocking layer is located directly above the semiconductor layer.

The present invention also provides a flat panel detector, which includes a TFT device with a semiconductor layer, a first insulating layer covering the TFT device, an interlayer insulating layer on the first insulating layer, and a second insulating layer on the interlayer insulating layer layer, a cathode electrode located on the second insulating layer and connected to the TFT device, and a photoelectric conversion layer located on the cathode electrode; it is characterized in that it also includes a barrier layer located between the interlayer insulating layer and the second insulating layer; at least part of The blocking layer is located directly above the semiconductor layer, and at least part of the blocking layer is located below the photoelectric conversion layer.

Further, the barrier layer is linear.

Further, the barrier layer includes a linear first barrier body and a second barrier body connected to one end of the first barrier body and close to the photoelectric conversion layer, and a sandwich between the first barrier body and the second barrier body The angle is obtuse.

Further, the barrier layer includes a linear first barrier body, a second barrier body connected with one end of the first barrier body, and a third barrier body connected with the other end of the first barrier body, the first barrier bodies are respectively connected to The included angle between the second blocking body and the third blocking body is an obtuse angle.

Further, the forming material of the barrier layer is the same as the material of the cathode electrode.

The present invention also provides a method for manufacturing a flat panel detector, comprising the following steps:

S1: forming a TFT device;

S2: forming a first insulating layer covering the TFT device;

S3: laying an interlayer insulating layer on the first insulating layer and forming a contact hole on the TFT device;

S4: The barrier layer and the cathode electrode are simultaneously formed by using the cathode metal material in the interlayer insulating layer, and the cathode electrode is connected to the TFT device through the contact hole;

S5: A photoelectric conversion layer is formed on the cathode electrode.

The present invention also provides a method for manufacturing a flat panel detector, comprising the following steps:

S1: forming a TFT device;

S2: forming a first insulating layer covering the TFT device;

S3: laying an interlayer insulating layer on the first insulating layer, and then forming a contact hole on the TFT device and a blocking contact hole in the interlayer insulating layer;

S4: A barrier layer and a cathode electrode are simultaneously formed in the interlayer insulating layer by using a cathode metal material, the cathode electrode is connected to the TFT device through a contact hole, and the barrier layer is located on the surface of the interlayer insulating layer and in the barrier contact hole;

S5: A photoelectric conversion layer is formed on the cathode electrode.

The present invention also provides a method for manufacturing a flat panel detector, comprising the following steps:

S1: forming a TFT device;

S2: forming a first insulating layer covering the TFT device;

S3: laying an interlayer insulating layer on the first insulating layer and forming a contact hole on the TFT device;

S4: Use cathode metal material or other metal materials to form a barrier layer in the interlayer insulating layer;

S5: forming a second insulating layer covering the barrier layer and the interlayer insulating layer, and forming a contact hole on the TFT device of the TFT device;

S6: forming a cathode electrode, and the cathode electrode is connected with the TFT device through the contact hole;

S7: A photoelectric conversion layer is formed on the cathode electrode.

The present invention also provides a method for manufacturing a flat panel detector, comprising the following steps:

S1: forming a TFT device;

S2: forming a first insulating layer covering the TFT device;

S3: laying an interlayer insulating layer on the first insulating layer and forming a contact hole located on the drain electrode and a blocking contact hole located in the interlayer insulating layer;

S4: Use cathode metal material or other metal materials to form a barrier layer in the interlayer insulating layer, and the barrier layer is located on the surface of the interlayer insulating layer and in the barrier contact hole;

S5: forming a second insulating layer covering the barrier layer and the interlayer insulating layer, and forming a contact hole on the TFT device;

S6: forming a cathode electrode, and the cathode electrode is connected with the TFT device through the contact hole;

S7: A photoelectric conversion layer is formed on the cathode electrode.

A blocking layer is arranged on the flat panel detector of the present invention, and at least part of the blocking layer is located directly above the semiconductor layer. The blocking layer can block the influence of hydrogen diffusion on the semiconductor layer when the photoelectric conversion layer is formed, and can also block the X-ray or ambient light from affecting the semiconductor layer. influences.

Description of drawings

The present invention will be further described below by describing preferred embodiments in a clear and easy-to-understand manner with reference to the accompanying drawings.

1 is a schematic structural diagram of an existing flat panel detector;

FIG. 2 is a schematic structural diagram of the first embodiment of the flat panel detector of the present invention;

3 is a schematic structural diagram of a second embodiment of the flat panel detector of the present invention;

4 is a schematic structural diagram of a third embodiment of the flat panel detector of the present invention;

FIG. 5 is a schematic structural diagram of a fourth embodiment of the flat panel detector of the present invention.

Detailed ways

Below in conjunction with the accompanying drawings and specific embodiments, the present invention will be further clarified. It should be understood that these embodiments are only used to illustrate the present invention and not to limit the scope of the present invention. Modifications of equivalent forms all fall within the scope defined by the appended claims of this application.

In order to keep the drawings concise, the drawings only schematically show the parts related to the present invention, and they do not represent its actual structure as a product. In addition, in order to make the drawings concise and easy to understand, in some drawings, only one of the components having the same structure or function is schematically shown, or only one of them is marked. As used herein, "one" not only means "only one", but also "more than one".

FIG. 2 is a schematic structural diagram of the first embodiment of the flat panel detector of the present invention.

As shown in FIG. 2, the flat panel detector includes a TFT device 1 having a semiconductor layer 30, a first insulating layer 60 covering the TFT device 1, an interlayer insulating layer 70 on the first insulating layer 60, and an interlayer insulating layer 70 on the first insulating layer 60. The cathode electrode 80 connected to the TFT device 1 after passing through the first insulating layer 60 and the interlayer insulating layer 70 , the photoelectric conversion layer (PIN, Photo Diode) 90 located on the cathode electrode 80 , the photoelectric conversion layer 90 located on the photoelectric conversion layer 90 . The anode electrode 100 and the barrier layer 120 located between the semiconductor layer 30 and the photoelectric conversion layer 90, at least part of the barrier layer 120 are located directly above the semiconductor layer 30 of the TFT device.

The TFT device 1 includes a gate electrode 10 , a gate insulating layer 20 covering the gate electrode 10 , a semiconductor layer 30 on the gate insulating layer 20 , an etch barrier layer 40 covering the semiconductor layer 30 , and after passing through the etch barrier layer 40 . The source electrode 51 and the drain electrode 52 are both in contact with the semiconductor layer 30 . The first insulating layer 60 covers the source electrode 51 and the drain electrode 52 , and the cathode electrode 80 is connected to the drain electrode 52 of the TFT device 1 .

The cathode electrode 80 is made of a cathode metal material with low work function, such as silver, titanium, aluminum, molybdenum or niobium. The photoelectric conversion layer 90 includes an N-type amorphous silicon semiconductor layer 91 located on the cathode electrode 80 , an amorphous silicon intrinsic layer 91 located on the N-type amorphous silicon semiconductor layer 91 , and a P-type amorphous silicon intrinsic layer 91 located on the amorphous silicon intrinsic layer 91 . Amorphous silicon semiconductor layer 93 .

The semiconductor layer 30 is a metal oxide semiconductor layer, or a semiconductor layer of amorphous silicon or polysilicon, preferably a metal oxide semiconductor layer, such as IGZO. When the semiconductor layer 30 is a metal oxide, the flat panel detector has the advantages of low leakage current and high electron mobility.

The interlayer insulating layer 70 is an organic insulating layer, and may be an inorganic insulating layer.

The barrier layer 120 is linear and formed at the same time as the cathode electrode 80 . The barrier layer 120 is not in contact with the cathode electrode 80 , and the barrier layer 120 is located on the interlayer insulating layer 70 .

The invention also discloses a manufacturing method of the flat panel detector, comprising the following steps:

S1: forming TFT device 1;

S2: forming the first insulating layer 60 covering the TFT device 1;

S3: laying an interlayer insulating layer 70 on the first insulating layer 60 and forming a contact hole (not shown) on the drain electrode 52 of the TFT device 1;

S4: The barrier layer 120 and the cathode electrode 80 are simultaneously formed on the interlayer insulating layer 70 by using a cathode metal material, and the cathode electrode 80 is connected to the drain electrode 52 through the contact hole;

S5: forming a photoelectric conversion layer 90 on the cathode electrode 80 (the specific method is: firstly, forming an N-type amorphous silicon semiconductor layer 91, an amorphous silicon intrinsic layer 91 and a P-type amorphous silicon semiconductor layer on the cathode electrode 80 in sequence 93);

S6: The anode electrode 100 is formed on the photoelectric conversion layer 90 .

Since the barrier layer 120 is not covered with other objects, the barrier layer 120 is in a floating state, which can directly block the influence of hydrogen diffusion on the semiconductor layer 30 when the photoelectric conversion layer 90 is formed, and can also block the influence of X-rays or ambient light on the semiconductor layer 30 .

The specific steps of step S1 are: forming the gate 10 in sequence, forming a gate insulating layer 20 covering the gate 10, forming a semiconductor layer 30 located above the gate 10 on the gate insulating layer 20, forming a covering semiconductor layer 30 etch the barrier layer 40 and form a source contact hole (not shown) and a drain contact hole (not shown) on the semiconductor layer 30, and form a source electrode 51 and a drain electrode 52, and the source electrode 51 passes through the source electrode 51. The electrode contact hole is connected to the semiconductor layer 30, and the drain electrode 52 is connected to the semiconductor layer 30 through the drain contact hole. The flat panel detector is formed by the above method, at least part of the blocking layer 120 is located directly above the semiconductor layer 30, and the blocking layer

120 can block the influence of hydrogen diffusion on the semiconductor layer 30 when the photoelectric conversion layer 90 is formed, and can also block the influence of X-rays or ambient light on the semiconductor layer 30 .

FIG. 3 is a schematic structural diagram of a second embodiment of the flat panel detector of the present invention.

The difference between the second embodiment and the above-mentioned first embodiment is that the barrier layer 130 includes a linear first barrier 131 and a second barrier 132 connected to one end of the first barrier 131 and close to the photoelectric conversion layer 90 . The angle between the first blocking body 131 and the second blocking body 132 is an obtuse angle.

The second blocking body 132 can block the influence of hydrogen diffusion on the semiconductor layer 30 during the process of the photoelectric conversion layer 90 , and the first blocking body 131 can block the influence of X-rays or ambient light on the semiconductor layer 30 .

In the preferred embodiment of the second embodiment, the barrier layer 130 includes a linear first barrier body 131 , a second barrier body 132 connected to one end of the first barrier body 131 , and a second barrier body 132 connected to the other end of the first barrier body 131 . The third blocking body 133, the angle between the first blocking body 131 and the second blocking body 132 and the third blocking body 133 is an obtuse angle, and the third blocking body 133 can block X-rays or ambient light from the side of the semiconductor. The effect of layer 30.

The first barrier body 131 is located on the surface of the interlayer insulating layer 70 , and the second barrier body 132 and the third barrier body 133 are located in the interlayer insulating layer 70 .

The second barrier body 132 and the third barrier body 133 are formed on the interlayer insulating layer 70 by using a transflective mask to form the first barrier body 131 and the second barrier body 132 and the third barrier body 133 respectively. The included angle between them is an obtuse angle.

In order to form the barrier layer 130, a barrier contact hole needs to be opened in the interlayer insulating layer 70, and the barrier contact hole can be formed simultaneously with the contact hole.

The invention also discloses a manufacturing method of the flat panel detector, comprising the following steps:

S1: forming TFT device 1;

S2: forming the first insulating layer 60 covering the TFT device 1;

S3: laying an interlayer insulating layer 70 on the first insulating layer 60, and then forming a contact hole (not shown) on the drain electrode 52 of the TFT device 1 and a blocking contact hole located in the interlayer insulating layer 70;

S4: The barrier layer 120 and the cathode electrode 80 are simultaneously formed on the interlayer insulating layer 70 by using a cathode metal material, the cathode electrode 80 is connected to the drain electrode 52 through the contact hole, and the barrier layer 120 is located on the surface of the interlayer insulating layer 70 and in the barrier contact hole;

S5: forming a photoelectric conversion layer 90 on the cathode electrode 80 (the specific method is: firstly, forming an N-type amorphous silicon semiconductor layer 91, an amorphous silicon intrinsic layer 91 and a P-type amorphous silicon semiconductor layer on the cathode electrode 80 in sequence 93);

S6: The anode electrode 100 is formed on the photoelectric conversion layer 90 .

FIG. 4 is a schematic structural diagram of a third embodiment of the flat panel detector of the present invention.

The difference between the fourth embodiment and the above-mentioned second embodiment is: a second insulating layer 61 is provided on the barrier layer 140 and part of the barrier layer 140 is located under the photoelectric conversion layer 90 so that the barrier layer 140 is in a stable state; the cathode electrode 80 The cathode electrode is disposed on the second insulating layer 61 and connected to the drain electrode 52 after passing through the second insulating layer 61 , the interlayer insulating layer 70 and the first insulating layer 60 .

At least a portion of the barrier layer 130 is directly over the semiconductor layer 30 .

The first insulating layer 60 and the second insulating layer 61 are both inorganic insulating layers.

The invention also discloses a manufacturing method of the flat panel detector, comprising the following steps:

S1: forming TFT device 1;

S2: forming a first insulating layer 60 covering the TFT device;

S3: laying the interlayer insulating layer 70 on the first insulating layer 60 and forming a contact hole (not shown) on the drain electrode 53;

S4: the barrier layer 130 is formed on the interlayer insulating layer 70 by using a cathode metal material or other metal materials;

S5: forming the second insulating layer 61 covering the barrier layer 130 and the interlayer insulating layer 70, and forming a contact hole on the drain electrode 52 of the TFT device;

S6: forming the cathode electrode 80, and the cathode electrode 80 is connected to the drain electrode 52 through the contact hole;

S7: forming a photoelectric conversion layer 90 on the cathode electrode 80 (the specific method is: firstly, forming an N-type amorphous silicon semiconductor layer 91, an amorphous silicon intrinsic layer 91 and a P-type amorphous silicon semiconductor layer on the cathode electrode 80 in sequence 93);

S8 : The pixel electrode layer 100 is formed on the photoelectric conversion layer 90 .

Part of the blocking layer 140 is located below the photoelectric conversion layer 90 , so that the blocking layer 130 can better block the influence of hydrogen diffusion on the semiconductor layer 30 when the photoelectric conversion layer 90 is formed, and can also block the influence of X-rays or ambient light on the semiconductor layer 30 , the second insulating layer 61 can also block the influence of hydrogen diffusion on the semiconductor 30 .

FIG. 5 is a schematic structural diagram of a fourth embodiment of the flat panel detector of the present invention.

The difference between the fourth embodiment and the above-mentioned third embodiment is that the shape of the barrier layer 150 is the same as the formation of the barrier layer in the second embodiment, that is, the barrier layer 150 is located on the interlayer insulating layer 70, and then the second insulating layer 61 is used The barrier layer 150 is covered so that the barrier layer 150 is in a stable state.

The barrier layer 150 is formed separately, and its material can be cathode metal or other metal materials.

The barrier layer 150 includes a linear first barrier 151 and a second barrier 152 connected to one end of the first barrier 151 and close to the photoelectric conversion layer 90 , a sandwich between the first barrier 151 and the second barrier 152 The angle is obtuse.

Part of the first barrier 151 is located below the photoelectric conversion layer 90 , the second barrier 152 can block the influence of hydrogen diffusion on the semiconductor layer 30 during the process of the photoelectric conversion layer 90 , and the first barrier 151 can block X-rays or ambient light Influence on the semiconductor layer 30 .

In the preferred embodiment of the fourth embodiment, the barrier layer 150 includes a linear first barrier body 151 , a second barrier body 152 connected to one end of the first barrier body 151 , and a second barrier body 152 connected to the other end of the first barrier body 151 . The third blocking body 153, the angle between the first blocking body 131 and the second blocking body 152 and the third blocking body 153 is an obtuse angle, and the third blocking body 132 can block X-rays or ambient light from the side of the semiconductor. The effect of layer 30.

The first barrier body 151 is located on the surface of the interlayer insulating layer 70 , and the second barrier body 152 and the third barrier body 153 are located in the interlayer insulating layer 70 .

The invention also discloses a manufacturing method of the flat panel detector, comprising the following steps:

S1: forming a TFT device;

S2: forming a first insulating layer 60 covering the TFT device;

S3: laying the interlayer insulating layer 70 on the first insulating layer 60 and forming a contact hole (not shown) on the drain electrode 53 and a blocking contact hole (not shown) located in the interlayer insulating layer 70;

S4: The barrier layer 150 is formed on the interlayer insulating layer 70 by using a cathode metal material or other metal materials, and the barrier layer 150 is located on the surface of the interlayer insulating layer 70 and in the barrier contact hole;

S5: forming the second insulating layer 61 covering the barrier layer 150 and the interlayer insulating layer 70, and forming a contact hole on the drain electrode 52 of the TFT device;

S6: forming the cathode electrode 80, and the cathode electrode 80 is connected to the drain electrode 52 through the contact hole;

S7: forming a photoelectric conversion layer 90 on the cathode electrode 80 (the specific method is: firstly, forming an N-type amorphous silicon semiconductor layer 91, an amorphous silicon intrinsic layer 91 and a P-type amorphous silicon semiconductor layer on the cathode electrode 80 in sequence 93);

S8 : The pixel electrode layer 100 is formed on the photoelectric conversion layer 90 .

Part of the blocking layer 150 is located below the photoelectric conversion layer 90 , so that the blocking layer 150 can better block the influence of hydrogen diffusion on the semiconductor layer 30 when the photoelectric conversion layer 90 is formed, and can also block the influence of X-rays or ambient light on the semiconductor layer 30 , the second insulating layer 61 can also block the influence of hydrogen diffusion on the semiconductor 30 .

The above-mentioned first to fourth embodiments may not be provided with an etch stop layer, which will not be repeated here.

The gates 10 of the TFT devices in the above-mentioned first to fourth embodiments are all located at the bottom. In other embodiments, the gates of the TFT devices may also be located at the top, that is, the TFT devices include a semiconductor layer and a gate covering the semiconductor layer. An insulating layer, a gate electrode, a source electrode and a drain electrode in contact with the semiconductor layer are formed on the gate insulating layer.

When the gate of the TFT device is at the top, the specific steps of step S1 are: sequentially forming a semiconductor layer, forming a gate insulating layer covering the semiconductor layer, forming a gate located above the semiconductor layer on the gate insulating layer, and forming a Source and drain electrodes in contact with the semiconductor layer.

A blocking layer is arranged on the flat panel detector of the present invention, and at least part of the blocking layer is located directly above the semiconductor layer. The blocking layer can block the influence of hydrogen diffusion on the semiconductor layer when the photoelectric conversion layer is formed, and can also block the X-ray or ambient light from affecting the semiconductor layer. influences.

The preferred embodiments of the present invention have been described in detail above, but the present invention is not limited to the specific details of the above-mentioned embodiments. Within the scope of the technical concept of the present invention, various equivalent transformations (such as quantity, shape, etc.) can be made to the technical solutions of the present invention. , location, etc.), these equivalent transformations all belong to the protection scope of the present invention.

Claims (8)

1. A flat panel detector includes a TFT device having a semiconductor layer, a first insulating layer covering the TFT device, an interlayer insulating layer on the first insulating layer, a second insulating layer on the interlayer insulating layer, a cathode electrode on the second insulating layer and connected to the TFT device, a photoelectric conversion layer on the cathode electrode; the insulating layer is characterized by further comprising a barrier layer positioned between the interlayer insulating layer and the second insulating layer; at least part of the barrier layer is positioned right above the semiconductor layer, and at least part of the barrier layer is positioned below the photoelectric conversion layer.

2. The flat panel detector according to claim 1, wherein: the barrier layer is linear.

3. The flat panel detector according to claim 1, wherein: the barrier layer comprises a first barrier body and a second barrier body, wherein the first barrier body is linear, one end of the second barrier body is connected with one end of the first barrier body and is close to the photoelectric conversion layer, the first barrier body is positioned on the surface of the interlayer insulating layer, the second barrier body is positioned in the interlayer insulating layer, and an included angle between the first barrier body and the second barrier body is an obtuse angle.

4. The flat panel detector according to claim 1, wherein: the barrier layer is including being linear first stopper, the second that is connected with first stopper one end blocks the body and blocks the body with the third that the first stopper other end is connected, first stopper is located interlayer insulation's surface, the second blocks the body and the third blocks the body and is located interlayer insulation, and first stopper blocks the body and blocks the contained angle between the body and the third with the second respectively and be the obtuse angle.

5. The flat panel detector according to claim 1, wherein: the barrier layer is formed of the same material as that of the cathode electrode.

6. A method of fabricating a flat panel detector, comprising the steps of:

s1: forming a TFT device;

s2: forming a first insulating layer covering the TFT device;

s3: laying an interlayer insulating layer on the first insulating layer, and then forming a contact hole positioned on the TFT device and a blocking contact hole positioned in the interlayer insulating layer;

s4: forming a barrier layer and a cathode electrode at the same time on the interlayer insulating layer by adopting a cathode metal material, wherein the cathode electrode is connected with the TFT device through a contact hole, and the barrier layer is positioned on the surface of the interlayer insulating layer and in the contact hole;

s5: a photoelectric conversion layer is formed on the cathode electrode.

7. A method of fabricating a flat panel detector, comprising the steps of:

s1: forming a TFT device;

s2: forming a first insulating layer covering the TFT device;

s3: laying an interlayer insulating layer on the first insulating layer and forming a contact hole on the TFT device;

s4: forming a barrier layer on the interlayer insulating layer by adopting a cathode metal material or other metal materials;

s5: forming a second insulating layer covering the barrier layer and the interlayer insulating layer, and forming a contact hole on a TFT device of the TFT device;

s6: forming a cathode electrode, wherein the cathode electrode is connected with the TFT device through the contact hole;

s7: a photoelectric conversion layer is formed on the cathode electrode.

8. A method of fabricating a flat panel detector, comprising the steps of:

s1: forming a TFT device;

s2: forming a first insulating layer covering the TFT device;

s3: an interlayer insulating layer is laid on the first insulating layer, and a contact hole positioned on the drain electrode and a blocking contact hole positioned in the interlayer insulating layer are formed;

s4: forming a barrier layer on the interlayer insulating layer by adopting a cathode metal material or other metal materials, wherein the barrier layer is positioned on the surface of the interlayer insulating layer and in the barrier contact hole;

s5: forming a second insulating layer covering the barrier layer and the interlayer insulating layer and formed on the second insulating layer

A contact hole on the TFT device;

s6: forming a cathode electrode, wherein the cathode electrode is connected with the TFT device through the contact hole;

s7: a photoelectric conversion layer is formed on the cathode electrode.