CN110516810B - A quantum program processing method, device, storage medium and electronic device - Google Patents

Abstract

The invention discloses a quantum program processing method, device, storage medium and electronic device. The method comprises: combining quantum logic gates in a quantum program to obtain a combined quantum program; dividing the combined quantum program into The execution sequence of all quantum logic gates; wherein, at least two of the quantum logic gates are in the same execution sequence. By using the embodiments of the present invention, the computational efficiency of quantum programs can be improved.

Description

A quantum program processing method, device, storage medium and electronic device

technical field

The invention belongs to the technical field of quantum computing, in particular to a quantum program processing method, device, storage medium and electronic device.

Background technique

A quantum computer is a kind of physical device that follows the laws of quantum mechanics to perform high-speed mathematical and logical operations, store and process quantum information. When a device processes and computes quantum information and runs quantum algorithms, it is a quantum computer.

Quantum computing simulation is a simulation calculation that follows the laws of quantum mechanics with the help of numerical computing and computer science. As a simulation program, it uses the high-speed computing power of computers to describe the space-time evolution of quantum states according to the basic laws of quantum mechanics. .

At present, the usual steps of quantum computing or simulation are to transform the actual problem to be transformed into a quantum program or quantum circuit, and then obtain the solution of the specific problem through the operation of the quantum program or quantum circuit. However, the operation of quantum programs or quantum circuits is often serial calculation, that is, the execution sequence of quantum logic gates is executed sequentially one by one, and only one quantum logic gate operates in a sequence, and the computational efficiency is relatively low.

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a quantum program processing method, device, storage medium and electronic device to solve the deficiencies in the prior art, which can improve the computational efficiency of the quantum program.

The technical scheme adopted in the present invention is as follows:

A method of processing a quantum program, comprising:

Combine the quantum logic gates in the quantum program to obtain the combined quantum program;

Divide the execution sequence of all quantum logic gates in the combined quantum program; wherein, at least two of the quantum logic gates are in the same execution sequence.

Optionally, the combination of quantum logic gates in the quantum program includes:

Traverse the quantum program to determine all the quantum logic gates that each qubit executes separately;

For each qubit, multiple adjacent single quantum logic gates executed by the qubit are combined into a combined quantum logic gate; wherein, the combined quantum logic gate is a single quantum logic gate, and the The unitary matrix of the combinatorial quantum logic gate is the unitary matrix product of the plurality of adjacent single quantum logic gates.

Optionally, the execution sequence of all quantum logic gates in the divided quantum program includes:

obtaining quantum circuit information corresponding to the combined quantum program;

According to the current quantum circuit information, the execution sequence of the single quantum logic gate in the first quantum logic gate executed by each qubit is divided into the same sequence;

When the multiple bits corresponding to the multiple quantum logic gates in the first quantum logic gate are all first bits, dividing the execution sequence of the multiple quantum logic gates into the same sequence;

Delete the quantum logic gate information of the quantum circuit information that has completed the timing division, and continue to execute the single quantum logic gate in the first quantum logic gate executed by each qubit according to the current quantum circuit information. The execution sequence is divided into steps of the same sequence.

Optionally, also include:

When the number of bits corresponding to the multiple quantum logic gates in the first quantum logic gate is not the first one, the execution sequence of the multiple quantum logic gates is divided into the next sequence of the same sequence .

Optionally, also include:

According to each of the execution sequences, the combined quantum program is run.

A processing device for a quantum program, comprising:

The merging module is used to merge the quantum logic gates in the quantum program to obtain the merged quantum program;

A division module, configured to divide the execution sequence of all quantum logic gates in the combined quantum program; wherein, at least two of the quantum logic gates are in the same execution sequence.

Optionally, the merging module is specifically used for:

Traverse the quantum program to determine all the quantum logic gates that each qubit executes separately;

For each qubit, multiple adjacent single quantum logic gates executed by the qubit are combined into a combined quantum logic gate; wherein, the combined quantum logic gate is a single quantum logic gate, and the The unitary matrix of the combinatorial quantum logic gate is the unitary matrix product of the plurality of adjacent single quantum logic gates.

Optionally, the dividing module is specifically used for:

obtaining quantum circuit information corresponding to the combined quantum program;

According to the current quantum circuit information, the execution sequence of the single quantum logic gate in the first quantum logic gate executed by each qubit is divided into the same sequence;

When the multiple bits corresponding to the multiple quantum logic gates in the first quantum logic gate are all first bits, dividing the execution sequence of the multiple quantum logic gates into the same sequence;

Delete the quantum logic gate information of the quantum circuit information that has completed the timing division, and continue to execute the single quantum logic gate in the first quantum logic gate executed by each qubit according to the current quantum circuit information. The execution sequence is divided into steps of the same sequence.

Optionally, the dividing module is also specifically used for:

When the number of bits corresponding to the multiple quantum logic gates in the first quantum logic gate is not the first one, the execution sequence of the multiple quantum logic gates is divided into the next sequence of the same sequence .

Optionally, also include:

An operation module, configured to run the combined quantum program according to each execution sequence.

A storage medium in which a computer program is stored, wherein the computer program is configured to execute the above-described method when run.

An electronic device comprising a memory and a processor having a computer program stored in the memory, the processor being arranged to run the computer program to perform the method described above.

Compared with the prior art, the present invention provides a quantum program processing method. First, the quantum logic gates in the quantum program are combined. The computational efficiency of the quantum program; then, divide the execution sequence of all quantum logic gates in the combined quantum program, wherein at least two quantum logic gates are in the same execution sequence, and the quantum logic gates in the same sequence can be executed at the same time, thereby further Improve the computational efficiency of quantum programs.

Description of drawings

1 is a schematic flowchart of a method for processing a quantum program provided by an embodiment of the present invention;

2 is a schematic diagram of a quantum circuit corresponding to a quantum program provided in an embodiment of the present invention;

3 is a schematic diagram of a combined quantum circuit provided by an embodiment of the present invention;

FIG. 4 is a schematic diagram of a quantum circuit after dividing a time sequence provided by an embodiment of the present invention;

FIG. 5 is a schematic structural diagram of an apparatus for processing a quantum program according to an embodiment of the present invention.

Detailed ways

The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, but not to be construed as a limitation of the present invention.

The embodiment of the present invention provides a method for processing a quantum program, which is applied to an electronic device such as a terminal, preferably a computer, such as an ordinary computer. It will be described in detail below.

It should be noted that a real quantum computer is a hybrid structure, which consists of two parts: one part is a classical computer, which is responsible for performing classical calculations and control; the other part is a quantum device, which is responsible for performing quantum calculations. In fact, a real quantum program is a sequence of instructions written in a quantum language such as Qrunes that can run on a quantum computer (the aforementioned quantum device), which supports the operation of quantum logic gates and finally realizes the realization of quantum computing. simulation. Specifically, a quantum program is a series of instruction sequences that operate quantum logic gates in a certain sequence.

In practical applications, in order to simulate quantum computing to verify quantum applications, etc., it can be implemented by a quantum virtual machine running on an ordinary computer. The quantum program referred to in the embodiments of the present invention refers to a program written in a classical language and running on a quantum virtual machine to characterize qubits and their evolution, in which qubits, quantum logic gates, etc. related to quantum computing have corresponding Classic code representation.

Quantum circuits, also known as quantum logic circuits, are the most commonly used general-purpose quantum computing models, representing circuits that operate on qubits under abstract concepts, including qubits, circuits (timelines), and various quantum logic gates. Finally, it is often necessary to read the results through quantum measurement operations.

Unlike traditional circuits, which are connected by metal wires to transmit voltage signals or current signals, in quantum circuits, the wires can be regarded as connected by time, that is, the state of qubits evolves naturally with time. The instruction of the Hamiltonian operator, which is operated until it encounters a logic gate.

A target quantum program as a whole corresponds to a total quantum circuit, and the quantum circuit in the present invention refers to the total quantum circuit, wherein the total number of qubits in the quantum circuit is the same as the total number of qubits in the quantum program. It can be understood that a quantum program is mainly composed of quantum circuits, measurement operations for qubits in the quantum circuits, registers for saving the measurement results, and control flow nodes (jump instructions). A quantum circuit can contain dozens, hundreds or even thousands. Tens of thousands of quantum logic gate operations. The execution process of a quantum program is the process of executing all quantum logic gates in a certain sequence. It should be noted that timing is the time sequence in which a quantum logic gate is executed.

It should be noted that, in classical computing, the most basic unit is the bit, and the most basic control mode is the logic gate, which can achieve the purpose of controlling the circuit through the combination of logic gates. Similarly, the way qubits are processed are quantum logic gates. The use of quantum logic gates can make quantum states evolve. Quantum logic gates are the basis of quantum circuits, just like the relationship between traditional logic gates and general digital circuits. Quantum logic gates include single quantum logic gates, double quantum logic gates and multiple quantum logic gates. Quantum logic gates are generally represented by a unitary matrix, and a unitary matrix is not only a matrix form, but also an operation and transformation. The function of the general quantum logic gate on the quantum state is calculated by multiplying the unitary matrix by the matrix corresponding to the right vector of the quantum state.

而量子态右矢|1>对应的矩阵为

For example, the matrix corresponding to the quantum state right vector |0> is

And the matrix corresponding to the quantum state right vector |1> is

Referring to FIG. 1, FIG. 1 is a schematic flowchart of a method for processing a quantum program according to an embodiment of the present invention, which may include the following steps:

S101, combine the quantum logic gates in the quantum program to obtain a combined quantum program;

Specifically, the quantum program can be traversed to determine all quantum logic gates executed by each qubit;

For each qubit, multiple adjacent single quantum logic gates executed by the qubit are combined into a combined quantum logic gate; wherein, the combined quantum logic gate is a single quantum logic gate, and the The unitary matrix of the combinatorial quantum logic gate is the unitary matrix product of the plurality of adjacent single quantum logic gates.

In the actual quantum program, the operation of the program is calculated one by one. For example, the running order of a quantum program is: H q0, H q1, RY q2, H q4, RX q0, X q1, CNOT q4 q3, Z q0, H q1, CNOT q2 q3, Hq4, CNOT q1 q0, H q2 , CNOTq3 q4, RZ q3, Y q4, RX q4. Among them, H is a Hadamard gate, RX gate is an arbitrary rotating X gate, CNOT is a control-NOT gate, X is a NOT gate, RY is an arbitrary rotating Y gate, RZ is an arbitrary rotating Z gate, q0, q1 , q2, q3, q4 refer to qubits with bits from 0 to 4. Except for the CNOT gate, which is a two-quantum logic gate, the rest are single-quantum logic gates.

Applying a quantum logic gate operation to a qubit means performing a unitary matrix operation on a quantum state of the qubit to obtain another quantum state of the qubit. The unitary matrix is the matrix form of the quantum logic gate, and the unitary matrix of a single quantum logic gate is a 2*2 matrix, and the unitary matrix of the two quantum logic gates is a 4*4 matrix.

In practical applications, the quantum logic gate operations performed by different qubits can be performed simultaneously, but one quantum bit can only perform one quantum logic gate operation at the same time. In addition, adjacent single quantum logic gate operations performed successively by a qubit can be combined without affecting the running result of the quantum program.

Based on this feature, the quantum program can be traversed. First, all the quantum logic gates executed by each qubit are determined. The purpose is to find out which quantum logic gates each qubit executes in succession, which is used for subsequent merging of adjacent single quantum logic gates.

Exemplarily, a quantum circuit corresponding to a quantum program is shown in Figure 2, which can clearly represent the quantum logic gates and timing conditions of the qubit execution. 0, 1, 2, 3, and 4 represent qubits q0, q1, q2, q3, and q4, and the horizontal line at each qubit represents the sequence in which the qubit executes the quantum logic gate, namely:

q0 executes the H gate, RX gate, Z gate and CNOT gate in sequence;

q1 executes the H gate, X gate, H gate and CNOT gate in sequence;

q2 executes the RY gate, the CNOT gate and the H gate in sequence;

q3 executes the CNOT gate, CNOT gate, CNOT gate and RZ gate in sequence;

q4 executes the H gate, CNOT gate, H gate, CNOT gate, Y gate and RX gate in sequence.

Among them, the word NOT and its connected vertical line shown in Figure 2 represent two quantum logic gates CNOT gate, and the qubit corresponding to the horizontal line where the word NOT is located represents the operation bit or controlled bit of the CNOT gate operation, and the vertical line The qubits corresponding to the other connected horizontal lines represent the control bits for the operation of the CNOT gate. For example, CNOT q1 q0, q1 is the control bit, q0 is the operation bit, the CNOT gate operates on the two qubits at the same time, and conversely, q0 executes the CNOT gate, and q1 also executes the CNOT gate at the same time.

Specifically, the adjacent single-quantity logic gates executed by q0 include three cases: H gate & RX gate, RX gate & Z gate, H gate & RX gate & Z gate, and the single quantum logic gates in any case are merged , both can simplify quantum programs and improve the computational efficiency of quantum programs. Preferably, all pairs of adjacent single quantum logic gates are merged into a new single quantum logic gate, the quantum logic gates in the combined quantum program are the least in number, and the quantum program is optimized to the highest degree. Multiply the unitary matrices of the H gate, RX gate, and Z gate in order to obtain the unitary matrix of the new single quantum logic gate, and the adjacent single quantum logic gates corresponding to the remaining qubits can be merged in the same way.

S102: Divide the execution sequence of all quantum logic gates in the combined quantum program; wherein, at least two of the quantum logic gates are in the same execution sequence.

Specifically, the quantum circuit information corresponding to the combined quantum program can be obtained;

According to the current quantum circuit information, the execution sequence of the single quantum logic gate in the first quantum logic gate executed by each qubit is divided into the same sequence;

When the multiple bits corresponding to the multiple quantum logic gates in the first quantum logic gate are all first bits, dividing the execution sequence of the multiple quantum logic gates into the same sequence;

Delete the quantum logic gate information of the quantum circuit information that has completed the timing division, and continue to execute the single quantum logic gate in the first quantum logic gate executed by each qubit according to the current quantum circuit information. The execution sequence is divided into steps of the same sequence.

When the number of bits corresponding to the multiple quantum logic gates in the first quantum logic gate is not the first one, the execution sequence of the multiple quantum logic gates is divided into the next sequence of the same sequence .

Among them, the number of bits corresponding to the multi-quantum logic gate means that for each qubit operated by the multi-quantum logic gate, there is a corresponding number of bits, indicating that the multi-quantum logic gate belongs to the number of quanta that it executes. logic gate. As shown in Figure 2, the two quantum logic gates CNOT q4 q3 belong to the first quantum logic gate executed by q3 and the second quantum logic gate executed by q4, then the two digits corresponding to the CNOT gate are 1 corresponding to q3 2 corresponding to q4. Similarly, the number of digits corresponding to CNOT q2 q3 is 2, 2, the number of digits corresponding to CNOT q1 q0 is 4, 4, and the number of digits corresponding to CNOT q3 q4 is 3, 4.

It should be noted that deleting the quantum logic gate information after the time sequence division is completed refers to deleting the information in the quantum circuit information. For the convenience of time sequence division, it does not mean deleting the quantum logic gates in the quantum program and the combined quantum program structure. No change.

Exemplarily, as shown in Figure 3, in the quantum circuit information corresponding to the quantum program after the merger, U0, U1, and U4 represent the new single quantum logic gate after the merger, wherein the U0 gate is merged by the H gate, the RX gate, and the Z gate. , U1 gate is merged by H gate, X gate, H gate, U4 gate is merged by Y gate, RX gate. At this time, the combined quantum program and quantum logic gate operations are still executed serially, and the execution sequence can be divided according to the aforementioned characteristics, and the quantum logic gates in each execution sequence can be executed at the same time, playing the role of parallel computing.

For each qubit, the first (first bit) quantum logic gate executed respectively is U0, U1, RY, CNOT, H. For single quantum logic gates U0, U1, RY, and H, the operations performed on qubits q0, q1, q2, and q4 do not affect each other, and can be divided into the same sequence as the quantum logic executed simultaneously in the first sequence. Door.

For the two-quantum logic gate CNOT executed by q3, the qubits operated by the CNOT gate at the same time also have q4. Compared with q4, the CNOT gate belongs to the quantum logic gate executed by its second bit, and q4 needs to be executed after the H gate is completed. Execution, if the CNOT gate is divided into the first sequence, q4 will execute the H gate and the CNOT gate at the same time, resulting in a conflict. Therefore, the CNOT gate can be postponed and executed in the next sequence.

In the same way, the second quantum logic gate executed by each qubit includes 3 CNOT gates. Among them, q0 and q1 execute a CNOT gate at the same time, namely CNOT q1 q0, q3 and q4 execute a CNOT gate at the same time, namely CNOT q4 q3, and q2 execute A CNOT gate is CNOT q2 q3. Since the CNOT gate executed by q2 also operates q3, and q3 can only execute CNOT q2 q3 after executing CNOT q4 q3, therefore, put the quantum logic gate operations CNOT q1 q0 and CNOT q4 q3 into the same sequence as the second sequence Quantum logic gates that are executed simultaneously within the CNOT q2 q3 are deferred and divided into the next sequence for execution. By analogy, the third sequence including CNOT q2 q3 and H q4 can be divided into the fourth sequence including H q2 and CNOT q3 q4, and the fifth sequence including RZ q3 and U4 q4.

Finally, the quantum circuit shown in Fig. 4 is obtained, wherein the dotted line represents the division of the execution sequence.

Specifically, the combined quantum program can also be run according to each execution sequence, that is, the quantum logic gate in the first sequence is executed first, then the quantum logic gate in the second sequence is executed, until the quantum logic gate in the last sequence is executed Execution completes, wherein the quantum logic gates within each sequence execute simultaneously.

It can be seen that by combining the quantum logic gates in the quantum program, the number of quantum logic gates in the combined quantum program is less, so that the quantum program can be simplified and the computational efficiency of the quantum program can be improved; then, all quantum logics in the combined quantum program are divided The execution sequence of the gate, wherein at least two quantum logic gates are in the same execution sequence, and the quantum logic gates in the same sequence can be executed at the same time, thereby further improving the computational efficiency of the quantum program.

Referring to FIG. 5, FIG. 5 is a schematic structural diagram of an apparatus for processing a quantum program provided by an embodiment of the present invention. Corresponding to the flow shown in FIG. 1, the apparatus may include:

The merging module 501 is used for merging the quantum logic gates in the quantum program to obtain the combined quantum program;

A division module 502, configured to divide the execution sequence of all quantum logic gates in the combined quantum program; wherein, at least two of the quantum logic gates are in the same execution sequence.

Specifically, the merging module is specifically used for:

Traverse the quantum program to determine all the quantum logic gates that each qubit executes separately;

For each qubit, multiple adjacent single quantum logic gates executed by the qubit are combined into a combined quantum logic gate; wherein, the combined quantum logic gate is a single quantum logic gate, and the The unitary matrix of the combinatorial quantum logic gate is the unitary matrix product of the plurality of adjacent single quantum logic gates.

Specifically, the division module is specifically used for:

obtaining quantum circuit information corresponding to the combined quantum program;

According to the current quantum circuit information, the execution sequence of the single quantum logic gate in the first quantum logic gate executed by each qubit is divided into the same sequence;

When the multiple bits corresponding to the multiple quantum logic gates in the first quantum logic gate are all first bits, dividing the execution sequence of the multiple quantum logic gates into the same sequence;

Delete the quantum logic gate information of the quantum circuit information that has completed the timing division, and continue to execute the single quantum logic gate in the first quantum logic gate executed by each qubit according to the current quantum circuit information. The execution sequence is divided into steps of the same sequence.

Specifically, the dividing module is also specifically configured to: when the number of bits corresponding to the multiple quantum logic gates in the first quantum logic gate is not the first one, divide the number of bits of the multiple quantum logic gates into The execution sequence is divided into the next sequence of the same sequence.

Specifically, it may further include: a running module, configured to run the combined quantum program according to each of the execution sequences.

It can be seen that by combining the quantum logic gates in the quantum program, the number of quantum logic gates in the combined quantum program is less, so that the quantum program can be simplified and the computational efficiency of the quantum program can be improved; then, all quantum logics in the combined quantum program are divided The execution sequence of the gate, wherein at least two quantum logic gates are in the same execution sequence, and the quantum logic gates in the same sequence can be executed at the same time, thereby further improving the computational efficiency of the quantum program.

An embodiment of the present invention further provides a storage medium, where a computer program is stored in the storage medium, wherein the computer program is configured to execute the steps in any one of the above method embodiments when running.

Specifically, in this embodiment, the above-mentioned storage medium may be configured to store a computer program for executing the following steps:

S1, combine the quantum logic gates in the quantum program to obtain the combined quantum program;

S2, dividing the execution sequence of all quantum logic gates in the combined quantum program; wherein, at least two of the quantum logic gates are in the same execution sequence.

Specifically, in this embodiment, the above-mentioned storage medium may include but is not limited to: a USB flash drive, a read-only memory (Read-Only Memory, referred to as ROM for short), a random access memory (Random Access Memory, referred to as RAM for short), mobile Various media that can store computer programs, such as hard disks, magnetic disks, or optical disks.

It can be seen that by combining the quantum logic gates in the quantum program, the number of quantum logic gates in the combined quantum program is less, so that the quantum program can be simplified and the computational efficiency of the quantum program can be improved; then, all quantum logics in the combined quantum program are divided The execution sequence of the gate, wherein at least two quantum logic gates are in the same execution sequence, and the quantum logic gates in the same sequence can be executed at the same time, thereby further improving the computational efficiency of the quantum program.

An embodiment of the present invention further provides an electronic device, including a memory and a processor, where a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any of the above method embodiments .

Specifically, the above-mentioned electronic device may further include a transmission device and an input-output device, wherein the transmission device is connected to the above-mentioned processor, and the input-output device is connected to the above-mentioned processor.

Specifically, in this embodiment, the above-mentioned processor may be configured to execute the following steps through a computer program:

S1, combine the quantum logic gates in the quantum program to obtain the combined quantum program;

S2, dividing the execution sequence of all quantum logic gates in the combined quantum program; wherein, at least two of the quantum logic gates are in the same execution sequence.

It can be seen that by combining the quantum logic gates in the quantum program, the number of quantum logic gates in the combined quantum program is less, so that the quantum program can be simplified and the computational efficiency of the quantum program can be improved; then, all quantum logics in the combined quantum program are divided The execution sequence of the gate, wherein at least two quantum logic gates are in the same execution sequence, and the quantum logic gates in the same sequence can be executed at the same time, thereby further improving the computational efficiency of the quantum program.

The structure, features and effects of the present invention have been described in detail above according to the embodiments shown in the drawings. The above are only the preferred embodiments of the present invention, but the scope of the present invention is not limited by the drawings. Changes made to the concept of the present invention, or modifications to equivalent embodiments with equivalent changes, shall fall within the protection scope of the present invention as long as they do not exceed the spirit covered by the description and drawings.

Claims (12)

1. A method for quantum program processing, comprising:

merging the quantum logic gates in the quantum program to obtain a merged quantum program;

obtaining quantum line information corresponding to the combined quantum program;

dividing the execution time sequence of a single quantum logic gate in a first bit quantum logic gate executed by each quantum bit into the same time sequence according to the current quantum line information;

and when the plurality of digits corresponding to the multiple quantum logic gates in the first-digit quantum logic gate are all first digits, dividing the execution time sequence of the multiple quantum logic gates into the same time sequence.

2. The method for processing the quantum program according to claim 1, wherein the merging the quantum logic gates in the quantum program comprises:

Traversing the quantum program, and determining all quantum logic gates respectively executed by each quantum bit;

for each qubit, merging pairwise adjacent single-quantum logic gates executed by the qubit into a combined-quantum logic gate; the combined quantum logic gate is a single quantum logic gate, and the unitary matrix of the combined quantum logic gate is the product of the unitary matrices of the multiple single quantum logic gates adjacent to each other.

3. The method of processing a quantum program of claim 1 or 2, further comprising:

and deleting the quantum logic gate information which is contained in the quantum circuit information and is divided into the same time sequence, and continuing to execute the step of dividing the execution time sequence of the single quantum logic gate in the first-bit quantum logic gate which is respectively executed by each quantum bit into the same time sequence according to the current quantum circuit information.

4. The method for processing a quantum program according to claim 3, further comprising:

and when the plurality of digits corresponding to the multi-quantum logic gate in the first-digit quantum logic gate are not all the first digits, dividing the execution time sequence of the multi-quantum logic gate into the next time sequence of the same time sequence.

5. The method of processing a quantum program of claim 4, further comprising:

and running the combined quantum program according to each execution time sequence.

6. A quantum program processing apparatus, comprising:

the merging module is used for merging the quantum logic gates in the quantum program to obtain a merged quantum program;

the dividing module is used for obtaining quantum line information corresponding to the combined quantum program; dividing the execution time sequence of a single quantum logic gate in a first bit quantum logic gate executed by each quantum bit into the same time sequence according to the current quantum line information; and when the plurality of digits corresponding to the multiple quantum logic gates in the first-digit quantum logic gate are all first digits, dividing the execution time sequence of the multiple quantum logic gates into the same time sequence.

7. The quantum program processing apparatus according to claim 6, wherein the merging module is specifically configured to:

traversing quantum programs, and determining all quantum logic gates executed by each quantum bit respectively;

for each qubit, merging pairwise adjacent single-quantum logic gates executed by the qubit into a combined-quantum logic gate; the combined quantum logic gate is a single quantum logic gate, and the unitary matrix of the combined quantum logic gate is the product of the unitary matrices of the multiple single quantum logic gates adjacent to each other.

8. The apparatus for processing a quantum program according to claim 6 or 7, wherein the partitioning module is further configured to:

and deleting the quantum logic gate information which is contained in the quantum circuit information and is subjected to time sequence division, and continuing to execute the step of dividing the execution time sequence of the single quantum logic gate in the first-bit quantum logic gate which is respectively executed by each quantum bit into the same time sequence according to the current quantum circuit information.

9. The apparatus for quantum program processing according to claim 8, wherein the partitioning module is further specifically configured to:

and when the plurality of digits corresponding to the multi-quantum logic gate in the first-digit quantum logic gate are not all the first digits, dividing the execution time sequence of the multi-quantum logic gate into the next time sequence of the same time sequence.

10. The apparatus for processing a quantum program according to claim 9, further comprising:

and the operation module is used for operating the combined quantum program according to each execution time sequence.

11. A storage medium, in which a computer program is stored, wherein the computer program is arranged to perform the method of any of claims 1 to 5 when executed.

12. An electronic device comprising a memory and a processor, wherein the memory has stored therein a computer program, and wherein the processor is arranged to execute the computer program to perform the method of any of claims 1 to 5.

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