CN110534584A - A kind of high efficiency rectifier and its manufacturing method - Google Patents

Abstract

The invention discloses a high-efficiency rectifier and a manufacturing method thereof. The high-efficiency rectifier comprises a lower electrode layer, a heavily doped substrate layer of the first conductivity type, a drift layer of the first conductivity type, a trench gate dielectric region, a trench gate filling region, and a The special base barrier contact area, the isolation dielectric area and the upper electrode layer. The steps of the manufacturing method are: 1) prepare a heavily doped substrate layer of the first conductivity type; 2) form a drift layer of the first conductivity type; 3) etch a groove pattern on the surface of the drift layer of the first conductivity type; 4) form a trench gate 5) Forming a trench gate filling area; 6) Forming an isolation dielectric area; 7) Forming a Schottky barrier contact area; 8) Forming an upper electrode layer; 9) Forming a lower electrode layer. The invention achieves the performance of short reverse recovery time and low switching loss without increasing manufacturing process steps and manufacturing cost.

Description

A high-efficiency rectifier and its manufacturing method

technical field

The invention relates to the field of semiconductor devices, in particular to a high-efficiency rectifier and a manufacturing method thereof.

Background technique

Schottky barrier diodes (SBDs) are commonly used power rectifiers in medium and low voltage applications, but due to the barrier-lowering effect caused by image charges, the leakage level of SBDs increases significantly as the reverse voltage approaches the breakdown voltage. Trench Schottky barrier diodes, also known as trench MOS barrier Schottky (TMBS) rectifiers, due to the electric field pinch-off effect introduced into the trench MOS structure, the reverse leakage level is significantly reduced, while the electric field of the epitaxial drift layer Be enhanced, so that the forward voltage drop is also significantly reduced. However, in the existing TMBS structure, due to the existence of the trench MOS structure, the barrier capacitance is significantly increased, so the reverse recovery time of the existing TMBS is relatively long, and the switching loss is relatively large.

Contents of the invention

The purpose of the present invention is to solve the problems existing in the prior art.

The technical solution adopted to achieve the purpose of the present invention is as follows: a high-efficiency rectifier mainly includes a lower electrode layer, a heavily doped substrate layer of the first conductivity type, a drift layer of the first conductivity type, a trench gate dielectric region, a trench Gate filling region, Schottky barrier contact region, isolation dielectric region and upper electrode layer.

The heavily doped first conductive type substrate layer covers the lower electrode layer.

The drift layer of the first conductivity type covers the heavily doped substrate layer of the first conductivity type.

The trench gate dielectric region is a U-shaped trench.

The trench gate dielectric region covers part of the surface above the drift layer of the first conductivity type.

Further, the trench gate dielectric region is composed of one or more repeated and unconnected structural units.

The trench gate filling region is filled in the trench gate dielectric region.

Further, the trench gate filling region is not in contact with the upper electrode layer.

The Schottky barrier contact region covers part of the surface above the drift layer of the first conductivity type.

The Schottky barrier contact region and the trench gate dielectric region are distributed at intervals.

Further, the Schottky barrier contact region is composed of one or more repeated and unconnected structural units.

The dielectric isolation region completely covers the trench gate filling region.

The upper electrode layer covers the Schottky barrier contact region and the dielectric isolation region.

Preferably, the dielectric isolation region covers part of the surface of the trench gate dielectric region. The upper electrode layer also covers part of the surface of the trench gate dielectric region.

Preferably, the dielectric isolation region completely covers the trench gate dielectric region.

A method for manufacturing a high-efficiency rectifier mainly includes the following steps:

1) Prepare a heavily doped substrate layer of the first conductivity type.

2) Forming a drift layer of the first conductivity type.

The heavily doped substrate layer of the first conductivity type and the drift layer of the first conductivity type use semiconductor materials, mainly including silicon and silicon carbide.

3) Etching grooves on the surface of the drift layer of the first conductivity type.

4) Forming a trench gate dielectric region.

The material of the trench gate dielectric region is silicon dioxide, silicon oxynitride or hafnium oxide.

5) Forming trench gate filling regions.

The material of the trench gate filling region is polysilicon. The polysilicon material is doped by original doping or annealing after impurity implantation.

6) Forming an isolation dielectric region.

7) Forming a Schottky barrier contact region.

The material of the Schottky barrier contact region is Schottky barrier metal or advanced silicide. The high-grade silicides include titanium-silicon alloys, platinum-silicon alloys and nickel-platinum-silicon alloys.

8) Forming the upper electrode layer.

9) Forming the lower electrode layer.

The technical effect of the present invention is beyond doubt. Aiming at the problems of long reverse recovery time and large switching loss of the device, the present invention achieves short reverse recovery time and high switching loss without increasing the manufacturing process steps and manufacturing cost through the design of the new structure of the device and the optimization of the manufacturing process. Performance with little loss. Compared with the existing trench Schottky diode (also known as TMBS) rectifier, the present invention achieves short reverse recovery time without increasing manufacturing process steps and manufacturing cost through device novel structure design and manufacturing process optimization. , The performance of switching loss is small.

Description of drawings

Fig. 1 is a schematic structural view of Embodiment 5 of a high-efficiency rectifier provided by the present invention;

Fig. 2 is a schematic structural diagram of Embodiment 6 of a high-efficiency rectifier provided by the present invention;

Fig. 3 is a schematic structural diagram of Embodiment 7 of a method for manufacturing a high-efficiency rectifier provided by the present invention;

Fig. 4 is a schematic structural diagram of Embodiment 7 of a method for manufacturing a high-efficiency rectifier provided by the present invention;

FIG. 5 is a schematic structural diagram of Embodiment 7 of a method for manufacturing a high-efficiency rectifier provided by the present invention;

FIG. 6 is a schematic structural diagram of Embodiment 7 of a method for manufacturing a high-efficiency rectifier provided by the present invention;

FIG. 7 is a schematic structural diagram of Embodiment 7 of a method for manufacturing a high-efficiency rectifier provided by the present invention;

Fig. 8 is a schematic structural diagram of Embodiment 7 of a method for manufacturing a high-efficiency rectifier provided by the present invention;

Fig. 9 is a schematic structural diagram of Embodiment 7 of a method for manufacturing a high-efficiency rectifier provided by the present invention;

In the figure: including lower electrode layer 1, heavily doped first conductivity type substrate layer 2, first conductivity type drift layer 3, trench gate dielectric region 4, trench gate filling region 5, Schottky barrier contact region 6 , isolating the dielectric region 7 and the upper electrode layer 8 .

Detailed ways

The present invention will be further described below in conjunction with the examples, but it should not be understood that the scope of the subject of the present invention is limited to the following examples. Without departing from the above-mentioned technical ideas of the present invention, various replacements and changes made according to common technical knowledge and conventional means in this field shall be included in the protection scope of the present invention.

Example 1:

A high-efficiency rectifier, mainly comprising a lower electrode layer 1, a heavily doped first conductivity type substrate layer 2, a first conductivity type drift layer 3, a trench gate dielectric region 4, a trench gate filling region 5, and a Schottky barrier Contact region 6, isolation dielectric region 7 and upper electrode layer 8.

The heavily doped first conductive type substrate layer 2 covers the lower electrode layer 1 .

The drift layer 3 of the first conductivity type covers the heavily doped substrate layer 2 of the first conductivity type.

The trench gate dielectric region 4 is a U-shaped trench.

The trench gate dielectric region 4 covers part of the surface above the drift layer 3 of the first conductivity type.

Further, the trench gate dielectric region 4 is composed of one or more repeated and unconnected structural units.

The trench gate filling region 5 is filled in the trench gate dielectric region 4 .

Further, the trench gate filling region 5 is not in contact with the upper electrode layer 8 .

The Schottky barrier contact region 6 covers part of the surface above the drift layer 3 of the first conductivity type.

The Schottky barrier contact region 6 and the trench gate dielectric region 4 are distributed at intervals.

Further, the Schottky barrier contact region 6 is composed of one or more repeated and unconnected structural units.

The dielectric isolation region 7 completely covers the trench gate filling region 5 .

Further, the dielectric isolation region 7 covers part of the surface of the trench gate dielectric region 4 .

The upper electrode layer 8 covers part of the surface of the trench gate dielectric region 4 , the Schottky barrier contact region 6 and the dielectric isolation region 7 . The upper electrode layer 8 also covers part of the surface of the trench gate dielectric region 4 .

Example 2:

A high-efficiency rectifier, mainly comprising a lower electrode layer 1, a heavily doped first conductivity type substrate layer 2, a first conductivity type drift layer 3, a trench gate dielectric region 4, a trench gate filling region 5, and a Schottky barrier Contact region 6, isolation dielectric region 7 and upper electrode layer 8.

The heavily doped first conductive type substrate layer 2 covers the lower electrode layer 1 .

The drift layer 3 of the first conductivity type covers the heavily doped substrate layer 2 of the first conductivity type.

The trench gate dielectric region 4 is a U-shaped trench.

The trench gate dielectric region 4 covers part of the surface above the drift layer 3 of the first conductivity type.

Further, the trench gate dielectric region 4 is composed of one or more repeated and unconnected structural units.

The trench gate filling region 5 is filled in the trench gate dielectric region 4 .

Further, the trench gate filling region 5 is not in contact with the upper electrode layer 8 .

The Schottky barrier contact region 6 covers part of the surface above the drift layer 3 of the first conductivity type.

The Schottky barrier contact region 6 and the trench gate dielectric region 4 are distributed at intervals.

Further, the Schottky barrier contact region 6 is composed of one or more repeated and unconnected structural units.

The dielectric isolation region 7 completely covers the trench gate filling region 5 .

Further, the dielectric isolation region 7 completely covers the trench gate dielectric region 4 .

The upper electrode layer 8 covers the Schottky barrier contact region 6 and the dielectric isolation region 7 .

Example 3:

A method for manufacturing a high-efficiency rectifier mainly includes the following steps:

1) Preparing the heavily doped substrate layer 2 of the first conductivity type.

2) Forming the drift layer 3 of the first conductivity type.

The heavily doped substrate layer 2 of the first conductivity type and the drift layer 3 of the first conductivity type are made of semiconductor materials, mainly including silicon and silicon carbide.

3) Etching grooves on the surface of the drift layer 3 of the first conductivity type.

4) Forming the trench gate dielectric region 4 .

The material of the trench gate dielectric region 4 is silicon dioxide, silicon oxynitride or hafnium oxide.

5) Forming the trench gate filling region 5 .

The material of the trench gate filling region 5 is polysilicon. The polysilicon material is doped by original doping or annealing after impurity implantation.

6) Forming the isolation dielectric region 7 .

7) Forming the Schottky barrier contact region 6 .

The material of the Schottky barrier contact region 6 is Schottky barrier metal or advanced silicide. The high-grade silicides include titanium-silicon alloys, platinum-silicon alloys and nickel-platinum-silicon alloys.

8) Forming the upper electrode layer 8 .

9) Forming the lower electrode layer 1 .

Example 4:

A method for manufacturing a high-efficiency rectifier, comprising the following steps:

1) Selecting the first conductivity type as N type;

2) Preparing heavily doped N-type substrate layer 2, the material used for the heavily doped N-type substrate layer is selected as monocrystalline silicon;

3) forming an N-type drift layer 3, and the material used for the N-type drift layer is selected as single crystal silicon;

4) Etching grooves on the surface of the N-type drift layer 3;

5) Forming a U-shaped trench gate dielectric region 4, and selecting a silicon dioxide material for the gate dielectric region;

6) Forming the trench gate filling region 5, the material of the trench gate filling region is polysilicon material, and the polysilicon material is doped by annealing after impurity implantation;

7) forming an isolation medium region 7, the material of which is TEOS medium;

8) Forming the Schottky barrier contact region 6, the material of the Schottky barrier contact region is titanium-silicon alloy;

9) forming an upper electrode layer 8;

10) Forming the lower electrode layer 1 .

The manufacturing method of a high-efficiency rectifier given in this embodiment can obtain a high-efficiency rectifier with short reverse recovery time and low switching loss without increasing manufacturing process steps and manufacturing costs.

Example 5:

The first conductivity type is selected as N-type, and a high-efficiency rectifier manufactured by the manufacturing method given in Example 4, as shown in Figure 1, includes a lower electrode layer 1, a heavily doped N-type substrate layer 2, an N-type drift Layer 3, trench gate dielectric region 4, trench gate filling region 5, Schottky barrier contact region 6, isolation dielectric region 7 and upper electrode layer 8;

The heavily doped N-type substrate layer 2 is located on the lower electrode layer 1, the heavily doped N-type substrate material is selected from single crystal silicon, the impurity is selected from arsenic, the doping concentration is selected to the power of about 20, and the thickness is selected to be 400-600 microns ;

The N-type drift layer 3 is located on the heavily doped N-type substrate layer 2, the N-type drift layer is selected from single crystal silicon, the impurity is selected from phosphorus, the doping concentration is selected to the power of about 15, and the thickness is selected to be 4-8 microns;

The trench gate dielectric region 4 has a U-shaped groove structure and is located on a part of the N-type drift layer 3. The gate dielectric region is made of silicon dioxide, and the thickness of the silicon dioxide material in the U-shaped groove structure is selected to be 0.2-0.6. Micron;

The trench gate filling region 5 is located inside the U-shaped groove of the trench gate dielectric region 4, the material of the trench gate filling region is polysilicon, and the polysilicon material is impurity implanted and then annealed to complete doping. The dosage is about 15 times;

The Schottky barrier contact region 6 is located on a part of the drift layer 3 of the first conductivity type; the Schottky barrier contact region 6 is spaced apart from the trench gate dielectric region 4;

The isolation dielectric region 7 is located on the trench gate filling region 5 and the trench gate dielectric region 4, and the isolation dielectric material is TEOS medium;

The upper electrode layer 8 is located on the Schottky barrier contact region 6 and the isolation dielectric region 7; the trench gate filling region 5 is not in contact with the upper electrode layer 8 .

Before the lower electrode layer 1 is formed, the heavily doped N-type substrate layer 2 needs to be thinned.

The high-efficiency rectifier provided in this embodiment can obtain the performance of short reverse recovery time and small switching loss.

Embodiment 6:

The first conductivity type is selected as N-type, and a high-efficiency rectifier manufactured by the manufacturing method given in Example 4, as shown in Figure 2, includes a lower electrode layer 1, a heavily doped N-type substrate layer 2, an N-type drift Layer 3, trench gate dielectric region 4, trench gate filling region 5, Schottky barrier contact region 6, isolation dielectric region 7 and upper electrode layer 8;

The heavily doped N-type substrate layer 2 is located on the lower electrode layer 1, the heavily doped N-type substrate material is selected from single crystal silicon, the impurity is selected from arsenic, the doping concentration is selected to the power of about 20, and the thickness is selected to be 400-600 microns ;

The N-type drift layer 3 is located on the heavily doped N-type substrate layer 2, the N-type drift layer is selected from single crystal silicon, the impurity is selected from phosphorus, the doping concentration is selected to the power of about 15, and the thickness is selected to be 4-8 microns;

The trench gate dielectric region 4 has a U-shaped groove structure and is located on a part of the N-type drift layer 3. The gate dielectric region is made of silicon dioxide, and the thickness of the silicon dioxide material in the U-shaped groove structure is selected to be 0.2-0.6. Micron;

The trench gate filling region 5 is located inside the U-shaped groove of the trench gate dielectric region 4, the material of the trench gate filling region is polysilicon, and the polysilicon material is impurity implanted and then annealed to complete doping. The dose is about 15 times;

The Schottky barrier contact region 6 is located on a part of the drift layer 3 of the first conductivity type; the Schottky barrier contact region 6 is spaced apart from the trench gate dielectric region 4;

The isolation dielectric region 7 is located on the trench gate filling region 5 and part of the trench gate dielectric region 4, and the isolation dielectric material is TEOS medium;

The upper electrode layer 8 is located on the Schottky barrier contact region 6 , the isolation dielectric region 7 and part of the trench gate dielectric region 4 ; the trench gate filling region 5 is not in contact with the upper electrode layer 8 .

Before the lower electrode layer 1 is formed, the heavily doped N-type substrate layer 2 needs to be thinned.

The high-efficiency rectifier provided in this embodiment can obtain the performance of short reverse recovery time and small switching loss.

Embodiment 7:

A method for manufacturing a high-efficiency rectifier, comprising the following steps:

1) Select the first conductivity type as N type.

2) Prepare a heavily doped N-type substrate layer 2, select single crystal silicon as the material for the heavily doped N-type substrate, select arsenic as the impurity, select the doping concentration to the power of about 20, and select the thickness to be 600 microns;

3) As shown in Figure 3, an N-type drift layer 3 is formed on the heavily doped N-type substrate layer 2, the N-type drift layer is selected from single crystal silicon, the impurity is selected from phosphorus, the doping concentration is selected to the power of about 15, and the thickness is selected 6 microns;

4) Etching multiple grooves on the surface of the N-type drift layer 3, the etching depth is selected to be about 3 microns, and the width of the grooves is divided into two types, one of which is about 1.5 microns, and the other is about 10 microns or more;

5) Forming a U-shaped trench gate dielectric region 4, the material of the gate dielectric region is silicon dioxide material, and its thickness is selected to be about 0.45 microns;

6) Forming the trench gate filling region 5, the material of the trench gate filling region is polysilicon material, and the polysilicon material is impurity implanted and then annealed to complete the doping impurity implantation condition, phosphorus impurity and implantation dose are selected to the power of about 15; as shown in Figure 4 It shows that at this time, the narrower type of trench-filling region is filled with doped polysilicon, while the wider type of trench-filling region has only side walls partially doped with polysilicon;

7) Forming the isolation dielectric region 7 . The material of the isolation dielectric 7 is TEOS dielectric, and its formation process is to first deposit TEOS with a thickness of about 0.3-1.2um, as shown in Figure 5; then perform a TEOS etching process according to the layout setting, and only a wider type of trench (this As shown in Figure 6, the formation of the remaining TEOS dielectric on the terminal cut-off groove of the high-efficiency rectifier is a conventional TMBS structure, and the formation of the remaining TEOS dielectric on the narrower type of groove is a kind of high-efficiency rectifier given by the patent of the present invention structure, as shown in Figure 7.

8) Forming the Schottky barrier contact region 6, the material of the Schottky barrier contact region is titanium-silicon alloy;

9) forming an upper electrode layer 8;

10) Forming the lower electrode layer 1 . Before the lower electrode layer 1 is formed, the heavily doped N-type substrate layer 2 needs to be thinned.

The finally formed conventional TMBS structure including the active region and the terminal structure is shown in FIG. 8 , and the formed high-efficiency rectifier structure of the present invention is shown in FIG. 9 .

The manufacturing method of a high-efficiency rectifier given in this embodiment can obtain a high-efficiency rectifier with short reverse recovery time and low switching loss without increasing manufacturing process steps and manufacturing costs.

Claims (8)

1. A high-efficiency rectifier is characterized in that it mainly includes a lower electrode layer (1), a heavily doped first conductivity type substrate layer (2), a first conductivity type drift layer (3), a trench gate dielectric region (4 ), a trench gate filling region (5), a Schottky barrier contact region (6), an isolation dielectric region (7) and an upper electrode layer (8); The heavily doped first conductivity type substrate layer (2) covers the lower electrode layer (1); The drift layer (3) of the first conductivity type covers the heavily doped substrate layer (2) of the first conductivity type. The trench gate dielectric region (4) is a U-shaped trench; The trench gate dielectric region (4) covers part of the surface above the drift layer (3) of the first conductivity type; The trench gate filling region (5) is filled in the trench gate dielectric region (4); The Schottky barrier contact region (6) covers part of the surface above the drift layer (3) of the first conductivity type; The Schottky barrier contact region (6) and the trench gate dielectric region (4) are distributed at intervals; The dielectric isolation region (7) completely covers the trench gate filling region (5); The upper electrode layer (8) covers the Schottky barrier contact region (6) and the dielectric isolation region (7). 2. A high-efficiency rectifier according to claim 1, characterized in that: the trench gate filling region (5) is not in contact with the upper electrode layer (8). 3. A high-efficiency rectifier according to claim 1 or 2, characterized in that: the dielectric isolation region (7) covers part of the surface of the trench gate dielectric region (4); the upper electrode layer (8) also Part of the surface of the trench gate dielectric region (4) is covered. 4. A high-efficiency rectifier according to claim 1, characterized in that: the dielectric isolation region (7) completely covers the trench gate dielectric region (4). 5. The high-efficiency rectifier according to claim 1, characterized in that: the trench gate dielectric region (4) is composed of one or more repeated and unconnected structural units. 6. A high-efficiency rectifier according to claim 1, characterized in that: the Schottky barrier contact region (6) is composed of one or more repeated and unconnected structural units. 7. A method for manufacturing a high-efficiency rectifier according to claims 1 to 6, characterized in that it mainly comprises the following steps: 1) preparing a heavily doped first conductivity type substrate layer (2); 2) forming a first conductivity type drift layer (3); 3) etching grooves on the surface of the drift layer (3) of the first conductivity type; 4) forming a trench gate dielectric region (4); 5) forming a trench gate filling region (5); 6) forming an isolation dielectric region (7); 7) forming a Schottky barrier contact region (6); 8) forming an upper electrode layer (8); 9) Forming the lower electrode layer (1). 8. The manufacturing method of a high-efficiency rectifier according to claim 7, characterized in that: the heavily doped substrate layer (2) of the first conductivity type and the drift layer (3) of the first conductivity type are made of semiconductor materials, mainly Includes silicon and silicon carbide. The material of the trench gate dielectric region (4) is silicon dioxide material, silicon oxynitride or hafnium oxide; The material of the trench gate filling region (5) is polysilicon; the polysilicon material is doped by original doping or annealing after impurity implantation; The material of the Schottky barrier contact region (6) is Schottky barrier metal or high-level silicide; the high-level silicide includes titanium-silicon alloy, platinum-silicon alloy and nickel-platinum-silicon alloy.