CN110691459A - Circuit board structure for forming connecting terminal by limiting opening window through solder mask - Google Patents
Circuit board structure for forming connecting terminal by limiting opening window through solder mask Download PDFInfo
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- CN110691459A CN110691459A CN201810817338.4A CN201810817338A CN110691459A CN 110691459 A CN110691459 A CN 110691459A CN 201810817338 A CN201810817338 A CN 201810817338A CN 110691459 A CN110691459 A CN 110691459A
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- solder mask
- circuit board
- board structure
- conductive medium
- connection terminals
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- 229910000679 solder Inorganic materials 0.000 title claims abstract description 42
- 239000000758 substrate Substances 0.000 claims abstract description 27
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 9
- 238000007747 plating Methods 0.000 claims description 9
- 229910052802 copper Inorganic materials 0.000 claims description 8
- 239000010949 copper Substances 0.000 claims description 8
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 6
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 6
- 229910052709 silver Inorganic materials 0.000 claims description 5
- 239000004332 silver Substances 0.000 claims description 5
- 229910045601 alloy Inorganic materials 0.000 claims description 3
- 239000000956 alloy Substances 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 239000010931 gold Substances 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 229910052763 palladium Inorganic materials 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 24
- 239000003292 glue Substances 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910002804 graphite Inorganic materials 0.000 description 2
- 239000010439 graphite Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- -1 fluororesin Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10106—Light emitting diode [LED]
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Led Device Packages (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
技术领域technical field
本发明是有关一种利用防焊限定开窗形成连接端子的电路板结构。The present invention relates to a circuit board structure that utilizes solder resist to define openings to form connecting terminals.
背景技术Background technique
随着电子产品的小型化趋势,电路板也需制作地更加加轻薄,使得电路板上的导电线路及连接端子的排列也越来越密集,发光二极管尺寸也愈来愈小。相应地,在组装过程中,对所述发光二极管的组装精度的要求也越来越高。With the trend of miniaturization of electronic products, circuit boards need to be made thinner and lighter, so that the arrangement of conductive lines and connecting terminals on the circuit boards is becoming more and more dense, and the size of light-emitting diodes is also getting smaller and smaller. Correspondingly, during the assembly process, the requirements for the assembly precision of the light-emitting diodes are also getting higher and higher.
通常来说,电路板上大多具有用以防潮、绝缘及防焊的防焊层,且防焊层的厚度至少需要大于10μm才能达到绝缘及屏蔽的效果。然而,由于发光二极管的连接垫通常较薄,使得发光二极管的连接垫不易完全地和基板的连接端子相连接,因而导致接触不良的问题产生。Generally speaking, most circuit boards have a solder mask for moisture-proof, insulation and solder mask, and the thickness of the solder mask needs to be at least greater than 10 μm to achieve the effect of insulation and shielding. However, since the connection pads of the light emitting diodes are usually thin, it is difficult for the connection pads of the light emitting diodes to be completely connected with the connection terminals of the substrate, thus resulting in the problem of poor contact.
是以,如何降低发光二极管的连接垫与连接端子接触不良的问题发生,为本发明欲解决的技术课题。Therefore, how to reduce the problem of poor contact between the connection pads and the connection terminals of the light-emitting diodes is a technical problem to be solved by the present invention.
发明内容SUMMARY OF THE INVENTION
有鉴于此,本发明的主要目的在于提供一种可降低接触不良问题发生的电路板结构。In view of this, the main purpose of the present invention is to provide a circuit board structure that can reduce the occurrence of poor contact.
为了达成上述的目的,本发明提供一种利用防焊限定开窗形成连接端子的电路板结构,包括:一基板、一防焊层及一可固化导电介质。基板具有多个连接端子。防焊层形成于基板表面,且具有多个分别对应于连接端子的开口,其中防焊层顶面至连接端子顶面的断差大于5μm。可固化导电介质则分别填充于开口中并用以电性连接连接端子,其中可固化导电介质至防焊层顶面的断差小于5μm。In order to achieve the above-mentioned purpose, the present invention provides a circuit board structure using a solder mask to define a window to form a connection terminal, comprising: a substrate, a solder mask layer and a curable conductive medium. The substrate has a plurality of connection terminals. The solder resist layer is formed on the surface of the substrate and has a plurality of openings respectively corresponding to the connection terminals, wherein the disconnection from the top surface of the solder resist layer to the top surface of the connection terminals is greater than 5 μm. The curable conductive medium is respectively filled in the openings and used to electrically connect the connection terminals, wherein the difference between the curable conductive medium and the top surface of the solder resist layer is less than 5 μm.
所述利用防焊限定开窗形成连接端子的电路板结构更包括至少一覆晶LED,覆晶LED包括一发光二极管、一P极连接垫及一N极连接垫。P极连接垫及N极连接垫分别接触并电性连接于填充在开口中的可固化导电介质。The circuit board structure using the solder mask to define the window to form the connection terminal further includes at least one flip-chip LED, and the flip-chip LED includes a light emitting diode, a P-pole connection pad and an N-pole connection pad. The P-pole connection pad and the N-pole connection pad are respectively in contact with and electrically connected to the curable conductive medium filled in the opening.
所述利用防焊限定开窗形成连接端子的电路板结构进一步满足下列关系式:The circuit board structure using the solder mask to define the window to form the connection terminal further satisfies the following relationship:
X+Y≧Z;X+Y≧Z;
其中,X为P极连接垫及N极连接垫的厚度,Y为可固化导电介质的厚度,Z为防焊层顶面至连接端子顶面的断差。Wherein, X is the thickness of the P-pole connection pad and the N-pole connection pad, Y is the thickness of the curable conductive medium, and Z is the disconnection from the top surface of the solder mask to the top surface of the connection terminal.
所述连接端子包括一衬底电路层及一表面镀层。The connecting terminal includes a substrate circuit layer and a surface plating layer.
所述表面镀层的材质为:镍、金、银、钯或其合金。The material of the surface plating layer is: nickel, gold, silver, palladium or alloys thereof.
所述可固化导电介质可为:导电铜胶、导电银胶、导电石墨胶或锡膏。The curable conductive medium can be: conductive copper glue, conductive silver glue, conductive graphite glue or solder paste.
通过将可固化导电介质填充于防焊层的开口之中,使表面贴装组件(SurfaceMounted Device)可通过较厚的可固化导电介质与连接端子电性连接,而可有效降低接触不良的问题发生。By filling the curable conductive medium in the openings of the solder mask, the Surface Mounted Device can be electrically connected to the connecting terminals through a thick curable conductive medium, which can effectively reduce the problem of poor contact. .
有关本发明的其它功效及实施例的详细内容,配合附图说明如下。The details of other functions and embodiments of the present invention are described below with reference to the accompanying drawings.
附图说明Description of drawings
为了更清楚地说明本申请实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请中记载的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其它的附图。In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the accompanying drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only These are some embodiments described in this application. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings without creative efforts.
图1A至图1G为本发明所提供的利用防焊限定开窗形成连接端子的电路板结构的制作流程剖面图。1A to 1G are cross-sectional views of the fabrication process of the circuit board structure provided by the present invention using solder mask to define openings to form connection terminals.
符号说明Symbol Description
C 连接端子 X、Y 厚度C Connection terminal X, Y thickness
d、Z 断差 10 基板d,
101 第一表面 102 第二表面101
11 面铜 111 衬底电路层11-sided
12 防焊层 121 开口12
13 表面镀层 14 可固化导电介质13
15 覆晶LED 151 发光二极管15
152 P极连接垫 153 N极连接垫152 P-pole connection pad 153 N-pole connection pad
具体实施方式Detailed ways
首先,请参阅图1A至图1G图,图1A至图1G为本发明所提供的利用防焊限定开窗形成连接端子的电路板结构的制作流程剖面图。首先,提供一基板10,基板10具有一第一表面101及一第二表面102,而基板10可为单层板结构或多层复合板结构,且基板10可为软性电路板(Flexible Printed Circuit,FPC)的基板或硬式电路板(Printed Circuit Board,PCB)的基板。于本实施例中,第一表面101层合有薄铜箔(未示于图中)而可进行镀铜,以于基板10的第一表面101形成面铜11(如图1A所示)。接着,以线路影像转移技术将面铜11图像化,以于基板10表面形成衬底电路层111(如图1B所示)。衬底电路层111之间具有间隙,且衬底电路层111的材料为铜。First, please refer to FIG. 1A to FIG. 1G . FIGS. 1A to 1G are cross-sectional views of the fabrication process of the circuit board structure provided by the present invention using solder mask defined openings to form connection terminals. First, a
请参阅图1C,接着,涂布防焊材料于基板10的第一表面101,以形成覆盖于基板10及衬底电路层111的防焊层12。所述防焊层12为一绝缘层,其材料可为:环氧树脂、硅树脂、聚酰亚胺树脂、酚类树脂、氟树脂、二氧化硅或氧化铝。Referring to FIG. 1C , next, a solder resist material is coated on the
请继续参阅图1D,于防焊层12上开窗而形成对应于衬底电路层111位置的开口121。随后,可以化学镀(chemical plating)或电镀的方式于衬底电路层111表面形成表面镀层13(如图1E所示),以形成用以电性连接于半导体组件,例如:覆晶LED的连接端子C,亦即,本发明的表面镀层13是以防焊开窗限定(Solder Mask Defined,SMD)的制程所形成。其中,表面镀层13的材质可为:镍、金、银、钯或其合金。而连接端子C的顶面至防焊层12的顶面的断差Z大于5μm。本文中,所述“断差”是指两表面在材料厚度方向的间距。Please continue to refer to FIG. 1D , a window is opened on the
请继续参阅第1F图。于图1F中,是将可固化导电介质14填充于开口121之中,使可固化导电介质14电性连接连接端子C,而可固化导电介质14可为:导电铜胶、导电银胶、导电石墨胶或锡膏,通过填充较厚的可固化导电介质14,使得可固化导电介质14至防焊层12的顶面的断差d小于5μm。较佳者,可固化导电介质14的厚度接近或大于μm。随后,将覆晶LED15设置于连接端子C的上方(如图1G所示)。于图1G中,覆晶LED 15包括:发光二极管151及设置于其底面的P极连接垫152及N极连接垫153,且P极连接垫152及N极连接垫153分别对应于开口121而可伸入开口121之中,并与可固化导电介质14相接触,P、N极连接垫的厚度通常不大于5μm。待可固化导电介质14固化后,即可将覆晶LED 15固定于连接端子C的上方,并利用可固化导电介质14的导电材质的特性,电性连接P极连接垫152及N极连接垫153与连接端子C。于本实施例中,P极连接垫152、N极连接垫153的厚度为X;可固化导电介质14的厚度为Y;防焊层12的顶面与连接端子C之间的断差为Z,且P极连接垫152、N极连接垫153的厚度X加上可固化导电介质14的厚度Y大于或等于防焊层12的顶面与连接端子C的顶面的断差Z(即:X+Y≧Z)。Please continue to see Figure 1F. In FIG. 1F, the curable
本发明是将可固化导电介质14填充于防焊层的开口之中,使P极连接垫152及N极连接垫154可通过较厚的可固化导电介质14与连接端子C电性连接,而可有效降低接触不良的问题发生。In the present invention, the curable conductive medium 14 is filled in the opening of the solder mask, so that the P-
以上所述的实施例及/或实施方式,仅是用以说明实现本发明技术的较佳实施例及/或实施方式,并非对本发明技术的实施方式作任何形式上的限制,任何本领域技术人员,在不脱离本发明内容所公开的技术手段的范围,当可作些许的更动或修改为其它等效的实施例,但仍应视为与本发明实质相同的技术或实施例。The above-mentioned embodiments and/or implementations are only used to illustrate the preferred embodiments and/or implementations for realizing the technology of the present invention, and are not intended to limit the implementation of the technology of the present invention in any form. Personnel, without departing from the scope of the technical means disclosed in the content of the present invention, may make some changes or modifications to other equivalent embodiments, but they should still be regarded as substantially the same technology or embodiment of the present invention.
Claims (6)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW107123236 | 2018-07-05 | ||
| TW107123236A TWI682695B (en) | 2018-07-05 | 2018-07-05 | Circuit board structure with conection terminal formed by solder mask defined process |
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| CN110691459A true CN110691459A (en) | 2020-01-14 |
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| CN201810817338.4A Pending CN110691459A (en) | 2018-07-05 | 2018-07-24 | Circuit board structure for forming connecting terminal by limiting opening window through solder mask |
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| CN114430615A (en) * | 2022-01-20 | 2022-05-03 | 重庆惠科金渝光电科技有限公司 | Circuit board manufacturing method, circuit board and storage medium |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111901963B (en) * | 2019-05-05 | 2022-01-04 | 诺沛半导体有限公司 | Method for forming solder pads on light-emitting diode substrates |
| CN112291926A (en) * | 2019-07-25 | 2021-01-29 | 同泰电子科技股份有限公司 | Single-sided circuit board of light-emitting diode backlight module |
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2018
- 2018-07-05 TW TW107123236A patent/TWI682695B/en active
- 2018-07-24 CN CN201821172754.5U patent/CN208768331U/en active Active
- 2018-07-24 CN CN201810817338.4A patent/CN110691459A/en active Pending
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Also Published As
| Publication number | Publication date |
|---|---|
| TW202007241A (en) | 2020-02-01 |
| CN208768331U (en) | 2019-04-19 |
| TWI682695B (en) | 2020-01-11 |
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