CN110739978A - Front end receiving circuit and front end receiving method used for same - Google Patents
Front end receiving circuit and front end receiving method used for same Download PDFInfo
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- CN110739978A CN110739978A CN201810807130.4A CN201810807130A CN110739978A CN 110739978 A CN110739978 A CN 110739978A CN 201810807130 A CN201810807130 A CN 201810807130A CN 110739978 A CN110739978 A CN 110739978A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
- H04B1/1607—Supply circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
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Abstract
The invention discloses front end receiving circuits and a front end receiving method used for the same, which comprises a 0 th input end for receiving a th signal, a second input end for receiving a second signal, a comparator, a 1 th sampling switch, a 2 th sampling displacement circuit and a control circuit, a 3 th sampling switch is connected between a 4 th input end and a 5 th comparator input end, a 6 th sampling displacement circuit comprises an th capacitor, a th reference voltage source and a second reference voltage source, a control circuit is configured to be respectively and electrically connected with control ends of a th sampling switch, a second sampling switch and a th displacement switch, in a sampling mode, the control circuit is configured to control the th sampling switch and the second sampling switch to be turned on, the th displacement switch is turned off, in a displacement mode, the control circuit is configured to control the th sampling switch and the second sampling switch to be turned off, and the th displacement switch to be turned on.
Description
Technical Field
The present invention relates to front-end receiving circuits and front-end receiving methods used for the same, and more particularly, to front-end receiving circuits and methods capable of reducing a voltage received by a back-end circuit by performing voltage shifting after a sampling circuit samples a high-voltage input signal.
Background
In the prior ethernet or tv front-end receiving circuit, when the RX input signal is at a high voltage level, the device receiving the RX input signal must use a high voltage device, otherwise the device has a short lifetime or is burned.
For the front-end receiving circuit of a tv, a high-voltage to low-voltage amplifier is added, so that the back-end circuit of the amplifier connected to the output terminal of the amplifier can use low-voltage devices. However, the amplifier itself must use high voltage devices, which increases the power consumption and area of the circuit and increases the circuit noise.
Therefore, it is an important subject to be solved by that how to overcome the above-mentioned drawbacks by improving the circuit design to reduce the number of high voltage devices in the front end receiving circuit.
Disclosure of Invention
The present invention is directed to a front end receiving circuit connected to a back end circuit, including a 1 st input terminal for receiving a 0 th signal, a second input terminal for receiving a second signal, a comparator, a 2 nd sampling switch, a 3 rd sampling shift circuit and a control circuit, wherein the comparator has a 4 th comparator input terminal and a second comparator input terminal connected to a 5 th input terminal and a second input terminal, respectively, a 6 th sampling switch is connected between a 7 th input terminal and an 8 th comparator input terminal, a 9 th sampling shift circuit includes a second capacitor, a 0 th reference voltage source and a second reference voltage source, a 2 st capacitor terminal is connected between the 3 rd sampling switch and the 4 th comparator input terminal, a 5 th reference voltage source is connected to the other 7 th capacitor terminal through the second sampling switch, a second reference voltage source is connected to the other 9 th capacitor terminal through the 8 th shift switch, the control circuit is configured to electrically connect the 0 th sampling switch, the second sampling switch and the control terminal of the 1 st shift switch, respectively, to control the sampling switch to be switched on and off in a sampling switch, and to control the sampling switch in-state, and the sampling shift switch, and to be configured to control the sampling switch to be switched on and off in-state, and the sampling switch, and to control the sampling switch.
To overcome the disadvantages of the prior art, the present invention further provides a front-end receiving method for a front-end receiving circuit for transmitting a signal to a back-end circuit connected to the front-end receiving circuit, the method comprising configuring a th input terminal to receive a th signal, configuring a second input terminal to receive a second signal, configuring a th comparator input terminal and a second comparator input terminal of a comparator to be connected to th and 825 th input terminals, respectively, configuring a th sampling switch to be connected between a th input terminal and a th comparator input terminal, configuring an th terminal of a th capacitor of an 6 th sampling shift circuit to be connected between a th sampling switch and an th comparator input terminal, configuring an th reference voltage source of an th sampling shift circuit to be connected to an th capacitor through a second sampling switch, configuring a th sampling shift circuit to be connected to an th terminal of the 8672 th capacitor through the second sampling switch, configuring a th sampling shift circuit to be connected to the th sampling switch through the second sampling switch, configuring a control circuit to turn off the second sampling switch and enter a shift mode, and entering the control mode.
The front end receiving circuit and the front end receiving method thereof have the advantages that the sampling circuit can perform the action of shifting the high voltage to the low voltage after the sampling circuit samples the high voltage signal through the technical scheme of the sampling mode and the shifting mode, and the use of an amplifier for converting the high voltage to the low voltage in the existing Ethernet or television front end receiving circuit can be omitted.
Another advantageous effect of the present invention is that the front end receiving circuit and the front end receiving method thereof provided by the present invention can use low voltage devices for both the comparator and the back end circuit by using the high voltage resistant operation switch through the technical schemes of "sampling mode", "shift mode" and "operation mode", so as to have the characteristics of high speed, low power consumption and low area.
To further understand the features and technical content of the present invention, please refer to the following detailed description and drawings related to the present invention, which are provided for reference and illustration purposes only and are not intended to limit the present invention.
Drawings
Fig. 1 is a circuit architecture diagram of a front-end receiver circuit according to an embodiment of the present invention.
FIG. 2 is another block diagram of a front-end receiver circuit according to an embodiment of the present invention.
Fig. 3 is a flow chart of a front-end receiving method for a front-end receiving circuit according to an embodiment of the invention.
Fig. 4 is a circuit architecture diagram of a front-end receiving circuit according to a second embodiment of the present invention.
Fig. 5 is another circuit architecture diagram of the front-end receiver circuit according to the second embodiment of the present invention.
FIG. 6 shows a sample signal φ according to a second embodiment of the inventionSA displacement signal phiLOperation signal phiHAnd analog-to-digital converter signal phiADCTiming diagram of (2).
Fig. 7 is a flowchart of a front-end receiving method for a front-end receiving circuit according to a second embodiment of the invention.
Description of the symbols
100: front end receiving circuit
140: back-end circuit
Vin-the th signal
101: th input terminal
Vin +: second signal
102: second input terminal
110: comparator with a comparator circuit
SS1 No. sampling switch
SS 2: second sampling switch
SS 3: third sampling switch
SS 4: fourth sampling switch
SS 5: fifth sampling switch
SS 6: sixth sampling switch
SS 7: seventh sampling switch
120 th th sampling displacement circuit
130: control circuit
111: th comparator input terminal
112: second comparator input terminal
C1 No. capacitor
C2: second capacitor
C4: fourth capacitor
C5: fifth capacitor
C6: sixth capacitor
Ci: capacitor with a capacitor element
V1 No. reference voltage source
V2: second reference voltage source
SL1 No. displacement switch
SL 2: second position moving switch
SL 3: third displacement switch
SL 4: fourth switch
SL 5: fifth displacement switch
SH1 No. operating switch
SH 2: second operation switch
φS: sampling signal
φL: displacement signal
φH: operating signal
φADC: an analog to digital converter signal.
Detailed Description
The present invention may be embodied or carried out in other specific embodiments and details may be varied in many ways without departing from the spirit and scope of the invention, such as the following detailed description of the invention, the accompanying drawings are included to provide a simplified schematic illustration and not for the purpose of limiting the invention in its broader aspects, and the following detailed description of the invention is and is not intended to limit the scope of the invention.
It will be understood that, although the terms "," "second," "third," etc. may be used herein to describe various elements or signals, these elements or signals should not be limited by these terms.
[ example ]
Referring to fig. 1, a circuit architecture diagram of a front end receiving circuit according to an embodiment of the present invention is shown in fig. 1, a embodiment of the present invention provides front end receiving circuit 100, which is connected to a back end circuit 140, the front end receiving circuit 100 includes a input 101 for receiving a th signal Vin-, a second input 102 for receiving a second signal Vin +, a comparator 110, a sampling switch SS1, a th sampling shift circuit 120, and a control circuit 130.
The comparator 110 has comparator input end 111 and second comparator input end 112 connected to input end 101 and second input end 102 respectively, 0 sampling switch SS1 connected between 1 input end 101 and 2 comparator input end 111, 3 sampling shift circuit 120 includes 4 capacitor C1, 5 reference voltage source V1 and second reference voltage source V2, 6 capacitor C1 7 connected between sampling switch SS1 and comparator input end 111, reference voltage source V1 connected to another end of capacitor C1 through second sampling switch SS2, and second reference voltage source V2 connected to another end of capacitor C1 through shifting switch SL 1.
For example, in the conventional ethernet or tv front end receiving circuit, the th signal Vin-and the second signal Vin + received by the front end receiving circuit 100 are usually at high voltage level, but in order to solve the problems of increased power consumption and area of the circuit and increased circuit noise caused by the high voltage to low voltage amplifier, after the th sampling circuit 120 finishes sampling the high voltage signal, the th sampling circuit 120 is shifted from high voltage to low voltage, so as to omit the use of the high voltage to low voltage amplifier in the conventional ethernet or tv front end receiving circuit.
To this end, the front-end receiving circuit 100 further includes a control circuit 130 electrically connected to control terminals of the th sampling switch SS1, the second sampling switch SS2 and the th shift switch SL1, wherein the control circuit 130 outputs the sampling signal Φ to the th sampling switch SS1 and the second sampling switch SS2 respectivelySAnd outputs a displacement signal phi to the th displacement switch SL1LThe th sampling switch SS1, the second sampling switch SS2 and the th shift switch SL1 are controlled to switch between an on state and an off state respectively.
In this embodiment, the th sampling shift circuit 120 further includes a second capacitor C2, a third sampling switch SS3, and a second shift switch sl2, wherein the second capacitor C2 is connected between the sampling switch SS1 of the th and the comparator input 111 of the th, the third sampling switch SS3 is connected between the other of the second capacitor C2 and the reference voltage source V1 of the th, and the second shift switch SL2 is connected between the other of the second capacitor C2 and the reference voltage source V2.
In the sampling mode, the control circuit 130 controls the th sampling switch SS1, the second sampling switch SS2 and the third sampling switch SS3 to be turned on, and the th displacement switch SL1 and the second displacement switch SL2 to be turned off, or controls the sampling switches to be fully turned on under the condition that other capacitors Ci exist, so that all the capacitors sample th signals Vin-and th reference voltage source V1, and common-mode voltage of can be sampled.
After the sampling mode is finished, is stepped into a displacement mode, in the displacement mode, the control circuit 130 controls the th sampling switch SS1 to be turned off, at least of the second sampling switch SS2 and the third sampling switch SS3 to be turned off, and the th displacement switch SL1 and the second displacement switch SL2 are turned on corresponding to the turned-off sampling switch, or under the condition that a plurality of capacitors Ci exist, a plurality of sampling switches are turned off to be connected to a second reference voltage source V2, and the th reference voltage source V1 is higher in potential than the second reference voltage source V2.
Specifically, the control circuit 130 may change the th sampling circuit 120 to the th reference voltage source V1 connected with a certain number of capacitors, such as the th capacitor C1, the second capacitor C2 and the plurality of capacitors Ci, in the sampling mode to the second reference voltage source V2 in the shift mode, so as to decrease the obtained common mode voltage from the common mode voltage originally in the high voltage range to the other common mode voltage in the low voltage range at the end of the sampling mode.
For example, assuming that there are th capacitor C1, C2 and four capacitors Ci with the same capacitance value as C as shown in the figure, the voltage level of the th reference voltage source V1 is 1V, the voltage level of the second reference voltage source V2 is 0V, the common mode voltage Vcm obtained in the sampling mode is 1.6V, and then, in the displacement mode, three capacitors are connected to the second reference voltage source V2, the common mode voltage X after displacement can be calculated by the following formula (1):
x is 1.6+ (V2-V1) 3C/6C- - -formula (1);
by substituting the above values, the common mode voltage X after displacement is 1.1. therefore, by alternately operating the sampling mode and the displacement mode under the circuit architecture of the present invention, the common mode voltage 1.6V in the high voltage range can be reduced to another common mode voltage 1.1V in the low voltage range, and the desired common mode voltage value can be controlled by controlling the number of capacitor switches.
In this case, the th sampling switch SS1, the second sampling switch SS2, the th shift switch SL1, and the input pair element (not shown) connecting the th comparator input 111 and the second comparator input 112 operate in the high voltage range, while the back circuit 140 operates in the low voltage range, for example, the high voltage range may be greater than 1.5V, and the low voltage range may be less than 1.2V, it is noted that the high voltage element is required for the element that will be exposed to the high voltage signal, in other words, the th sampling switch SS1, the second sampling switch SS2, the th shift switch SL1, and the input pair element connecting the th comparator input 111 and the second comparator input 112 operate in the high voltage range.
In addition, referring to fig. 2, which is another circuit architecture of the front end receiving circuit of the second embodiment of the present invention, the front end receiving circuit 100 may further steps include an operating switch SH1 connected between the terminal of the C1 and the 4 comparator input 111, after the shift mode, the control circuit 130 may be configured to enter a operating mode, in which the control circuit 130 controls the SS sampling switch SS , the SS second sampling switch SS and the SL shift switch SL to be turned off, and the SH 72 second sampling switch SH 72 to be turned on, in the operating mode, under the condition that the second C and the plurality of capacitors are present, the control circuit 130 controls the SS third sampling switch SS , the SL , and all other sampling switches and the shift switches to be turned off, it should be noted that in this embodiment, only the SS 72 second sampling switch, the SL 72, and other sampling switches may operate within a range from the high voltage range where the SL 72V is lower than the high voltage switch SH 72, and the high voltage switch 72V .
Referring to fig. 3, a flow chart of a front-end receiving method for a front-end receiving circuit according to an embodiment of the present invention is further provided based on the above configuration, the present invention further provides a front-end receiving method for a front-end receiving circuit 100 for transmitting signals to a back-end circuit 140 connected to the front-end receiving circuit 100, the method of the present embodiment can be performed on the front-end receiving circuit 100 shown in fig. 1 or fig. 2, so please refer to and fig. 1 and fig. 2 for understanding, the front-end receiving method for a front-end receiving circuit includes the following steps:
and S100, configuring the control circuit to enter a sampling mode so as to control the th sampling switch and the second sampling switch to be switched on and the th displacement switch to be switched off.
Step S102, the control circuit is configured to enter a displacement mode to control the th sampling switch and the second sampling switch to be turned off, and the th displacement switch to be turned on.
Preferably, in the situation where the th operation switch SH1 is provided, the step S104 can be optionally entered, in which the control circuit is configured to enter the operation mode to control the th sampling switch, the second sampling switch and the th shift switch to be turned off, and the th operation switch to be turned on.
Through the configuration, after the sampling circuit samples the high-voltage signal, the sampling circuit is subjected to the action of shifting the high voltage to the low voltage, so that the use of an amplifier for converting the high voltage into the low voltage in the existing Ethernet or a television front-end receiving circuit can be omitted. In addition, by additionally arranging the high-voltage resistant operation switch, the comparator and the back-end circuit can use low-voltage elements so as to have the characteristics of high speed, low power consumption and low area.
The present embodiment is merely an exemplary description of the core concept of the present invention, and will be described in more detail in the following embodiments with reference to the accompanying drawings.
[ second embodiment ]
Referring to fig. 4, a circuit architecture diagram of a front-end receiving circuit according to a second embodiment of the present invention is shown, in which the second embodiment of the present invention provides front-end receiving circuits 100 connected to a back-end circuit 140, the front-end receiving circuit 100 includes a input terminal 101 for receiving a signal Vin-, a second input terminal 102 for receiving a second signal Vin +, a comparator 110, a sampling switch SS1, a sampling shift circuit 120, and a control circuit 130.
The difference from the previous embodiment is that the front-end receiving circuit 100 further includes a fourth sampling switch SS4, a fifth sampling switch SS5 and a sixth sampling switch SS6, the fourth sampling switch SS4 is connected to the second input terminal 102, the other is connected to the comparator input terminal 111 through a fourth capacitor C4, the other of the fourth sampling switch SS4 is connected to the second reference voltage source V2 through a third shift switch SL3, the fifth sampling switch SS5 is connected between the second input terminal 102 and the second comparator input terminal 112, the sixth sampling switch SS6 is connected to the input terminal 101 of the sixth reference voltage source , the other is connected to the second comparator input terminal 112 through a fifth capacitor C5, and the other of the sixth sampling switch SS6 is connected to the second reference voltage source V2 through a fourth shift switch SL 4.
The control circuit 130 is further electrically connected to the control terminals of the fourth sampling switch SS4, the fifth sampling switch SS5, the sixth sampling switch SS6, the third shift switch SL3 and the fourth shift switch SL4, wherein the control circuit 130 outputs the sampling signal phi to the fourth sampling switch SS4, the fifth sampling switch SS5 and the sixth sampling switch SS6 respectivelySAnd outputs a shift signal phi to the third shift switch SL3 and the fourth shift switch SL4LThe fourth sampling switch SS4, the fifth sampling switch SS5, the sixth sampling switch SS6, the third shift switch SL3 and the fourth shift switch SL4 are controlled to switch between on state and off state, respectively.
In detail, in practical implementation, the common mode level of the high voltage signal is too high, so that even if the sampled common mode high voltage signal is shifted down by using the shift mode in the foregoing embodiment, the shifted voltage level is still too high. Therefore, the present embodiment adopts the structure shown in fig. 4, and configures the control circuit 130 to enter the sampling mode and the shift mode, respectively.
In the sampling mode, the control circuit 130 is configured to control the th sampling switch SS1, the fourth sampling switch SS4, the fifth sampling switch SS5 and the sixth sampling switch SS6 to be turned on, the th displacement switch SL1, the third displacement switch SL3 and the fourth displacement switch SL4 to be turned off, and after the sampling mode is ended, enter the displacement mode, the control circuit 130 is configured to control the th sampling switch SS1, the fourth sampling switch SS4, the fifth sampling switch SS5 and the sixth sampling switch SS6 to be turned off, and control the th displacement switch SL1, the third displacement switch SL3 and the fourth displacement switch SL4 to be turned on.
More specifically, in the sampling mode, it can be seen that the differential signals are sampled at both ends of the fourth capacitor C4 and the fifth capacitor C5, in this case, the common mode voltage of the th signal Vin and the second signal Vin + will not be sampled, and in the shift mode, it can be seen that the upper plates of the fourth capacitor C4 and the fifth capacitor C5, i.e., the comparator input 111 and the second comparator input 112, will not have the high-voltage common mode voltage during sampling, but the second reference voltage V2, which is switched in the shift mode, assumes that the common mode voltage is 3.3V and the second reference voltage V2 is 0.5V, so that the sampling phase and the shift phase can be easily operated, such that the common mode voltage 3.3V in the high-voltage range is reduced to the common mode voltage 0.5V in the low-voltage range, i.e., the common mode voltage 0.5V in the low-voltage range, and a common mode shift of 2.8V is generated.
After shift mode, the common mode voltage V for the th comparator input 111cm_after_phyLThe following equation (2) can be obtained:
similarly, in this case, the th sampling switch SS1, the fourth sampling switch SS4, the fifth sampling switch SS5 and the sixth sampling switch SS6 are turned on, the th shifting switch SL1, the third shifting switch SL3 and the fourth shifting switch SL4, and input pair elements (not shown) connecting the th comparator input 111 and the second comparator input 112 operate in the high voltage range, while the back-end circuit 140 operates in the low voltage range, for example, the high voltage range may be greater than 1.5V, the low voltage range may be less than 1.2V, it should be noted that the elements that would be in contact with the high voltage signal must use high voltage elements, in other words, the th sampling switch SS1, the fourth sampling switch SS4, the fifth sampling switch SS 42 and the sixth sampling switch SS6 that operate in the high voltage range, the shift switch SL 4623 and the third shifting switch SL must be connected to the third shifting switch SL and the third shifting switch SL 4646.
In addition, refer to fig. 5, which is a circuit diagram illustrating another circuit architecture of the front-end receiving circuit according to the second embodiment of the present invention, the front-end receiving circuit 100 further includes a second sampling shift circuit including a sixth capacitor C6, a seventh sampling switch SS7, and a fifth shift switch sl5, the sixth capacitor C6 is connected between the fifth sampling switch SS5 and the second comparator input terminal 112, the seventh sampling switch SS7 is connected between the reference voltage source V1 and the other terminal of the sixth capacitor C6, the fifth shift switch SL5 is connected between the second reference voltage source V2 and the other terminal of the sixth capacitor C6, and the control circuit 130 is further configured to electrically connect the seventh sampling switch SS7 and the fifth shift switch SL5 to respectively control the seventh sampling switch SS7 and the fifth shift switch SL5 to switch between the on state and the off state, the second sampling shift circuit is identical to the configuration of the sampling circuit 120, and thus the description is omitted.
The front-end receiving circuit 100 may further include an th operating switch SH1 and a second operating switch sh2. an SH 0 th operating switch SH1 connected between the 12 end of the th capacitor C and the rd comparator input 111, and the second operating switch SH connected between the end of the sixth capacitor C and the second comparator input 112. after the shift mode, the control circuit 130 may be configured to enter a operating mode. in the operating mode, the control circuit 130 controls the second th sampling switch SS , the second sampling switch SS , the third sampling switch SS , the fourth sampling switch SS , the fifth sampling switch SS , the sixth sampling switch SS , the seventh sampling switch SS , the third th shifting switch SL , the second shifting switch SL , the third shifting switch SL , the fourth shifting switch SL , the fifth shifting switch SS , the sixth shifting switch, the second shifting switch SL , the third shifting switch SL , the second shifting switch SL , the sixth shifting switch SL , the second shifting switch SL , the third shifting switch SL , the second shifting switch SL , the third shifting switch SL , the sixth shifting switch, the shifting switch SL , the third shifting switch, the shifting switch SL , the second shifting switch SL , the shifting switch, the high-shifting switch SL .
Step , please refer to FIG. 6, which shows a sampling signal φ according to a second embodiment of the present inventionSA displacement signal phiLOperation signal phiHAnd analog-to-digital converter signal phiADCTiming diagram of (2). As shown in fig. 6, the front-end receiving circuit of the present invention is commonly used in an ethernet or tv front-end receiving circuit, and is an analog-to-digital converter for receiving an RX input signal and converting it into a digital signal. Corresponding to the sampling signal phiSAfter the sampling circuit samples the high-voltage signal, the corresponding displacement signal phiLThe sampling circuit is shifted from high voltage to low voltage, and an additional high-voltage-resistant operation switch is arranged to correspond to the operation signal phiHEntering the operation mode, the comparator and the back-end circuit can use low-voltage devices to have the characteristics of high speed, low power consumption and low area.
Referring to fig. 7, a flow chart of a front-end receiving method for a front-end receiving circuit according to a second embodiment of the present invention is shown, in the configuration described above, the present invention further provides a front-end receiving method for a front-end receiving circuit 100, which is used for transmitting signals to a back-end circuit 140 connected to the front-end receiving circuit 100, the method described in the present embodiment can be performed on the front-end receiving circuit 100 shown in fig. 4 or fig. 5, so please refer to and fig. 4 and fig. 5 for understanding, the front-end receiving method for the front-end receiving circuit includes the following steps:
step S200: the configuration control circuit enters a sampling mode, the sampling switch is switched on, and the displacement switch is switched off. Please refer to the foregoing embodiments for the configuration of the sampling switch and the displacement switch, which are not described herein again.
Step S202: and the configuration control circuit enters a displacement mode, the sampling switch is switched off, and the displacement switch is switched on.
Preferably, in the situation where the th operation switch SH1 and the second operation switch SH2 are provided, the step S204 may be optionally entered, in which the control circuit is configured to enter the operation mode to control the sampling switch and the displacement switch to be turned off and the operation switch to be turned on.
Through the configuration, after the sampling circuit samples the high-voltage signal, the sampling circuit is subjected to the action of shifting the high voltage to the low voltage, so that the use of an amplifier for converting the high voltage into the low voltage in the existing Ethernet or a television front-end receiving circuit can be omitted. In addition, by additionally arranging the high-voltage resistant operation switch, the comparator and the back-end circuit can use low-voltage elements so as to have the characteristics of high speed, low power consumption and low area.
[ advantageous effects of the embodiments ]
The front end receiving circuit and the front end receiving method thereof have the advantages that the sampling circuit can perform the action of shifting the high voltage to the low voltage after the sampling circuit samples the high voltage signal through the technical scheme of the sampling mode and the shifting mode, and the use of an amplifier for converting the high voltage to the low voltage in the existing Ethernet or television front end receiving circuit can be omitted.
Another advantageous effect of the present invention is that the front end receiving circuit and the front end receiving method thereof provided by the present invention can use low voltage devices for both the comparator and the back end circuit by using the high voltage resistant operation switch through the technical schemes of "sampling mode", "shift mode" and "operation mode", so as to have the characteristics of high speed, low power consumption and low area.
The disclosure is only a preferred embodiment of the invention and should not be taken as limiting the scope of the invention, so that the invention is not limited by the disclosure of the specification and drawings.
Claims (10)
1, front-end receiving circuit connected to a back-end circuit, the front-end receiving circuit comprising:
, input, receiving , signal;
a second input to receive a second signal;
comparator having comparator input terminal and second comparator input terminal connected to the input terminal and the second input terminal, respectively;
a sampling switch connected between the th input and the th comparator input;
, sample shift circuit, comprising:
the th capacitor, end is connected between the th sampling switch and the th comparator input end;
a th reference voltage source connected to the other end of the th capacitor through a second sampling switch, and
a second reference voltage source connected to the other terminal of the th capacitor through a th displacement switch, and
control circuit configured to be electrically connected to the control terminals of the th sampling switch, the second sampling switch and the th displacement switch respectively, so as to control the th sampling switch, the second sampling switch and the th displacement switch to switch between on state and off state respectively,
wherein in the sampling mode, the control circuit is configured to control the th sampling switch and the second sampling switch to be turned on, and the th displacement switch to be turned off, and
wherein in the displacement mode, the control circuit is configured to control the th sampling switch and the second sampling switch to be turned off, and the th displacement switch to be turned on.
2. The front-end receiving circuit of claim 1, wherein the th sample shift circuit further comprises:
a second capacitor, is connected between the th sampling switch and the th comparator input terminal;
a third sampling switch connected between the other terminal of the second capacitor and the th reference voltage source;
a second bit shift switch connected between the other terminal of the second capacitor and the second reference voltage source,
wherein in the sampling mode, the control circuit is configured to control the th sampling switch, the second sampling switch and the third sampling switch to be turned on, the th shift switch and the second shift switch to be turned off, and
wherein in the displacement mode, the control circuit is configured to control the th sampling switch to be off, at least of the second and third sampling switches to be off, and at least of the th and second displacement switches to be on.
3. The front-end receiving circuit of claim 1, wherein the th sampling switch, the second sampling switch, the th shift switch, and the input pair element connecting the th comparator input and the second comparator input operate in high voltage range, and the back-end circuit operates in low voltage range.
4. The front-end receive circuit of claim 1, further comprising:
the operation switch connected between the terminal of the th capacitor and the th comparator input terminal,
wherein in the mode of operation, the control circuit is configured to control the th sampling switch, the second sampling switch and the th shift switch to be turned off and the th operating switch to be turned on.
5. The front-end receiving circuit of claim 4, wherein the th sampling switch, the second sampling switch, the th shift switch and the th operation switch operate in a high voltage range, and the comparator and the back-end circuit operate in a low voltage range.
6. The front-end receive circuit of claim 1, further comprising:
a fourth sampling switch, the terminal of which is connected to the second input terminal, the other terminal of which is connected to the th comparator input terminal through a fourth capacitor, and the other terminal of which is connected to the second reference voltage source through a third displacement switch;
a fifth sampling switch connected between the second input terminal and the second comparator input terminal;
a sixth sampling switch, the terminal of the sixth sampling switch being connected to the th input terminal, the other terminal of the sixth sampling switch being connected to the second comparator input terminal through a fifth capacitor, and the other terminal of the sixth sampling switch being connected to the second reference voltage source through a fourth tap-off switch,
the control circuit is configured to be electrically connected to the control terminals of the fourth sampling switch, the fifth sampling switch, the sixth sampling switch, the third displacement switch and the fourth displacement switch, respectively, so as to control the fourth sampling switch, the fifth sampling switch, the sixth sampling switch, the third displacement switch and the fourth displacement switch to switch between on state and off state, respectively.
7. The front-end receiving circuit of claim 6, wherein in the sampling mode, the control circuit is configured to control the th, fourth, fifth and sixth sampling switches to be on, the th, third and fourth shifting switches to be off, and
wherein in the shift mode, the control circuit is configured to control the th sampling switch, the fourth sampling switch, and the fifth sampling switch to be turned off, and control the th shift switch, the third shift switch, and the fourth shift switch to be turned on.
8. The front-end receive circuit of claim 6, further comprising a second sample shift circuit comprising:
a sixth capacitor, wherein a terminal of the sixth capacitor is connected between the fifth sampling switch and the input terminal of the second comparator;
a seventh sampling switch connected between the th reference voltage source and another terminal of the sixth capacitor, and
a fifth displacement switch connected between the second reference voltage source and the other terminal of the sixth capacitor,
wherein the control circuit is further configured to electrically connect the seventh sampling switch and the fifth displacement switch to control the sixth sampling switch and the fifth displacement switch to switch between on state and off state, respectively.
9. The front-end receive circuit of claim 8, further comprising:
a operating switch connected between the terminal of the th capacitor and the input terminal of the th comparator, and
a second operation switch connected between the terminal of the sixth capacitor and the input terminal of the second comparator,
wherein in the mode of operation, the control circuit is further configured to control the th sampling switch, the second sampling switch, the fourth sampling switch, the fifth sampling switch, the sixth sampling switch, the seventh sampling switch, the th shift switch, the third shift switch, the fourth shift switch, the fifth shift switch to be turned off, and the th operating switch and the second operating switch to be turned on.
10, a front-end reception method for a front-end reception circuit for transmitting signals to a back-end circuit connected to the front-end reception circuit, the method comprising:
the configuration has a input receiving the st signal;
the second input of configuration receives a second signal;
a th th comparator input and a second comparator input of the comparator configured to be connected to the th input and the second input, respectively;
configuration the th sampling switch is connected between the th input and the th comparator input;
a th sampling shift circuit is configured, wherein end of a th capacitor is connected between the th sampling switch and the th comparator input end;
a th th reference voltage source configuring the th sampling shift circuit is connected to the other terminal of the th capacitor through a second sampling switch;
a second reference voltage source configured with the th sampling shift circuit is connected to the other terminal of the th capacitor through a th th shift switch;
control circuits are configured to electrically connect the control terminals of the th sampling switch, the second sampling switch and the th displacement switch,
configuring the control circuit to enter sampling mode to control the th sampling switch and the second sampling switch to be turned on and the th shift switch to be turned off, and
the control circuit is configured to enter shift mode to control the th sampling switch and the second sampling switch to turn off, and the th shift switch to turn on.
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| CN201810807130.4A CN110739978B (en) | 2018-07-18 | 2018-07-18 | Front end receiving circuit and front end receiving method used for same |
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| CN201810807130.4A CN110739978B (en) | 2018-07-18 | 2018-07-18 | Front end receiving circuit and front end receiving method used for same |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116661533A (en) * | 2022-02-17 | 2023-08-29 | 瑞昱半导体股份有限公司 | Common-mode voltage re-biasing method, circuit, receiver and integrated circuit |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200726094A (en) * | 2007-02-15 | 2007-07-01 | Univ Chang Gung | Analog to digital converter |
| CN101521502A (en) * | 2008-02-26 | 2009-09-02 | 瑞昱半导体股份有限公司 | Soft starting device |
| US20140285370A1 (en) * | 2011-12-28 | 2014-09-25 | Panasonic Corporation | Successive approximation ad converter and noise generator |
| CN106470036A (en) * | 2015-08-17 | 2017-03-01 | 鲁占朝 | A kind of low-power consumption RSSI numeral adc circuit design |
| CN108063554A (en) * | 2017-12-14 | 2018-05-22 | 杰华特微电子（杭州）有限公司 | A kind of control circuit of Switching Power Supply, control method and on-off circuit |
-
2018
- 2018-07-18 CN CN201810807130.4A patent/CN110739978B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200726094A (en) * | 2007-02-15 | 2007-07-01 | Univ Chang Gung | Analog to digital converter |
| CN101521502A (en) * | 2008-02-26 | 2009-09-02 | 瑞昱半导体股份有限公司 | Soft starting device |
| US20140285370A1 (en) * | 2011-12-28 | 2014-09-25 | Panasonic Corporation | Successive approximation ad converter and noise generator |
| CN106470036A (en) * | 2015-08-17 | 2017-03-01 | 鲁占朝 | A kind of low-power consumption RSSI numeral adc circuit design |
| CN108063554A (en) * | 2017-12-14 | 2018-05-22 | 杰华特微电子（杭州）有限公司 | A kind of control circuit of Switching Power Supply, control method and on-off circuit |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116661533A (en) * | 2022-02-17 | 2023-08-29 | 瑞昱半导体股份有限公司 | Common-mode voltage re-biasing method, circuit, receiver and integrated circuit |
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| CN110739978B (en) | 2021-08-20 |
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