CN110824350A - Circuit breaker double-point position full-working-condition simulator - Google Patents
Circuit breaker double-point position full-working-condition simulator Download PDFInfo
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- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/327—Testing of circuit interrupters, switches or circuit-breakers
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Abstract
The utility model provides a circuit breaker two-point position full operating mode simulator, be provided with input port, intermediate variable unit, logic analog unit and output port, input port respectively with intermediate variable unit, logic analog unit connects, logic analog unit is connected with the output, input port sends required mode to intermediate variable unit when using, send circuit breaker switching-on state to logic analog unit, intermediate variable unit sends the mode after the assignment to logic analog unit, logic analog unit utilizes truth table logic operation to simulate circuit breaker real-time operation operating mode, and with real-time operation operating mode send to the output. This circuit breaker two full operating mode simulators in position can be convenient simulation multiple different circuit breaker auxiliary contact operating mode and operating condition, reduces the operation threshold that detects measuring personnel in the link that detects, improves the efficiency of testing and testing.
Description
Technical Field
The invention relates to the technical field of electrical simulation detection, in particular to a circuit breaker double-point position full-working-condition simulator.
Background
The automatic detection of the electrical equipment is taken as an important link of the electric power equipment industry, the problem that the full working condition of the double-point position of the circuit breaker can not be simulated systematically and efficiently in the test process of the current relay protection device is usually solved by manually configuring a model and shutting down to switch the operation working condition of the double-point position of the circuit breaker during the test, if the reverse connection working condition of the double-point position of the circuit breaker is examined, the simulation model of the normal working condition needs to be stopped to operate, the reverse connection working condition logic is manually configured, the simulation model is operated again, and the detection work is.
The biggest shortcoming of the prior art is that the integration level of the simulation of the operating condition of the double-point position of the circuit breaker is low, the automation degree is low, so that a detection person needs to stop to configure a simulation model when carrying out test work at every time, the operation is complex, and the time and the labor are consumed.
Therefore, aiming at the defects of the prior art, it is necessary to provide a circuit breaker double-point position full-working-condition simulator to overcome the defects of the prior art.
Disclosure of Invention
The invention aims to avoid the defects of the prior art and provides the circuit breaker double-point position full-working-condition simulator, which can simulate various different circuit breaker auxiliary contact working modes and running working conditions conveniently, reduce the operation threshold of detection personnel in a detection link and improve the detection test efficiency.
The above object of the present invention is achieved by the following technical means.
The utility model provides a circuit breaker two-point position full operating mode simulator receives the circuit breaker and closes the position state actually, adopts truth table logic to realize the simulation of a plurality of operating modes of circuit breaker, accomplishes the simulation of the unusual function of circuit breaker position in the digital generating line protection device test link.
Preferably, the device is provided with an input port, an intermediate variable unit, a logic simulation unit and an output port, wherein the input port is respectively connected with the intermediate variable unit and the logic simulation unit, and the logic simulation unit is connected with the output port.
The input port is provided with a WZ interface used for connecting a circuit breaker on-position state signal and an S/N port used for receiving a working mode, the WZ interface is connected with the logic simulation unit, and the S/N port is connected with the intermediate variable unit;
the WZ interface sends a circuit breaker on-position state signal to the logic simulation unit, and the S/N port sends an appointed working mode to the intermediate variable unit according to test requirements; the intermediate variable unit assigns values to the working modes and then sends the values to the logic simulation unit, and the logic simulation unit simulates the real-time operation condition of the contact point of the calculation breaker by using a truth table and sends the real-time operation condition to the output end.
Preferably, the output port is provided with a HW port for outputting a closed state of the circuit breaker and a TW port for outputting a flavoring state of the circuit breaker, and the HW port and the TW port are respectively connected with the intermediate variable unit.
Preferably, the intermediate variable unit is provided with an A0 input port, an A1 input port, an A2 input port and an A3 input port, the A0 input port, the A1 input port, the A2 input port and the A3 input port are respectively connected with the S/N port in a one-to-one correspondence mode, and the logic simulation unit is respectively connected with the A0 input port, the A1 input port, the A2 input port and the A3 input port.
Preferably, the logic simulation unit is provided with an and gate, a not gate, or gate, and a selector S1.
Preferably, the and gate is provided with an and gate Y1, an and gate Y2 and an and gate Y3, the not gate is provided with an not gate F1 and an not gate F2, and the or gate is provided with an or gate H1 and an or gate H2;
the input port A0 is respectively connected with the pin 2 of the AND gate Y1 and the pin 2 of the AND gate Y2, the input port A1 is respectively connected with the pin 2 of the OR gate H1 and the pin 2 of the OR gate H2, the input port A2 is connected with the pin 3 of the selector S1, the input port A3 is connected with the pin 2 of the AND gate Y3,
the WZ interface is connected with a pin 1 of an AND gate Y3, a pin 3 of an AND gate Y3 is respectively connected with one end of a NAND gate F2 and a pin 1 of a selector S1, the other end of a NOT gate F2 is connected with a pin 2 of a selector S1, a pin 4 of a selector S1 is respectively connected with one end of a NAND gate F1 and a pin 1 of an OR gate H1, the other end of the NOT gate F1 is connected with a pin 1 of an OR gate H2, a pin 3 of the OR gate H2 is connected with a pin 1 of an AND gate Y2, a pin 3 of an OR gate H1 is connected with a pin 1 of an AND gate Y1, a pin 3 of an AND gate Y1 is connected with an HW port, and a pin 3 of an AND gate Y39.
The circuit breaker double-point position full-working-condition simulator is provided with an input port, an intermediate variable unit, a logic simulation unit and an output port, wherein the input port is respectively connected with the intermediate variable unit and the logic simulation unit, the logic simulation unit is connected with the output port, the input port sends a required working mode to the intermediate variable unit when in use, the closing state of the circuit breaker is sent to the logic simulation unit, the intermediate variable unit sends the assigned working mode to the logic simulation unit, and the logic simulation unit simulates the real-time working condition of the circuit breaker by using truth table logic operation and sends the real-time working condition to the output port.
This circuit breaker two full operating mode simulators in position can be convenient simulation multiple different circuit breaker auxiliary contact operating mode and operating condition, reduces the operation threshold that detects measuring personnel in the link that detects, improves the efficiency of testing and testing.
Drawings
The invention is further illustrated by means of the attached drawings, the content of which is not in any way limiting.
Fig. 1 is a schematic structural view of embodiment 1 of the present invention.
FIG. 2 is a schematic diagram of a logic simulation unit according to the present invention.
In fig. 1 to 2, the method includes:
Detailed Description
The invention is further described with reference to the following examples.
Example 1.
A circuit breaker double-point position full-working-condition simulator is shown in figures 1 and 2, receives the actual closing state of a circuit breaker, adopts truth table logic to realize simulation of multiple working conditions of the circuit breaker, and completes simulation of circuit breaker position abnormity function in a digital bus protection device testing link.
Specifically, an input port 100, an intermediate variable unit 200, a logic simulation unit 300, and an output port 400 are provided, the input port 100 is connected to the intermediate variable unit 200 and the logic simulation unit 300, respectively, and the logic simulation unit 300 is connected to the output port.
The input port 100 is provided with a WZ interface for connecting a circuit breaker on-position state signal and an S/N port for receiving a working mode, the WZ interface is connected with the logic simulation unit 300, and the S/N port is connected with the intermediate variable unit 200; WZ is the input of the opening and closing states of the main contact of the circuit breaker, wherein 1 represents the closing state, and 0 represents the opening state.
The S/N port is used for selecting input for the running condition of the simulator and is connected with an output value of a digital gear rotary switch. The intermediate variable unit 200 indicates different operating states by assigning values 1, 2, 3, 4, 5 when S/N is 0,1, …,5, respectively. The operation states include a position normal state simulation, a position reverse connection state mode, a position normally open state simulation, a position normally closed state mode and a position invalid state mode. The intermediate variable unit 200 is assigned with "0" to represent the position normal state simulation, "1" to represent the position reverse connection state mode, "2" to represent the position normally open state simulation, "3" to represent the position normally closed state mode, and "4, 5" to represent the position invalid state mode.
The WZ interface is connected with and inputs a circuit breaker closing state signal, and if the circuit breaker is in a closing state, the data of the WZ interface is 1; the breaker is in the opening state, and the data of the WZ interface is 0.
The WZ interface sends a circuit breaker closed-position state signal to the logic simulation unit 300, and the S/N port sends a designated working mode to the intermediate variable unit 200 according to test requirements; the intermediate variable unit 200 assigns the working mode and then sends the assigned working mode to the logic simulation unit 300, and the logic simulation unit 300 simulates the real-time operation condition of the contact point of the calculation breaker by using a truth table and sends the real-time operation condition to the output end.
Specifically, the output port 400 is provided with a HW port for outputting a closed state of the circuit breaker and a TW port for outputting a flavoring state of the circuit breaker, and the HW port and the TW port are respectively connected to the intermediate variable unit 200.
And the HW port is a circuit breaker closed state output interface and directly sends the circuit breaker closed state output interface to the relay protection device.
The TW port is a circuit breaker jump position state output interface and directly sends the circuit breaker jump position state output interface to the relay protection device.
Specifically, the intermediate variable unit 200 is provided with an a0 input port, an a1 input port, an a2 input port, and an A3 input port, the a0 input port, the a1 input port, the a2 input port, and the A3 input port are respectively connected with the S/N ports in a one-to-one correspondence, and the logic simulation unit 300 is respectively connected with the a0 input port, the a1 input port, the a2 input port, and the A3 input port.
Specifically, the logic simulation unit 300 is provided with an and gate, a not gate, or gate, and a selector S1.
Specifically, the AND gate is provided with an AND gate Y1, an AND gate Y2 and an AND gate Y3, the NOT gate is provided with a NOT gate F1 and a NOT gate F2, and the OR gate is provided with an OR gate H1 and an OR gate H2;
the input port A0 is respectively connected with the pin 2 of the AND gate Y1 and the pin 2 of the AND gate Y2, the input port A1 is respectively connected with the pin 2 of the OR gate H1 and the pin 2 of the OR gate H2, the input port A2 is connected with the pin 3 of the selector S1, the input port A3 is connected with the pin 2 of the AND gate Y3,
the WZ interface is connected with a pin 1 of an AND gate Y3, a pin 3 of an AND gate Y3 is respectively connected with one end of a NAND gate F2 and a pin 1 of a selector S1, the other end of a NOT gate F2 is connected with a pin 2 of a selector S1, a pin 4 of a selector S1 is respectively connected with one end of a NAND gate F1 and a pin 1 of an OR gate H1, the other end of the NOT gate F1 is connected with a pin 1 of an OR gate H2, a pin 3 of the OR gate H2 is connected with a pin 1 of an AND gate Y2, a pin 3 of an OR gate H1 is connected with a pin 1 of an AND gate Y1, a pin 3 of an AND gate Y1 is connected with an HW port, and a pin 3 of an AND gate Y39.
Table 1 shows a truth table of the logic block diagram of the simulator, which lists the output values of HW and TW when the main contact WZ of the circuit breaker is in the closing state and the opening state, and when S/N selects different operating states. The "-" in the table indicates that the bit is invalid in this mode of operation.
Table 1 simulator logic block truth table
This circuit breaker two full operating mode simulators in position can be convenient simulation multiple different circuit breaker auxiliary contact operating mode and operating condition, reduces the operation threshold that detects measuring personnel in the link that detects, improves the efficiency of testing and testing. Meanwhile, by adopting the modular packaging design, the modeling link of operators is eliminated, and the test operation process is simplified. And the technical idea of truth table logic is adopted, a plurality of operation working conditions of the circuit breaker are deeply fused, the switching of the operation working conditions without shutdown in the detection process is realized, and the integration and the automation rate of the circuit breaker double-point position simulation are improved. The technical idea of modular design and truth table logic is adopted, all working conditions of circuit breaker double-point position simulation are integrated into one simulation element, and the operation complexity is reduced.
Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present invention and not for limiting the protection scope of the present invention, and although the present invention is described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions can be made on the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention.
Claims (7)
1. The utility model provides a circuit breaker two point position full operating mode simulators which characterized in that: and receiving the actual closing state of the circuit breaker, and simulating a plurality of working conditions of the circuit breaker by adopting truth table logic to complete the simulation of the position abnormality function of the circuit breaker in the test link of the digital bus protection device.
2. The circuit breaker two-point position full-operating-condition simulator according to claim 1, characterized in that:
the device is provided with an input port, an intermediate variable unit, a logic simulation unit and an output port, wherein the input port is respectively connected with the intermediate variable unit and the logic simulation unit, and the logic simulation unit is connected with the output port.
3. The circuit breaker two-point position full-operating-condition simulator according to claim 2, characterized in that: the input port is provided with a WZ interface for connecting a circuit breaker on-position state signal and an S/N port for receiving a working mode, the WZ interface is connected with the logic simulation unit, and the S/N port is connected with the intermediate variable unit;
the WZ interface sends a circuit breaker on-position state signal to the logic simulation unit, and the S/N port sends a designated working mode to the intermediate variable unit according to test requirements; the intermediate variable unit assigns values to the working modes and then sends the values to the logic simulation unit, and the logic simulation unit simulates the real-time operation condition of the contact point of the calculation circuit breaker by using a truth table and sends the real-time operation condition to the output end.
4. The circuit breaker two-point position full-operating-condition simulator of claim 3, characterized in that: the output port is provided with a HW port for outputting a closed state of the circuit breaker and a TW port for outputting a seasoning state of the circuit breaker, and the HW port and the TW port are respectively connected with the intermediate variable unit.
5. The circuit breaker two-point position full-operating-condition simulator of claim 4, characterized in that: the intermediate variable unit is provided with an A0 input port, an A1 input port, an A2 input port and an A3 input port, the A0 input port, the A1 input port, the A2 input port and the A3 input port are respectively connected with the S/N ports in a one-to-one correspondence mode, and the logic simulation unit is respectively connected with the A0 input port, the A1 input port, the A2 input port and the A3 input port.
6. The circuit breaker two-point position full-operating-condition simulator of claim 5, characterized in that: the logic simulation unit is provided with an AND gate, a NOT gate, an OR gate and a selector S1.
7. The circuit breaker two-point position full-operating-condition simulator of claim 6, characterized in that:
the AND gate is provided with an AND gate Y1, an AND gate Y2 and an AND gate Y3, the NOT gate is provided with a NOT gate F1 and a NOT gate F2, and the OR gate is provided with an OR gate H1 and an OR gate H2;
the input port A0 is respectively connected with the pin 2 of the AND gate Y1 and the pin 2 of the AND gate Y2, the input port A1 is respectively connected with the pin 2 of the OR gate H1 and the pin 2 of the OR gate H2, the input port A2 is connected with the pin 3 of the selector S1, the input port A3 is connected with the pin 2 of the AND gate Y3,
the WZ interface is connected to 1 pin of the and gate Y3, the 3 pins of the and gate Y3 are respectively connected to one end of the not gate F2 and the 1 pin of the selector S1, the other end of the not gate F2 is connected to the 2 pin of the selector S1, the 4 pins of the selector S1 are respectively connected to one end of the not gate F1 and the 1 pin of the or gate H1, the other end of the not gate F1 is connected to the 1 pin of the or gate H2, the 3 pin of the or gate H2 is connected to the 1 pin of the and gate Y2, the 3 pin of the or gate H1 is connected to the 1 pin of the and gate Y1, the 3 pin HW of the and gate Y1 is connected to the port, and the 3 pin of the and gate Y2 is connected to the TW port.
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Cited By (3)
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| CN111781852A (en) * | 2020-06-05 | 2020-10-16 | 许昌开普检测研究院股份有限公司 | Integrated modeling method for control logic and state signal of digital analog circuit breaker |
| CN115562211A (en) * | 2022-10-24 | 2023-01-03 | 中广核工程有限公司 | Emergency diesel generator control logic analog circuit and computer equipment |
| CN119510936A (en) * | 2024-10-30 | 2025-02-25 | 国网新源集团有限公司 | Unit operating condition simulation method and circuit for protection and commissioning of pumped storage power station |
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Cited By (4)
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Application publication date: 20200221 |