CN110838435B - Epitaxial layer transfer method - Google Patents

Abstract

The invention relates to an epitaxial layer transfer method, and belongs to the technical field of semiconductors. The epitaxial layer transfer method comprises the following steps: s1, forming a porous interface layer on the surface of a mother substrate; s2, growing an epitaxial layer on the porous interface layer; and S3, adhering the epitaxial layer to the support substrate through a bonding technology to transfer the epitaxial layer, and then separating the epitaxial layer from the mother substrate. According to the invention, the porous silicon germanium alloy layer is added at the interface of the mother substrate and the epitaxial layer, so that the epitaxial layer can be conveniently transferred at a low temperature without H ion implantation, and the thermal budget and the processing cost are reduced.

Description

A kind of epitaxial layer transfer method

technical field

The invention belongs to the technical field of semiconductors and relates to an epitaxial layer transfer method.

Background technique

The fabrication of thin-film semiconductors is a critical step in the development of low-cost flexible electronics and photovoltaics. Epitaxial growth has proven to be the most suitable way to produce such ultra-thin single-crystal layers because it allows perfect control of layer thickness and doping, and when performed at low temperatures (<200°C), epitaxy is a low-cost process. The epitaxial layer needs to be transferred to a foreign carrier/support substrate (such as glass) to realize its application. How to transfer the epitaxial layer simply and effectively is a crucial step for the successful application of thin film semiconductors.

Various transfer methods have been proposed in the prior art, among which the following three methods are commonly used. i) Smart-Cut process: a peeling method that induces a deep peeling region by hydrogen implantation; this method often requires a high annealing temperature (>600°C) and a high dose of H implantation (1×10 ¹⁷ cm ^-2 ) to achieve the separation of the epitaxial layer from the mother substrate, and will cause certain damage to the epitaxial layer. ii) A method based on porous silicon: prior to epitaxy, at least two regions with different porosities are created on the surface of the mother substrate by electrochemical etching in a hydrofluoric acid (HF) solution; this method requires the use of hazardous HF solutions, And it will cause damage to the mother substrate and affect the service life of the mother substrate. iii) Use the sacrificial film as a crystallization template for growth, and etch or remove the crystallization template after obtaining the epitaxial layer. This method is mainly used for the epitaxy of Group III and V semiconductors.

Contents of the invention

The object of the present invention is to propose a convenient and easy-to-implement epitaxial layer transfer method for the above-mentioned problems in the prior art.

The purpose of the present invention can be achieved through the following technical solutions:

A kind of epitaxial layer transfer method, described epitaxial layer transfer method comprises the steps:

S1, forming a porous interface layer on the surface of the mother substrate;

S2, growing an epitaxial layer on the porous interface layer;

S3, bonding the epitaxial layer to the support substrate by bonding technology to transfer the epitaxial layer, and then separating the epitaxial layer from the mother substrate.

Preferably, the mother substrate is cleaned before the porous interface layer is formed on the surface to remove natural oxides and surface pollutants; the cleaning treatment is to use hydrofluoric acid solution or plasma treatment based on fluorine, the plasma treatment process Fluorine-containing gases such as SiF ₄ can be used in the medium.

Preferably, the mother substrate is a silicon wafer substrate.

Preferably, the porous interface layer is a SiGe alloy layer with a porous structure.

Preferably, the thickness of the SiGe alloy layer is 13nm-28nm, and the content of Ge in the SiGe alloy layer is 0.2at.%-2.0at.% of Si.

Preferably, both the SiGe alloy layer and the epitaxial layer are formed by PECVD, and the SiGe alloy layer is obtained by adding GeH ₄ during the preparation process.

Preferably, the formation conditions of the SiGe alloy layer are: temperature 180°C-230°C, total pressure 1.7Torr-2.3Torr, power density 30mW/cm ² -40mW/cm ² , SiH ₄ flow rate 3.6SCCM-4.5 SCCM, the flow rate of _H2 is 180SCCM-220SCCM, the mixed gas flow rate of _GeH4 and _H2 is 0.6SCCM-1.3SCCM, and the growth time is 100s-150s. In the mixed gas of _GeH4 and _H2 , _GeH4 is in _H2 The concentration is 0.7at.%-1.3at.%.

Preferably, the epitaxial layer includes a Si epitaxial layer, a SiGe epitaxial layer or a Ge epitaxial layer.

Preferably, when the epitaxial layer is a Si epitaxial layer, the conditions for forming the epitaxial layer are: temperature 180°C-230°C, total pressure 1.7Torr-2.3Torr, power density 30mW/cm ² -40mW/cm ² , SiH ₄ The flow rate is 3.6SCCM-4.5SCCM, the _H2 flow rate is 180SCCM-220SCCM, and the growth time is 1500s-2200s;

When the epitaxial layer is a SiGe epitaxial layer, the conditions for forming the epitaxial layer are: temperature 180°C-230°C, total pressure 1.7Torr-2.3Torr, power density 30mW/cm ² -40mW/cm ² , SiH ₄ flow rate of 3.6SCCM-4.5SCCM, H ₂ flow rate is 180SCCM-220SCCM, GeH ₄ and H ₂ mixed gas flow rate 80SCCM-120 SCCM, growth time is 1500s-2200s, in the mixed gas of GeH ₄ and H ₂ , GeH ₄ in The concentration in _H2 is 0.7at.%-1.3at.%.

When the epitaxial layer is a Ge epitaxial layer, the conditions for forming the epitaxial layer are: temperature 180-230°C, total pressure 1.7Torr-2.3Torr, power density 30mW/cm ² -40mW/cm ² , GeH ₄ and H ₂ The flow rate of the mixed gas is 80SCCM-120SCCM, and the growth time is _1500s -2200s. In the mixed gas of GeH4 and _H2 , the concentration of _GeH4 in _H2 is 0.7at.%-1.3at.%.

Preferably, the supporting substrate in step S3 includes a glass substrate and a polymer substrate, and the bonding technique includes anodic bonding and polymer adhesive bonding, and the separation of the epitaxial layer and the mother substrate is achieved by Annealing or mechanical force to achieve.

Preferably, in step S3, when the supporting substrate is glass, the anodic bonding is to bond with glass at a temperature of 180°C-220°C and a voltage of 800V-1200V for 8min-13min, and then at 170°C-220°C Anneal the epitaxial layer and the mother substrate at a temperature of 4min-6min.

The invention pre-deposits a layer of porous interface layer between the mother substrate and the epitaxial layer, so that the interface between the mother substrate and the epitaxial layer is weakened, so that the transfer of the epitaxial layer to the support substrate can be realized conveniently.

Compared with the prior art, the present invention has the following beneficial effects:.

The present invention forms a porous interface layer by adding a silicon-germanium alloy layer at the interface between the mother substrate and the epitaxial layer, so that the epitaxial layer can be conveniently transferred without H implantation, avoiding the need to introduce H ions in the traditional Smart-Cut process. without the use of hazardous solutions such as HF, while being able to be implemented at low process temperatures (about 200°C), reducing thermal budget and processing costs.

Instructions attached

FIG. 1 is a schematic diagram of transferring an epitaxial layer using an epitaxial silicon-germanium alloy layer in the present invention.

Fig. 2 is the characterization figure of the samples to be transferred prepared in Example 1 of the present invention and Comparative Example 1, wherein figure (a) is the EDX distribution figure of germanium atoms; figure (b) is two kinds of interface hydrogen concentration distribution SIMS figures at the interface ; Figure (c) is an ellipsometric detection map.

Detailed ways

The following are specific examples of the present invention to further describe the technical solutions of the present invention, but the present invention is not limited to these examples.

Example 1

The epitaxial layer transfer method in this embodiment has the following steps:

(1) Prepare the silicon wafer substrate, use hydrofluoric acid solution to clean the silicon substrate to remove surface natural oxides and surface pollutants, the silicon wafer substrate is shown in Figure 1 (a), and then install the silicon wafer substrate into a PECVD reactor, using _H2 as a carrier gas to achieve the deposition of porous interfacial layer and epitaxial layer.

(2) The following PECVD process conditions are used to form a porous interface layer—a SiGe alloy layer with a porous structure: the temperature is 200°C, the total pressure is 2.3Torr, the power density is 35mW/cm ² , the flow rate of SiH ₄ is 4 SCCM, and the flow rate of H ₂ is 200SCCM, the mixed gas flow rate of _GeH4 and _H2 is 1SCCM, and the growth time is 120s. In the mixed gas of _GeH4 and _H2 , the concentration of _GeH4 in _H2 is 1 at.%; SiGe alloy layer As shown in Figure 1(b), the thickness of the SiGe alloy layer is 20nm, and its Ge content is 0.7at.% of Si.

(3) The silicon epitaxial layer was formed using the following PECVD process conditions: temperature 200°C, total pressure 2.3Torr, power density 35mW/cm ² , SiH ₄ flow rate 4SCCM, H ₂ flow rate 200SCCM, and growth time 1800s. The silicon epitaxial layer is shown in Figure 1 (c).

(4) As shown in Figure 1(d), use glass as the supporting substrate and use the method of anodic bonding to bond the silicon epitaxial layer to the glass at a temperature of 200°C and a voltage of 1000V for 10 minutes to bond the epitaxial layer to the glass and then annealed at 200°C for 5 minutes to separate the epitaxial layer from the silicon wafer substrate.

Example 2

The epitaxial layer transfer method in this embodiment has the following steps:

(1) Prepare the silicon wafer substrate, use hydrofluoric acid solution to clean the silicon substrate to remove surface natural oxides and surface pollutants, the silicon wafer substrate is shown in Figure 1 (a), and then install the silicon wafer substrate into a PECVD reactor, using _H2 as a carrier gas to achieve the deposition of porous interfacial layer and epitaxial layer.

(2) The following PECVD process conditions are used to form a porous interface layer—a SiGe alloy layer with a porous structure: the temperature is 200°C, the total pressure is 2.3Torr, the power density is 35mW/cm ² , the flow rate of SiH ₄ is 4 SCCM, and the flow rate of H ₂ is 200SCCM, the mixed gas flow rate of _GeH4 and _H2 is 1SCCM, and the growth time is 120s. In the mixed gas of _GeH4 and _H2 , the concentration of _GeH4 in _H2 is 1 at.%; SiGe alloy layer As shown in Figure 1(b), the thickness of the SiGe alloy layer is 20nm, and its Ge content is 0.7at.% of Si.

(3) The SiGe epitaxial layer is formed using the following PECVD process conditions: temperature 200°C, total pressure 2.3Torr, power density 35mW/cm ² , SiH ₄ flow rate 4SCCM, H ₂ flow rate 200SCCM, mixture of GeH ₄ and H ₂ The gas flow rate is 100SCCM, and the growth time is 1800s. In the mixed gas of GeH ₄ and H ₂ , the concentration of GeH ₄ in H ₂ is 1 at.%. The formed SiGe epitaxial layer is shown in FIG. 1(c).

(4) As shown in Figure 1(d), use glass as the supporting substrate and use the method of anodic bonding to bond the silicon epitaxial layer to the glass at a temperature of 200°C and a voltage of 1000V for 10 minutes, and then bond the epitaxial layer to the glass and then annealed at 200°C for 5min to separate the SiGe epitaxial layer from the silicon wafer substrate.

Example 3

The epitaxial layer transfer method in this embodiment has the following steps:

(1) Prepare the silicon wafer substrate, use hydrofluoric acid solution to clean the silicon substrate to remove surface natural oxides and surface pollutants, the silicon wafer substrate is shown in Figure 1 (a), and then install the silicon wafer substrate Into the PECVD reactor, through the PECVD process to achieve the deposition of porous interface layer and epitaxial layer.

(2) The following PECVD process conditions are used to form a porous interface layer—a SiGe alloy layer with a porous structure: the temperature is 200°C, the total pressure is 2.3Torr, the power density is 35mW/cm ² , the flow rate of SiH ₄ is 4 SCCM, and the flow rate of H ₂ is 200SCCM, the mixed gas flow rate of _GeH4 and _H2 is 1SCCM, and the growth time is 120s. In the mixed gas of _GeH4 and _H2 , the concentration of _GeH4 in _H2 is 1 at.%; SiGe alloy layer As shown in Figure 1(b), the thickness of the SiGe alloy layer is 20nm, and its Ge content is 0.7at.% of Si.

(3) The Ge epitaxial layer was formed using the following PECVD process conditions: temperature 200°C, total pressure 2.3Torr, power density 35mW/cm ² , mixed gas flow rate of GeH ₄ and H ₂ 100SCCM, growth time 1800s, the GeH In the mixed gas of ₄ and H ₂ , the concentration of GeH ₄ in H ₂ is 1 at.%, and the formed Ge epitaxial layer is shown in Fig. 1(c).

(4) As shown in Figure 1(d), using glass as the supporting substrate, the Ge epitaxial layer is bonded to the glass at a temperature of 200 ° C and a voltage of 1000 V for 10 min by anodic bonding, and the epitaxial layer is bonded to the glass and then annealed at 200° C. for 5 min to separate the Ge epitaxial layer from the silicon wafer substrate.

Comparative example 1

The SiGe alloy layer is not deposited on the silicon wafer substrate, and the silicon epitaxial layer is directly formed on the silicon wafer substrate, and the others are the same as in Embodiment 1

Shown in Fig. 2 (a) is the composition distribution (EDX; Energy-dispersive X-ray) of germanium atom in each layer of the sample to be transferred that is made in the embodiment of the present invention 1 step (3), by Fig. 2 (a) ) shows that the average germanium composition in the SiGe alloy layer is 0.7 at.%.

As shown in Fig. 2 (b), the hydrogen concentration distribution on the interface of the sample to be transferred with SiGe alloy layer and the sample to be transferred without SiGe alloy layer made by Comparative Example 1 is obtained by SIMS (Secondary Ion MassSpectrometry), it can be seen from Figure 2 (b) that in the case of SiGe alloy layer (solid curve), quite high accumulation of hydrogen atoms (8×10 ²¹ at/cm ³ ) can be observed at the interface, while at the Without the SiGe alloy layer, the hydrogen content at the interface is only 2×10 ²¹ at/cm ³ , and the hydrogen accumulation concentration of the interface layer in Example 1 is 4 times that of Comparative Example 1 without the SiGe alloy layer . Therefore, although the content of Ge atoms in the SiGe alloy layer is very small (only 0.7 at.%), H doping in the interface layer can be greatly improved.

Figure 2(c) shows the ellipsometric measurement results of two samples to be transferred prepared in Example 1 and Comparative Example 1 of the present invention. It can be seen from Fig. 2(c) that the sample to be transferred with a SiGe alloy layer (solid curve) in Example 1 has a significantly small oscillation in the pseudo-dielectric function _εi at low photon energy, which is the result of the silicon wafer substrate and The characteristics of the interfacial pores between the silicon epitaxial layers; and the sample to be transferred without the SiGe alloy layer (dotted curve) in Comparative Example 1 is under low photon energy, and the pseudo-dielectric function ε _is gentle without oscillation; therefore, it can be seen that the implementation The SiGe alloy layer of the sample to be transferred in the example has a relatively high porosity; and at low photon energy, the samples of Example 1 and Comparative Example 1 have very similar waveforms, indicating that the two have similar crystal quality.

In addition, under the same anodic bonding and annealing conditions as in Example 1, the transfer sample prepared in Comparative Example 1 could not transfer the epitaxial layer to the glass substrate, even if the annealing temperature was raised to 500°C for 5 minutes, the The transfer of silicon epitaxial layers cannot be achieved.

In some other embodiments of the present invention and alternative embodiments of Embodiments 1-3, the mother substrate can also be other wafers; the cleaning treatment of the mother substrate can also use fluorine-based plasma treatment, during the plasma treatment process Fluorine-containing gases such as SiF ₄ can be used; the supporting substrate can also be a polymer substrate in addition to the glass substrate; the bonding method of the epitaxial layer of the sample to be transferred and the supporting substrate can be used in addition to anodic bonding. Adhesive bonding method; the separation of the epitaxial layer from the mother substrate can also be achieved by mechanical force in addition to annealing.

The embodiments here are not exhaustive in the technical scope claimed by the present invention, and the new technical solutions formed by the equivalent replacement of single or multiple technical features in the technical solutions of the embodiments are also claimed in the present invention. within the scope; at the same time, in all listed or unlisted embodiments of the present invention, each parameter in the same embodiment only represents an example of its technical solution (i.e. a feasible solution), and there is no relationship between each parameter There is a strict coordination and limitation relationship, where each parameter can be replaced without violating the axiom and the statement of the present invention, unless otherwise stated.

The technical means disclosed in the solution of the present invention are not limited to the technical means disclosed in the above technical means, but also include technical solutions composed of any combination of the above technical features. The above are specific implementations of the present invention. It should be pointed out that for those of ordinary skill in the art, without departing from the principle of the present invention, some improvements and modifications can also be made, and these improvements and modifications are also considered Be the protection scope of the present invention.

The specific embodiments described herein are merely illustrative of the spirit of the invention. Those skilled in the art to which the present invention belongs can make various modifications or supplements to the described specific embodiments or adopt similar methods to replace them, but they will not deviate from the spirit of the present invention or go beyond the definition of the appended claims range.

Claims (4)

1. An epitaxial layer transfer method is characterized by comprising the following steps:

s1, forming a porous interface layer on the surface of a mother substrate;

s2, growing an epitaxial layer on the porous interface layer;

s3, adhering the epitaxial layer to the support substrate through a bonding technology to transfer the epitaxial layer, and then separating the epitaxial layer from the mother substrate;

the porous interface layer is a SiGe alloy layer with a porous structure;

the thickness of the SiGe alloy layer is 13nm-28nm, and the content of Ge in the SiGe alloy layer is 0.2at.% to 2.0at.% of Si;

the SiGe alloy layer and the epitaxial layer are both formed by a PECVD method, and the SiGe alloy layer is obtained by adding GeH4 in the preparation process;

the forming conditions of the SiGe alloy layer are as follows: the temperature is 180-230 ℃, the total pressure is 1.7-2.3 Torr, the power density is 30mW/cm2-40mW/cm2, the flow rate of SiH4 is 3.6-4.5 SCCM, the flow rate of H2 is 180SCCM-220SCCM, the flow rate of the mixed gas of GeH4 and H2 is 0.6-1.3 SCCM, the growth time is 100-150 s, and the concentration of GeH4 in H2 in the mixed gas of GeH4 and H2 is 0.7-1.3 at.%.

2. An epitaxial layer transfer method according to claim 1, characterized in that said epitaxial layer comprises a Si epitaxial layer, a SiGe epitaxial layer or a Ge epitaxial layer.

3. The epitaxial layer transfer method of claim 1, wherein the supporting substrate of step S3 comprises a glass substrate, a polymer substrate, the bonding technique comprises anodic bonding, polymer adhesive bonding, and the separation of the epitaxial layer from the mother substrate is achieved by annealing or mechanical force.

4. The epitaxial layer transfer method of claim 3, wherein in step S3, when the support substrate is glass, the anodic bonding is performed by bonding the epitaxial layer to the mother substrate at a temperature of 180 ℃ to 220 ℃ and a voltage of 800V to 1200V for 8min to 13min, and then annealing at a temperature of 170 ℃ to 220 ℃ for 4min to 6 min.

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