CN110990112B - Method and device for realizing interface simulation platform - Google Patents

Abstract

The embodiment of the invention discloses a method and a device for realizing an interface simulation platform, wherein the method comprises the following steps: when the network operating system is verified to be adapted to the bottom chip driver through the middleware interface, a general test program compiling mode is provided through an automatic full-test framework, and a software simulation platform is constructed; and testing the functions of all the modules of the middleware interface integrally through the simulation platform. The embodiment of the invention can accelerate the iteration and development speed of the middleware software through the simulation platform, thereby accelerating the project progress.

Description

Implementation method and device of an interface simulation platform

technical field

The invention relates to network technology, in particular to a method and device for realizing an interface simulation platform.

Background technique

In the switch field, the adaptation layer between the network operating system (Network Operating System, NOS) and the switch chip driver has always been an important component. The existence of this adaptation layer can realize the decoupling between the upper layer NOS and the bottom switch chip and the switch chip driver, which means that the same NOS can be adapted to different switch chip hardware, and different NOS can be adapted to the On the same switch chip hardware. As an open control plane adaptation layer, the switch abstraction interface (Switch Abstraction Interface, SAI) layer is recognized by many switch manufacturers. SAI has many advantages such as openness and standardization. The SAI layer can shield the differences between the driver layers of different switch chip manufacturers, and provide a unified calling mode and interface for the upper-layer NOS. Therefore, it is particularly important to quickly iterate and verify the functional implementation of SAI.

At present, there is a simulation technology for the SAI interface, but this part of the technical solution is not complete and cannot meet the specific development and verification requirements. The traditional method is based on a specific switch chip hardware, from the NOS call to the implementation of the hardware switch chip driver layer to verify whether the entire functional logic is normal. However, if the verification and development of the SAI interface depends on the actual switching chip hardware, it may be lost in the details of the hardware driver, and it is impossible to grasp the design and development of SAI from a macro perspective.

Therefore, the current SAI interface simulation technology in the prior art has the disadvantages of low coverage of SAI interface simulation and low degree of systematization for specific function simulation.

Contents of the invention

In order to solve the above technical problems, the embodiment of the present invention provides a method and device for implementing an interface simulation platform, through which the simulation platform can accelerate the iteration and development speed of middleware software, thereby accelerating the project progress.

In order to achieve the purpose of the present invention, on the one hand, the embodiment of the present invention provides an implementation method of an interface simulation platform, including:

When verifying that the network operating system is adapted to the underlying chip driver through the middleware interface, a general test program writing mode is provided through the automated full test framework to build a software simulation platform;

The function of each module of the middleware interface is tested as a whole through the simulation platform.

Further, the middleware interface is a switch abstract interface SAI, wherein,

When verifying that the switch abstract interface SAI is called from the network operating system NOS layer, use simulation software to simulate the implementation logic part of the SAI interface, and verify whether the logic implemented by the SAI interface is correct;

When verifying that the switching chip hardware driver is called from the SAI interface to verify the details of the driver implementation of the SAI interface, it is verified whether the implementation of the detailed functions of the SAI interface is correct by means of virtualization.

Further, the implementation logic part of using simulation software to simulate the SAI interface also includes:

Use the C/C++ programming language to implement the interface defined by the SAI specification, print out all the logic, and verify whether the designed SAI logic implementation meets the definition of the SAI specification.

Further, verifying whether the implementation of the detailed functions of the SAI interface by means of virtualization is correct includes:

A virtual switch with basic functions is realized by using the programming language P4, and at the same time, the driver interface of the control plane and the adaptation layer of the SAI are realized, and all the verification and development of the SAI interfaces are carried out through the simulation platform.

Further, the method also includes:

When the logic is invoked by the application layer through software simulation, the implementation of the functional logic of the SAI layer is judged and analyzed according to the detailed log.

On the other hand, the embodiment of the present invention also provides an implementation device of an interface simulation platform, including:

The building block is used to provide a general test program writing mode through the framework of automated full testing when verifying that the network operating system is adapted to the underlying chip driver through the middleware interface, and build a software simulation platform;

The verification module is used for testing the functions of each module of the middleware interface as a whole through the simulation platform.

Further, the middleware interface is a switch abstract interface SAI, wherein the verification module is used for:

When verifying that the switch abstract interface SAI is called from the network operating system NOS layer, use simulation software to simulate the implementation logic part of the SAI interface, and verify whether the logic implemented by the SAI interface is correct;

When verifying that the switching chip hardware driver is called from the SAI interface to verify the details of the driver implementation of the SAI interface, it is verified whether the implementation of the detailed functions of the SAI interface is correct by means of virtualization.

Further, the verification module is used for:

Use the C/C++ programming language to implement the interface defined by the SAI specification, print out all the logic, and verify whether the designed SAI logic implementation meets the definition of the SAI specification.

Further, the building blocks are used for:

A virtual switch with basic functions is realized by using the programming language P4, and at the same time, the driver interface of the control plane and the adaptation layer of the SAI are realized, and all the verification and development of the SAI interfaces are carried out through the simulation platform.

Further, the verification module is used for:

When the logic is invoked by the application layer through software simulation, the implementation of the functional logic of the SAI layer is judged and analyzed according to the detailed log.

In the embodiment of the present invention, when verifying that the network operating system is adapted to the underlying chip driver through the middleware interface, a general test program writing mode is provided through the framework of the automated full test, and a software simulation platform is constructed; The middleware interface functions of each module. The embodiment of the present invention can accelerate the iteration and development speed of the middleware software through the simulation platform, thereby accelerating the progress of the project.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Description of drawings

The accompanying drawings are used to provide a further understanding of the technical solution of the present invention, and constitute a part of the description, and are used together with the embodiments of the application to explain the technical solution of the present invention, and do not constitute a limitation to the technical solution of the present invention.

Fig. 1 is the flowchart of the realization method of interface emulation platform of the embodiment of the present invention;

Fig. 2 is the emulation platform block diagram in the implementation method of interface emulation platform of the embodiment of the present invention;

FIG. 3 is a structural diagram of an implementation device of an interface simulation platform according to an embodiment of the present invention.

detailed description

In order to make the purpose, technical solution and advantages of the present invention more clear, the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined arbitrarily with each other.

The steps shown in the flowcharts of the figures may be performed in a computer system, such as a set of computer-executable instructions. Also, although a logical order is shown in the flowcharts, in some cases the steps shown or described may be performed in an order different from that shown or described herein.

Fig. 1 is the flowchart of the realization method of interface emulation platform of the embodiment of the present invention, as shown in Fig. 1, the method of the embodiment of the present invention comprises the following steps:

Step 101: When verifying that the network operating system is adapted to the underlying chip driver through the middleware interface, provide a general test program writing mode through the framework of the automated full test, and build a software simulation platform;

For example, the middleware interface is a switch abstraction interface SAI, wherein SAI: Switch Abstraction Interface, a switch abstraction interface layer, is used for adaptation between the NOS and the underlying switch chip driver.

Specifically, the method of the embodiment of the present invention provides a simulation verification platform that can be separated from the actual hardware switching chip, using this platform can realize the purposes of rapid verification, secondary development, rapid iteration, etc. for the SAI interface, and use this simulation platform to do After completing the logical verification, it is transplanted to the actual hardware switching chip for actual verification.

The embodiment of the present invention can accelerate the iteration and development speed of the SAI middleware software, thereby speeding up the progress of the project.

Step 102: Test the functions of each module of the middleware interface through the simulation platform as a whole.

For example, when verifying that the switch abstract interface SAI is called from the network operating system NOS layer, use simulation software to simulate the implementation logic part of the SAI interface to verify whether the logic implemented by the SAI interface is correct;

When verifying that the switching chip hardware driver is called from the SAI interface to verify the details of the driver implementation of the SAI interface, it is verified whether the implementation of the detailed functions of the SAI interface is correct by means of virtualization.

Further, the implementation logic part of using simulation software to simulate the SAI interface also includes:

Use the C/C++ programming language to implement the interface defined by the SAI specification, print out all the logic, and verify whether the designed SAI logic implementation meets the definition of the SAI specification.

Further, verifying whether the implementation of the detailed functions of the SAI interface by means of virtualization is correct includes:

A virtual switch with basic functions is realized by using the programming language P4, and at the same time, the driver interface of the control plane and the adaptation layer of the SAI are realized, and all the verification and development of the SAI interfaces are carried out through the simulation platform.

P4 is a general-purpose programming language for the data plane of switches (P4 is a language for programming the data plane of network devices).

The virtual switch is used in a virtual local area network (Virtual Local Area Network, VLAN).

Further, the method also includes:

When the logic is invoked by the application layer through software simulation, the implementation of the functional logic of the SAI layer is judged and analyzed according to the detailed log.

Fig. 2 is the emulation platform block diagram in the realization method of interface emulation platform of the embodiment of the present invention, as shown in Fig. 2, the technical scheme of the embodiment of the present invention is elaborated as follows:

The embodiment of the present invention provides an implementation method for verifying and developing the SAI interface simulation platform, which can be separated from the actual exchange chip simulation verification platform. Using this platform, the purposes of rapid verification, secondary development, and rapid iteration for the SAI interface can be realized. The efficiency of development and verification of SAI can be improved.

The SAI interface is a unified abstraction layer of the switch control layer. The purpose is to shield the specific driver call details of each switch chip. It is a general adaptation layer for adapting and connecting NOS and the underlying switch chip. With the existence of this adaptation layer, the embodiment of the present invention can plan a unified platform to be compatible with different NOS and different hardware switching chips. Therefore, the definition of the SAI interface must be defined according to the specific needs of the actual control switch. According to the specific needs, the SAI interface currently defines the following modules:

SAI_API_UNSPECIFIED, SAI_API_SWITCH, SAI_API_PORT, SAI_API_FDB,

SAI_API_VLAN, SAI_API_VIRTUAL_ROUTER, SAI_API_ROUTE,

SAI_API_NEXT_HOP, SAI_API_NEXT_HOP_GROUP,

SAI_API_ROUTER_INTERFACE, SAI_API_NEIGHBOR

SAI_API_ACL, SAI_API_HOSTIF, SAI_API_MIRROR,

SAI_API_SAMPLEPACKET, SAI_API_STP

SAI_API_LAG, SAI_API_POLICER, SAI_API_WRED, SAI_API_QOS_MAP

SAI_API_QUEUE, SAI_API_SCHEDULER, SAI_API_SCHEDULER_GROUP,

SAI_API_BUFFER, SAI_API_HASH, SAI_API_UDF, SAI_API_TUNNEL,

SAI_API_L2MC, SAI_API_IPMC, SAI_API_RPF_GROUP,

SAI_API_L2MC_GROUP, SAI_API_IPMC_GROUP, SAI_API_MCAST_FDB,

SAI_API_BRIDGE, SAI_API_TAM, SAI_API_SEGMENTROUTE,

SAI_API_MPLS, SAI_API_DTEL

SAI_API_BFD, SAI_API_ISOLATION_GROUP, SAI_API_MAX.

The verification of each module of the above-mentioned modules needs to be verified from two aspects. One is to call the SAI interface from the NOS layer to verify whether the logic implemented by the SAI interface is correct. correct. In order to realize the above-mentioned verification, the embodiment of the present invention proposes another way of thinking, using virtualization to verify the above-mentioned content that needs to be verified.

One is to verify the logical part of the NOS layer calling the SAI interface. This part uses simulation software to simulate the implementation logic part of the SAI interface. It does not directly send it to the hardware, but purely simulates the implementation logic. All logic can be printed out to help design The author verifies whether the designed SAI logic implementation meets the definition of the SAI specification.

The second is to verify the actual implementation details of the SAI interface, that is, the details of the driver implementation. This part is also implemented with a software simulation system. Use the programming language P4 to realize a switch model with basic functions, and at the same time realize the driver interface of the control layer and the adaptation layer of SAI, so that the verification and development of all SAI interfaces can be realized by using the pure software simulation platform of the device.

At the same time, in order to meet the requirements of testing all SAI modules, the embodiment of the present invention designs an automated full-test framework, which provides a general test program writing mode to facilitate the overall testing of the functions of each SAI module. The overall frame diagram of the simulation platform is shown in Figure 2. The block diagram of the simulation platform, which specifically includes: test instance T1 and test instance T2, through the function call test frame layer, SAI interface layer, simulation frame layer, and the control layer of the simulation exchange chip A respectively Interact with the control plane of the emulated switch chip B.

The implementation steps of the whole technical solution of the embodiment of the present invention are as follows:

SAI interface verification can be divided into logic verification of SAI implementation and detailed function verification of SAI function realization from the level of division. The logical verification that SAI realizes the embodiment of the present invention uses C/C++ programming language to realize the interface of SAI standard definition, logical verification uses the form of printing log to carry out, and this emulation platform uses the syslog system that carries under Linux system to do log output. According to the detailed log system output, the embodiment of the present invention can conveniently debug the logic problem of the upper layer implementation of the SAI interface. In terms of verifying the specific implementation of the SAI interface pair, the embodiment of the present invention implements a virtual switch using the P4 programming language, and the switch realizes most common data packet processing procedures and basic functions. On the basis of the virtualized switch, the embodiment of the present invention realizes the adaptation driver layer of the SAI interface, and realizes the detailed verification of the function realization of the SAI interface. In this way, the embodiment of the present invention can carry out detailed verification on various aspects from the logic function of the application layer to the control plane of the switch and some forwarding functions.

The implementation process of the embodiment of the present invention is illustrated below with a specific example:

The emulation platform introduced in the embodiment of the present invention involves many modules, and the specific implementation method is described here by taking VLAN as an example. The operation functions defined in the SAI module are as follows:

create_vlan, remove_vlan, set_vlan_attribute, get_vlan_attribute, create_vlan_member, remove_vlan_member, set_vlan_member_attribute, get_vlan_member_attribute, create_vlan_members, remove_vlan_members, get_vlan_stats, get_vlan_stats_ext, clear_vlan

The embodiment of the present invention uses create_vlan as an example to introduce a specific implementation method. First, the embodiment of the present invention needs to initialize the use environment of SAI, use the sai_api_initialize function to initialize SAI, and then use sai_api_query to query the specific implementation function for calling create_vlan. The application layer logic verification of the SAI interface is performed by printing logs. The process of creating a vlan from the perspective of SAI application is described as follows:

Print out the log entering the create_vlan function, and print all the parameters passed into this function.

Determine whether the value of the incoming vlan to be created meets the requirements, and if not, print the detailed log.

Determine whether the VLAN value to be created is available and has already been created. Print detailed log if unavailable

Record the VLANs that have been created at the implementation layer of the SAI.

Call the real switching chip driver layer function, judge the return value, and print the detailed log according to the return value.

When the create_vlan function exits, print a detailed log containing the return value of the function.

Through the above-mentioned software simulation application layer calling logic, it can be judged and analyzed whether there is a problem in the functional logic implementation of the SAI layer according to the detailed log. This simulation platform can be used to quickly verify logic problems without depending on specific switching chips and CPU hardware platforms.

The simulation of the detailed implementation of the SAI interface needs to rely on a basic switch simulation model. This simulation model uses a simulator bmv2 of the P4 language in the embodiment of the present invention. Software for forwarding functions. In this way, the embodiment of the present invention can program the forwarding logic of the switch and the interface of the control plane provided externally according to the requirements of the embodiment of the present invention. Then the embodiment of the present invention can continue to implement an adaptation layer of the SAI interface to implement the specific implementation code called by the SAI layer. With the emulation platform for specific details of the driver implementation call, the embodiment of the present invention can quickly verify all the logic from the application layer to the implementation layer. Rapid iterative development and debugging of SAI interfaces can be achieved.

In the technical solution of the embodiment of the present invention, the implementation method for verifying and developing the SAI interface simulation platform can realize the following functions: the simulation platform provides a framework for automated testing; the simulation platform uses the P4 programming language to realize the basic switching chip function model ; This simulation platform implements the adaptive driver layer of the SAI interface on the basis of the switch chip function model.

It should be noted that the idea of the embodiment of the present invention can also be used in the development and verification of various middleware interfaces, and the provision of a simulation platform can speed up the iteration speed of the software.

FIG. 3 is a structural diagram of an implementation device of an interface simulation platform according to an embodiment of the present invention. As shown in FIG. 3 , another aspect of an implementation device of an interface simulation platform provided by an embodiment of the present invention includes:

The construction module 301 is used to provide a general test program writing mode through the framework of the automated full test when verifying that the network operating system is adapted to the underlying chip driver through the middleware interface, and build a software simulation platform;

The verification module 302 is configured to test the functions of each module of the middleware interface as a whole through the simulation platform.

Further, the middleware interface is a switch abstract interface SAI, wherein the verification module 302 is used for:

When verifying that the switch abstract interface SAI is called from the network operating system NOS layer, use simulation software to simulate the implementation logic part of the SAI interface, and verify whether the logic implemented by the SAI interface is correct;

When verifying that the switching chip hardware driver is called from the SAI interface to verify the details of the driver implementation of the SAI interface, it is verified whether the implementation of the detailed functions of the SAI interface is correct by means of virtualization.

Further, the verification module is used for:

Use the C/C++ programming language to implement the interface defined by the SAI specification, print out all the logic, and verify whether the designed SAI logic implementation meets the definition of the SAI specification.

Further, the building block 301 is used for:

A virtual switch with basic functions is realized by using the programming language P4, and at the same time, the driver interface of the control plane and the adaptation layer of the SAI are realized, and all the verification and development of the SAI interfaces are carried out through the simulation platform.

Further, the verification module 302 is used for:

When the logic is invoked by the application layer through software simulation, the implementation of the functional logic of the SAI layer is judged and analyzed according to the detailed log.

In the embodiment of the present invention, when verifying that the network operating system is adapted to the underlying chip driver through the middleware interface, a general test program writing mode is provided through the framework of the automated full test, and a software simulation platform is constructed; The middleware interface functions of each module. The embodiment of the present invention can accelerate the iteration and development speed of the middleware software through the simulation platform, thereby accelerating the progress of the project.

Although the embodiments disclosed in the present invention are as above, the described content is only an embodiment adopted for understanding the present invention, and is not intended to limit the present invention. Anyone skilled in the field of the present invention can make any modifications and changes in the form and details of the implementation without departing from the spirit and scope disclosed by the present invention, but the patent protection scope of the present invention must still be The scope defined by the appended claims shall prevail.

Claims (8)

1. A method for implementing an interface simulation platform, comprising: When verifying that the network operating system is adapted to the underlying chip driver through the middleware interface, a general test program writing mode is provided through the framework of the automated full test to build a software simulation platform; wherein the middleware interface is the switch abstract interface SAI, When verifying that the switch abstract interface SAI is called from the network operating system NOS layer, use simulation software to simulate the implementation logic part of the SAI interface, and verify whether the logic implemented by the SAI interface is correct; When verifying that the switching chip hardware driver is called from the SAI interface to verify the driver implementation details of the SAI interface, use virtualization to verify whether the implementation of the detailed functions of the SAI interface is correct; The function of each module of the middleware interface is tested as a whole through the simulation platform. 2. the realization method of interface emulation platform according to claim 1, is characterized in that, the implementation logic part of described use emulation software to simulate SAI interface also comprises: Use the C/C++ programming language to implement the interface defined by the SAI specification, print out all the logic, and verify whether the designed SAI logic implementation meets the definition of the SAI specification. 3. the implementation method of the interface simulation platform according to claim 1, is characterized in that, whether the realization of the details function of the verification SAI interface by means of virtualization is correct comprising: A virtual switch with basic functions is realized by using the programming language P4, and at the same time, the driver interface of the control plane and the adaptation layer of the SAI are realized, and all the verification and development of the SAI interfaces are carried out through the simulation platform. 4. the realization method of interface simulation platform according to claim 2, is characterized in that, also comprises: When the logic is invoked by the application layer through software simulation, the implementation of the functional logic of the SAI layer is judged and analyzed according to the detailed log. 5. A device for implementing an interface simulation platform, characterized in that it comprises: The building block is used for when verifying that the network operating system is adapted to the underlying chip driver through the middleware interface, providing a general test program writing mode through the framework of the automated full test, and building a software simulation platform; wherein the middleware interface is The switch abstract interface SAI, wherein the verification module is used for: When verifying that the switch abstract interface SAI is called from the network operating system NOS layer, use simulation software to simulate the implementation logic part of the SAI interface, and verify whether the logic implemented by the SAI interface is correct; When verifying that the switching chip hardware driver is called from the SAI interface to verify the driver implementation details of the SAI interface, use virtualization to verify whether the implementation of the detailed functions of the SAI interface is correct The verification module is used for testing the functions of each module of the middleware interface as a whole through the simulation platform. 6. the realization device of interface emulation platform according to claim 5, is characterized in that, described verification module is used for: Use the C/C++ programming language to implement the interface defined by the SAI specification, print out all the logic, and verify whether the designed SAI logic implementation meets the definition of the SAI specification. 7. the realization device of interface simulation platform according to claim 5, is characterized in that, described building block is used for: A virtual switch with basic functions is realized by using the programming language P4, and at the same time, the driver interface of the control plane and the adaptation layer of SAI are realized, and the verification and development of all SAI interfaces are carried out through the simulation platform. 8. the realization device of interface emulation platform according to claim 6, is characterized in that, described verification module is used for: When the logic is invoked by the application layer through software simulation, the implementation of the functional logic of the SAI layer is judged and analyzed according to the detailed log.

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