CN110993505B - Semiconductor structure preparation method and semiconductor structure based on silicon carbide substrate - Google Patents

Abstract

The invention discloses a method for preparing a semiconductor structure based on a silicon carbide substrate, comprising: selecting a silicon carbide substrate layer; preparing an (In _x Ga _1‑x ) ₂ O ₃ buffer layer on the surface of the silicon carbide substrate layer; A Ga ₂ O ₃ film layer is prepared on the surface of the (In _x Ga _1‑x ) ₂ O ₃ buffer layer. The silicon carbide substrate-based semiconductor structure preparation method provided by the present invention firstly forms an (In _x Ga _1-x ) ₂ O ₃ buffer layer on the surface of the silicon carbide substrate layer, thereby reducing dislocation defects caused by lattice mismatch , and then form a Ga ₂ O ₃ thin film layer on the surface of the (In _x Ga _1‑x ) ₂ O ₃ buffer layer, thereby improving the crystallinity of the subsequent Ga ₂ O ₃ thin film layer, and finally realizing the Fabrication of highly crystalline Ga ₂ O ₃ thin film material structures.

Description

Semiconductor structure preparation method and semiconductor structure based on silicon carbide substrate

technical field

The invention belongs to the technical field of microelectronics, and in particular relates to a silicon carbide epitaxial gallium oxide thin film method and a silicon carbide epitaxial gallium oxide thin film structure.

Background technique

In recent years, the Ga ₂ O ₃ material, as the third-generation semiconductor, has attracted widespread attention because of its large band gap, high breakdown electric field strength, and small on-resistance, and it is the most important material for the development of power devices. best material selection. At present, Ga ₂ O ₃ single crystal substrates can be prepared by high temperature and other methods, and Ga ₂ O ₃ thin films with excellent optical and electrical properties can be homoepitaxially grown on it, which can be used as high-performance power electronics Devices, ultraviolet photodetectors and ultraviolet sensors have a wide range of application prospects. However, due to their low thermal conductivity, the application of power electronic devices at high temperatures is limited.

As a third-generation semiconductor material, SiC also has excellent performance and high thermal conductivity. The combination of SiC and Ga ₂ O ₃ can not only give full play to their respective advantages, but also solve the problem of low thermal conductivity of gallium oxide. However, SiC and _Ga2O3 have many defects due to large lattice mismatch, which limits _their wide application.

Therefore, to solve the problem of defects caused by lattice mismatch between SiC and _Ga2O3 , and to grow gallium oxide films with _high crystalline quality on SiC _substrates , the future combination of SiC and _Ga2O3 materials in power electronics The application of the device in the high temperature environment has great significance.

Contents of the invention

In order to solve the above-mentioned problems in the prior art, the present invention provides a silicon carbide epitaxial gallium oxide thin film method and a silicon carbide epitaxial gallium oxide thin film structure. The technical problem to be solved in the present invention is realized through the following technical solutions:

A method for preparing a semiconductor structure based on a silicon carbide substrate, comprising:

Select the silicon carbide substrate layer;

preparing a (In _x Ga _1-x ) ₂ O ₃ buffer layer on the surface of the silicon carbide substrate layer;

A Ga ₂ O ₃ film layer is prepared on the surface of the (In _x Ga _1-x ) ₂ O ₃ buffer layer.

In one embodiment of the present invention, the silicon carbide substrate layer has a thickness of 300 μm˜700 μm.

In one embodiment of the present invention, a (In _x Ga _1-x ) ₂ O ₃ buffer layer is prepared on the surface of the silicon carbide substrate layer, comprising:

In an oxygen and argon environment, a Ga ₂ O ₃ target and an In ₂ O ₃ target are sputtered on the surface of the silicon carbide substrate layer using a magnetron sputtering process to generate (In _x Ga _1-x ) ₂ O ₃ material layer;

The (In _x Ga _1-x ) ₂ O ₃ material layer is annealed by an annealing process to form the (In _x Ga _1-x ) ₂ O ₃ buffer layer.

In an embodiment of the present invention, the range of x in the (In _x Ga _1-x ) ₂ O ₃ buffer layer is 0.58˜0.76.

In one embodiment of the present invention, a Ga ₂ O ₃ target and an In ₂ O ₃ target are sputtered on the surface of the silicon carbide substrate layer using a magnetron sputtering process to generate (In _x Ga _1-x ) ₂ O ₃ material layers, including:

Sputtering a Ga ₂ O ₃ target and an In ₂ O ₃ target on the surface of the silicon carbide substrate layer using a magnetron sputtering process under the condition of a vacuum degree of 5×10 ^-4 to 7×10 ^-4 Pa Generate (In _x Ga _1-x ) ₂ O ₃ material layer, wherein, the sputtering power of sputtering the Ga ₂ O ₃ target is 60W, and the sputtering power of sputtering the In ₂ O ₃ target is 60W ~80W.

In one embodiment of the present invention, the (In _x Ga _1-x ) ₂ O ₃ material layer is annealed by an annealing process to form a (In _x Ga _1-x ) ₂ O ₃ buffer layer, including:

The (In _x Ga _1-x ) ₂ O ₃ material layer is sequentially annealed in oxygen, vacuum and nitrogen environments to form the (In _x Ga _1-x ) ₂ O ₃ buffer layer.

In one embodiment of the present invention, the thickness of the (In _x Ga _1-x ) ₂ O ₃ buffer layer is 100±5 nm.

In one embodiment _of the present invention, a Ga 2 O ₃ film layer is prepared on the surface of the (In _x Ga _1-x ) ₂ O ₃ buffer layer, including:

In an argon environment, a Ga ₂ O ₃ target material is sputtered on the surface of the (In _x Ga _1-x ) ₂ O ₃ buffer layer by a magnetron sputtering process to form a Ga ₂ O ₃ thin film layer.

In one embodiment of the present invention, _a Ga 2 O ₃ thin film layer is formed by sputtering a Ga ₂ O ₃ target on the surface of the (In _x Ga _1-x ) ₂ O ₃ buffer layer using a magnetron sputtering process, including :

Sputtering Ga 2 O ₃ on the surface of the (In _x Ga _1-x ) ₂ O ₃ buffer layer by magnetron sputtering under the condition of a vacuum _degree of 5×10 ^-4 ~ 7×10 ^-4 Pa The target generates Ga ₂ O ₃ thin film layer, wherein, the base distance of the sputtering target is 5cm, and the working current is 2A.

An embodiment of the present invention also provides a semiconductor structure, the semiconductor structure is prepared by using the silicon carbide substrate-based semiconductor structure preparation method described in any one of the above embodiments, wherein the semiconductor structure includes:

SiC substrate layer;

(In _x Ga _1-x ) ₂ O ₃ buffer layer, located on the surface of the silicon carbide substrate layer;

The Ga ₂ O ₃ thin film layer is located on the surface of the (In _x Ga _1-x ) ₂ O ₃ buffer layer.

Beneficial effects of the present invention:

The silicon carbide substrate-based semiconductor structure preparation method provided by the present invention firstly forms a (In _x Ga _1-x ) ₂ O ₃ buffer layer on the surface of the silicon carbide substrate layer, thereby reducing dislocation defects caused by lattice mismatch , and then form a Ga ₂ O ₃ thin film layer on the surface of the (In _x Ga _1-x ) ₂ O ₃ buffer layer, thereby improving the crystallinity of the subsequent Ga ₂ O ₃ thin film layer, and finally realizing the Fabrication of highly crystalline Ga ₂ O ₃ thin film material structures.

The present invention will be described in further detail below in conjunction with the accompanying drawings and embodiments.

Description of drawings

Fig. 1 is a schematic structural diagram of a device for preparing silicon carbide epitaxial gallium oxide thin films provided by an embodiment of the present invention;

Fig. 2 is a schematic flow diagram of a semiconductor structure preparation method based on a silicon carbide substrate provided by an embodiment of the present invention;

3a to 3c are schematic diagrams of a semiconductor structure preparation method based on a silicon carbide substrate provided by an embodiment of the present invention;

Fig. 4 is a schematic diagram of an (In _x Ga _1-x ) ₂ O ₃ buffer layer annealing environment provided by an embodiment of the present invention;

FIG. 5 is a schematic diagram of a semiconductor structure provided by an embodiment of the present invention.

Explanation of reference signs:

Silicon carbide substrate layer-1; (In _x Ga _1-x ) ₂ O ₃ buffer layer-2; Ga ₂ O ₃ thin film layer-3; radio frequency power supply-4; target container-5; target baffle plate-6; Air inlet-7; exhaust pipe-8; substrate baffle-9; tray-10; substrate heating plate-11; rotary machine-12; sputtering chamber-13.

Detailed ways

The present invention will be described in further detail below in conjunction with specific examples, but the embodiments of the present invention are not limited thereto.

Embodiment one

Before introducing the silicon carbide substrate-based semiconductor structure preparation method provided in this embodiment, this embodiment first provides a device for preparing silicon carbide epitaxial gallium oxide thin films, please refer to Figure 1, which is provided by the embodiment of the present invention. A schematic structural diagram of a device for preparing silicon carbide epitaxial gallium oxide thin films, the device includes a radio frequency power supply 4, two target containers 5, two target baffles 6, an air inlet 7, an exhaust pipe 8, and a substrate baffle Plate 9 , tray 10 , substrate heating plate 11 , spinner 12 and sputtering chamber 13 . The radio frequency power supply 4 is connected to the target container 5 through the sputtering chamber 13 to provide power for the sputtering target. The target container 5 is used to place the sputtering target, and the two target baffles 6 are respectively arranged above the two target containers 5 . The gas inlet 7 can be provided with a plurality of gas pipes, and different gases can be fed in respectively. In this embodiment, the gas inlet 7 can be fed into the sputtering gas oxygen and argon at the same time. The pumping pipeline 8 is connected to a vacuum system for vacuuming the sputtering chamber 13 . The lower end of the rotary machine 12 is sequentially connected to the substrate heating plate 11 and the tray 10, so that the substrate heating plate 11 and the tray 10 can rotate simultaneously to ensure the uniformity of the film deposited on the substrate surface during the sputtering process.

The silicon carbide substrate-based semiconductor structure preparation method provided in the embodiment of the present invention can be prepared based on the above-mentioned equipment, or can be prepared based on other equipment, which is not specifically limited in this embodiment.

In order to better introduce the method for preparing a semiconductor structure based on a silicon carbide substrate provided in this embodiment, this embodiment describes the method for preparing a semiconductor structure based on a silicon carbide substrate on the basis of the above-mentioned equipment for preparing silicon carbide epitaxial gallium oxide thin films. For introduction, please refer to FIG. 2. FIG. 2 is a schematic flowchart of a method for preparing a semiconductor structure based on a silicon carbide substrate according to an embodiment of the present invention. The method for preparing a semiconductor structure based on a silicon carbide substrate specifically includes the following steps:

S1, please refer to Fig. 3a, select silicon carbide substrate layer 1;

Specifically, the production technology of the silicon carbide substrate layer is mature and the quality of the prepared device is good; in addition, the thermal conductivity of silicon carbide is high, the stability is good, and it can be used in the high temperature growth process; finally, silicon carbide has Excellent physical and chemical properties, combined with gallium oxide can realize high-performance and high-power power electronic devices. Therefore, the substrate layer of this embodiment is made of silicon carbide.

Further, the thickness of the silicon carbide substrate layer is 300-700 μm, preferably, the thickness of the silicon carbide substrate layer is 500 μm.

S2. Please refer to FIG. 3b, prepare (In _x Ga _1-x ) ₂ O ₃ buffer layer 2 on the surface of silicon carbide substrate layer 1;

S21. In an oxygen and argon environment, use a magnetron sputtering process to sputter a Ga ₂ O ₃ target and an In ₂ O ₃ target on the surface of the silicon carbide substrate layer to generate (In _x Ga _1-x ) ₂ O ₃ The material layer, in which the magnetron sputtering process uses the interaction between the magnetic field and the electric field to make the electrons run in a spiral shape near the target surface, thereby increasing the probability of the electrons hitting the argon gas to generate ions, and the generated ions hit the target surface under the action of the electric field. The target surface thus sputters out the target material. Because the radius of In atoms is smaller than that of Ga atoms, In is doped into Ga ₂ O ₃ to form (In _x Ga _1-x ) ₂ O ₃ , resulting in a decrease in the lattice constant. In the case of an appropriate value of x, The lattice constant mismatch between (In _x Ga _1-x ) ₂ O ₃ and SiC and (In _x Ga _1-x ) ₂ O ₃ and Ga ₂ O ₃ is small, which can reduce the defect density caused by dislocations .

Specifically, first, oxygen and argon are simultaneously fed into the sputtering chamber as sputtering gases; then the Ga ₂ O ₃ target and the In ₂ O ₃ target are simultaneously sputtered on the surface of the silicon carbide substrate layer by using the magnetron sputtering process , thereby forming a (In _x Ga _1-x ) ₂ O ₃ material layer on the surface of the silicon carbide substrate layer.

Preferably, the value of x in the (In _x Ga _1-x ) ₂ O ₃ material layer ranges from 0.58 to 0.76. When x ranges from 0.58 to 0.76, it can ensure that the lattice constants between (In _x Ga _1-x ) ₂ O ₃ and SiC and (In _x Ga _1-x ) ₂ O ₃ and Ga ₂ O ₃ are out of alignment The degree is small, so that the defect density caused by dislocations can be reduced. If the value of X is too small, the effect of reducing the lattice constant will not be achieved, but if the value of X is too large, due to the limited saturation of the alloy compound, a phase transition will occur, which will not reduce the lattice constant. constant to reduce the effect of dislocations.

Further, _the mass percent purity of oxygen and argon ^are both 99.999% _{, and} the flow rate of oxygen gas can be _2cm ³ /sec; The mass ratio purity of the targets is greater than 99.99%.

In addition, the conditions of the magnetron sputtering process provided in this embodiment when preparing the (In _x Ga _1-x ) ₂ O ₃ buffer layer include: substrate temperature (ie, substrate layer heating temperature), vacuum degree, Ga ₂ O ₃ The sputtering power of the target, the sputtering power of the In ₂ O ₃ target, the base distance of the sputtering target, and the sputtering time. Wherein, the base distance of the sputtering target refers to the distance between the sputtering target and the silicon carbide substrate layer. The substrate temperature was room temperature. In this embodiment, the magnetron sputtering process conditions when preparing the (In _x Ga _1-x ) ₂ O ₃ buffer layer are preferably: the substrate temperature is 25°C; the vacuum degree is 5×10 ^-4 ~ 7×10 ^{- 4} Pa, preferably 5.0×10 ^-4 Pa; the sputtering power of the Ga ₂ O ₃ target is 60W; the sputtering power of the In ₂ O ₃ target is 60W-80W; the base distance of the sputtering target is 5cm; The sputtering time was 1 hour. In this embodiment, (In _x Ga _1-x ) ₂ O ₃ with a suitable lattice constant can have a lattice constant similar to that of the SiC substrate, and the range of x determines the change of the lattice constant , and the experimental growth conditions determine the value range of x. After a large number of experimental verifications, (In _x Ga _1-x ) ₂ O ₃ with a suitable lattice constant can only be grown under the above conditions, that is, only under the above conditions Only in this way can the value range of x be 0.58-0.76.

In this embodiment, by setting the sputtering power of different In ₂ O ₃ targets, (In _x Ga _1-x ) ₂ O ₃ materials with different In compositions can be obtained. When the sputtering power of the In ₂ O ₃ target is adjusted in the range of 60W-80W, the value of x in the generated (In _x Ga _1-x ) ₂ O ₃ material ranges from 0.18 to 0.26. For example, when the sputtering power of the In ₂ O ₃ target is 65W, x=0.21; when the sputtering power of the In ₂ O ₃ target is 70W, x=0.24; when the sputtering power of the In ₂ O ₃ target is At 80W, x=0.26.

S22, annealing the (In _x Ga _1-x ) ₂ O ₃ material layer by an annealing process to form a (In _x Ga _1-x ) ₂ O ₃ buffer layer.

Specifically, referring to FIG. 4 , the (In _x Ga _1-x ) ₂ O ₃ material layer is sequentially annealed in oxygen, vacuum and nitrogen atmospheres so that the (In _x Ga _1-x ) ₂ O ₃ material layer becomes The prepared (In _{x Ga 1-x ) 2 O 3 buffer layer} has the characteristics of amorphous and nanocrystalline structure _. The first annealing under oxygen is mainly to reduce the oxygen vacancy concentration in (In _x Ga _1-x ) ₂ O ₃ , and then the annealing in vacuum is mainly to improve the crystalline quality of (In _x Ga _1-x ) ₂ O ₃ , The final annealing in nitrogen is mainly to improve the conductivity of (In _x Ga _1-x ) ₂ O ₃ .

Further, the temperature of the annealing treatment in this embodiment is 600±5°C, preferably 600°C, the annealing time in oxygen is 2h, the annealing time in vacuum is 1h, and the annealing time in nitrogen is 2h. When the annealing time is short, The film cannot fully react, which is not conducive to recrystallization; when the time is long, a large stress will be generated inside the film, causing the film to break, so an appropriate annealing time is required.

Preferably, the (In _x Ga _1-x ) ₂ O ₃ buffer layer has a thickness of 100±5 nm. If the thickness of the (In _x Ga _1-x ) ₂ O ₃ buffer layer is too small, it will be unfavorable to the growth of the Ga ₂ O ₃ film layer due to the large crystal grains, and if it is too thick, it will affect the SiC/Ga ₂ O ₃ Performance of heterojunction devices.

S3, please refer to 3c, prepare a Ga ₂ O ₃ thin film layer 3 on the surface of the (In _x Ga _1-x ) ₂ O ₃ buffer layer 2;

Specifically, in an argon environment, _{a Ga} 2 O 3 target is sputtered on the surface of the (In _x Ga _1-x ) ₂ O ₃ buffer layer by using a magnetron sputtering process to form a Ga ₂ O ₃ thin film layer.

Further, at first, argon is passed into the sputtering chamber as _a sputtering gas, wherein the mass percent purity of argon is 99.999%, and the flow rate of argon can be, for example, 20cm ³ /sec; _1-x ) The Ga ₂ O ₃ target is sputtered on the surface of the ₂ O ₃ buffer layer to form a Ga ₂ O ₃ thin film layer.

Preferably, the mass specific purity of the Ga ₂ O ₃ target is greater than 99.99%.

In addition, the conditions of the magnetron sputtering process provided in this embodiment when preparing the Ga ₂ O ₃ thin film layer include: vacuum degree, sputtering target base distance, and operating current. The magnetron sputtering process conditions for preparing the Ga ₂ O ₃ thin film layer in this embodiment are preferably: the degree of vacuum is 5×10 ^-4 ~ 7×10 ^-4 Pa, preferably 5.0×10 ^-4 Pa, the sputtering The target base distance is 5cm, and the working current is 2A. If the degree of vacuum is low, there will be more impurity gases inside the chamber, which will contaminate the prepared Ga ₂ O ₃ thin film layer. When the degree of vacuum is high, the time required will increase, which is not conducive to the experiment.

Preferably, the Ga ₂ O ₃ thin film layer has a thickness of 220±5 nm. Too thick Ga ₂ O ₃ film layer will affect the performance of SiC/Ga ₂ O ₃ heterojunction devices.

The method for the silicon carbide epitaxial gallium oxide thin film provided in the embodiment of the present invention is to prepare a buffer layer made of (In _x Ga _1-x ) ₂ O ₃ on the silicon carbide substrate layer, and the buffer layer is sequentially passed through oxygen, vacuum and After annealing in a nitrogen environment, the defects caused by lattice mismatch between the buffer layer and the silicon carbide substrate layer can be reduced, which is more conducive to the subsequent preparation of Ga ₂ O ₃ thin film layers with high crystalline quality at an appropriate temperature .

Embodiment two

Please refer to FIG. 5 , which is a schematic diagram of a semiconductor structure provided by an embodiment of the present invention. An embodiment of the present invention provides a semiconductor structure, which includes: a silicon carbide substrate layer 1, a (In _x Ga _1-x ) ₂ O ₃ buffer layer 2 and a Ga ₂ O ₃ thin film layer 3, wherein (In _x The Ga _1-x ) ₂ O ₃ buffer layer 2 is located on the surface of the silicon carbide substrate layer 1 , and the Ga ₂ O ₃ thin film layer 3 is located on the surface of the (In _x Ga _1-x ) ₂ O ₃ buffer layer 2 .

The semiconductor structure of this embodiment is prepared by using the method for preparing a semiconductor structure based on a silicon carbide substrate provided in the above embodiments, and its realization principle and technical effect are similar, and will not be repeated here.

In describing the present invention, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", " Orientation indicated by rear, left, right, vertical, horizontal, top, bottom, inside, outside, clockwise, counterclockwise, etc. The positional relationship is based on the orientation or positional relationship shown in the drawings, which is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, Therefore, it should not be construed as limiting the invention.

In the description of this specification, descriptions referring to the terms "one embodiment", "some embodiments", "example", "specific examples", or "some examples" mean that specific features described in connection with the embodiment or example , structure, material or characteristic is included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the specific features, structures, materials or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification.

The above content is a further detailed description of the present invention in conjunction with specific preferred embodiments, and it cannot be assumed that the specific implementation of the present invention is limited to these descriptions. For those of ordinary skill in the technical field of the present invention, without departing from the concept of the present invention, some simple deduction or replacement can be made, which should be regarded as belonging to the protection scope of the present invention.

Claims (6)

1. A method for fabricating a semiconductor structure based on a silicon carbide substrate, comprising:

selecting a silicon carbide substrate layer;

sputtering Ga on the surface of the silicon carbide substrate layer by utilizing a magnetron sputtering process in an oxygen and argon environment ₂ O ₃ Target material and In ₂ O ₃ Target formation (In) _x Ga _1-x ) ₂ O ₃ A material layer;

the (In) was sequentially subjected to a reaction under oxygen, vacuum and nitrogen atmosphere _x Ga _1-x ) ₂ O ₃ Annealing the material layer to form the (In _x Ga _1-x ) ₂ O ₃ A buffer layer;

after the (In) _x Ga _1-x ) ₂ O ₃ BufferingPreparation of Ga on the surface of a layer ₂ O ₃ A thin film layer;

the (In) _x Ga _1-x ) ₂ O ₃ The value range of x in the buffer layer is 0.58-0.76;

the (In) _x Ga _1-x ) ₂ O ₃ The thickness of the buffer layer was 100.+ -.5 nm.

2. The method of manufacturing a silicon carbide substrate-based semiconductor structure according to claim 1, wherein the silicon carbide substrate layer has a thickness of 300 μm to 700 μm.

3. The method for manufacturing a silicon carbide substrate-based semiconductor structure according to claim 1, wherein Ga is sputtered on the surface of the silicon carbide substrate layer by a magnetron sputtering process ₂ O ₃ Target material and In ₂ O ₃ Target formation (In) _x Ga _1-x ) ₂ O ₃ A material layer comprising:

at a vacuum degree of 5X 10 ^-4 ～7×10 ^-4 Sputtering Ga on the surface of the silicon carbide substrate layer by utilizing a magnetron sputtering process under the condition of Pa ₂ O ₃ Target material and In ₂ O ₃ Target formation (In) _x Ga _1-x ) ₂ O ₃ A material layer in which the Ga is sputtered ₂ O ₃ Sputtering power of the target material is 60W, and sputtering the In ₂ O ₃ The sputtering power of the target is 60W-80W.

4. The method for manufacturing a silicon carbide substrate-based semiconductor structure according to claim 1, wherein the silicon carbide substrate is formed In the (In _x Ga _1-x ) ₂ O ₃ Preparation of Ga on the buffer layer surface ₂ O ₃ A film layer comprising:

in the argon atmosphere, the sputtering process was performed under the condition of the (In _x Ga _1-x ) ₂ O ₃ Sputtering Ga on the surface of a buffer layer ₂ O ₃ Target material generation Ga ₂ O ₃ A thin film layer.

5. The method for manufacturing a silicon carbide substrate-based semiconductor structure according to claim 4, wherein the (In _x Ga _1-x ) ₂ O ₃ Sputtering Ga on the surface of a buffer layer ₂ O ₃ Target material generation Ga ₂ O ₃ A film layer comprising:

at a vacuum degree of 5X 10 ^-4 ～7×10 ^-4 Under the condition of Pa, the sputtering process was performed under the conditions of (In _x Ga _1-x ) ₂ O ₃ Sputtering Ga on the surface of a buffer layer ₂ O ₃ Target material generation Ga ₂ O ₃ And the film layer, wherein the base distance of the sputtering target is 5cm, and the working current is 2A.

6. A semiconductor structure prepared using the method of preparing a silicon carbide substrate-based semiconductor structure of any one of claims 1 to 5, wherein the semiconductor structure comprises:

a silicon carbide substrate layer;

(In _x Ga _1-x ) ₂ O ₃ the buffer layer is positioned on the surface of the silicon carbide substrate layer;

Ga ₂ O ₃ a thin film layer located on the (In _x Ga _1-x ) ₂ O ₃ Above the surface of the buffer layer.