CN111081781A

CN111081781A - Thin film transistor, manufacturing method thereof, display module and display device

Info

Publication number: CN111081781A
Application number: CN201811229091.0A
Authority: CN
Inventors: 李松举; 李哲; 宋晶尧; 付东
Original assignee: Guangdong Juhua Printing Display Technology Co Ltd
Current assignee: Guangdong Juhua Printing Display Technology Co Ltd
Priority date: 2018-10-22
Filing date: 2018-10-22
Publication date: 2020-04-28

Abstract

The invention relates to a thin film transistor and a manufacturing method thereof, a display module and a display device. By arranging the first active layer and the second active layer in ohmic contact with the source and the drain at both ends of the gate, there is a channel at each end of the gate, and the two channels are used in parallel. After the gate is loaded with a threshold voltage, the two channels connected in parallel can be turned on at the same time, and a current flows at the same time, which is equivalent to increasing the width of the channel through the three-dimensional space and improving the width-length ratio of the channel. According to the current formula of the thin film transistor when it operates in the saturation region, the wider the channel width, the greater the turn-on current. The dual-channel structure can significantly improve the driving capability of the thin film transistor, which in turn helps to improve its mobility and on-state current. And since both channels can play a driving role, even if one of the channels fails to work due to poor manufacturing processes, the other channel can supplement the deficiency, so that the device stability is also significantly improved.

Description

Thin film transistor, manufacturing method thereof, display module and display device

Technical Field

The invention relates to the technical field of display, in particular to a thin film transistor, a manufacturing method of the thin film transistor, a display module and a display device.

Background

In current display devices such as flat panel displays, thin film transistors are widely used as a basis for active drive display in order to achieve high resolution, thereby achieving high-speed image conversion and higher resolution display effects. Thin film transistors are important components of active driving, and most of the mainstream driving devices are amorphous silicon, polycrystalline silicon and oxide thin film transistors. Most of high-end mobile phones, AMOLED drivers, display panels for VR, and the like in the current market require faster transistor response rate, higher on-current, and stronger driving capability in their driving schemes. Therefore, it is a constant pursuit to improve the driving capability of the thin film transistor and further improve the mobility, on-state current, stability and other properties of the thin film transistor.

Disclosure of Invention

Accordingly, it is desirable to provide a thin film transistor capable of improving driving capability, a method for manufacturing the same, a display module and a display device.

A thin film transistor comprises a substrate, a laminated structure arranged on the substrate, a source electrode and a drain electrode; the laminated structure comprises a first active layer, a grid electrode and a second active layer, wherein the first active layer is arranged on the substrate, the grid electrode is positioned between the first active layer and the second active layer, and the first active layer and the second active layer are respectively insulated from the grid electrode; the semiconductor device comprises a first active layer, a second active layer, a source electrode, a drain electrode and a source electrode, wherein the first active layer is provided with a first source part and a first drain part on two sides, the second active layer is provided with a second source part and a second drain part on two sides, the source electrode is electrically connected with the first source part and the second source part, and the drain electrode is electrically connected with the first drain part and the second drain part.

In one embodiment, the stacked structure further includes a first insulating layer disposed between the gate electrode and the first active layer, and a second insulating layer disposed between the gate electrode and the second active layer.

In one embodiment, the first insulating layer and the second insulating layer both extend to two sides of the gate and are in contact connection with two sides of the gate, and the first insulating layer and the second insulating layer wrap the gate in the middle.

In one embodiment, the first source part and the second source part are arranged on the same side, and the first drain part and the second drain part are also arranged on the same side;

the source electrode and the drain electrode penetrate through the first insulating layer and the second insulating layer.

In one embodiment, the first source portion, the second source portion, the first drain portion and the second drain portion are each independently a semiconductor doped portion doped with impurities in the corresponding active layer, or a doped semiconductor layer overlapping the corresponding active layer, or a semiconductor doped portion doped with metal contacts in the corresponding active layer.

In one embodiment, the first source portion and the first drain portion are semiconductor doped portions doped with impurity ions in the first active layer, respectively;

the second source part and the second drain part are doped semiconductor layers lapped with two sides of the second active layer respectively.

In one embodiment, the first source portion and the first drain portion are semiconductor doped portions doped with boron ions or phosphorus ions in the first active layer made of polysilicon;

the second source part and the second drain part are N-type heavily doped amorphous silicon layers which are overlapped with two sides of the second active layer made of amorphous silicon and are doped with silane or hydrogen.

In one embodiment, the stacked structure further includes an intermediate dielectric layer covering the second active layer, the second source portion and the second drain portion for blocking the second active layer from electrically connecting with the source electrode and the drain electrode;

a source hole penetrating through the middle dielectric layer and the second source part to the first source part and a drain hole penetrating through the middle dielectric layer and the second drain part to the first drain part are respectively arranged on two sides of the second active layer from the surface of the middle dielectric layer;

the source extends from the first source surface along the source hole to the intermediate dielectric layer;

the drain extends from the first drain surface along the drain hole toward the intermediate dielectric layer.

In one embodiment, the intermediate dielectric layer is an inorganic insulating layer or an organic insulating layer.

A manufacturing method of a thin film transistor comprises the following steps:

sequentially forming a first active layer, a grid electrode and a second active layer on a substrate, wherein the grid electrode is positioned between the first active layer and the second active layer and is arranged in an insulating way with the first active layer and the second active layer;

forming a first source portion and a first drain portion at both sides of the first active layer, and forming a second source portion and a second drain portion at both sides of the second active layer;

forming a source electrically connected to the first source portion and the second source portion, respectively, and forming a drain electrically connected to the first drain portion and the second drain portion, respectively.

A display module comprises a pixel unit and the thin film transistor in any embodiment, wherein the thin film transistor is electrically connected with the pixel unit and used for driving the pixel unit to emit light.

A display device comprises a shell and a display module arranged on the shell.

According to the thin film transistor, the display module and the display device comprising the thin film transistor, the first active layer and the second active layer are arranged at two ends (the upper end and the lower end) of the grid electrode, the source parts on the first active layer and the second active layer are respectively and electrically connected with the source electrode, the drain parts are respectively and electrically connected with the drain electrode, so that the thin film transistor is provided with one channel at each of the two ends of the grid electrode, the two channels are used in parallel, after threshold voltage is loaded on the grid electrode, the two channels connected in parallel can be simultaneously opened, and current passes through the channels, so that the width of the channels is increased through a three-dimensional space, and the width-length ratio of the channels is improved. According to a current formula of the thin film transistor in the saturation region, the wider the channel width (W), the larger the opening current (Ion), so that the driving capability of the thin film transistor can be remarkably improved by the double-channel structure (when the thin film transistor works in the linear region, the opening current and the width are also positively correlated), and the mobility and the on-state current of the thin film transistor can be improved.

I_on＝(W/L)*μ*Cox*(V_gs-V_th)²

And because two channels can both play the drive effect, even one of them channel can't work because of reasons such as the bad course of working, another channel can also compensate this deficiency, thus has improved the yield of the device from the whole display effect, the stability of the device can also be improved apparently.

The thin film transistor can be widely applied to the fields of flat panel display, television display, electronic paper, logic and memory circuits, flexible display and the like, such as mobile phones, televisions, tablet computers, displays, VR/AR devices, computers, vehicle-mounted displays or any other products or components with display functions.

Drawings

FIG. 1 is a schematic structural diagram of a thin film transistor according to an embodiment of the present invention;

fig. 2a-2f are flow charts of a method for fabricating the thin film transistor shown in fig. 1.

Detailed Description

To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

It will be understood that when an element is referred to as being "on," "in contact with" or "in contact with" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

As shown in fig. 1, an embodiment of the present invention provides a thin film transistor 100, which includes a substrate 110, and a first active layer 120, a gate electrode 140, a second active layer 160, a source electrode 190a, and a drain electrode 190b disposed on the substrate 110. The first active layer 120, the gate electrode 140, and the second active layer 160 form a stacked structure, wherein the gate electrode 140 is located between the first active layer 120 and the second active layer 160, and the gate electrode 140 is insulated from the first active layer 120 and the second active layer 160. The first active layer 120 and the second active layer 160 are electrically connected to the source electrode 190a, respectively, and the first active layer 120 and the second active layer 160 are also electrically connected to the drain electrode 190b, respectively.

The substrate 110 is used to carry other layers of the thin film transistor 100, and may also be used to carry OLED, QLED, or liquid crystal components, etc. The substrate 110 may be a rigid substrate or a flexible substrate. The rigid substrate may be made of ceramic or various glass materials, and the flexible substrate may be PI (polyimide film) or a derivative thereof, PEN (polyethylene naphthalate), PEP (phosphoenolpyruvate), a diphenylene ether resin, or the like.

The first active layer 120 and the second active layer 160 are both semiconductors. In general, when a voltage is applied across the source and drain of the semiconductor (the first active layer 120 and the second active layer 160), no current flows inside the semiconductor (but a very small leakage current occurs). When the gate 140 drops with respect to the source 190a and the drain 190b and reaches a threshold voltage (Vth), the resistivity of the semiconductor is lowered by the gate 140, and thus 10 is obtained⁴Change of the above amount of CurrentThat is, the source 190a and the drain 190b are turned on, so that whether the source 190a and the drain 190b are turned on or off can be controlled by the control gate 140. The materials of the first and second

active layers

120 and 160 may be amorphous silicon, polycrystalline silicon, an oxide semiconductor, or an organic semiconductor.

The gate 140 is a conductive electrode. When a threshold voltage (Vth) is applied to the gate electrode 140, the first and second

active layers

120 and 160 change their conductive properties due to the voltage, which can control the current flowing in the first and second

active layers

120 and 160. The material of the gate electrode 140 may be inorganic, organic, or nanowire, wherein the inorganic may be conductive metal such as aluminum, molybdenum, titanium, copper, silver, or gold, or a combination thereof.

The source electrode 190a and the drain electrode 190b are also conductive electrodes, and are typically stacked layers of materials having relatively low resistivity, such as aluminum, copper, or silver, or combinations thereof, or may be organic conductive materials having relatively low resistivity.

In the thin film transistor 100, the first active layer 120 and the second active layer 160 are disposed at two ends of the gate electrode 140, and the first active layer 120 and the second active layer 160 are respectively electrically connected to the source electrode 190a in an ohmic contact manner and also electrically connected to the drain electrode 190b in an ohmic contact manner, so that the thin film transistor 100 has a channel at two ends of the gate electrode 140, and the two channels are disposed in parallel between the source electrode 190a and the drain electrode 190b, thereby increasing an effective channel width between the source electrode 190a and the drain electrode 190b, and further facilitating an increase in driving capability of the thin film transistor 100.

In the illustrated specific example, one end (end close to the substrate 110) of the gate electrode 140 is insulated from the first active layer 120 by the first insulating layer 130, the other end (end far from the substrate 110) of the gate electrode 140 is insulated from the second active layer 160 by the second insulating layer 150, and the first insulating layer 130 and the second insulating layer 150 constitute a part of the above-described stacked structure. The first active layer 120, the first insulating layer 130, the gate electrode 140, the second insulating layer 150, and the second active layer 160 are sequentially stacked on the substrate 110.

Further, the first insulating layer 130 and the second insulating layer 150 both extend to two sides of the gate 140 and are in contact connection with two sides of the gate 140, and the first insulating layer 130 and the second insulating layer 150 wrap the gate 140 in the middle.

The first and second insulating

layers

130 and 150 may function to insulate the active layers (the first and second active layers 120 and 160) and the gate electrode 140 from each other such that they can interact only by electric field induction. The material of the first insulating layer 130 and the second insulating layer 150 may be an organic insulating material or an inorganic insulating material, wherein the inorganic insulating material may be silicon nitride, silicon oxide, silicon oxynitride, silicon oxycarbide, aluminum oxide, or the like.

Specifically, in the example shown in fig. 1, the area of the first active layer 120 is larger than the area of the end portion of the gate electrode 140 near one end of the substrate 100. The first active layer 120 includes a first channel portion 120b corresponding to the gate electrode 140 and first source and

drain portions

120a and 120c corresponding to the source and

drain electrodes

190a and 190b, respectively, at both sides of the first channel portion 120 b. The first source portion 120a and the first drain portion 120c are both subjected to a conductor forming process.

The method of the conductor processing is more than one, and a metal contact doping method can be used to dope a metal such as aluminum, magnesium, etc. into the first active layer 120, for example, a metal doped semiconductor thin layer is formed by doping the metal at a position close to the surface of the first active layer 120, and the metal doped semiconductor thin layer is partially used as the first source portion 120a and the first drain portion 120 c; doped semiconductor layers (e.g., polysilicon layer doped with boron ions or phosphorus ions, or N-type heavily doped amorphous silicon layer doped with silane or hydrogen, etc.) may also be added on the surfaces of the corresponding portions of the first active layer 120, where the doped semiconductor layers serve as the first source portion 120a and the first drain portion 120 c; impurities can also be doped into the corresponding portions of the first active layer 120 by implantation, and the impurity-doped semiconductor portions serve as the first source portion 120a and the first drain portion 120c, for example, phosphorus ions or boron ions are doped into polysilicon by ion implantation to form a source portion or a drain portion.

In a specific example, a gate electrode 140 can be directly used as a mask for shielding dopant ions, and a large amount of ions can be implanted into the first active layer 120 by vertical ion implantation from top to bottom, so as to increase the conductivity of the portions of the first active layer 120 corresponding to the source electrode 190a and the drain electrode 190b, thereby forming a first source portion 120a and a first drain portion 120c, which can be electrically connected to the source electrode 190a and the drain electrode 190b in ohmic contact respectively. In the case of polysilicon, the impurity ion implantation may be, but is not limited to, boron ion implantation or phosphorus ion implantation in the conductor formation process.

The second active layer 160 is correspondingly disposed above the gate electrode 140 to form a second channel. In the particular example illustrated, the thin film transistor 100 further includes an auxiliary conductive layer 170. The auxiliary conductive layer 170 includes a second source portion 170a and a second drain portion 170b, and preferably, the second source portion 170a and the first source portion 120a are disposed on the same side of the gate electrode 140, and the second drain portion 170b and the first drain portion 120c are also disposed on the same side of the gate electrode 140. The second source portion 170a and the second drain portion 170b overlap the second active layer 160, and the second source portion 170a and the second drain portion 170b are spaced apart. The second active layer 160 forms an ohmic contact type electrical connection with the source electrode 190a through the second source portion 170a, and the second active layer 160 also forms an ohmic contact type electrical connection with the drain electrode 190b through the second drain portion 170 b.

More specifically, the second source and

drain portions

170a and 170b extend from the surface of the second active layer 160 to both sides of the second active layer 160, respectively. The extended portion is located over the second insulating layer 150.

The auxiliary conductive layer 170 is an impurity-doped semiconductor layer. Since the semiconductor (e.g., the first active layer 120 and the second active layer 160) is generally in schottky contact when directly contacting the metal electrodes (e.g., the source electrode 190a and the drain electrode 190b), the contact resistance between them is relatively large, thereby generating unnecessary current loss and reducing the on-current (Ion) of the thin film transistor 100. Therefore, by adding an auxiliary conductive layer 170 to the second active layer 160 corresponding to the source electrode 190a and the drain electrode 190b, and by doping phosphorus ions (P) or boron ions in the amorphous silicon thin film, for example, amorphous silicon, the conductivity of the amorphous silicon thin film can be greatly increased, so that ohmic contact electrical connection can be formed when the amorphous silicon thin film is in contact with a metal electrode, and the amorphous silicon thin film can be electrically connected to the second active layer 160, thereby functioning as a bridge connecting the source electrode 190a and the drain electrode 190b with the second active layer 160.

It is understood that, in other embodiments, the second source portion 170a and the second drain portion 170b may be processed in a manner similar to the first source portion 120a and the first drain portion 120c, for example, metal doping may be performed on corresponding portions of the second active layer 160, or impurity ion implantation may be performed on corresponding portions of the second active layer 160 by impurity ion implantation.

Further, in the illustrated embodiment, the thin film transistor 100 further includes an intermediate dielectric layer 180 at least entirely covering the second active layer 160 and the auxiliary conductive layer 170. Preferably, the intermediate dielectric layer 180 entirely covers the first active layer 120, the first insulating layer 130, the second insulating layer 150, the second active layer 160, and the auxiliary conductive layer 170 from the substrate 110.

The interlayer dielectric layer 180, similar to the materials of the first and second insulating

layers

130 and 150, may serve to block the second active layer 160 from being electrically connected to the source and

drain electrodes

190a and 190 b.

On both sides of the second active layer 160, a source hole (not shown) penetrating through the middle dielectric layer 180 and the second source portion 170a to the first source portion 120a (surface or middle portion) and a drain hole (not shown) penetrating through the middle dielectric layer 180 and the second drain portion 170b to the first drain portion 120c (surface or middle portion) are respectively formed on the surface of the middle dielectric layer 180. The source electrode 190a extends from the surface of the first source portion 120a along the source hole toward the middle dielectric layer 180; the drain electrode 190b extends from the surface of the first drain portion 120c along the drain hole toward the intermediate dielectric layer 180. Preferably, the drain electrode 190b extends to the surface of the intermediate dielectric layer 180 and extends a distance along the surface toward the location of the source electrode 190 a.

The source hole and the drain hole can be formed by etching away the corresponding layers in a semiconductor etching manner, and filling the source material and the drain material to be in direct contact with and electrically connected to the corresponding layers.

The thin film transistor can be widely applied to the fields of flat panel display, television display, electronic paper, logic and storage circuits, flexible display and the like, such as mobile phones, televisions, tablet computers, displays, VR/AR devices, computers, vehicle-mounted displays or any other products or components with display functions. For example, the present invention further provides a display module, which includes a pixel unit and the thin film transistor of any of the above examples, wherein the thin film transistor is electrically connected to the pixel unit for driving the pixel unit to emit light. Furthermore, the invention also provides a display device which comprises a shell and a display module arranged on the shell.

In addition, the invention also provides a manufacturing method of the thin film transistor, which comprises the following steps:

forming a source electrode electrically connected to the first source portion and the second source portion, respectively, and forming a drain electrode electrically connected to the first drain portion and the second drain portion, respectively.

Specifically, as shown in fig. 2a-2f, the manufacturing method includes the following steps:

s1: a patterned first active layer 120 is formed on the substrate 110.

As shown in fig. 2a, the first active layer 120 may be coated on the substrate 110 by magnetron sputtering, evaporation, or chemical vapor deposition. Generally, for the low temperature polysilicon process, an amorphous silicon thin film is formed on the substrate 110, and then an excimer laser is irradiated onto the amorphous silicon thin film to melt the amorphous silicon and recrystallize the amorphous silicon, thereby finally forming a polysilicon thin film (polysilicon active layer).

S2: the first active layer 120 is doped.

The first active layer 120 may be subjected to an operation of modifying the semiconductor properties by ion implantation or the like. Taking polysilicon as an example, the first active layer 120 can be doped with a trace amount of boron ions or phosphorus ions by a trace amount of implantation of boron ions or phosphorus ions, and the threshold voltage of the first active layer 120 can be adjusted by the doping amount, so that the threshold voltage of the first active layer 120 can be matched with (or the same as) the threshold voltage of the second active layer 160 to be fabricated subsequently.

S3: a first insulating layer 130 and a patterned gate electrode 140 are formed on the first active layer 120.

As shown in fig. 2b, the first insulating layer 130 and the gate layer may be sequentially coated by magnetron sputtering, evaporation, or chemical vapor deposition, and the gate layer is patterned by photolithography to form the gate 140.

S4: the first active layer 120 is partially subjected to a conductor forming process.

As shown in fig. 2c, in order to enable the source and

drain electrodes

190a and 190b to form ohmic contact (i.e., contact resistance is smaller) with the first active layer 120, a portion of the first active layer 120 corresponding to the source and

drain electrodes

190a and 190b needs to be subjected to a conductimerization process. The method of the conductor processing can be referred to the foregoing.

S5: a second insulating layer 150 and a patterned second active layer 160 are formed on the gate electrode 140.

As shown in fig. 2d, the second insulating layer 150 and the second active layer 160 may be sequentially coated by chemical vapor deposition, magnetron sputtering, or evaporation, and the second active layer 160 may be patterned by a photolithography process.

S6: a patterned auxiliary conductive layer 170 is formed on the second active layer 160.

As shown in fig. 2e, the auxiliary conductive layer 170 may be coated by chemical vapor deposition, magnetron sputtering, or evaporation, and patterned by a photolithography process. Furthermore, taking amorphous silicon as the second active layer 160 as an example, doping gases such as silane and hydrogen may be added to form a film by chemical vapor deposition to form N-type heavily doped amorphous silicon (N + a-Si), so that the second active layer 160 forms ohmic contacts with the source electrode 190a and the drain electrode 190b to effectively perform electrical connection. The patterning of the auxiliary conductive layer 170 may be performed by a photolithography process, and the purpose of the patterning is to make a channel portion (forming a second channel) of the second active layer 160, so that the auxiliary conductive layer 170 is disconnected at the channel portion, and the source electrode 190a and the drain electrode 190b are respectively a second source portion 170a and a second drain portion 170b, and current flows only when the channel is turned on.

S7: a patterned intermediate dielectric layer 180 is formed on the auxiliary conductive layer 170.

As shown in fig. 1, the intermediate dielectric layer 180 may be coated by chemical vapor deposition, magnetron sputtering, evaporation, or the like, and the intermediate dielectric layer 180 may be patterned by a photolithography process. Typically, such patterning is performed by dry etching to form a hole structure where the upper and lower layers are connected, the hole extends from the surface of the interlayer dielectric layer 180 to the surface of the first active layer 120 or the first active layer 120, and the auxiliary conductive layer 170 is etched through, leaving the auxiliary conductive layer 170 exposed on the wall of the hole.

S8: a source electrode 190a and a drain electrode 190b are formed in the source hole and the drain hole.

As shown in fig. 1, the source hole and the drain hole may be filled with an electrode material by chemical vapor deposition, magnetron sputtering, evaporation, or the like, and the source 190a and the drain 190b may be patterned by a photolithography process to form a metal line.

In the thin film transistor 100, and the display module and the display device including the thin film transistor, the first active layer 120 and the second active layer 160 are disposed at two ends of the gate electrode 140, and the first active layer 120 and the second active layer 160 respectively form ohmic contact with the source electrode 190a and also form ohmic contact with the drain electrode 190b, so that two channels are respectively disposed at two ends of the gate electrode 140 of the thin film transistor 100, and the two channels are used in parallel, so that after the gate electrode 140 is loaded with a threshold voltage, the two parallel channels can be simultaneously turned on, and a current passes through, which is equivalent to increasing the width of the channel through a three-dimensional space, and improving the width-to-length ratio of the channel. According to a current formula of the thin film transistor in the saturation region, the wider the channel width is, the larger the opening current is, so that the driving capability of the thin film transistor can be obviously improved by the double-channel structure, and the mobility and the on-state current of the thin film transistor can be improved. And because two channels can both play the drive effect, even one of them channel can't work because of reasons such as the bad course of working, another channel can also compensate this deficiency, thus has improved the yield of the device from the whole display effect, the stability of the device can also be improved apparently.

The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.

The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims

1. A thin film transistor, characterized in that it comprises a substrate and a laminated structure, a source electrode and a drain electrode disposed on the substrate; the laminated structure comprises a first active layer, a gate electrode and a first active layer. Two active layers, the first active layer is disposed on the substrate, the gate is located between the first active layer and the second active layer, and the first active layer is The source layer and the second active layer are respectively insulated from the gate; both sides of the first active layer have a first source part and a first drain part, and both sides of the second active layer have a second source portion and a second drain portion, the source electrode is electrically connected to the first source portion and the second source portion, the drain electrode is electrically connected to the first drain portion and the second drain portion Electrical connection.

2 . The thin film transistor of claim 1 , wherein the stacked structure further comprises a first insulating layer and a second insulating layer, and the first insulating layer is disposed between the gate electrode and the first insulating layer. 3 . Between the active layers, the second insulating layer is arranged between the gate electrode and the second active layer.

3 . The thin film transistor of claim 2 , wherein the first insulating layer and the second insulating layer both extend to two sides of the gate electrode and are in contact with both sides of the gate electrode. 4 . connected, and the first insulating layer and the second insulating layer cover the gate in the middle.

4 . The thin film transistor of claim 3 , wherein the first source portion and the second source portion are disposed on the same side, and the first drain portion and the second drain portion are also disposed on the same side. 5 . ;

Both the source electrode and the drain electrode penetrate through the first insulating layer and the second insulating layer.

5 . The thin film transistor according to claim 1 , wherein the first source portion, the second source portion, the first drain portion, and the second drain portion are each Independently, it is a semiconductor doped portion that is doped with impurities in the corresponding active layer, or is a doped semiconductor layer that overlaps with the corresponding active layer, or is a semiconductor doped portion that is doped with metal contacts in the corresponding active layer. Miscellaneous part.

6 . The thin film transistor according to claim 5 , wherein the first source portion and the first drain portion are semiconductor doped portions respectively doped with impurity ions in the first active layer. 7 . ;

The second source portion and the second drain portion are respectively doped semiconductor layers overlapped with two sides of the second active layer.

7 . The thin film transistor of claim 6 , wherein the first source portion and the first drain portion are doped with boron ions or phosphorus ions in the first active layer made of polysilicon. 8 . The doped part of the semiconductor;

The second source part and the second drain part are silane or hydrogen doped N-type heavily doped amorphous silicon layers overlapping with two sides of the second active layer made of amorphous silicon material.

8 . The thin film transistor according to claim 6 , wherein the stacked structure further comprises: a thin film transistor covering the second active layer and the second source part and the second drain part. 9 . an intermediate dielectric layer for blocking the electrical connection between the second active layer and the source electrode and the drain electrode;

On both sides of the second active layer, source holes and holes extending through the intermediate dielectric layer, the second source portion and the first source portion are respectively provided from the surface of the intermediate dielectric layer. a drain hole penetrating the intermediate dielectric layer, the second drain portion and the first drain portion;

the source electrode extends from the surface of the first source portion to the intermediate dielectric layer along the source electrode hole;

The drain extends from the surface of the first drain portion to the interlayer along the drain hole.

9 . The thin film transistor structure of claim 8 , wherein the intermediate dielectric layer is an inorganic insulating layer or an organic insulating layer. 10 .

10. A method for manufacturing a thin film transistor, comprising the steps of:

A first active layer, a gate electrode and a second active layer are sequentially formed on the substrate, the gate electrode is located between the first active layer and the second active layer, and the gate electrode is connected to the the first active layer and the second active layer are insulated and arranged;

A first source part and a first drain part are formed on both sides of the first active layer, and a second source part and a second drain part are formed on both sides of the second active layer;

A source electrode is formed to be electrically connected to the first source portion and the second source portion, respectively, and a drain electrode is formed to be electrically connected to the first drain portion and the second drain portion, respectively.

11. A display module, comprising a pixel unit and the thin film transistor according to any one of claims 1 to 9, wherein the thin film transistor is electrically connected to the pixel unit for driving the The pixel cells emit light.

12. A display device, comprising a casing and the display module according to claim 11 mounted on the casing.