CN111158660B - Multi-mode on-orbit programming method for on-board software EEPROM (electrically erasable programmable read-Only memory) - Google Patents
Multi-mode on-orbit programming method for on-board software EEPROM (electrically erasable programmable read-Only memory) Download PDFInfo
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Abstract
The invention discloses a multimode on-orbit programming method of an EEPROM (electrically erasable programmable read-Only memory) of on-board software, which comprises the following steps: s1, after main function software is loaded and operated, an EEPROM programming information table is generated through instruction notes; s2, dynamically programming EEPROM software; step S3, guiding the software to run according to the EEPROM software programming storage information; and S4, programming the shielding sub-function software through a single address. The invention can realize the functions of main function software programming, sub function software programming, EEPROM local address modification and the like under the dynamic running state of software by selecting a programming mode, and various EEPROM on-orbit programming methods and guiding running mechanisms of satellite-borne software; and the subfunction software can be quickly shielded by a single address repair mode.
Description
Technical Field
The invention belongs to the field of on-orbit programming of satellite-borne computer software, and particularly relates to an on-orbit programming method of a multi-mode EEPROM (electrically erasable programmable read-Only memory) of the satellite-borne computer software.
Background
The on-orbit programming function of the on-orbit computer software is an important function of the on-orbit computer software, and has important significance for the on-orbit function expansion and debugging of the software. Software on-track programming typically includes SRAM on-track programming and EEPROM on-track programming. The latter can realize the power-down maintenance of programming software, but the realization process is relatively complex, and the restoration of the software after programming is also relatively complex.
Disclosure of Invention
The invention aims to provide a multimode on-track programming method for an EEPROM (electrically erasable programmable read-Only memory). The method is flexible and reliable in implementation process, can be used for on-orbit programming of various satellite-borne software, and is also suitable for on-orbit application programming of other embedded system software.
In order to achieve the above object, the present invention is realized by the following technical scheme:
an on-orbit programming method of a multi-mode satellite-borne software EEPROM comprises the following steps:
s1, after main function software is loaded and operated, an EEPROM programming information table is generated through instruction notes; the programming information table content includes: software programming mode (main function software programming, sub function software programming), number of programming copies and address, EEPROM programming page size, check identification word, etc. The sub-function software needs to be injected in advance in the sub-function software programming mode to ensure the correctness of the programming code;
s2, dynamically programming EEPROM software; after the programming information table is generated and confirmed to be correct, EEPROM software programming can be started. EEPROM programming content consists of three parts: the verification identification word is composed of 8-bit crc verification and software length. When main function software programming is selected, the programming starting address is the first address of the EEPROM space, the programming scale is a single EEPROM memory area space, and the free area is filled with 0; when the sub-function software programming is selected, the programming initial address is the first page alignment address of the main function software last storage address in the EEPROM space, the programming scale is the actual size of the sub-function code, and the EEPROM last address is reserved for storing the 32-bit crc check word flg0 of the main function software; wherein, the "programming scale" refers to the total space occupied by the code to be programmed;
step S3, guiding the software to run according to the EEPROM programming storage information; after the computer is electrified or reset to run, the main function software of the multimode redundant storage is guided to run by the guiding software, the running of the software is guided according to the correctness of the software verification identification word and the software carrying field running address verification, and the guiding running mode (3, 2 guiding, single guiding and the like) is recorded. After the main function software is operated (before the sub function software), calculating a 32-bit crc check word flg1, acquiring a final address check word flg0 of a corresponding EEPROM space according to a guide field moving mode, and if the flg0 is the same as the flg1, guiding the sub function software and verifying the correctness; otherwise, not guiding the sub-function software;
s4, programming the shielding sub-function software through a single address; during the running of the software, if the sub-function software fails or only the main function software needs to be restored, the 32-bit check word flg0 stored in the corresponding EEPROM space end address can be modified through single-address programming. After the check word is modified, the sub-function software is not booted because flg1 and flg0 are not identical in the software booting process.
Preferably, the EEPROM software programming function can realize main function software programming, sub function software programming and single address software programming, wherein the main function software is carrier software of the EEPROM on-orbit programming software and is used for realizing main functions of satellite-borne software, the sub function software is patch software of the main function software and is on-orbit programming software for on-orbit debugging, function expansion and the like of the main function software, and the on-orbit programming software is injected into the SRAM in a remote control annotating mode.
Preferably, the EEPROM programming information table includes the following: software programming mode, number of programming copies and address, EEPROM programming page size, check identification word, etc. The software programming mode is used for selecting main function software programming or sub function software programming; the programming number is used for selecting redundant backup EEPROM space; the programming address is used for indicating the current source code starting address and the destination EEPROM address; the programming identification word contains a code check, a code length.
Preferably, the main function software and the sub function software share an EEPROM storage space, the storage initial address of the main function software is the EEPROM initial address, the storage initial address of the sub function software is aligned by pages backwards from the storage final address of the main function software, and the sub function software programming failure caused by the misalignment of pages is prevented.
Further, the step S3 further includes the following steps:
the guiding software realizes the guiding and carrying field of the main function software, carries out carrying field on the software according to the priority order of 3 parts 2- > 1 st part- > 2 nd part- > 3 rd part, carries out verification on the carrying field result according to the software verification identification word and the software carrying field operation first address of the EEPROM first address, and jumps the PC to the main function software entrance address for operation if the carrying field result is verified correctly, otherwise carries out carrying field next time in sequence;
after the main function software operates, detecting a 32-bit crc check word flg0 stored at the last address of a corresponding EEPROM space according to the current guiding field carrying mode, calculating a 32-bit check word flg1 of the main function software, and if the flg0 is the same as the flg1, guiding the field carrying sub-function software according to the current guiding field carrying mode, and calling an SRAM programming processing module to realize debugging, function expansion and other restoration of the main function software by the sub-function software after the field carrying of the sub-function software is successful; when flg0 and flg1 are different or the sub-function software fails to carry out the field, only the main function software is operated.
Preferably, the check word flg0 is a main function software 32-bit crc check word stored when the sub function software performs EEPROM programming, and flg1 is a main function software 32-bit crc check word calculated before the main function software guides the sub function software. The consistency of the discrimination of flg0 and flg1 is mainly to discriminate the version consistency of the main function software and the sub function software, and prevent the incompatibility of the main function software and the sub function software.
Compared with the prior art, the invention has the following advantages:
1) The EEPROM software programming modes are diversified, and the main function software programming and writing, the sub function software programming and writing, the EEPROM single address modification can be realized, wherein the sub function software is mainly used for performing error repair, function expansion and the like on the main function software.
2) The main function software and the sub function software share the EEPROM storage area, can only store the main function software, can also store the main function software and the sub function software at the same time, the sub function software storage address is dynamically adjusted according to the EEPROM space occupied by the main function software.
3) When the software is guided to run, whether the sub-function software is carried out or not can be judged according to the correctness of the software programming information, and the main function software is not affected when the sub-function software is not carried or fails to carry.
4) When EEPROM programming is carried out on the sub-function software, the storage structure of the main function software is not damaged, and the operation error of the main function software caused by the field carrying failure of the factor function software is prevented; and meanwhile, through the version consistency check of the main function software and the sub function software, the incompatibility of the main function software and the sub function software is prevented.
5) The subfunction software can be quickly shielded by a single address repair mode without erasing the subfunction software space.
Drawings
FIG. 1a is a schematic diagram of a memory space structure of an EEPROM; FIG. 1b is a software storage structure in an EEPROM, showing "patch" software, i.e., sub-functional software;
FIG. 2 is a main flow of EEPROM programming;
FIG. 3 is a flowchart of EEPROM programming information generation;
FIG. 4 is a single EEPROM programming process flow;
FIG. 5 is a flow chart of EEPROM single address programming process;
FIG. 6 is a main flow of the main function software boot;
fig. 7 is a sub-function software boot main flow.
Detailed Description
The invention will be further described by the following detailed description of a preferred embodiment, taken in conjunction with the accompanying drawings.
As shown in fig. 1a, the EEPROM storage space of the present embodiment includes: main function software, sub function software ("patch" software) and main function software check words.
As shown in fig. 1b, in this embodiment, the EEPROM storage space is configured as 3MB, the software is stored in 6 parts, each 512KB includes 3 parts of main software (main part 1 software, main part 2 software, main part 3 software) and 3 parts of backup software (backup 1 software, backup 2 software, backup 3 software), and the main and backup software are stored in a cross manner. The single-part EEPROM storage allocation is as follows: the main function software identification word, the main function software field address, the main function software, the spare space, the patch software identification word, the patch software field address, the patch software, the spare space and the main function software verification flg0.
As shown in fig. 2, the on-orbit programming method of the multimode on-board software EEPROM of the present invention comprises the following steps:
s1, after main function software is loaded and operated, an EEPROM programming information table is generated through instruction notes; the programming information table content includes: the information such as the software programming mode (main function software programming, sub function software programming), the number of programming copies and addresses, the EEPROM programming page size (128 words in this example), and the verification identification word. The sub-function software needs to be injected in advance in the sub-function software programming mode to ensure the correctness of the programming code.
S1.1, after the main function software is loaded and operated, judging whether programming information is allowed to be generated or not:
if yes, enter S1.2;
if not, directly jumping to S2.3;
s1.2, initializing a programming state; acquiring programming information: programming length, EEPROM original programming length, programming number, length effective state, programming mode, EEPROM page size; valid status words are programmed (length valid, programming mode valid, number of EEPROM copies valid).
The flow of generating EEPROM programming information is shown in fig. 3:
s11, starting, clearing the total programming length=0, clearing the reserved programming check word length=0 and the number of EEPROM programming copies; judging whether the main function software is programmed:
if yes, the programming mode is the main function, and S12 is entered;
if not, judging whether the sub-function software is programmed: if Y, the programming mode is a subfunction, and S12 is entered; if N, the program mode is not set, and the process proceeds to S12.
S12, judging whether the software program is the sub-function software:
if so, the programming start offset=main function software length+reserved information length, the programming start offset is aligned by 1KB byte, the programming length=sub function code length+reserved information length+programming information length, reserved programming check word length=4; enter S13;
if not, judging whether the main function software is programmed: if Y, the programming start offset=0, the programming length=the main function software length+the reserved information length, the reserved programming check word length=0, and the process goes to S13; if N, the programming start offset=0, the programming length=0, and the reserved programming check word length=0; the process advances to S13.
S13, judging whether the programming total length does not exceed the single EEPROM space and 4 bytes are aligned:
if so, the programming length is valid, and S14 is entered;
if not, the programming length is invalid and S14 is entered;
s14, programming the page size, resetting the remote control parameters, and ending.
S2, dynamically programming EEPROM software; after the programming information table is generated and confirmed to be correct, EEPROM software programming can be started.
EEPROM programming content consists of three parts: the verification identification word is composed of 8-bit crc verification and software length.
When main function software programming is selected, the programming starting address is the first address of the EEPROM space, the programming scale is a single EEPROM memory area space, and the free area (i.e. the spare space) is filled with 0; when the subfunction software programming is selected, the programming start address is the first page alignment address (1 KB alignment is taken in this example to adapt to the page space size of different EEPROM chips) of the main function software last storage address in the EEPROM space, the programming scale is the actual size of the subfunction code, and the EEPROM last address (the last 4 bytes of 512KB space in this example) is reserved for storing the 32-bit crc check word flg0 of the main function software.
As shown in fig. 2, step S2 specifically includes:
s2.1, judging whether programming information is effective (length is effective, programming mode is effective, and number of times of programming EEPROM is effective); if yes, enter S2.2; if not, directly jumping to S2.3.
S2.2, judging whether the mode is a main function software programming mode:
if so, the code starting address to be programmed is the main function software starting address;
if not, the code starting address to be programmed is the starting address of the sub-function software;
programming destination address = EEPROM base address + programmed code length + nth memory offset;
calculating a programming code crc check word crc8;
a program status word is generated.
S2.3, judging whether EEPROM programming is allowed or not:
if yes, enter S2.4;
if not, go to S2.3.1, determine if EEPROM programming is not allowed: if N, ending; if Y, entering a clear permission state, and ending;
s2.4, judging whether programming identification words are generated or not:
if not, ending;
if so, setting the programming state as the nth programming; starting the nth programming; s2.5 is entered;
s2.5, judging whether programming is normal or not:
if so, setting the programming state as the n-th programming valid, and entering S2.6;
if not, setting the programming state as the nth programming invalid, and jumping to S2.7;
s2.6, judging whether the software program is the sub-function software:
if yes, calculating the EEPROM end address; writing the main function software check word into the final address; s2.7 is entered;
if not, directly entering S2.7;
s2.7, resetting EEPROM programming information and ending programming.
As shown in fig. 4, the single EEPROM programming process flow includes:
s21, starting, presetting programming verification failure, setting programming length, and judging whether the size of a programming page is effective or not and the length is not 0:
if yes, the first character pad of the first page data programs an identification character, the second character pad starts an address, a source data start address, a programming destination address, a code array offset to be programmed=2, a source code offset=0, the number of bytes, the number of effective code programming pages and the total number of pages of a single EEPROM are set; enter S22;
if not, setting the programming result to be wrong and returning to finish.
S22, judging whether the software program is the sub-function software:
if yes, the total page number of the single programming is taken as the valid code page number, and S23 is entered;
if not, the process proceeds directly to S23.
S23, judging whether all (Count all) page codes are programmed in sequence:
if yes, go to S24:
if not, calculating an EEPROM programming result crc check word crc8=0, generating a programming result identification word, acquiring the programming identification word in the EEPROM, and judging whether the two words are consistent or not: if Y, setting the programming result to be correct and returning to finish; if N is reached, setting the programming result to be wrong and returning, and ending.
S24, judging whether to fill the code array to be programmed according to the page size:
if yes, adding 1 to the code array offset to be coded, adding 1 to the source code offset, and entering S25;
if not, calling an EEPROM page programming module to burn, and updating a programming source address and a destination address; jumping to S23;
s25, judging whether the number of valid code pages is not ended:
if yes, filling the effective codes into the code array to be programmed, and jumping to S24;
if not, the code array to be programmed fills 0, and jumps to S24.
Step S3, guiding the software to run according to the EEPROM programming storage information; after the computer is powered on or reset, the boot software guides the operation of the multi-mode redundancy stored main function software (in this example, 3 parts of main software or 3 parts of standby software).
The order of the software-guided farm-moving priorities in this example is: the main software 3 takes 2- > 1 st main software- > 2 nd main software- > 3 rd main software- > backup software 3 takes 2- > 1 st backup software- > 2 nd backup software- > 3 rd backup software. And guiding the software to run according to the correctness of the software verification identification word and the software field operation address verification, and recording the guiding running mode (main software or backup software, 3-out-of-2 guiding, single guiding and the like).
The main function software boot flow is shown in fig. 6, and includes:
s3.1, firstly judging whether the reset times are less than 3 times in half an hour:
if so, the moving field offset address takes the main software offset, and S3.2 is entered;
if not, the field shift address takes the backup software shift, and S3.2 is entered
S3.2, judging whether to take 2> 1 st part of main software > 2 nd part of main software > 3 rd part of main software priority circulation carrying field according to 3:
if yes, enter S3.3;
if not, then S3.2.1 is entered;
s3.2.1, judging whether the on-site carrying field is the main part:
if Y, the primary software fails to move, and the moving offset address takes the backup software offset and jumps into S3.2;
if N is the number, the primary and backup software carrying fields fail, the 1 st primary function software identification word of the primary is obtained, the 1 st primary function software carrying field address of the primary is obtained, the length is calculated according to the identification word, the 1 st software code of the corresponding length of the carrying field is calculated, the carrying field mode (1 st primary function software, no verification) is recorded, the PC jumps to the primary function software inlet operation of the SRAM area, and the operation is finished.
S3.3, judging whether 3 is to take 2 carrying fields:
if so, 3, 2, namely, acquiring the identification word of the main function software, 3, namely, acquiring the field address of the main function software, calculating the check word and the length according to the identification word, and 3, namely, acquiring the code of the corresponding length of the field 2, and calculating the field result check word; s3.4 is entered;
if not, entering a single field carrying mode, acquiring the identification words of the main function software, acquiring the field carrying addresses of the main function software, calculating the check words and the lengths according to the identification words, carrying the corresponding length of the software codes, calculating the field carrying result check words, and entering S3.4.
S3.4, judging whether the verification result is incorrect:
if so, the carrying field fails, and the step S3.2 is skipped;
if not, the secondary field is successful, the field carrying mode (main part, backup, 3 for 2 and single part) is recorded, and the PC jumps to the main function software entry operation of the SRAM area and ends.
After the main function software operates, calculating a 32-bit crc check word flg1, acquiring a final address check word flg0 of a corresponding EEPROM space according to a guide field carrying mode, and if the flg0 is the same as the flg1, guiding the field carrying sub-function software according to the guide field carrying mode, and calling an SRAM programming processing module after the sub-function software is successfully carried out to realize debugging, function expansion and other restoration of the main function software by the sub-function software; when flg0 and flg1 are different or the sub-function software fails to carry out the field, only the main function software is operated.
As shown in fig. 7, the booting process for the sub-function software includes:
s31, starting to acquire a main function software carrying mode (main part, backup, 2 out of 3 and single part), and judging whether the main function software carrying mode is:
if so, the carrying field offset address takes the main software offset, and S32 is entered;
if not, the field shift address takes the backup software shift, and S32 is entered;
s32, judging whether 3 is taken for 2 carrying fields:
if so, 3 is taken to obtain 2, a main function software check word flg0 is obtained, and S33 is entered;
if not, acquiring the master function software check word flg0, and entering S33;
s33, calculating a main function software check word flg1, and judging whether the check words are consistent or not:
if so, calculating the initial offset of the sub-function software according to the size of the main function software, and entering S34;
if not, only the main function software is operated, and the process is finished.
S34, judging whether 3 is taken for 2 carrying fields:
if so, taking 2 carrying modes for 3, calculating according to off and Bin_len0: 3, acquiring 2 sub-function software identification words, 3 acquiring 2 sub-function software field-moving addresses, calculating check words and lengths according to the identification words, 3 acquiring codes of corresponding lengths of 2 field-moving results, calculating field-moving result check words, and entering S35;
if not, the single-part carrying mode is calculated according to off and Bin_len0: acquiring the part of sub-function software identification words, acquiring the part of sub-function software field carrying addresses, calculating check words and lengths according to the identification words, carrying the part of software codes with corresponding lengths, calculating field carrying result check words, and entering S35;
s35, judging whether the verification result is correct:
if yes, invoking SRAM programming processing software to repair the main function software by the sub function software, and ending;
if not, the carrying is successful, and the process is finished.
S4, programming the shielding sub-function software through a single address; during the running of the software in the track, if the sub-functional software fails or only the main functional software needs to be restored, the 32-bit check word flg0 stored in the corresponding EEPROM space end address can be modified through single-address programming, and in the example, only the EEPROM space end address and any data (according to 0 by default) different from flg0 are needed to be injected. After the check word is modified, the sub-function software is not booted because flg1 and flg0 are not identical in the software booting process.
As shown in fig. 5, the single address programming flow includes:
starting, judging whether the programming address range is valid:
if so, calculating the head address of the EEPROM according to the number of the EEPROM; and opening the EEPROM software protection lock, writing data into the address, and ending.
If not, ending.
In summary, the invention provides a multimode on-orbit programming method for the on-satellite software EEPROM, which can realize the functions of main function software programming, sub function software programming, EEPROM local address modification and the like under the dynamic running state of the software by selecting a programming mode; the main function software is main function realization software for completing the functions of the computer system, and the sub function software is mainly used for realizing patch software for debugging, function expansion and the like of the main function software and is injected into the SRAM in a remote data injection mode; when the computer is powered on or reset and started, the software booting process can realize the correct booting operation of the stored software according to the programming storage information in the EEPROM. And can realize the quick shielding of the sub-function software to realize the software state restoration.
Compared with the prior art, the invention has the advantages that: 1. EEPROM software in-orbit programming in various modes can be realized; 2. the main function software and the sub function software share an EEPROM storage area, and can only store the main function software, and can also store the main function software and the sub function software at the same time; 3. when the software is guided to run, whether the sub-function software is carried out or not can be judged according to the correctness of the programming storage information, the operation of the main function software is not affected when the sub-function software is not carried out, and errors caused by incompatibility of the main function software and the sub-function software can be prevented; 4. the subfunction software can be quickly shielded by a single address repair mode.
While the present invention has been described in detail through the foregoing description of the preferred embodiment, it should be understood that the foregoing description is not to be considered as limiting the invention. Many modifications and substitutions of the present invention will become apparent to those of ordinary skill in the art upon reading the foregoing. Accordingly, the scope of the invention should be limited only by the attached claims.
Claims (10)
1. The on-orbit programming method of the multi-mode satellite-borne software EEPROM is characterized by comprising the following steps of:
s1, after main function software is loaded and operated, an EEPROM programming information table is generated through instruction notes; the programming information table content includes: the method comprises the steps of a software programming mode, a programming number, a programming address, an EEPROM programming page size and verification identification word information, wherein the software programming mode is used for selecting main function software programming or sub function software programming;
step S2, EEPROM software dynamic programming: after the programming information table is generated and confirmed to be correct, starting EEPROM software programming; the EEPROM software programming content consists of three parts: checking identification words, a software field operation head address and a software target code;
step S3, guiding the software to run according to the EEPROM software programming storage information: after the computer is electrified or reset to run, the master function software of the multimode redundancy storage is guided to run by the guiding software, the running of the software is guided according to the correctness of the software verification identification word and the software carrying running address verification, and the guiding running mode is recorded; after the main function software is operated, calculating a 32-bit crc check word flg1, acquiring a final address check word flg0 of a corresponding EEPROM space according to a guide field carrying mode, and if the flg0 is the same as the flg1, guiding the sub function software and verifying the correctness; otherwise, not guiding the sub-function software;
step S4, programming the shielding sub-function software through a single address: during the on-track running of the software, if the sub-function software fails or only the main function software needs to be restored, the 32-bit check word flg0 stored in the corresponding EEPROM space end address is modified through single-address programming; after the check word is modified, the sub-function software is not booted because flg1 and flg0 are not identical in the software booting process.
2. The method for on-orbit programming of a multimode satellite-borne software EEPROM of claim 1, wherein the number of programming copies is used to select redundant backup EEPROM space; the programming address is used for indicating the current source code starting address and the destination EEPROM address; the check identification word comprises code check and code length.
3. The method of on-orbit programming of a multimode on-board software EEPROM of claim 1, wherein when the main function software programming is selected, the programming start address is the first address of the EEPROM space, the programming scale is a single EEPROM memory space, and the free area is filled with "0".
4. The method of on-orbit programming of multi-mode on-board software EEPROM of claim 1, wherein when the sub-function software programming is selected, the programming start address is the first page aligned address of the main function software last stored address backward in the EEPROM space, the programming scale is the actual size of the sub-function code, and the EEPROM last address is reserved for storing the 32-bit crc check word flg0 of the main function software.
5. The method of on-orbit programming of a multimode satellite-borne software EEPROM of claim 4, wherein the sub-function software is pre-injected in the sub-function software programming mode to ensure the correctness of the programming code.
6. The multi-mode on-orbit programming method of the on-board software EEPROM of claim 1, wherein the main function software and the sub function software share EEPROM storage space, the storage initial address of the main function software is the EEPROM initial address, the storage initial address of the sub function software is aligned by pages backwards from the storage final address of the main function software, and the sub function software programming failure caused by the page misalignment is prevented.
7. The method of on-track programming of a multimode satellite borne software EEPROM of claim 1, wherein in step S2, the check identifier word consists of an 8-bit crc check and a software length.
8. The method for on-orbit programming of a multimode satellite based software EEPROM according to claim 1, characterized in that in step S3, the boot mode of operation selects a 3-out-of-2 boot or a single boot.
9. The method of on-orbit programming of a multimode, on-board software EEPROM of claim 1, wherein step S3 further comprises:
1) The guiding field of the main function software is realized by the guiding software: carrying out field carrying on the software according to the priority order of 2 < 1 st part- > 2 < 3 rd part, carrying out field carrying according to the software verification identification word of the first address of the EEPROM, the first address of the operation of the field carrying of the software, verifying the field carrying result, and jumping the PC to the entry address of the main function software for operation if the verification is correct, otherwise carrying out the next field carrying in sequence;
2) After the main function software operates, detecting a 32-bit crc check word flg0 stored at the last address of the corresponding EEPROM space according to the current guiding field carrying mode, calculating a 32-bit check word flg1 of the main function software, and guiding the field carrying sub-function software according to the current guiding field carrying mode if the flg0 is the same as the flg 1;
3) After the sub-function software is carried successfully, invoking the SRAM programming processing module to realize debugging and function expanding repair of the sub-function software to the main function software; when flg0 and flg1 are different or the sub-function software fails to carry out the field, only the main function software is operated.
10. The method for on-orbit programming of the multimode satellite-borne software EEPROM according to claim 1, wherein the check word flg0 is a main function software 32-bit crc check word stored by the sub function software when the EEPROM is programmed, and flg1 is a main function software 32-bit crc check word calculated before the main function software guides the sub function software.
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