CN111244188B - Heterojunction AlGaAs/GaAs diode and preparation method thereof - Google Patents
Heterojunction AlGaAs/GaAs diode and preparation method thereof Download PDFInfo
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- 229910001218 Gallium arsenide Inorganic materials 0.000 title claims abstract description 191
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 title claims abstract description 27
- 238000002360 preparation method Methods 0.000 title claims abstract description 7
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 239000000463 material Substances 0.000 claims abstract description 21
- 239000013078 crystal Substances 0.000 claims description 7
- 238000005229 chemical vapour deposition Methods 0.000 claims description 6
- 238000000034 method Methods 0.000 claims description 6
- 238000001451 molecular beam epitaxy Methods 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 238000003780 insertion Methods 0.000 abstract description 7
- 230000037431 insertion Effects 0.000 abstract description 7
- 238000005457 optimization Methods 0.000 abstract description 3
- 238000002955 isolation Methods 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
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- 239000007924 injection Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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Abstract
本申请提供一种异质结AlGaAs/GaAs二极管及其制备方法，该二极管包括衬底层、GaAs缓冲层、第一掺杂Si的GaAs层、第二掺杂Si的GaAs层、GaAs本征层、掺杂Be或C的Al0.09Ga0.91As层和掺杂Be或C的GaAs层；衬底层、GaAs缓冲层、高掺杂N+层、低掺杂N层、GaAs本征层、掺杂Be或C的Al0.09Ga0.91As层和掺杂Be或C的GaAs层依次层叠连接。本申请提供的异质结AlGaAs/GaAs二极管中，Al组分和GaAs本征层厚度的优化使该二极管在进一步减小材料的导通电阻的同时保持其较大的耐压能力，同时在掺杂Be或C的Al0.09Ga0.91As层上面增加了高浓度掺杂Be或C的GaAs层，能够有效减小欧姆接触电阻，从而减低二极管的插入损耗，能够有效提高二极管材料的射频性能。
The present application provides a heterojunction AlGaAs/GaAs diode and a preparation method thereof. The diode includes a substrate layer, a GaAs buffer layer, a first Si-doped GaAs layer, a second Si-doped GaAs layer, a GaAs intrinsic layer, Be or C doped Al 0.09 Ga 0.91 As layer and Be or C doped GaAs layer; substrate layer, GaAs buffer layer, highly doped N+ layer, low doped N layer, GaAs intrinsic layer, Be doped or The Al 0.09 Ga 0.91 As layer of C and the GaAs layer doped with Be or C are sequentially stacked and connected. In the heterojunction AlGaAs/GaAs diode provided by this application, the optimization of the Al composition and the thickness of the GaAs intrinsic layer enables the diode to further reduce the on-resistance of the material while maintaining its large withstand voltage capability. A GaAs layer with a high concentration of Be or C is added on the Al 0.09 Ga 0.91 As layer of doped Be or C, which can effectively reduce the ohmic contact resistance, thereby reducing the insertion loss of the diode, and can effectively improve the radio frequency performance of the diode material.
Description
Technical Field
The application relates to the technical field of integrated circuits, in particular to a heterojunction AlGaAs/GaAs diode and a preparation method thereof.
Background
In millimeter wave imaging and 5G systems, a switch is often needed to control signals, such as changing a signal transmission path, switching on and off a circuit, and the like. The diode types used for the millimeter wave control circuit at present mainly include a PHEMT (phase shift keying) tube and a PIN (positive-intrinsic-negative) diode, and the PHEMT tube has the advantages of high integration level, capability of miniaturizing the circuit and limited bearing power. The PIN diode is easy to integrate, miniaturized and high in power bearing capacity. Therefore, a PIN diode is generally used as a control circuit component. The GaAs PIN diode has lower junction capacitance and on-resistance, high cut-off frequency, high voltage resistance and easy integration, so that the GaAs PIN diode is widely applied to a millimeter wave switch control system. The design of an epitaxial material structure with excellent performance is the basis for realizing the high-performance PIN diode.
The traditional PIN diode material structure is that an undoped intrinsic layer is added between a highly doped P-type semiconductor material and a highly doped N-type semiconductor material. With the increasing requirements of microwave systems on radio frequency characteristics and PIN diodes, the requirements of the diodes are generally high, and the diodes are generally required to simultaneously meet the requirements of small insertion loss, large isolation and capability of bearing higher voltage (generally more than 25V). The traditional PIN diode material structure cannot meet higher requirements, so that a better diode material structure needs to be designed.
Disclosure of Invention
The technical problem of how to improve the radio frequency characteristic of the diode is solved.
In order to solve the technical problem, the embodiment of the application discloses a heterojunction AlGaAs/GaAs diode which comprises a substrate layer, a GaAs buffer layer, a first Si-doped GaAs layer, a second Si-doped GaAs layer, a GaAs intrinsic layer, and Be or C-doped Al0.09Ga0.91An As layer and a Be or C doped GaAs layer;
a substrate layer, a GaAs buffer layer, a first Si-doped GaAs layer, a second Si-doped GaAs layer, a GaAs intrinsic layer, and Be or C-doped Al0.09Ga0.91The As layer and the Be or C doped GaAs layer are sequentially connected in a laminated manner.
Further, the thickness of the GaAs buffer layer is 200-0.09Ga0.91The thickness of the As layer is 150-200nm, and the thickness of the GaAs layer doped with Be or C is 50-100 nm.
Further, the concentration of Si in the first Si-doped GaAs layer is 5E18cm-3The concentration of Si in the second Si-doped GaAs layer is 3E17cm-3Al doped with Be or C0.09Ga0.91The concentration of Be or C in the As layer is 5E18cm-3The concentration of Be or C in the Be or C doped GaAs layer is 3E19cm-3。
Further, the material of the substrate layer comprises single crystal GaAs.
Further, a GaAs buffer layer, a first Si-doped GaAs layer, a second Si-doped GaAs layer, a GaAs intrinsic layer, and Be or C-doped Al0.09Ga0.91The As layer and the GaAs layer doped with Be or C are both prepared by adopting a chemical vapor deposition or molecular beam epitaxy technology.
Another aspect of the present application provides a method for manufacturing a heterojunction AlGaAs/GaAs diode, comprising the steps of:
obtaining a substrate layer;
preparing and forming a GaAs buffer layer on the substrate layer;
preparing and forming a first Si-doped GaAs layer on the GaAs buffer layer;
preparing and forming a second Si-doped GaAs layer on the first Si-doped GaAs layer;
preparing and forming a GaAs intrinsic layer on the second Si-doped GaAs layer;
preparing and forming Be or C doped Al on GaAs intrinsic layer0.09Ga0.91An As layer;
in Al doped with Be or C0.09Ga0.91And preparing a GaAs layer for forming doping Be or C on the As layer.
Further, the thickness of the GaAs buffer layer is 200-0.09Ga0.91The thickness of the As layer is 150-200nm, and the thickness of the GaAs layer doped with Be or C is 50-100 nm.
Further, Si in the first Si-doped GaAs layerAt a concentration of 5E18cm-3The concentration of Si in the second Si-doped GaAs layer is 3E17cm-3Al doped with Be or C0.09Ga0.91The concentration of Be or C in the As layer is 5E18cm-3The concentration of Be or C in the Be or C doped GaAs layer is 3E19cm-3。
Further, the material of the substrate layer comprises single crystal GaAs.
Further, a GaAs buffer layer, a first Si-doped GaAs layer, a second Si-doped GaAs layer, a GaAs intrinsic layer, and Be or C-doped Al0.09Ga0.91The As layer and the GaAs layer doped with Be or C are both prepared by adopting a chemical vapor deposition or molecular beam epitaxy technology.
By adopting the technical scheme, the application has the following beneficial effects:
in the heterojunction AlGaAs/GaAs diode provided by the application, the optimization of the Al component and the thickness of the GaAs intrinsic layer enables the diode to further reduce the on-resistance of the material and simultaneously keep the larger voltage-resisting capability, and meanwhile, the diode is doped with Be or C Al0.09Ga0.91The GaAs layer doped with Be or C at high concentration is added on the As layer, so that ohmic contact resistance can Be effectively reduced, the insertion loss of the diode is reduced, and the radio frequency performance of the diode material can Be effectively improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic structural diagram of a heterojunction AlGaAs/GaAs diode according to an embodiment of the present application;
FIG. 2 is a flow chart of a method for fabricating a heterojunction AlGaAs/GaAs diode according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Reference herein to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic may be included in at least one implementation of the present application. In the description of the embodiments of the present application, it is to be understood that the terms "upper", "lower", "top", "bottom", and the like, indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are only for convenience in describing the present application and simplifying the description, and do not indicate or imply that the referred devices or elements must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. Moreover, the terms "first," "second," and the like are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are capable of operation in sequences other than those illustrated or described herein.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a heterojunction AlGaAs/GaAs diode according to an embodiment of the present application, where the heterojunction AlGaAs/GaAs diode in fig. 1 includes a substrate layer, a GaAs buffer layer, a first Si-doped GaAs layer, a second Si-doped GaAs layer, a GaAs intrinsic layer, and Be or C-doped Al0.09Ga0.91An As layer and a Be or C doped GaAs layer;
a substrate layer, a GaAs buffer layer, a first Si-doped GaAs layer, a second Si-doped GaAs layer, a GaAs intrinsic layer, and Be or C-doped Al0.09Ga0.91As layer and doped Be orThe GaAs layers of C are sequentially laminated and connected.
In the embodiment of the application, the thickness of the GaAs buffer layer is 200-0.09Ga0.91The thickness of the As layer is 150-200nm, and the thickness of the GaAs layer doped with Be or C is 50-100 nm.
In the embodiment of the present application, the concentration of Si in the first Si-doped GaAs layer is 5E18cm-3Forming a highly doped N + layer, the concentration of Si in the second Si-doped GaAs layer being 3E17cm-3Forming a low doped N layer, Al doped with Be or C0.09Ga0.91The concentration of Be or C in the As layer is 5E18cm-3Forming a P + layer, wherein the concentration of Be or C in the Be or C doped GaAs layer is 3E19cm-3Forming a highly doped P layer, wherein the GaAs intrinsic layer is the heterojunction Al provided by the embodiment of the application0.09Ga0.91And the I layer of the diode with the As/GaAs PIN structure.
In the embodiment of the application, the substrate layer may be made of single crystal GaAs.
In the embodiment of the application, the GaAs buffer layer, the first Si-doped GaAs layer (highly doped N + layer), the second Si-doped GaAs layer (lowly doped N layer), the GaAs intrinsic layer, and Be or C-doped Al0.09Ga0.91The As layer and the GaAs layer doped with Be or C are both prepared by adopting a chemical vapor deposition or molecular beam epitaxy technology.
The heterojunction AlGaAs/GaAs diode provided by the embodiment of the application can not change the isolation degree under the condition of reducing the insertion loss of materials. The P + region AlGaAs has a larger forbidden band than the I region GaAs, and the energy band bends when a heterojunction is formed. When the heterojunction diode material is forward biased, the barrier for holes from the P + region to the I region will be lower than the barrier for electrons from the I region to the P + region, increasing the hole to electron injection ratio and thus its insertion loss. When the diode material is reverse biased, the conductivity of the I region and the dielectric constant of the material are not changed, and the isolation degree is the same as that of the GaAs homojunction. The thickness of the I layer simultaneously influences the forward on-resistance, the reverse equivalent capacitance and the breakdown voltage, and the thickness of the I layer with the optimized structure has smaller insertion loss and certain voltage endurance capability in application.
In the heterojunction AlGaAs/GaAs diode provided by the embodiment of the application, the optimization of the Al component and the thickness of the GaAs intrinsic layer enables the diode to further reduce the on-resistance of the material and keep the larger voltage-resisting capability, and meanwhile, the diode is doped with Be or C Al0.09Ga0.91The GaAs layer doped with Be or C at high concentration is added on the As layer, so that ohmic contact resistance can Be effectively reduced, the insertion loss of the diode is reduced, and the radio frequency performance of the diode material can Be effectively improved.
Another aspect of the present application provides a method for fabricating a heterojunction AlGaAs/GaAs diode, where fig. 2 is a schematic flow chart of the fabrication method, and the method includes the following steps:
s1, obtaining a substrate layer; the substrate layer can be made of single crystal GaAs.
S2, preparing and forming a GaAs buffer layer on the substrate layer; wherein the thickness of the GaAs buffer layer is 200-1000nm,
s3, preparing and forming a first Si-doped GaAs layer on the GaAs buffer layer to form a highly doped N + layer; the thickness of the first Si-doped GaAs layer is 500-1000nm, and the concentration of Si in the first Si-doped GaAs layer is 5E18cm-3And forming a highly doped N + layer.
S4, preparing and forming a second Si-doped GaAs layer on the first Si-doped GaAs layer; the thickness of the second Si-doped GaAs layer is 100-300nm, and the concentration of Si in the second Si-doped GaAs layer is 3E17cm-3And forming a low-doped N layer.
S5, preparing and forming a GaAs intrinsic layer on the second Si-doped GaAs layer; the thickness of the GaAs intrinsic layer is 900-1500 nm.
S6 preparation of Be or C doped Al on GaAs intrinsic layer0.09Ga0.91An As layer; be or C doped Al0.09Ga0.91The thickness of the As layer is 150-200nm, and the Al doped with Be or C0.09Ga0.91The concentration of Be or C in the As layer is 5E18cm-3Form P-type Al0.09Ga0.91A layer of an organic material selected from the group consisting of,
s7 Al doped with Be or C0.09Ga0.91And preparing a GaAs layer for forming doping Be or C on the As layer. The thickness of the Be or C doped GaAs layer is 50-100nm, and the concentration of Be or C in the Be or C doped GaAs layer is 3E19cm-3Forming a highly doped P-type GaAs layer
In the embodiment of the application, the GaAs buffer layer, the first Si-doped GaAs layer (highly doped N + layer), the second Si-doped GaAs layer (lowly doped N layer), the GaAs intrinsic layer, and Be or C-doped Al0.09Ga0.91The As layer and the GaAs layer doped with Be or C are both prepared by adopting a chemical vapor deposition or molecular beam epitaxy technology.
Based on the above scheme, a specific embodiment of a preparation method of the heterojunction AlGaAs/GaAs diode is described below by way of example.
Example 1:
selecting a single crystal of a GaAs material as a substrate layer to ensure surface cleanness;
growing undoped GaAs of 800nm on the substrate layer to form a GaAs buffer layer;
growing 900nm of Si-doped GaAs on the GaAs buffer layer to form a highly doped N + layer;
growing 200nm of Si-doped GaAs on the first Si-doped GaAs layer to form a low-doped N layer;
growing 1200nm undoped GaAs on the second Si-doped GaAs layer to form a GaAs intrinsic layer;
growing 160nm Be-doped Al on GaAs intrinsic layer0.09Ga0.91An As layer;
in Al doped with Be or C0.09Ga0.91And growing a 50nm Be-doped GaAs layer on the As layer.
The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the protection scope of the present application.
Claims (10)
1. A heterojunction AlGaAs/GaAs diode is characterized by comprising a substrate layer, a GaAs buffer layer, a first Si-doped GaAs layer, a second Si-doped GaAs layer, a GaAs intrinsic layer, and Be or C-doped Al0.09Ga0.91An As layer and a Be or C doped GaAs layer;
the substrate layer, the GaAs buffer layer, the first Si-doped GaAs layer, the second Si-doped GaAs layer, the GaAs intrinsic layer, the Be-or C-doped Al0.09Ga0.91The As layer and the Be or C doped GaAs layer are sequentially connected in a laminated manner;
the thickness of the GaAs intrinsic layer is 900-1500 nm.
2. The AlGaAs/GaAs heterojunction diode as claimed in claim 1 wherein the GaAs buffer layer has a thickness of 200-1000nm, the first Si-doped GaAs layer has a thickness of 500-1000nm, the second Si-doped GaAs layer has a thickness of 100-300nm, and the Be or C doped Al is0.09Ga0.91The thickness of the As layer is 150-200nm, and the thickness of the Be or C doped GaAs layer is 50-100 nm.
3. The heterojunction AlGaAs/GaAs diode of claim 1, wherein the concentration of Si in the first Si-doped GaAs layer is 5E18cm-3The concentration of Si in the second Si-doped GaAs layer is 3E17cm-3Said Be or C doped Al0.09Ga0.91The concentration of Be or C in the As layer is 5E18cm-3The concentration of Be or C in the Be or C doped GaAs layer is 3E19cm-3。
4. The heterojunction AlGaAs/GaAs diode of claim 1, wherein the material of the substrate layer comprises single crystal GaAs.
5. The heterojunction AlGaAs/GaAs diode of claim 1, wherein said GaAs buffer layer, first Si-doped GaAs layer, said second Si-doped GaAs layer, said GaAs intrinsic layer, said Be-or C-doped Al0.09Ga0.91The As layer and the GaAs layer doped with Be or C are both prepared by adopting a chemical vapor deposition or molecular beam epitaxy technology.
6. A preparation method of a heterojunction AlGaAs/GaAs diode is characterized by comprising the following steps:
obtaining a substrate layer;
preparing and forming a GaAs buffer layer on the substrate layer;
preparing and forming a first Si-doped GaAs layer on the GaAs buffer layer;
preparing and forming a second Si-doped GaAs layer on the first Si-doped GaAs layer;
preparing and forming a GaAs intrinsic layer on the second Si-doped GaAs layer; the thickness of the GaAs intrinsic layer is 900-1500 nm;
preparing and forming Be or C doped Al on the GaAs intrinsic layer0.09Ga0.91An As layer;
in the Al doped with Be or C0.09Ga0.91And preparing a GaAs layer for forming doping Be or C on the As layer.
7. The method for preparing the heterojunction AlGaAs/GaAs diode as claimed in claim 6, wherein the GaAs buffer layer has a thickness of 200-1000nm, the first Si-doped GaAs layer has a thickness of 500-1000nm, the second Si-doped GaAs layer has a thickness of 100-300nm, and the Be or C doped Al is0.09Ga0.91The thickness of the As layer is 150-200nm, and the thickness of the Be or C doped GaAs layer is 50-100 nm.
8. The method of fabricating a heterojunction AlGaAs/GaAs diode of claim 6, wherein the concentration of Si in said first Si-doped GaAs layer is 5E18cm-3The concentration of Si in the second Si-doped GaAs layer is 3E17cm-3Said Be or C doped Al0.09Ga0.91The concentration of Be or C in the As layer is 5E18cm-3The concentration of Be or C in the Be or C doped GaAs layer is 3E19cm-3。
9. The method of fabricating a heterojunction AlGaAs/GaAs diode according to claim 6, wherein the material of the substrate layer includes single crystal GaAs.
10. The method of fabricating a heterojunction AlGaAs/GaAs diode of claim 6, wherein said GaAs buffer layer, said first Si-doped GaAs layer, said second Si-doped GaAs layer, said GaAs intrinsic layer, said Be-or C-doped Al0.09Ga0.91The As layer and the GaAs layer doped with Be or C are both prepared by adopting a chemical vapor deposition or molecular beam epitaxy technology.
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