CN111276451A - Chip packaging structure, packaging assembly and packaging method - Google Patents

Abstract

The invention discloses a chip packaging structure, a chip packaging assembly and a chip packaging method, wherein the packaging structure comprises a substrate, a chip, a ball planting layer and a glue layer, wherein the substrate comprises a first surface and a second surface which are oppositely arranged, and the first surface and the second surface are continuous surfaces; the chip is fixed on the second surface and comprises a functional surface and a back surface which are oppositely arranged, and the functional surface faces the second surface; the planting balls are positioned on the second surface; the adhesive layer covers the second surface and the back surface and exposes the planting balls. The back surface of the chip is covered with the adhesive layer, the planting balls are exposed outside the adhesive layer, the electrical connection between the planting balls and an external circuit board can be conveniently realized, meanwhile, the adhesive layer is arranged on the surface of one side of the chip, which is far away from the substrate, when the packaging structure and the external circuit board are mutually assembled, the heat of the chip can be conducted to the adhesive layer, the heat dissipation of the chip can be accelerated through the adhesive layer, and the heat dissipation performance of the packaging structure is greatly improved.

Description

Chip packaging structure, packaging component and packaging method

technical field

The present invention relates to the technical field of chip packaging, in particular to a chip packaging structure, a packaging component and a packaging method.

Background technique

With the continuous development of science and technology, more and more electronic devices are widely used in people's daily life and work, which has brought great convenience to people's daily life and work, and has become an indispensable and important part of today's people. tool.

The main component of electronic equipment to achieve preset functions is the chip. With the continuous advancement of integrated circuit technology, the integration of the chip is getting higher and higher, the function of the chip is getting more and more powerful, and the size of the chip is getting smaller and smaller, so the chip needs A package structure is formed by packaging, so that the chip is electrically connected to an external circuit board.

In the prior art, when the chip and the external circuit board are electrically connected, heat is conducted through the air between the two, and the heat dissipation performance is poor.

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a chip packaging structure, a packaging component and a packaging method which can improve the heat dissipation performance.

To achieve one of the above purposes of the invention, an embodiment of the present invention provides a chip packaging structure, including:

a substrate, the substrate includes a first surface and a second surface disposed oppositely, and both the first surface and the second surface are continuous surfaces;

a chip fixed on the second surface, the chip includes a functional surface and a back surface arranged oppositely, and the functional surface faces the second surface;

balls on the second surface;

Covering the second surface and the back surface and exposing the glue layer of the ball-mounting.

As a further improvement of an embodiment of the present invention, the substrate is a transparent substrate.

As a further improvement of an embodiment of the present invention, the second surface is provided with a light-transmitting area and a first connecting area, the functional surface is provided with a sensing area and a second connecting area, and the sensing area corresponds to the light-transmitting area It is arranged that the second connection area is connected to the first connection area.

As a further improvement of an embodiment of the present invention, the ball-mounting includes a first end and a second end disposed opposite to each other, the first end is electrically connected to the first connection region, and the second end is compared with the second end. The back surface is away from the second surface.

As a further improvement of an embodiment of the present invention, the adhesive layer covers the chip and the ball placement, and the second end and the end surface of the adhesive layer away from the second surface are flush with each other.

As a further improvement of an embodiment of the present invention, there is a cavity between the sensing area and the light-transmitting area.

As a further improvement of an embodiment of the present invention, the transparent substrate includes a first portion corresponding to the light-transmitting region and a second portion corresponding to the first connecting region, and the thickness of the first portion is equal to the thickness of the second portion. thickness.

As a further improvement of an embodiment of the present invention, the first connection region includes a redistribution layer.

As a further improvement of an embodiment of the present invention, a protective layer is provided between the second surface and the redistribution layer.

As a further improvement of an embodiment of the present invention, the package structure further includes an encapsulant for connecting the side edge of the chip and the second surface.

As a further improvement of an embodiment of the present invention, the chip is an image sensor chip.

In order to achieve one of the above objectives of the present invention, an embodiment of the present invention provides a package assembly, including the package structure described in any one of the above technical solutions and a circuit board, wherein the ball mount is electrically connected to the circuit board.

To achieve one of the above purposes of the invention, an embodiment of the present invention provides a method for packaging a chip, comprising the steps of:

A plurality of substrates distributed in an array are defined on the base, and there are cutting channels between adjacent substrates;

the functional surface of the fixed chip and the second surface of the substrate, and the second surface is a continuous surface;

forming balls on the second surface;

forming an adhesive layer covering the second surface and the back surface of the chip away from the functional surface and exposing the ball-mounting;

The substrate is divided based on the dicing trenches to form a plurality of single-chip package structures.

As a further improvement of an embodiment of the present invention, the substrate is a transparent substrate, and the step: "fixing the functional surface of the chip and the second surface of the substrate" specifically includes:

connecting the second connection area at the functional surface and the first connection area at the second surface, so that the sensing area at the functional surface corresponds to the light-transmitting area at the second surface;

An encapsulant for connecting the side edge of the chip and the second surface is formed.

As a further improvement of an embodiment of the present invention, "form bumping on the second surface; form an adhesive layer covering the second surface and the back side of the chip away from the functional surface and exposing the bumping "Includes:

forming balls in the first connection area, and one end of the balls away from the first connection area protrudes out of the back surface;

forming an adhesive layer covering the second surface and the back surface of the chip away from the functional surface;

The adhesive layer is ground to expose the ball mount, and the adhesive layer covers the backside.

As a further improvement of an embodiment of the present invention, before the step "fixing the functional surface of the chip and the second surface of the substrate", the step further includes:

A protective layer and a redistribution layer are sequentially formed on the second surface of the substrate.

In order to achieve one of the above purposes of the invention, an embodiment of the present invention provides a packaging method for packaging components, including the steps:

Provide the packaging structure obtained by the packaging method described in any one of the above technical solutions;

Solder the ball mount and the circuit board.

Compared with the prior art, the beneficial effect of the present invention is that: the backside of the chip in an embodiment of the present invention is covered with an adhesive layer, and the mounting ball is exposed outside the adhesive layer, which can facilitate the realization of electrical properties between the mounting ball and the external circuit board At the same time, the surface of the chip away from the substrate is provided with an adhesive layer. When the package structure and the external circuit board are assembled with each other, the heat of the chip can be conducted to the adhesive layer, and the heat dissipation of the chip can be accelerated through the adhesive layer. There is an air heat conduction method in the art, and the heat dissipation performance of the package structure can be greatly improved by the adhesive layer in this embodiment.

Description of drawings

1 is a schematic diagram of a package structure according to an embodiment of the present invention;

2 is a schematic diagram of a package assembly according to an embodiment of the present invention;

3 is a step diagram of a packaging method according to an embodiment of the present invention;

4 to 12 are schematic diagrams of various steps of a packaging method according to an embodiment of the present invention.

Detailed ways

The present invention will be described in detail below with reference to the specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present invention, and structural, method, or functional changes made by those skilled in the art according to these embodiments are all included in the protection scope of the present invention.

In various drawings of the present invention, some dimensions of structures or parts are exaggerated relative to other structures or parts for convenience of illustration, and thus, are only used to illustrate the basic structure of the subject matter of the present invention.

1 is a schematic diagram of a package structure 100 of a chip according to an embodiment of the present invention.

The package structure 100 includes a substrate 10 , a chip 11 , a ball mount 12 and an adhesive layer 13 .

The substrate 10 includes a first surface 101 and a second surface 102 disposed opposite to each other, and both the first surface 101 and the second surface 102 are continuous surfaces.

Here, "both the first surface 101 and the second surface 102 are continuous surfaces" means that there is no cavity structure penetrating the first surface 101 and the second surface 102 on the substrate 10, and the first surface 101 and the second surface 102 are both full face.

The chip 11 is fixed on the second surface 102 . The chip 11 includes a functional surface 111 and a back surface 112 disposed opposite to each other, and the functional surface 111 faces the second surface 102 .

The ball mount 12 is located on the second surface 102 .

The adhesive layer 13 covers the second surface 102 and the back surface 112 and exposes the ball mount 12 .

Here, the adhesive layer 13 may be an injection molding compound formed by an injection molding process, or the adhesive layer 13 may be a thermally conductive adhesive, and the material of the adhesive layer 13 may be determined according to actual conditions.

It should be noted that "the chip 11 is fixed on the second surface 102" means that the chip 11 is located on one side of the second surface 102 of the substrate 10, and the chip 11 and the second surface 102 may be directly connected or indirectly connected. Similarly Yes, "the ball-mounted 12 is located on the second surface 102" means that the ball-mounted 12 is located on one side of the second surface 102 of the substrate 10, and the ball-mounted 12 and the second surface 102 may be directly connected or indirectly connected, in other words In other words, the connection or fixation of one component to another component in this embodiment refers to the direct connection or indirect connection between the two components.

The backside 112 of the chip 11 in this embodiment is covered with the adhesive layer 13, and the mounting ball 12 is exposed outside the adhesive layer 13, which can facilitate the electrical connection between the mounting ball 12 and an external circuit board (such as a PCB board). 11. An adhesive layer 13 is provided on the side surface (ie the back side 112) away from the substrate 10. When the package structure 100 and the external circuit board are assembled with each other, the heat of the chip 11 can be conducted to the adhesive layer 13, and the chip can be accelerated through the adhesive layer 13. For the heat dissipation of 11 , compared with the air heat conduction method in the prior art, the adhesive layer 13 in this embodiment can greatly improve the heat dissipation performance of the package structure 100 .

In this embodiment, the substrate 10 is a transparent substrate 10, the chip 11 is an image sensor chip, the external light directly reaches the functional surface 111 of the chip 11 through the transparent substrate 10, and then the chip 11 transmits the acquired signal to the external circuit plate.

The second surface 102 of the transparent substrate 10 is provided with a light-transmitting region 1021 and a first connecting region 1022. The transparent substrate 10 includes a first portion 103 corresponding to the light-transmitting region 1021 and a second portion 104 corresponding to the first connecting region 1022. The first portion 103 The thickness of the transparent substrate 10 is equal to the thickness of the second portion 104 , that is, the transparent substrate 10 is a solid substrate, and the transparent substrate 10 does not include a cavity structure.

The functional surface 111 is provided with a sensing area 111a and a second connecting area 111b, the sensing area 111a is disposed corresponding to the light-transmitting area 1021, and the second connecting area 111b is connected to the first connecting area 1022, so that the chip 11 and the transparent substrate 10 can be fixed.

Here, the second connection area 111b includes a connection terminal 1111b, and the connection terminal 1111b and the first connection area 1022 are connected to each other. At this time, there is a cavity S with a smaller size between the sensing area 111a and the light-transmitting area 1021 to avoid the light-transmitting area. 1021 is in direct contact with the sensing area 111a, resulting in damage to the sensing area 111a, thereby affecting the sensing effect of the chip 11.

The chip 11 of this embodiment is directly disposed on the second surface 102 of the transparent substrate 10 . Compared with some prior art packaging structures in which a cavity and a transparent cover are provided on the substrate, this embodiment can greatly reduce the cost of the entire packaging structure 100 . The overall thickness of the package structure 100 can be miniaturized. At the same time, at this time, there is only a cavity S with a small size between the sensing area 111a of the chip 11 and the light-transmitting area 1021 of the transparent substrate 10, and the duty ratio of the cavity is greatly increased. reduce the size of the cavity to avoid the impact on the overall rigidity and reliability of the package structure 100 .

In addition, the package structure 100 further includes an encapsulant 14 connecting the side edge of the chip 11 and the second surface 102 , so that the stability of the chip 11 and the transparent substrate 10 can be improved.

Continuing with reference to FIG. 1 , in this embodiment, the ball mounting 12 includes a first end 121 and a second end 122 disposed opposite to each other, the first end 121 is electrically connected to the first connection region 1022 , and the ball mounting 12 is a solder ball.

When the package structure 100 and the external circuit board are assembled with each other, the electrical connection between the package structure 100 and the external circuit board is realized by the soldering and fixing of the ball mount 12 and the external circuit board. The first connection area 1022 is electrically connected, and the ball mount 12 and the connection terminal 1111b are electrically connected to each other. At this time, the signal obtained by the chip 11 can be transmitted to the external circuit board.

Here, the first connection region 1022 includes the redistribution layer 1022, that is, the package structure 100 of this embodiment is a fan-out package structure.

Specifically, the first connection region 1022 includes a protective layer 1023 , a redistribution layer 1022 and a solder resist layer 1024 that are sequentially connected to the second surface 102 , the connection terminal 1111 b of the chip 11 is electrically connected to the redistribution layer 1022 , and the first The terminal 121 is electrically connected to the solder resist layer 1024 , and the encapsulant 14 is connected to the redistribution layer 1022 .

The thermal expansion coefficient of the protective layer 1023 can be between the transparent substrate 10 and the redistribution layer 1022, but not limited thereto. The disposition of the protective layer 1023 can prevent the redistribution layer 1022 and the transparent substrate 10 from being separated from each other under stress, and The size of the cavity S in this embodiment is small, and the overall rigidity of the package structure 100 is relatively strong, which can further prevent the redistribution layer 1022 from being separated from the transparent substrate 10 under the action of stress.

In addition, the package structure 100 of this embodiment further includes a metal layer 1025 connecting the protective layer 1023 and the redistribution layer 1022 , and the metal layer 1025 can prevent the encapsulant 14 from entering the sensing area 111 a of the chip 11 .

In this embodiment, the second end 122 of the ball mount 12 is farther from the second surface 102 than the back surface 112 of the chip 11 , that is, in the first direction X, the height of the mount ball 12 is greater than the thickness of the chip 11 , In this way, it is convenient to realize the electrical connection between the package structure 100 and the external circuit board through the ball mounting 12, so as to avoid damage to the chip 11 during the soldering process. Here, the first direction X is defined as the first surface 101 of the substrate 10 facing the second surface. 102 direction (ie vertical direction).

In addition, the adhesive layer 13 covers the chip 11 and the ball mounting 12, and the second end 122 and the end surface 131 of the adhesive layer 13 away from the second surface 102 are flush with each other. 12, and then the ball-mounting 12 is exposed through a grinding process, and the second end 122 and the end surface 131 are flush with each other, but not limited thereto.

The adhesive layer 13 of this embodiment not only covers the backside 112 of the chip 11 , but also fills the gap between the balls 12 and the chip 11 , so that the heat of the chip 11 can pass through the encapsulant 14 , the adhesive layer 13 and the The adhesive layer 13 on the back surface 112 of the chip 11 realizes heat dissipation, which can further improve the heat dissipation effect of the chip 11 .

Referring to FIG. 2 , an embodiment of the present invention further provides a package assembly 200 .

The package assembly 200 includes the package structure 100 and the circuit board 300 as described above. The mounting balls 12 are electrically connected to the circuit board 300 , and the circuit board 300 can be, for example, a PCB board.

It should be noted that, since the package structure 100 and the circuit board 300 are fixed by welding, there may be a certain gap between the end surface 131 of the adhesive layer 13 away from the second surface 102 and the circuit board 300. Of course, in other embodiments, During the soldering process, the adhesive layer 13 may also be slightly deformed to contact the circuit board 300 .

An embodiment of the present invention also provides a chip packaging method. With reference to FIGS. 3 to 12 , the packaging method includes the steps:

S1: Referring to FIG. 4, define a plurality of substrates 10 distributed in an array on the base, and have cutting channels between adjacent substrates 10;

Here, the substrate may be a wafer substrate, and a plurality of substrates 10 distributed in an array may be pre-divided on the substrate. The substrate 10 is a transparent substrate, and no cavity structure is formed on the substrate 10 .

S3: With reference to FIGS. 5 to 9, the functional surface 111 of the chip 11 and the second surface 102 of the substrate 10 are fixed, and the second surface 102 is a continuous surface;

Here, before step S3, it also includes steps:

Referring to FIG. 5 and FIG. 6 , a protective layer 1023 and a redistribution layer 1022 are sequentially formed on the second surface 102 of the substrate 10 .

Specifically, a protective layer 1023 can be coated on the substrate, and then the redistribution layer 1022 is formed by electroplating, photolithography, etc., and then, with reference to FIGS. 7 and 8 , a metal connecting the protective layer 1023 and the redistribution layer 1022 is formed layer 1025, and a solder mask layer 1024 under the redistribution layer 1022.

Step S3 specifically includes:

9, connect the second connection area 111b at the functional surface 111 and the first connection area 1022 at the second surface 102, and make the sensing area 111a at the functional surface 111 correspond to the light transmission area 1021 at the second surface 102;

The encapsulant 14 connecting the side edge of the chip 11 and the second surface 102 is formed.

Here, the chip 11 is an image sensor chip as an example, but it is not limited to this. The chip 11 and the substrate 10 can be connected by flip-chip. The first connection area 1022 includes a protective layer 1023, a redistribution layer 1022 and a solder resist Layer 1024, the second connection area 111b includes a connection terminal 1111b, the connection terminal 1111b is electrically connected to the redistribution layer 1022 on the second surface 102, and the encapsulant 14 is connected to the redistribution layer 1022. The stability of the mating of the substrate 10 .

S5: with reference to FIG. 10 , forming the balls 12 on the second surface 102;

S7: In combination with FIG. 11 and FIG. 12 , form the adhesive layer 13 covering the second surface 102 and the back surface 112 of the chip 11 away from the functional surface 111 and exposing the ball mount 12 ;

Here, steps S5 and S7 specifically include:

Referring to FIG. 10 , the ball mounting 12 is formed in the first connection area 1022 , and one end of the ball mounting 12 away from the first connection area 1022 protrudes out of the back surface 112 ;

Referring to FIG. 11 , an adhesive layer 13 covering the second surface 102 and the back surface 112 of the chip 11 away from the functional surface 111 is formed;

Referring to FIG. 12 , the adhesive layer 13 is ground to expose the bump 12 , and the adhesive layer 13 covers the backside 112 .

The bonding layer 13 can be formed by an injection molding process. The bonding layer 13 not only covers the back surface 112 of the chip 11, but also fills the gap between the bonding ball 12 and the chip 11. During the grinding process, it can be simultaneously Grinding off part of the adhesive layer 13 and the mounting ball 12, in this way, the mounting ball 12 can be exposed, and the end of the mounting ball 12 away from the second surface 102 and the end face 131 of the adhesive layer 13 away from the second surface 102 are flush with each other, and at the same time, It is ensured that the backside 112 of the chip 11 still has a sufficient thickness of the adhesive layer 13 after grinding.

S9: Divide the substrate based on the dicing trenches to form a plurality of single-chip packaging structures 100 .

It can be understood that, when the package assembly 200 as described above is to be formed, the following steps are included after step S9:

Solder the ball mount 12 and the circuit board 300 .

Here, soldering pads may be formed on the circuit layer of the circuit board 300 , and the electrical connection between the ball mount 12 and the circuit board 300 may be realized by a fusion soldering process.

To sum up, the backside 112 of the chip 11 in this embodiment is covered with the adhesive layer 13, and the mounting ball 12 is exposed outside the adhesive layer 13, which can facilitate the electrical connection between the mounting ball 12 and the external circuit board. 11. An adhesive layer 13 is provided on the side surface (ie the back side 112) away from the substrate 10. When the package structure 100 and the external circuit board are assembled with each other, the heat of the chip 11 can be conducted to the adhesive layer 13, and the chip can be accelerated through the adhesive layer 13. For the heat dissipation of 11 , compared with the air heat conduction method in the prior art, the adhesive layer 13 in this embodiment can greatly improve the heat dissipation performance of the package structure 100 .

For other descriptions of the packaging method in this embodiment, reference may be made to the description of the packaging structure described above, which will not be repeated here.

It should be understood that although this specification is described in terms of embodiments, not each embodiment only includes an independent technical solution. This description in the specification is only for the sake of clarity, and those skilled in the art should take the specification as a whole, and each The technical solutions in the embodiments can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

The series of detailed descriptions listed above are only specific descriptions for the feasible embodiments of the present invention, and they are not used to limit the protection scope of the present invention. Changes should all be included within the protection scope of the present invention.

Claims (17)

1. A chip package structure, comprising:

the substrate comprises a first surface and a second surface which are oppositely arranged, and the first surface and the second surface are continuous surfaces;

the chip is fixed on the second surface and comprises a functional surface and a back surface which are oppositely arranged, and the functional surface faces the second surface;

the ball planting is positioned on the second surface;

and the adhesive layer covers the second surface and the back surface and exposes the planting balls.

2. The package structure of claim 1, wherein the substrate is a transparent substrate.

3. The package structure of claim 2, wherein the second surface has a transparent area and a first connection area, the functional surface has a sensing area and a second connection area, the sensing area is disposed corresponding to the transparent area, and the second connection area is connected to the first connection area.

4. The package structure of claim 3, wherein the ball mount includes a first end and a second end opposite to each other, the first end is electrically connected to the first connection region, and the second end is far away from the second surface than the back surface.

5. The package structure according to claim 4, wherein the adhesive layer covers the chip and the solder balls, and the second end and an end surface of the adhesive layer away from the second surface are flush with each other.

6. The package structure of claim 3, wherein a cavity is located between the sensing region and the transparent region.

7. The package structure of claim 3, wherein the transparent substrate comprises a first portion corresponding to the light-transmissive region and a second portion corresponding to the first connection region, and a thickness of the first portion is equal to a thickness of the second portion.

8. The package structure of claim 3, wherein the first connection region comprises a redistribution layer.

9. The package structure of claim 8, wherein a protective layer is between the second surface and the redistribution layer.

10. The package structure of claim 1, further comprising an encapsulant connecting the side edges of the chip and the second surface.

11. The package structure of claim 1, wherein the chip is an image sensor chip.

12. A package assembly comprising the package structure of any one of claims 1-11 and a circuit board, wherein the solder balls are electrically connected to the circuit board.

13. A method for packaging a chip, comprising the steps of:

defining a plurality of substrates distributed in an array on the base, wherein cutting channels are arranged between adjacent substrates;

fixing a functional surface of a chip and a second surface of the substrate, wherein the second surface is a continuous surface;

forming a ball implant on the second surface;

forming an adhesive layer which covers the second surface and the back surface of the chip far away from the functional surface and exposes the planting balls;

and dividing the substrate based on the cutting channels to form a plurality of single-grain packaging structures.

14. The method of claim 13, wherein the substrate is a transparent substrate, and the step of: the "functional surface for fixing the chip and the second surface of the substrate" specifically includes:

connecting a second connecting area at the functional surface with a first connecting area at the second surface, and enabling the sensing area at the functional surface to correspond to the light-transmitting area at the second surface;

and forming packaging glue for connecting the side edge of the chip and the second surface.

15. The method of claim 14, wherein the solder balls are formed on the second surface; forming a glue layer covering the second surface and the back surface of the chip far away from the functional surface and exposing the planting balls specifically comprises:

forming a ball-planting on the first connection region, wherein one end of the ball-planting far away from the first connection region protrudes out of the back surface;

forming a glue layer covering the second surface and the back surface of the chip far away from the functional surface;

and grinding the adhesive layer to expose the planting balls, wherein the adhesive layer covers the back surface.

16. The method for packaging according to claim 13, wherein the step of "fixing the functional surface of the chip and the second surface of the substrate" further comprises the steps of:

and sequentially forming a protective layer and a redistribution layer on the second surface of the substrate.

17. A method of packaging a package assembly, comprising the steps of:

providing a packaging structure obtained by the packaging method according to any one of claims 13 to 16;

and welding the planting balls and the circuit board.

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