CN111522384B - A sample-and-hold ultra-low power bandgap reference circuit - Google Patents
A sample-and-hold ultra-low power bandgap reference circuit Download PDFInfo
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- CN111522384B CN111522384B CN202010477732.5A CN202010477732A CN111522384B CN 111522384 B CN111522384 B CN 111522384B CN 202010477732 A CN202010477732 A CN 202010477732A CN 111522384 B CN111522384 B CN 111522384B
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- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
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Abstract
本发明公开了一种采样保持的超低功耗带隙基准电路，其包括采样保持基准电路、误差放大器、功率级电路、超低静态电压电流基准和低压保护模块，超低静态电压电流基准与低压保护模块，用于提供参考电压，误差放大器的电压输入端与采样保持基准电路的电压输出端连接，用于获取快速启动的基准电压，误差放大器的电压输入端的另一接口连接到输出电压的反馈网络，误差放大器的电压输出端与功率级电路连接，反馈网络的电压输出端与功率级电路的电压输出端连接，输出稳定的电压。本发明通过采样保持基准电路可以加快加快电路启动速度，在带隙基准关闭期间，可使基准电压保持在1.5%电压精度范围之内，兼顾了电压精度和静态电流，适用于超低功耗设计。
The present invention discloses a sample-and-hold ultra-low power bandgap reference circuit, which includes a sample-and-hold reference circuit, an error amplifier, a power stage circuit, an ultra-low static voltage and current reference, and a low-voltage protection module. The ultra-low static voltage and current reference and the low-voltage protection module are used to provide a reference voltage. The voltage input end of the error amplifier is connected to the voltage output end of the sample-and-hold reference circuit to obtain a reference voltage for rapid startup. Another interface of the voltage input end of the error amplifier is connected to a feedback network of the output voltage. The voltage output end of the error amplifier is connected to the power stage circuit. The voltage output end of the feedback network is connected to the voltage output end of the power stage circuit to output a stable voltage. The present invention can accelerate the circuit startup speed through the sample-and-hold reference circuit. During the period when the bandgap reference is closed, the reference voltage can be kept within a voltage accuracy range of 1.5%, taking into account voltage accuracy and static current, and is suitable for ultra-low power consumption design.
Description
Technical Field
The invention relates to the field of integrated circuit design, in particular to a sampling hold ultra-low power consumption band gap reference circuit.
Background
The age of handheld devices becoming more developed and more convenient, and low power consumption is a critical research topic for chip design. The band gap reference is used as a reference source reference circuit of the chip and is generally required to be started in a low-power consumption mode, so that the band gap reference circuit with ultra-low power consumption has important significance.
In the power management system of the chip, the accuracy requirement of the output voltage is high, and a high-accuracy voltage reference is needed. The ultra-low power consumption voltage reference has poorer precision compared with the common power consumption voltage reference. Under the high temperature condition, the leakage current of the transistor is increased to the nanoampere level sharply, so that the leakage current seriously affects the precision of the ultra-low power consumption voltage reference. Under the high temperature condition, the ultra-low power consumption voltage reference precision is difficult to ensure. Another problem with ultra low power consumption voltage references is the weak noise immunity. For example, a typical quiescent current is a voltage reference of 100nA, with a loop unity gain bandwidth of about a few kHz, and a power management system that is noisy due to periodic power switching. As shown in fig. 1, the voltage reference is connected to the error amplifier input of the power supply system, and the other end of the error amplifier input is connected to the feedback network of the output voltage. Because of the influence of the error amplifier input on the parasitic capacitance of the tube, the disturbance of the feedback voltage can bring about larger noise interference. For the ultra-low power consumption voltage reference or the ultra-low power consumption voltage buffer circuit, because the loop bandwidth and the adjustment capability are limited, the interference noise can bring about larger voltage fluctuation, and the kickback noise can influence the voltage reference precision and other circuit modules.
Disclosure of Invention
In order to solve the defects of the technology, the invention provides the sample-hold ultra-low power consumption band-gap reference circuit which can obtain higher-precision reference voltage and reduce average quiescent current.
The technical scheme adopted by the invention for realizing the technical effects is as follows:
The ultra-low power consumption band gap reference circuit comprises a sampling and holding reference circuit, an error amplifier, a power stage circuit, an ultra-low static voltage current reference and a low voltage protection module, wherein the ultra-low static voltage current reference is connected with the low voltage protection module and is used for providing reference voltage, the voltage input end of the error amplifier is connected with the voltage output end of the sampling and holding reference circuit and is used for obtaining reference voltage which is started quickly, the other interface of the voltage input end of the error amplifier is connected to a feedback network for outputting voltage, the voltage output end of the error amplifier is connected with the power stage circuit, and the voltage output end of the feedback network is connected with the voltage output end of the power stage circuit and outputs stable voltage.
Preferably, in the sample-and-hold ultra-low power consumption bandgap reference circuit, the sample-and-hold reference circuit includes a sample-and-hold circuit and a fast-start bandgap reference circuit, the fast-start bandgap reference circuit is connected with the sample-and-hold circuit, and the sample-and-hold circuit is connected with a voltage input end of the error amplifier.
Preferably, in the sample-and-hold ultra-low power bandgap reference circuit, the bandgap reference output by the fast start bandgap reference circuit wakes up every 20ms, and is used for refreshing the reference voltage on the holding capacitor Chold in the sample-and-hold circuit.
Preferably, in the sample-and-hold ultra-low power bandgap reference circuit, during the bandgap reference off period, the holding capacitor Chold in the sample-and-hold circuit uses a 20pF capacitor for maintaining the reference voltage within the 1.5% voltage accuracy range.
Preferably, in the sample-and-hold ultra-low power bandgap reference circuit, when the voltage of the capacitor Cc in the fast-start bandgap reference circuit is too low, the gate of the transistor MN1 in the fast-start bandgap reference circuit is precharged by the ultra-low quiescent voltage current reference, and the transistor MN1 tube pulls up the capacitor Cc at start time by the transistor MN3 in the fast-start bandgap reference circuit.
Preferably, in the above sample-and-hold ultra-low power bandgap reference circuit, after the output voltage is stabilized, the sample-and-hold circuit uses a sampling time of 5us to refresh the reference voltage on the holding capacitor Chold in the sample-and-hold circuit.
The invention has the beneficial effects that the starting speed of the circuit can be accelerated through the sample hold reference circuit, the output band gap reference wakes up once every 20ms, the capacitor Chold is used for refreshing the reference voltage in the sample hold reference circuit, and the capacitor Chold can be kept within the voltage precision range of 1.5% by using the 20pF capacitor during the closing period of the band gap reference, thereby taking the voltage precision and the static current into consideration, and being suitable for ultra-low power consumption design.
Drawings
FIG. 1 is a schematic diagram of a kick noise disturbance path of a common voltage reference connected to a power supply system;
FIG. 2 is a block diagram of the present invention;
fig. 3 is a circuit diagram of a sample-and-hold reference circuit according to the present invention.
Detailed Description
For a further understanding of the invention, reference should be made to the drawings and to the following specific examples.
In the description of the present invention, it should be understood that the terms "upper," "lower," "front," "rear," "left," "right," "top," "bottom," "inner," "outer," and the like indicate or are based on the orientation or positional relationship shown in the drawings, merely to facilitate description of the present invention and to simplify the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention.
As shown in FIG. 2, the ultra-low power consumption band-gap reference circuit with sample and hold provided by the embodiment of the invention comprises a sample and hold reference circuit, an error amplifier, a power stage circuit, an ultra-low static voltage current reference and a low voltage protection module. The ultra-low static voltage current reference and low voltage protection module is used for providing reference voltage. The voltage input end of the error amplifier is connected with the voltage output end of the sampling and holding reference circuit and is used for acquiring the reference voltage for quick starting. The other interface of the voltage input end of the error amplifier is connected to the feedback network of the output voltage, and the voltage output end of the error amplifier is connected with the power stage circuit. The voltage output end of the feedback network is connected with the voltage output end of the power stage circuit and outputs stable voltage.
Further in the preferred embodiment of the present invention, as shown in fig. 2, the sample-and-hold reference circuit comprises a sample-and-hold circuit and a fast-start bandgap reference circuit, the fast-start bandgap reference circuit being connected to the sample-and-hold circuit, the sample-and-hold circuit being connected to the voltage input of the error amplifier. As shown in fig. 3, the bandgap reference output by the fast-start bandgap reference circuit wakes up every 20ms for refreshing the reference voltage on the holding capacitor Chold in the sample-and-hold circuit. During the bandgap reference off period, the holding capacitor Chold in the sample-and-hold circuit uses a 20pF capacitor to maintain the reference voltage within a 1.5% voltage accuracy range. When the voltage of the capacitor Cc in the fast-start bandgap reference circuit is too low, the gate of the transistor MN1 in the fast-start bandgap reference circuit is precharged with the ultra-low quiescent voltage current reference. Transistor MN1 transistor pulls up capacitor Cc quickly at start-up through transistor MN3 in the fast-start bandgap reference circuit. After the output voltage stabilizes, the sample-and-hold circuit uses a sampling time of 5us to refresh the reference voltage on the holding capacitor Chold in the sample-and-hold circuit.
As shown in fig. 2, the reference voltage of the error amplifier uses the voltage reference output by the fast-start bandgap reference circuit, and after the voltage reference is stable, the voltage reference is sampled onto the holding capacitor Chold by the sample-and-hold circuit. After the voltage reference sampling is completed, the voltage reference is turned off to save power consumption. The reference voltage of the error amplifier is the voltage after sampling and holding, so that the influence of kickback noise is eliminated. The ultra-low quiescent current voltage reference provides a reference voltage only to the relatively "quiet" low voltage protection module. By using the stable voltage reference output by the sample-and-hold reference circuit, the reference voltage with higher precision can be obtained, and the average quiescent current can be reduced.
Further, as shown in fig. 3, the sample-and-hold reference circuit is used to generate the output reference voltage of the PMF comparator, which needs to be kept present all the time since the reference voltage needs to be used in the sleep state. Although the quiescent current of the band gap reference with a common structure can achieve the nanoampere level, the layout area is large, and meanwhile, the precision is not high. The sample-hold reference circuit shown in fig. 3 combines voltage precision and quiescent current, and is suitable for ultra-low power consumption design. The bandgap reference output by the fast start bandgap reference circuit wakes up once for 20ms to refresh the reference voltage on the holding capacitor Chold. During the bandgap reference off period, the holding capacitor Chold uses a 20pF capacitor for maintaining the reference voltage within 1.5% voltage accuracy. When the 20ms timer is triggered, the bandgap reference circuit starts. In order to accelerate the starting speed of the circuit, when the voltage of the capacitor Cc is too low, since the circuit precharges the gate of the MN1, the MN1 pipe pulls up Cc rapidly during starting through the MN3, thereby accelerating the starting speed. The fast start bandgap reference is capable of achieving an output voltage to 1.5% accuracy within t1=20us, and after the output voltage stabilizes, the reference voltage on the holding capacitor Chold is refreshed using a sample time of t2=5us.
In summary, the invention can accelerate the circuit starting speed by the sample hold reference circuit, the output band gap reference wakes up once every 20ms, which is used for refreshing the reference voltage on the capacitor Chold in the sample hold reference circuit, and during the closing period of the band gap reference, the capacitor Chold can be kept within the voltage precision range of 1.5% by using the capacitor of 20pF, which gives consideration to the voltage precision and the quiescent current, and is suitable for the design of ultra-low power consumption.
The foregoing has shown and described the basic principles, principal features and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the foregoing embodiments, but rather, the foregoing embodiments and description illustrate the principles of the invention, and that various changes and modifications may be effected therein without departing from the spirit and scope of the invention as defined by the appended claims and their equivalents.
Claims (3)
1. The ultra-low power consumption band gap reference circuit is characterized by comprising a sampling and holding reference circuit, an error amplifier, a power stage circuit, an ultra-low static voltage and current reference and a low voltage protection module, wherein the ultra-low static voltage and current reference is connected with the low voltage protection module and used for providing reference voltage, the voltage input end of the error amplifier is connected with the voltage output end of the sampling and holding reference circuit and used for obtaining reference voltage which is started quickly, the other interface of the voltage input end of the error amplifier is connected to a feedback network for outputting voltage, the voltage output end of the error amplifier is connected with the power stage circuit, and the voltage output end of the feedback network is connected with the voltage output end of the power stage circuit and outputs stable voltage;
the sampling and holding reference circuit comprises a sampling and holding circuit and a fast-starting band-gap reference circuit, wherein the fast-starting band-gap reference circuit is connected with the sampling and holding circuit, and the sampling and holding circuit is connected with the voltage input end of the error amplifier;
When the voltage of a capacitor Cc in the fast-starting bandgap reference circuit is too low, the grid electrode of a transistor MN1 in the fast-starting bandgap reference circuit is precharged through the ultra-low static voltage current reference, and the transistor MN1 tube rapidly pulls up the capacitor Cc when in starting through a transistor MN3 in the fast-starting bandgap reference circuit;
After the output voltage stabilizes, the sample-and-hold circuit uses a sampling time of 5us to refresh the reference voltage on the holding capacitor Chold in the sample-and-hold circuit.
2. The sample-and-hold ultra-low power bandgap reference circuit of claim 1, wherein a bandgap reference output by said fast-start bandgap reference circuit wakes up every 20ms for refreshing a reference voltage on a holding capacitor Chold in said sample-and-hold circuit.
3. The sample-and-hold ultra-low power bandgap reference circuit of claim 1, wherein a holding capacitor Chold in said sample-and-hold circuit uses a 20pF capacitor for maintaining a reference voltage within a 1.5% voltage accuracy range during bandgap reference off.
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| CN202010477732.5A CN111522384B (en) | 2020-05-29 | 2020-05-29 | A sample-and-hold ultra-low power bandgap reference circuit |
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| CN202010477732.5A CN111522384B (en) | 2020-05-29 | 2020-05-29 | A sample-and-hold ultra-low power bandgap reference circuit |
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| CN111522384B true CN111522384B (en) | 2025-06-06 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114253339A (en) * | 2020-09-23 | 2022-03-29 | 圣邦微电子（北京）股份有限公司 | Band-gap reference voltage source circuit and method for reducing circuit power consumption thereof |
| CN115268540B (en) * | 2021-04-29 | 2023-08-11 | 圣邦微电子（北京）股份有限公司 | Band gap reference circuit with sampling and holding functions |
| CN114217661B (en) * | 2021-11-02 | 2023-07-04 | 深圳市创芯微微电子股份有限公司 | Ultra-low power consumption voltage reference circuit and electronic equipment |
| CN115016590A (en) * | 2022-06-12 | 2022-09-06 | 上海先积集成电路有限公司 | Low-power-consumption band-gap reference circuit of sample-and-hold structure and working method |
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| CN101178608A (en) * | 2007-12-07 | 2008-05-14 | 南京大学 | A Low Dropout Linear Regulator with Temperature Protection Circuit |
| CN211979539U (en) * | 2020-05-29 | 2020-11-20 | 杰创智能科技股份有限公司 | Ultra-low power consumption band gap reference circuit of sample hold |
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| JP2014089487A (en) * | 2011-02-18 | 2014-05-15 | Panasonic Corp | Power device unit |
| CN102662425B (en) * | 2012-06-07 | 2014-03-05 | 电子科技大学 | A Bandgap Reference Circuit Based on Digital Correction |
| CN102882482B (en) * | 2012-10-12 | 2016-01-13 | 西安三馀半导体有限公司 | Ultralow power consumption error amplifier |
| US9997254B2 (en) * | 2016-07-13 | 2018-06-12 | Nxp Usa, Inc. | Sample-and-hold circuit |
| US10719096B2 (en) * | 2016-08-26 | 2020-07-21 | Texas Instruments Incorporated | Circuit and method for generating a reference voltage with a voltage regulator and a sample and hold circuit |
| CN209182729U (en) * | 2019-01-14 | 2019-07-30 | 南开大学 | A Half-period Capacitance Ratio Programmable Bandgap Reference Circuit |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101178608A (en) * | 2007-12-07 | 2008-05-14 | 南京大学 | A Low Dropout Linear Regulator with Temperature Protection Circuit |
| CN211979539U (en) * | 2020-05-29 | 2020-11-20 | 杰创智能科技股份有限公司 | Ultra-low power consumption band gap reference circuit of sample hold |
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