CN111580790B - A Construction Method for Software Radar Middleware - Google Patents

Abstract

The invention provides a construction method for software-based radar middleware. The parallel computing middleware includes the steps of: basic function middleware construction steps, radar-specific function middleware construction steps, runtime function middleware construction steps, and real-time quality of service QOS middleware construction steps; wherein, the basic function middleware construction method utilizes a VSIPL program to construct a set of relatively complete basic mathematical function library; the function library provides a unified interface API to the upper layer, and has high performance and good portability and scalability. Using this method to develop the radar basic function library improves the development efficiency of radar application component developers; using the platform-independent standard interface API provided by VSIPL can ensure that the interface of the algorithm function on different platforms is fixed, and realizes writing once and running on multiple platforms.

Description

A Construction Method for Software Radar Middleware

technical field

The invention relates to software-based radar signal processing technology, in particular to polymorphic construction technology of middleware.

Background technique

"Software Defined Radar" (Software Defined Radar, SDR) is a new type of radar system with the characteristics of generalization and digitalization. It has an open architecture and can adapt to the development concept of "oriented to actual needs, with software technology as the core" to realize the expansion, update and upgrade of the system. Software-based radar adopts an open, universal, and standard architecture, supports software definition of radar functions, and greatly improves the combat performance, R&D quality, and R&D efficiency of radar equipment. It is an important development direction for future radars. The radar system has the characteristics of large data flow, intensive calculation, and high real-time requirements. In order to meet the above requirements, the computing unit of the traditional radar system adopts the mode of binding software and specific hardware and tightly coupling custom development, while the software-based radar adopts an open architecture and requires decoupling of software and hardware.

In recent years, parallelization and heterogeneity have become an important development trend of high-performance computing, and computing devices such as multi-core processors, heterogeneous processors, and accelerator cards are widely used in radar systems. With the rapid development of active digital phased array radars, synthetic aperture radars, and distributed array radars, the computing power requirements for radar systems have increased unprecedentedly. At the same time, the development trend of software, intelligence, and multi-functional integration requires the radar computing platform to have expandable and reconfigurable capabilities. Radar signal processing boards have generally adopted a parallel heterogeneous computing hardware architecture design consisting of a variety of processors, such as CPU general processors, digital signal processors DSP, field programmable gate arrays FPGAs, image processors GPUs, and system-on-chip SOCs. This hardware architecture design increases the difficulty of decoupling radar application software and hardware.

VSIPL (Vector Signal Image Processing Library) is an algorithm library that supports open source and C language specification and is developed for vector and signal processing. The VSIPL Alliance is responsible for developing this standard library. The organization defines an application program interface with a unified industry standard, which can support applications for vector, signal, and image processing in real-time embedded signal processing systems, and has the advantages of portability and high performance. Expenses, prolonging the software life cycle.

The patent (publication number is CN107153547A) proposes a software-based radar library mode signal middleware. The method includes: step 1, divide the signal processing middleware into basic component layer and functional component layer according to the mode of the library, and obtain the processing framework of the library mode signal processing middleware; step 2, in the processing framework, design the computing components in the basic component layer according to the radar characteristics; When the verification result meets the standard, proceed to step 5; step 5, use the radar to carry out experimental verification on the library mode signal processing middleware, and obtain the function and performance test results of the radar. Without adopting open system architecture engineering technology, the built radar signal library model middleware cannot be flexibly expanded based on this solution. Limited by the platform, the computing component uses the signal processing function library provided by NVIDIA, which is only applicable to the GPU produced by NVIDIA, and the function interface provided by the computing component does not have a unified standard.

The patent (publication number CN109101348A) proposes a radar signal processing cluster platform and an implementation method for easy expansion of software. The platform includes a VPX chassis, a switch module, a computing module, a switch plug-in module, and a data interface module. The middleware layer software is located between the system layer and the application layer and provides general services for the application layer. It has a general protocol stack and a standard program interface to realize decoupling of the system layer. The middleware layer includes communication middleware, algorithm middleware, and thread scheduling middleware. In the algorithm middleware, this solution simply explains that the algorithm middleware is used to provide the function interface of basic functions such as matrix operation, FFT, vector operation, IFFT, trigonometric function, etc., but the interface standard is not mentioned, and it is difficult to achieve generalization on many radar system platforms.

Contents of the invention

The technical problem to be solved by the present invention is to provide a basic function middleware construction method which has a uniform industrial standard VSIPL interface and can be adapted to various software-based radar hardware platforms.

The technical solution adopted by the present invention for solving the above-mentioned technical problems is a construction method for software-based radar middleware, and the setting of parallel computing middleware includes steps: basic function middleware construction steps, radar-specific function middleware construction steps, runtime function middleware construction steps and real-time quality of service QOS middleware construction steps;

Among them, the construction method of the basic function middleware specifically includes the following steps:

1) Use the VSIPL function to create a VSIPL block;

2) Create a view corresponding to the VSIPL block;

3) Create the object of the basic function;

4) Bind data to objects;

5) Put the VSIPL block into the VSIPL data space;

6) Call the function processing view of the VSIPL standard interface;

7) Replace the underlying implementation of the VSIPL function: first create a temporary interactive space inside the VSIPL function for data interaction, then read data from the VSIPL data space and put it in the temporary interactive space, and select a special library suitable for the current hardware platform to perform basic function calculations. After the calculation is completed, the calculation results are written back to the VSIPL data space. So far, the VSIPL standard unified interface has been implemented to package special libraries for different hardware platforms;

8) Delete the object and view of the basic function, release all resources, and end the entire VSIPL program.

Specifically, the basic functions include vectors, matrices, trigonometric functions, fast Fourier transform FFT, and the like.

A VSIPL block is a contiguous memory area that stores data in a VSIPL program;

The object is an abstract data type that stores the information needed by VSIPL to access the data array; the data group is the memory used for data storage;

A view consists of a VSIPL block of the data of interest and a view object, which stores the information that the VSIPL needs to access the data of interest.

The construction method of the present invention is universal, and the meaning of polymorphism can not only indicate the unification of special function library interfaces of different platforms, but also indicate that this construction method can be applied to other fields, such as image processing, machine learning, artificial intelligence and other fields.

Radar program developers can build a set of relatively complete basic mathematical function library by using the method of the invention; the function library provides a unified interface API to the upper layer, has high performance and good portability and scalability. Using this method to develop radar basic function library improves the development efficiency of radar application component developers. In addition, the design of the function library is versatile, not only can be used in the field of radar signal processing, but also applicable to other fields.

The beneficial effects of the present invention are:

(1) The basic function library encapsulated by the VSIPL unified industry standard API helps radar application developers to realize radar signal processing tasks more efficiently and conveniently, without spending time on complex function interfaces, and improves the development efficiency of radar application software;

(2) Using the platform-independent standard interface API provided by VSIPL can ensure that the interface of the algorithm function on different platforms is fixed, and realize writing once and running on multiple platforms.

Description of drawings

Fig. 1 is the construction process of the unified industry standard interface VSIPL program;

Fig. 2 A construction process of software-based radar basic function library polymorphism;

Figure 3 Parallel Computing Programming Model Framework;

Figure 4 is a comparison of serial calculations between the VSIPL native library and the VSIPL-encapsulated MKL library;

Figure 5 is a comparison of vector operations between the VSIPL native library and the VSIPL-encapsulated MKL library;

Figure 6 is a comparison of the FFT Fast Fourier Transform of the VSIPL native library, the FFTW packaged with VSIPL, and the MKL library packaged with VSIPL;

Figure 7 shows the matrix multiplication experiment results of VSIPL native library and package DSPLIB.

Detailed ways

Design and implementation of software-based radar parallel computing model:

The design principles of the software-based radar parallel computing model framework include: 1) The difficulty of parallel programming is low, and radar application software developers can quickly and effectively develop parallel programs, and give full play to the parallel computing performance of the hardware platform; 2) Inheritance. Support the rapid parallelization of a large number of existing serial software in a non-subversive manner; 3) platform independence. The radar application software does not depend on the hardware platform, and can still run effectively when the underlying computing platform changes; 4) Professionalism. Develop and design for the specific needs of different fields; 5) Scalability. The underlying function library can be extended as needed.

The parallel computing programming model is used to shield the heterogeneity and dynamics of the ubiquitous computing environment. It consists of a basic function library, a radar-specific function library, a radar computing resource runtime function library, and a real-time QoS function library. It also provides a unified API interface for application software components, as shown in Figure 2. The design principles of the parallel computing programming model mainly include the following points:

1) Developers of upper-layer application software do not need to understand the implementation details of parallel computing. The parallel computing programming model provides a software programming interface similar to traditional serial programming. Developers of radar system application software can quickly develop parallel programs according to the development mode of serial programs, and support the rapid parallelization of a large number of existing radar system serial application software in a non-subversive manner.

2) Support the decoupling of the upper layer application software components of the radar and the underlying hardware platform. When the radar hardware computing platform changes, the upper-layer application software components can run efficiently on the new platform without modification, and give full play to the hardware performance of the new platform.

3) Support multiple mapping modes for the internal operation entities of application software components, and support efficient management of hardware resources by upper-layer application software components. Through the runtime function, the upper layer application software components can obtain the status of the system hardware resources and memory usage information, etc., and the radar system designer is responsible for dynamically adjusting the priority of the running entity, realizing the load balance of the system resources, giving full play to the effectiveness of the hardware resources, and realizing efficient computing.

4) It is scalable. The programming model supports the scalable function and computing platform of parallel computing, which can match the new functional requirements of the radar system and the continuous development of the hardware platform.

5) It has a real-time QoS mechanism for calculation. Support the upper application software components to control the operating speed and real-time performance of the radar system. The upper-layer software can independently configure the real-time requirements of each data flow, and the QoS function library can control its running speed and real-time performance according to the specific real-time requirements.

Based on the above design principles, the system structure framework of the designed parallel computing programming model is shown in Figure 3.

Functional interface for VSIPL standard interface encapsulation:

There are 979 functions in the latest specification of VSIPL, and it takes a lot of work to repackage all of them, and in fact, there are not so many functions. Through the evaluation of the VSIPL library, currently only the functions commonly used in the field of radar signal processing related to trigonometric functions, vector operations, matrix operations, and FFT operations are packaged based on Intel's MKL special function library, TI's MATHLIB and DSPLIB, and the commonly used Fourier transform library FFTW.

The construction steps of the basic function middleware are shown in Figure 1:

1) Use the VSIPL function to create a VSIPL block;

2) Create a view corresponding to the VSIPL block;

3) Create the object of the basic function; the basic function includes vector, matrix, trigonometric function and fast Fourier transform FFT;

4) Bind data to objects;

5) Put the VSIPL block into the VSIPL data space;

6) Call the function processing view of the VSIPL standard interface;

7) Replace the underlying implementation of the VSIPL function: first use C language to create a temporary interactive space inside the VSIPL function for data interactive use, then read data from the VSIPL data space and put it in the temporary interactive space, and select a special library suitable for the current hardware platform to perform basic function calculations. After the calculation is completed, the calculation results are written back to the VSIPL data space. So far, the VSIPL standard unified interface has been implemented to package special libraries for different hardware platforms;

8) Delete the object and view of the basic function, release all resources, and end the entire VSIPL program.

A VSIPL block is a contiguous memory area that stores data in a VSIPL program;

The object is an abstract data type that stores the information needed by VSIPL to access the data array; the data group is the memory used for data storage;

A view consists of a VSIPL block of the data of interest and a view object, which stores the information that the VSIPL needs to access the data of interest.

VSIPL native library and the basic library after encapsulating the special function library are compared and verified for performance:

Based on the polymorphic construction method of the software-based radar basic function library described above, relevant experimental verification is carried out. The parameters of the experimental hardware platform are shown in Table 1:

Table 1 Experimental hardware platform parameters

Based on the experimental platform 1, the VSIPL standard interface is used to package the vector, matrix and FFT commonly used in radar signal processing. On the experimental platform 1, MKL was selected as the underlying library, and the vector calculation cos, matrix multiplication and two-dimensional FFT in the MKL library were selected as the performance comparison experiments to verify the performance of the VSIPL package MKL library and the VSIPL native library;

The experimental test data are shown in Table 2 and Table 3. The test results of this test are obtained after taking the average of multiple executions. The description of the five actual test data is as follows.

Table 2 Test verification data of basic function library

Table 3 shows the execution results after encapsulating the FFT algorithm in the FFTW library using the VSIPL standard interface. The test data is obtained after averaging five independent repeated experiments.

Table 3 VSIPL interface package FFTW library FFT execution results (in seconds)

FFT points first the second time the third time the fourth time the fifth time average value 65535 0.004 0.004 0.005 0.005 0.005 0.0046 131072 0.009 0.010 0.013 0.011 0.010 0.0106 262144 0.022 0.021 0.020 0.019 0.020 0.0204 524288 0.047 0.037 0.045 0.048 0.053 0.046 1048576 0.059 0.085 0.105 0.063 0.076 0.0776

Table 4 shows the matrix multiplication and vector operation interface definitions of the MKL library and the VSIPL native library. There are 14 interface parameters for the matrix operation cblas_sgemm in the MKL library, which is relatively complex, while there are only 3 interface parameters for the matrix operation vsip_mprod_f in the VSIPL native library, which is convenient for application layer software developers to call.

Table 4 MKL library and VSIPL native library matrix multiplication, vector operation interface

The FFT operation interface parameters of MKL library, FFTW library and VSIPL native library are shown in Table 5. The FFT interface of VSIPL native library is simple and easy to understand, while the FFT in FFTW library and MKL library is more complicated.

Table 5 MKL library, FFTW library and VSIPL native library FFT operation interface

Analysis of the test results of the basic function library VSIPL unified interface encapsulation test:

As shown in Figure 4, when the matrix order is 2000, the calculation time using the VSIPL native library is 29.8876s, which is more than twice as fast as the calculation using the serial program on the single core (64.37s on the experimental platform 1), but compared with the packaged MKL library, it is still much slower. It can be seen that the use of the VSIPL interface to encapsulate the matrix operation of the MKL library gives full play to the high performance of the MKL library on the Intel platform, and the interface is not as complicated as MKL, realizing the unification of the interface.

As shown in Figure 5, when the vector length is relatively small, the execution efficiency of the vector operation using the VSIPL native library is relatively high. As the vector length gradually increases, the vector operation after using the VSIPL interface to encapsulate MKL is more efficient.

As shown in Figure 6, the calculation efficiency of FFT Fast Fourier Transform after VSIPL packaging FFTW and VSIPL packaging MKL library has been greatly improved, and the FFT interface after VSIPL packaging is standardized, which is more convenient for upper-layer application software components to call, and also provides a solid guarantee for cross-platform transplantation.

On the experimental platform 2, MATHLIB and DSPLIB are selected as the underlying library. The experimental environment is CCS7.2, the processor is c66x, and the experimental platform is TL5728 embedded processing platform. In order to reduce the error, the average value after five experiments was taken for each experiment, and the experimental data are shown in Table 6 and Table 7. The experimental results are shown in Figure 7. The calculation time of 200-order matrix multiplication using VSIPL native library is 14.77 seconds, and the calculation time after using VSIPL to encapsulate DSPLIB library is 1.896 seconds, and the acceleration ratio is 7.794. The acceleration effect is obvious.

Table 6 VSIPL native library matrix multiplication execution results

Matrix order first the second time the third time the fourth time the fifth time 200*200 14.776860 14.770514 14.774504 14.769027 14.766492

Table 7 VSIPL interface package DSP library matrix multiplication execution results

Matrix order first the second time the third time the fourth time the fifth time 200*200 1.895417 1.895389 1.895648 1.895373 1.895730

In addition, a test comparison experiment with a million-level data volume of 1000*1000 was also carried out, and the obtained test results are as follows: the VSIPL native library needs 20 minutes to execute, and the calculation can be completed in 50 seconds after packaging DSPLIB, with a speedup ratio of 24. The experimental results show that under the premise of having a unified interface, the basic function library after encapsulating the special library has better computing power, and can achieve a unified interface, high performance, and portability.

Claims (5)

1. A construction method for software-based radar middleware, wherein the parallel computing middleware includes steps: basic function middleware construction steps, radar-specific function middleware construction steps, runtime function middleware construction steps and real-time quality of service QOS middleware construction steps; It is characterized in that the construction method of the basic function middleware specifically includes the following steps: 1) Use the VSIPL function to create a VSIPL block; 2) Create a view corresponding to the VSIPL block; 3) Create the object of the basic function; 4) Bind data to objects; 5) Put the VSIPL block into the VSIPL data space; 6) Call the function processing view of the VSIPL standard interface; 7) Replace the underlying implementation of the VSIPL function: first create a temporary interactive space inside the VSIPL function for data interaction, then read data from the VSIPL data space and put it in the temporary interactive space, and select a special library suitable for the current hardware platform to perform basic function calculations. After the calculation is completed, the calculation results are written back to the VSIPL data space. So far, the VSIPL standard unified interface has been implemented to package special libraries for different hardware platforms; 8) Delete the object and view of the basic function, release all resources, and end the entire VSIPL program. 2. method as claimed in claim 1, is characterized in that, described VSIPL block is the continuous memory area of storing data in VSIPL program; Described object is a kind of abstract data type, and it stores the required information of VSIPL access data array; Data group is the internal memory that is used for data storage; The view consists of a VSIPL block of the data of interest and a view object, which is used to store the information needed by the VSIPL to access the data of interest. 3. method as claimed in claim 1, is characterized in that, described special-purpose storehouse is the DSPLIB storehouse or the MATHLIB storehouse of the standard C language assembly FFTW storehouse of Intel mathematics storehouse MKL, fast calculation discrete Fourier transform. 4. method as claimed in claim 1, is characterized in that, described basis function comprises vector, matrix, trigonometric function and fast Fourier transform (FFT). 5. The method according to claim 1, wherein the internal temporary interaction space of the VSIPL function is created using C language.