CN111987771A - On-chip system, battery pack and electronic device - Google Patents

Abstract

The present application provides a system on a chip, comprising: the system on chip comprises a power supply pin, a power grounding pin, an overcharge voltage protection unit, an overdischarge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit, a frequency generation unit, a control unit, a wake-up unit and a first switch unit, wherein the system on chip further comprises a shipping pin, when the shipping pin receives a first signal, the system on chip enters a shipping mode, the first switch unit is switched off to enable a battery to stop supplying power to a system circuit, at least part of units of the system on chip are stopped supplying power, and when the system on chip is in the shipping mode, the wake-up unit is supplied with power, and the wake-up unit is used for enabling the system on chip to exit the shipping mode. The application also provides a battery pack and an electronic device. The application has the advantages that: the current consumption of the battery in the transportation and storage processes can be reduced, the electric quantity retention time of the battery is prolonged, and the user experience is improved.

Description

A system-on-chip, battery assembly and electronic device

technical field

The present application relates to the field of battery technology, and in particular, to a system-on-chip, a battery assembly, and an electronic device.

Background technique

Battery components are widely used in electronic devices, such as Bluetooth headsets, mobile phones, tablet computers, etc., to provide a more flexible use environment for electronic devices without being limited by the range of sockets and power supply cables. Generally speaking, a battery assembly includes a bare cell, a battery protection circuit electrically connected to the bare cell to prevent overcharging or overdischarging of the bare cell.

After the electronic device with battery assembly is manufactured at the production site, the battery assembly is charged with a preset amount of power and the electronic device is turned off, and then transported and stored for a long time, and finally when the end user gets the electronic device for the first time. Due to long-term transportation and storage, the electronic device may be completely discharged due to internal current consumption. Therefore, the end user must charge the electronic device to restore the power before the first use, resulting in poor user experience.

SUMMARY OF THE INVENTION

The technical problem to be solved by the embodiments of the present application is to provide a system-on-chip, a battery assembly, and an electronic device. It can reduce the current consumption of the battery during transportation and storage, improve the battery retention time, and improve the user experience.

In order to solve the above technical problem, a first aspect of the embodiments of the present application provides a system-on-chip, including: a power supply pin, a power ground pin, an overcharge voltage protection unit, an overdischarge voltage protection unit, a discharge and overcurrent protection unit, A reference voltage generation unit, a frequency generation unit, a control unit, a wake-up unit, and a first switch unit, wherein the power supply pin and the power ground pin are respectively used for electrical connection with the battery, and the first switch unit is used for controlling The battery supplies power to the system circuit;

Wherein, the system-on-chip further includes a shipping pin, when the shipping pin receives a first signal, the system-on-chip enters a shipping mode, and in the shipping mode, the first switch unit is turned off to stop the battery Power is supplied to the system circuit and at least some units of the system-on-chip are powered off, and the wake-up unit is powered when in the shipping mode, and the wake-up unit is used to exit the system-on-chip from the shipping mode.

Optionally, when the shipping pin receives the first signal, the system-on-chip is triggered to generate a shipping control signal to enter the shipping mode.

Optionally, the first signal is an encoded signal that is agreed between the system on chip and the system circuit.

Optionally, the first signal includes a pulse signal, and the system-on-chip further includes a pulse counting unit, the pulse counting unit is electrically connected to the shipping pin, when the pulse counting unit receives the pulse signal within a first predetermined period of time. When the number of received pulses is greater than or equal to the first predetermined number, a shipping control signal is triggered.

Optionally, the first signal is a continuous high-level signal or a continuous low-level signal, the system-on-chip further includes a first timing unit, and the first timing unit is electrically connected to the shipping pin , when the duration of the high-level signal or the low-level signal received by the first timing unit is greater than or equal to the second predetermined time period, triggering the generation of the shipping control signal.

Optionally, the over-discharge voltage protection unit includes a comparator and a second timing unit, an output end of the comparator is electrically connected to the second timer, and the first signal is a continuous high-level signal or a continuous high-level signal. a low-level signal, the system-on-chip further includes a second switch unit and a first resistor, the control end of the second switch unit is electrically connected to the shipping pin, and the input end of the second switch unit is grounded, The output end of the second switch unit is electrically connected to one end of the first resistor, the other end of the first resistor is connected to a high level, and the output end of the second switch unit is also connected to the overdischarge voltage protection unit. The reverse terminal of the comparator is electrically connected, and the output terminal of the comparator is electrically connected to the second timing unit. When the shipping pin is connected to the first signal, the second switch unit is turned on, and the second switch unit is turned on. The generation of the shipping control signal is triggered when the duration of the high level received by the timing unit is greater than or equal to the third predetermined time period.

Optionally, the wake-up unit is a charge detection unit.

Optionally, when the charging detection unit detects a charging signal, the system-on-chip exits the shipping mode.

Optionally, at least one of the overcharge voltage protection unit, the overdischarge voltage protection unit, the discharge overcurrent protection unit, the control unit, the reference voltage generation unit and the frequency generation unit is powered off.

Optionally, when the system-on-chip enters the shipping mode, all circuits of the system-on-chip except the wake-up unit are powered off.

Optionally, the first switch unit includes a MOS transistor.

A second aspect of the embodiments of the present application provides a battery assembly, including:

Battery;

In the above system-on-chip, wherein the power supply pin and the power ground pin of the system-on-chip are respectively electrically connected to the battery.

Optionally, the capacity of the battery is 10mAH-80mAH.

A third aspect of the embodiments of the present application provides an electronic device, including:

The above-mentioned battery assembly;

a system circuit, wherein the battery supplies power to the system circuit via the system-on-chip control.

Optionally, the electronic device is a Bluetooth headset.

Implementing the embodiments of the present application has the following beneficial effects: since the system-on-chip further includes a shipping pin, when the shipping pin receives the first signal, the system-on-chip enters the shipping mode, and in the shipping mode, the The first switch unit is turned off so that the battery stops supplying power to the system circuit and at least some units of the system on chip are stopped from supplying power, and the wake-up unit is powered in the shipping mode, and the wake-up unit is used to enable the system on chip. Exit shipping mode. In the shipping mode, the first switch unit is turned off, so that the battery cannot supply power to the system circuit, which can greatly save the power of the battery. Moreover, in the shipping mode, at least some units of the system-on-chip are powered off, so that the battery only needs to supply power to the system. A few circuit units such as the wake-up unit of the system-on-chip continue to supply power, so that the power consumption of the battery is further reduced, the current consumption of the electronic device can be reduced, and the battery power retention time can be improved. When the user gets the electronic device, the user only needs to operate the wake-up The unit enables the system-on-chip to exit the shipping mode, and the electronic device can be used normally when it is turned on, which improves the user experience.

Description of drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the accompanying drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only These are some embodiments of the present application. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings without any creative effort.

FIG. 1 is a schematic diagram of a circuit module of an electronic device according to an embodiment of the present application;

2 is a schematic diagram of a circuit module of an electronic device according to another embodiment of the present application;

3 is a schematic diagram of a circuit module of a system-on-chip according to an embodiment of the present application;

4 is a schematic diagram of an implementation of triggering the system-on-chip to generate a shipping control signal when a shipping pin of the system-on-chip receives a first signal according to an embodiment of the present application;

Fig. 5 is the waveform diagram of the signal received by the shipping pin in Fig. 4 and the output signal of the pulse counting unit;

6 is a schematic diagram of another implementation manner of triggering the system-on-chip to generate a shipping control signal when the shipping pin of the system-on-chip receives the first signal according to an embodiment of the present application;

Fig. 7 is the waveform diagram of the signal received by the shipping pin in Fig. 6 and the output signal of the first timing unit;

8 is a schematic diagram of yet another implementation manner of triggering the SoC to generate a shipping control signal when the shipping pin of the SoC according to an embodiment of the present application receives the first signal;

9 is a specific circuit implementation diagram of a shipping pin and an over-discharge voltage protection unit according to an embodiment of the present application;

Fig. 10 is the waveform diagram of the signal received by the shipping pin in Fig. 9 and the output signal of the second timing unit;

Description of drawing numbers:

100-system on chip; 200-system circuit; 300-battery; VDD-power supply pin; GND-power grounding pin; VM-system grounding pin; CTL-shipping pin; 110-overcharge voltage protection unit; 120-charge overcurrent protection unit; 130-discharge overcurrent protection unit; 140-reference voltage generation unit; 150-frequency generation unit; 160-control unit; 170-wake up unit; 180-first switch unit; 190-overdischarge Voltage protection unit; 191-comparator; 192-second timing unit; 410-temperature protection unit; 420-pulse counting unit; 430-first timing unit; 440-second switch unit; R1-first resistor; R2- second resistance; R3-third resistance; C-capacitance; T1-second predetermined time period; T2-third predetermined time period.

Detailed ways

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present application.

The appearances of the terms "comprising" and "having" and any variations thereof in the specification, claims and drawings of this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or modules is not limited to the listed steps or units, but optionally also includes unlisted steps or units, or optionally also includes For other steps or units inherent to these processes, methods, products or devices. In addition, the terms "first", "second", "third", etc. are used to distinguish different objects and not to describe a specific order.

An embodiment of the present application provides an electronic device, and the electronic device is, for example, a Bluetooth headset, a mobile phone, a tablet computer, and the like. Referring to FIG. 1, the electronic device includes a battery assembly and a system circuit 200. The system circuit 200 is, for example, a circuit composed of a microprocessor, a camera driving circuit, an image processor, etc. The system circuit 200 is electrically connected to the battery assembly, and the battery assembly is used to supply The system circuit 200 is powered. The battery assembly includes a battery 300 and a system-on-chip 100, the system-on-chip 100 is electrically connected to the positive and negative poles of the battery 300, the system circuit 200 is electrically connected to the system-on-chip 100, the battery 300 supplies power to the system-on-chip 100, and the system-on-chip 100 plays a protective role. The battery 300 is protected when it is overcharged or overdischarged. Since how the system-on-chip 100 protects the battery 300 from overcharge and overdischarge is a common technical means in the field, it will not be repeated here. In this embodiment, the number of the batteries 300 is one or more. When there are multiple batteries 300, the multiple batteries 300 can be connected in parallel, in series, or mixed in series and parallel. The batteries 300 are preferably lithium batteries 300, and the capacity of the batteries 300 is 10mAH-80mAH, such as 10mAH, 20mAH, 30mAH, 40mAH, 50mAH, 60mAH, 70mAH, 80mAH, the battery 300 with this capacity is small in volume, preferably, the capacity of the battery 300 is 20mAH-40mAH, and the The volume is smaller and can be easily configured in small electronic devices, such as Bluetooth headsets. Moreover, since the capacity of the battery 300 is so small, how to maintain the power of the battery 300 for a long time becomes a very important issue. In this embodiment, the system on chip 100 (System on Chip, SOC) is a technology commonly used in the field of integrated circuits. The purpose is to combine multiple integrated circuits with specific functions on one chip to form a system or product, including complete The hardware system and the embedded software it carries. The system-on-chip 100 has obvious advantages in performance, cost, power consumption, reliability, as well as life cycle and usage range. In addition, in other embodiments of the present application, referring to FIG. 2 , a second resistor R2 and a capacitor C are further provided between the battery 300 and the system-on-chip 100 , and the second resistor R2 and the capacitor C are set for filtering. In addition, in other embodiments of the present application, other circuits or electronic components may also be provided between the battery 300 and the system-on-chip 100 .

In this embodiment, please refer to FIG. 1 and FIG. 3 in combination, the system-on-chip 100 includes a power supply pin VDD, a power supply ground pin GND, an overcharge voltage protection unit 110 , an overdischarge voltage protection unit 190 , and a discharge overcurrent protection unit 130 , a reference voltage generation unit 140 , a frequency generation unit 150 , a control unit 160 , a wake-up unit 170 , and a first switch unit 180 .

In this embodiment, the power supply pin VDD and the power supply ground pin GND are respectively used for electrical connection with the positive and negative poles of the battery 300 , so that the battery 300 can supply power to the system-on-chip 100 . The circuit 200 forms a loop to power the system circuit 200 .

In this embodiment, the overcharge voltage protection unit 110 is used to protect the battery 300 when it is detected that the charging voltage is too high during the charging process of the battery 300, for example, stop charging the battery 300, etc., to prevent the battery 300 from being damaged or damaged. A security issue has occurred.

In this embodiment, the over-discharge voltage protection unit 190 is used to protect the battery 300 when the discharge voltage is detected to be too low during the discharge process of the battery 300 , for example, to control the battery 300 to discharge to a minimum level, and generally stop Supply power to the system circuit 200 and stop power supply to the circuits of the system-on-chip 100 except the charging detection circuit, so as to prevent the battery 300 from being permanently damaged due to excessive discharge of the battery 300 .

In the present embodiment, the over-discharge protection unit 130 is used to protect the battery 300 when it is detected that the discharge current is too large during the discharge process of the battery 300, for example, the battery 300 stops discharging, etc., to prevent the discharge current from being too large. Permanent damage to the battery 300 or a safety issue. In this embodiment, the discharge overcurrent protection unit 130 includes a plurality of subunits, each of which is electrically connected to the control unit 160, and each subunit is used to process different discharge currents, and three subunits are set in the figure .

In this embodiment, the reference voltage generation unit 140 is used to generate the reference voltage required by the system on chip 100 , the frequency generation unit 150 is used to generate different frequencies, and the control unit 160 is respectively connected with the overcharge voltage protection unit 110 and the overdischarge voltage protection unit 190. The discharge overcurrent protection unit 130, the reference voltage generation unit 140, the frequency generation unit 150, the wake-up unit 170, the first switch unit 180 and the like are electrically connected. In this embodiment, the overcharge voltage protection unit 110 , the overdischarge voltage protection unit 190 , the discharge overcurrent protection unit 130 , the reference voltage generation unit 140 , the frequency generation unit 150 , and the control unit 160 are conventional circuits in the field, and here No longer.

In the present embodiment, the wake-up unit 170 is a charging detection unit for detecting whether the electronic device is connected to a power source through a charger to charge the battery 300 . When the electronic device is connected to a power source through a charger, the charging detection unit detects that the charging signal to charge the battery 300; if the over-discharge voltage protection unit 190 protects the battery 300 and the charging detection unit detects the charging signal at this time, it will exit the over-discharge voltage protection for the battery 300, that is, to the system circuit 200 is powered and the system-on-chip 100 is powered normally.

In this embodiment, the first switch unit 180 includes a switch tube and a substrate control circuit, the switch tube is a MOS tube, the control end of the switch tube is electrically connected to the control unit 160, the substrate control circuit is electrically connected to the control unit 160, and the substrate is electrically connected to the control unit 160. The bottom control circuit is used to realize the correct bias of the substrate of the switch tube. However, the present application is not limited thereto. In other embodiments of the present application, the first switch unit 180 may further include a charge switch and a discharge switch, wherein the charge switch and the discharge switch are both MOS transistors, and the charge switch and the discharge switch are respectively connected to the control Unit 160 is electrically connected. In addition, in other embodiments of the present application, the first switch unit 180 may also be implemented in other forms, for example, including only one switch tube. In this embodiment, the first switch unit 180 is used to control the battery 300 to supply power to the system circuit 200 . Specifically, the control terminal of the first switch unit 180 is electrically connected to the control unit 160, and the input terminal of the first switch unit 180 is used to electrically connect to the battery 300, for example, to the power ground pin GND of the system-on-chip 100. The output end of a switch unit 180 is used for electrical connection with the system circuit 200 , so that the battery 300 , the system circuit 200 , and the first switch unit 180 form a power supply loop, and the system-on-chip 100 can control whether the battery 300 is Power is supplied to the system circuit 200 .

In this implementation, the system on chip 100 further includes a shipping pin CTL, the shipping pin CTL is a newly added pin of the system on a chip 100 , and the system on chip 100 enters the shipping mode when the shipping pin CTL receives the first signal , in the shipping mode, the first switch unit 180 is turned off so that the battery 300 stops supplying power to the system circuit 200 , and at least some units of the system-on-chip 100 are stopped from supplying power. In this embodiment, the generation of the first signal may be implemented by software or by hardware. When implemented by hardware, it may be implemented by, for example, the power button of the electronic device, for example, by long pressing the power button to generate the first signal.

In this embodiment, the wake-up unit 170 is continuously powered by the battery 300 in the shipping mode, and the wake-up unit 170 is used to make the system-on-chip 100 exit the shipping mode. In this embodiment, since the wake-up unit 170 is a charging detection circuit, and the charging detection circuit is a circuit originally existing in the system-on-chip 100 , this design can save costs. In this embodiment, when the electronic device is charged, the charging detection circuit detects the charging signal, and the system-on-chip 100 automatically exits the shipping mode. Since the power of the battery 300 can be maintained for a long time, the electronic device can be powered on normally. In addition, in other embodiments of the present application, the wake-up unit 170 may not be a charging detection circuit, but may also be other newly added hardware circuits specially used to exit the system-on-chip 100 from the shipping mode. Those skilled in the art may Specific requirements for circuit design.

In this embodiment, when the electronic device needs to be transported or stored for a long time, the system-on-chip 100 of the electronic device can enter the shipping mode. In the shipping mode, the first switch unit 180 is turned off, so that the battery 300 cannot supply power to the system circuit 200, which can greatly save the power of the battery 300. Moreover, in the shipping mode, at least some units of the SoC 100 are powered off, so that the battery 300 only needs to supply a few circuits such as the wake-up unit 170 of the SoC 100. The unit continues to supply power, so that the power consumption of the battery 300 is further reduced, which can reduce the current consumption of the electronic device. The current consumption can be as low as several nA/h, so that the power retention time of the battery 300 can be improved, even if the capacity of the battery 300 itself is relatively small In the shipping mode, the power of the battery 300 can also be maintained for half a year to one year. When the user gets the electronic device, the user only needs to operate the wake-up unit 170 to make the system-on-chip 100 exit the shipping mode, and the electronic device can be turned on normally. In use, the user's experience is improved, and the user is prevented from mistakenly thinking that the electronic device is faulty.

In this embodiment, at least some units of the system-on-chip 100 are powered off during the shipping mode. In this embodiment, at least one of the overcharge voltage protection unit 110 , the overdischarge voltage protection unit 190 , the discharge overcurrent protection unit 130 , the control unit 160 , the reference voltage generation unit 140 and the frequency generation unit 150 of the system on chip 100 is Stop power supply, for example, one of the overcharge voltage protection unit 110, the overdischarge voltage protection unit 190, the discharge overcurrent protection unit 130, the control unit 160, the reference voltage generation unit 140 and the frequency generation unit 150 is stopped in the shipping mode Power supply, or two of the overcharge voltage protection unit 110, the overdischarge voltage protection unit 190, the discharge overcurrent protection unit 130, the control unit 160, the reference voltage generation unit 140 and the frequency generation unit 150 are powered off in the shipping mode, Or in the shipping mode, three of the overcharge voltage protection unit 110, the overdischarge voltage protection unit 190, the discharge overcurrent protection unit 130, the control unit 160, the reference voltage generation unit 140 and the frequency generation unit 150 are powered off, . . . Or in the shipping mode, the overcharge voltage protection unit 110 , the overdischarge voltage protection unit 190 , the discharge overcurrent protection unit 130 , the control unit 160 , the reference voltage generation unit 140 and the frequency generation unit 150 are all powered off. Reduce battery consumption by 300. In addition, in other embodiments of the present application, the system-on-chip 100 further includes a temperature protection unit 410, a charging overcurrent protection unit 120, etc. In the shipping mode, the temperature protection unit 410 and the charging overcurrent protection unit 120 may not be powered, It can also be powered, which is also the scope of the protection of the present invention. In this embodiment, when the system on chip 100 enters the shipping mode, the circuits of the system on chip 100 except for the wake-up unit 170 are all powered off, that is, the circuits of the system on chip 100 except for the circuits required for the system on chip 100 to exit the shipping mode are stopped. Except that the wake-up unit 170 is powered, other circuit units of the system-on-chip 100 are not powered, which can further save the power of the battery 300, reduce the power consumption of the battery 300, and further improve the power retention time of the battery 300. The capacity retention time of the battery 300 .

In this embodiment, when the shipping pin CTL receives the first signal, the system-on-chip 100 is triggered to generate a shipping control signal to enter the shipping mode. However, the present application is not limited thereto. In other embodiments of the present application, the system on chip 100 can directly enter the shipping mode when the shipping pin CTL receives the first signal.

In this embodiment, the first signal is a digital coded signal, and the coded signal is pre-agreed by the SoC and the system circuit during design. When the coded signal is received by the shipping pin, the SoC generates a shipping control signal to enter shipping mode. For example, the first signal includes two periods of time: the first period is a high-level signal, and the second period is a predetermined number of pulse signals. Here, the high-level signal is used to trigger the corresponding components of the system on chip to activate, for example Tell the corresponding component of the system-on-chip to prepare for timing or counting, and then the corresponding component of the system-on-chip will count or time the received pulse signal (for example, different pulse durations are different). When the number of pulses meets the preset requirements, the system-on-chip generates For the shipping control signal, when the number of pulses does not meet the preset requirements, the corresponding components of the system-on-chip return to the state where they are not activated at the beginning. Since the first signal is a coded signal of the SoC and the system circuit protocol, the specific form of the first signal is not limited, complex coding or simple coding can be used, and the SoC and the system circuit can be identified by pre-protocol agreement. In addition, when the first signal is relatively complex, the system-on-chip is reliable and safe at this time, which can prevent false triggering.

In this embodiment, when the shipping pin CTL receives the first signal, there are three ways to trigger the SoC 100 to generate the shipping control signal, which will be described below. Of course, when the shipping pin CTL receives the first signal, the manner of triggering the SoC 100 to generate the shipping control signal is not limited to the following three. In other embodiments of the present application, those skilled in the art can also set other conventional circuits. to trigger the system-on-chip 100 to generate a shipping control signal.

1. In an embodiment of the present application, please refer to FIG. 4 and FIG. 5 , the first signal includes a pulse signal, and the system-on-chip 100 further includes a pulse counting unit 420 and a third resistor R3. Here, the shipping pin CTL defaults to a low level. In this embodiment, the shipping pin CTL is grounded through the third resistor R3 to achieve a low level, and the pulse counting unit 420 outputs a low level signal under normal conditions. , the shipping pin CTL is electrically connected to the pulse counting unit 420 . When the shipping pin CTL receives the first signal, the pulse counting unit 420 counts the pulses, and the pulse counting unit 420 triggers counting with a rising edge. or equal to the first predetermined number, the output signal of the pulse counting unit 420 changes from low level to high level, and the high level at this time is the shipping control signal, wherein the first predetermined time period and the first predetermined number are The system on chip 100 is preset, the first predetermined time period is, for example, 10 seconds, 5 seconds, 3 seconds, 1 second, etc., and the first predetermined number is, for example, 3, 4, 5, etc. This design can prevent false triggering. In this embodiment, the output end of the pulse counting unit 420 is connected to the overcharge voltage protection unit 110 , the overdischarge voltage protection unit 190 , the discharge overcurrent protection unit 130 , the reference voltage generation unit 140 , the frequency generation unit 150 , and the control unit 160 respectively. The units whose power supply needs to be stopped are electrically connected, so as to stop the power supply of the units other than the wake-up unit 170 of the system on chip 100 . In addition, in other embodiments of the present application, the output terminal of the pulse counting unit 420 outputs a high level under normal conditions, and at this time, a low level is a shipping control signal. In this embodiment, the pulse counting unit 420 is provided separately from the control unit 160 . In addition, in other embodiments of the present application, the pulse counting unit 420 may also be integrated into the control unit 160 .

2. In an embodiment of the present application, please refer to FIG. 6 and FIG. 7 , the first signal includes a continuous high-level signal or a continuous low-level signal, and the system-on-chip 100 further includes a first timing unit 430 and a third resistor R3 . Here, the shipping pin CTL defaults to a low level. In this embodiment, the shipping pin CTL is grounded through the third resistor R3 to achieve a low level, and the first timing unit 430 outputs a low level under normal conditions. signal, the shipping pin CTL is electrically connected to the first timing unit 430 . When the first signal received by the shipping pin CTL is a high level signal, that is, when the signal received by the shipping pin CTL changes from a low level to a high level, the first timing unit 430 triggers the timing, and the first timing The unit 430 triggers timing with a rising edge. When the duration of the high-level signal received by the first timing unit 430 is greater than or equal to the second predetermined time period T1, the output signal of the first timing unit 430 changes from a low level to a high level, The high-level signal at this time is the shipping control signal, wherein the second predetermined time period T1 is preset by the system-on-chip 100, and the second predetermined time period T1 is, for example, 10 seconds, 5 seconds, 3 seconds, 1 second Waiting time period, this design can prevent false triggering. In this embodiment, the output end of the first timing unit 430 is respectively connected with the overcharge voltage protection unit 110 , the overdischarge voltage protection unit 190 , the discharge overcurrent protection unit 130 , the reference voltage generation unit 140 , the frequency generation unit 150 , and the control unit The units whose power supply needs to be stopped, such as 160 , are electrically connected to stop the power supply of units other than the wake-up unit 170 of the system on chip 100 . In addition, in other embodiments of the present application, the output end of the first timing unit 430 outputs a high-level signal under normal conditions, and at this time, the low-level signal is a shipping control signal. In this embodiment, the first timing unit 430 is provided separately from the control unit 160 . In addition, in other embodiments of the present application, the first timing unit 430 may also be integrated into the control unit 160 .

3. Referring to FIG. 3, generally speaking, the conventional SoC 100 or battery 300 protection circuit, when the battery 300 is deeply discharged, the conventional SoC 100 or battery 300 protection circuit detects through the over-discharge voltage protection unit 190 at this time. The battery 300 is deeply discharged, the over-discharge voltage protection unit 190 sends a signal to the control unit 160, the control unit 160 passively controls the first switch unit 180 to disconnect, and passively controls the system-on-chip 100 or the battery 300 protection circuit except the charging detection unit to be disabled. Stop the power supply to protect the battery 300 and prevent the battery 300 from being damaged due to over-discharge, until the system-on-chip 100 or the battery 300 protection circuit resumes power supply after the charging detection unit detects the charging signal, and the first switch unit 180 is turned off to restore the system circuit 200. of power supply. In an embodiment of the present application, the original circuits and functions of the over-discharge voltage protection unit 190 in the prior art are fully utilized to actively control the disconnection of the first switch unit 180 and actively control the system-on-chip except the charging detection unit. 100 is powered off, which can reduce costs. Specifically, please refer to FIG. 8 to FIG. 10 , the over-discharge voltage protection unit 190 includes a comparator 191 and a second timing unit 192 . The comparator 191 has a same-direction terminal and two reverse terminals, and the two reverse terminals are respectively are the first reverse terminal and the second reverse terminal, the output terminal of the comparator 191 is electrically connected to the second timer, the non-inverting terminal of the comparator 191 is connected to a reference voltage, and the first reverse terminal of the comparator 191 is electrically connected to the battery The output voltage detection point of 300 is used to detect whether the battery 300 is deeply discharged. The first signal includes a continuous high-level signal. The system on chip 100 further includes a second switch unit 440 and a first resistor R1. The control end of the second switch unit 440 is electrically connected to the shipping pin CTL. The input end is grounded, the output end of the second switch unit 440 is electrically connected to one end of the first resistor R1, the other end of the first resistor R1 is connected to a high level, and the output end of the second switch unit 440 is also connected to the overdischarge voltage protection unit 190 The second reverse terminal of the comparator 191 is electrically connected, wherein the low level priority of the first reverse terminal and the second reverse terminal is higher, that is, when either the first reverse terminal or the second reverse terminal is When one is at low level, the reverse terminal of comparator 191 is at low level at this time. In this embodiment, when the shipping pin CTL is connected to the first signal, the second switch unit 440 is turned on, at this time, the second reverse terminal of the comparator 191 is grounded, and at this time, the reverse terminal of the comparator 191 is low Therefore, the comparator 191 outputs a high level, and the second timing unit 192 triggers the generation of a shipping control signal when the received high level duration is greater than or equal to the third predetermined time period T2, and the shipping control signal is high level signal. Further, by using the existing over-discharge voltage protection unit 190, the first switch unit 180 is controlled to be turned off, and the power supply of the system-on-chip 100 other than the charge detection unit is controlled to be stopped. The third predetermined time period T2 is preset by the system-on-chip 100, and the third predetermined time period T2 is, for example, 10 seconds, 5 seconds, 3 seconds, etc. This design can prevent false triggering. In this embodiment, the second switch unit 440 is an NMOS transistor. However, the present application is not limited thereto. In other embodiments of the present application, the second switch unit 440 may also be a PMOS transistor, and at this time, the first signal includes a continuous low-level signal.

In this embodiment, please refer to FIG. 1 and FIG. 3 in combination, the system-on-chip 100 further includes a system ground pin VM, the system ground pin VM is used for electrical connection with the system circuit 200, and the system ground pin VM is also used for Charge. In this embodiment, a first switch unit 180 is disposed between the system ground pin VM and the power supply ground pin GND.

It should be understood that references herein to "a plurality" means two or more. Other embodiments of the present application will readily occur to those skilled in the art upon consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses or adaptations of this application that follow the general principles of this application and include common knowledge or conventional techniques in the technical field not disclosed in this application . The specification and examples are to be regarded as exemplary only, with the true scope and spirit of the application being indicated by the following claims.

It should be noted that, each embodiment in this specification is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. For the same and similar parts of each embodiment, refer to each other. Can. As for the apparatus embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and reference may be made to the partial description of the method embodiment for related parts.

The above disclosures are only the preferred embodiments of the present application, and of course, the scope of the rights of the present application cannot be limited by this. Therefore, equivalent changes made according to the claims of the present application are still within the scope of the present application.

Claims (15)

1. A system on a chip, comprising: the power supply circuit comprises a power supply pin, a power grounding pin, an overcharge voltage protection unit, an overdischarge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit, a frequency generation unit, a control unit, a wake-up unit and a first switch unit, wherein the power supply pin and the power grounding pin are respectively used for being electrically connected with a battery, and the first switch unit is used for controlling the battery to supply power to a system circuit;

the system on chip further comprises a shipping pin, the system on chip enters a shipping mode when the shipping pin receives a first signal, the first switch unit is switched off in the shipping mode so that the battery stops supplying power to the system circuit and at least part of the units of the system on chip are stopped supplying power, the wake-up unit is supplied with power in the shipping mode, and the wake-up unit is used for enabling the system on chip to exit the shipping mode.

2. The system-on-chip of claim 1, wherein the shipping pin, when receiving the first signal, triggers the system-on-chip to generate a shipping control signal to enter a shipping mode.

3. The system on a chip of claim 2, wherein the first signal is an encoded signal that the system on chip is in protocol with system circuitry.

4. The system-on-chip of claim 3, wherein the first signal comprises a pulse signal, the system-on-chip further comprising a pulse counting unit electrically coupled to the shipping pin, the pulse counting unit triggering generation of a shipping control signal when a number of pulses received by the pulse counting unit within a first predetermined time period is greater than or equal to a first predetermined number.

5. The system-on-chip of claim 3, wherein the first signal comprises a continuous high signal or a continuous low signal, the system-on-chip further comprising a first timing unit electrically coupled to the shipping pin that triggers generation of the shipping control signal when the high signal or the low signal received by the first timing unit has a duration greater than or equal to a second predetermined time period.

6. The system on chip of claim 3, wherein the over-discharge voltage protection unit comprises a comparator and a second timing unit, an output terminal of the comparator is electrically connected to the second timer, the first signal is a continuous high-level signal or a continuous low-level signal, the system on chip further comprises a second switch unit and a first resistor, a control terminal of the second switch unit is electrically connected to the shipping pin, an input terminal of the second switch unit is grounded, an output terminal of the second switch unit is electrically connected to one terminal of the first resistor, the other terminal of the first resistor is at a high level, an output terminal of the second switch unit is further electrically connected to an inverted terminal of the comparator of the over-discharge voltage protection unit, an output terminal of the comparator is electrically connected to the second timing unit, and the second switch unit is turned on when the shipping pin receives the first signal, and when the high level duration received by the second timing unit is greater than or equal to a third preset time period, the ship control signal is triggered and generated.

7. The system on chip of any of claims 1-6, wherein the wake-up unit is a charge detection unit.

8. The system-on-chip of claim 7, wherein the system-on-chip exits shipping mode when a charge detection unit detects a charge signal.

9. The system on a chip of any one of claims 1-6, wherein at least one of the overcharge voltage protection unit, the overdischarge voltage protection unit, the discharge overcurrent protection unit, the control unit, the reference voltage generation unit, and the frequency generation unit is powered down.

10. The system on a chip of claim 9, wherein circuitry of the system on a chip other than the wake-up unit is powered down when the system on a chip enters a ship mode.

11. The system on chip of any of claims 1-6, wherein the first switching unit comprises a MOS transistor.

12. A battery assembly, comprising:

a battery;

the system-on-chip of any one of claims 1-11, wherein a power supply pin and a power ground pin of the system-on-chip are electrically connected to a battery, respectively.

13. The battery assembly of claim 12, wherein the battery has a capacity of 10mAH to 80 mAH.

14. An electronic device, comprising:

the battery module according to claim 12 or 13;

system circuitry, wherein the battery supplies power to the system circuitry via the system-on-chip control.

15. The electronic device of claim 14, wherein the electronic device is a bluetooth headset.

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