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CN112162469B - Simulation method and simulation system for photoetching pattern - Google Patents

Simulation method and simulation system for photoetching pattern Download PDF

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Publication number
CN112162469B
CN112162469B CN202011135351.5A CN202011135351A CN112162469B CN 112162469 B CN112162469 B CN 112162469B CN 202011135351 A CN202011135351 A CN 202011135351A CN 112162469 B CN112162469 B CN 112162469B
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substrate
pattern
parameter
wave
thickness
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CN112162469A (en
Inventor
王康
罗招龙
赵广
魏来
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Nexchip Semiconductor Corp
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Nanjing Crystal Drive Integrated Circuit Co ltd
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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70491Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605Workpiece metrology
    • G03F7/70616Monitoring the printed patterns

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)

Abstract

The invention provides a simulation method and a simulation system of a photoetching pattern, which comprise the following steps: presetting a substrate thickness parameter, a photoresist layer thickness parameter and a mask; simulating incident light to irradiate on a light resistance layer according to the substrate thickness parameter, the light resistance layer thickness parameter and the mask, wherein the incident light is reflected by the substrate to form reflected light, and the reflected light and the incident light form standing waves; adjusting preset parameters to adjust the positions of wave crests and wave troughs of the standing waves; simulating development processing to obtain the photoetching pattern; judging whether the wave crest of the standing wave is positioned at the bottom of the photoetching pattern and/or judging whether the reflectivity of the substrate is smaller than a threshold value; if so, using the adjusted preset parameters in an experiment; if not, the preset parameters are adjusted again. The simulation method of the photoetching pattern can simulate the manufacturing process of the photoetching pattern and solve the problem of unstable photoetching pattern.

Description

Simulation method and simulation system for photoetching pattern
Technical Field
The invention relates to the technical field of semiconductors, in particular to a simulation method and a simulation system for a photoetching pattern.
Background
The photolithography process in the semiconductor manufacturing technology is a process of transferring a pre-made pattern on a mask plate to a wafer by spin-coating a photoresist on the surface of the wafer, exposing and developing. The wafer with the photoresist pattern is then sent to an etching or ion implantation apparatus to ion implant or dope the regions not covered by the photoresist to form the desired doping concentration or structure. Therefore, the accuracy of the pattern defined by the photoresist can directly influence the quality after ion implantation and etching. In the prior art, as the line width is smaller and smaller with the development of the semiconductor process technology, the contact area between the developed photoetching pattern and the substrate is smaller after exposure, so that the photoetching pattern is unstable, and the photoetching pattern is easy to collapse.
Disclosure of Invention
In view of the defects of the prior art, the invention provides a simulation method and a simulation system of a photoetching pattern, which solve the problem that the photoetching pattern is easy to collapse through simulation experiments and reduce the investment of actual production.
To achieve the above and other objects, the present invention provides a method for simulating a lithographic pattern, comprising:
presetting a substrate thickness parameter, a photoresist layer thickness parameter and a mask plate;
simulating incident light to irradiate on a light resistance layer according to the substrate thickness parameter, the light resistance layer thickness parameter and the mask, wherein the incident light is reflected by the substrate to form reflected light, and the reflected light and the incident light form standing waves;
adjusting preset parameters to adjust the positions of wave crests and wave troughs of the standing waves;
simulating development processing to obtain the photoetching pattern;
judging whether the wave crest of the standing wave is positioned at the bottom of the photoetching pattern and/or judging whether the reflectivity of the substrate is smaller than a threshold value;
if so, using the adjusted preset parameters in an experiment;
if not, the preset parameters are adjusted again.
Further, when the substrate thickness parameter includes an anti-reflection layer thickness parameter, the preset parameter includes an anti-reflection layer thickness parameter.
Further, the thickness of the anti-reflection layer is sequentially increased or decreased within a preset range according to the thickness parameter of the anti-reflection layer, so as to obtain a plurality of standing waves.
Further, the thickness of the anti-reflection layer is determined when the position of the peak of any of the standing waves is at the bottom of the lithography pattern and/or the reflectivity of the substrate is less than a threshold value.
Further, after the simulated development treatment, a baking process for simulating the photoresist layer is also included, wherein the baking process at least includes adjusting a temperature parameter.
Further, the temperature is sequentially increased or decreased within a preset range according to the temperature parameter so as to obtain a plurality of standing waves.
Further, when the position of the peak of any standing wave is located at the bottom of the photoetching pattern and/or the reflectivity of the substrate is smaller than a threshold value, determining the temperature of the baking process of the photoresist layer.
Further, when the peak of the standing wave is located at the bottom of the lithography pattern, the width of the peak of the standing wave is equal to the width of the bottom of the lithography pattern.
Further, the step of determining further includes determining whether the deviation degree of the lithography pattern is smaller than a threshold.
Furthermore, the present invention also provides a simulation system for lithography patterns, comprising:
the parameter setting unit is used for presetting a substrate thickness parameter and a photoresist layer parameter;
the exposure simulation unit is used for simulating incident light to irradiate on the light resistance layer, the incident light forms reflected light after being reflected by the substrate, and the reflected light and the incident light form standing waves;
the parameter adjusting unit is used for adjusting preset parameters so as to adjust the positions of wave crests and wave troughs of the standing waves;
the development simulation unit is used for simulating development processing to obtain the photoetching pattern;
the judging unit is used for judging whether the wave crest of the standing wave is positioned at the bottom of the photoetching pattern and/or judging whether the reflectivity of the substrate is smaller than a threshold value;
if so, using the adjusted preset parameters in an experiment; if not, the preset parameters are adjusted again.
In summary, the present invention provides a simulation method and a simulation system for a lithography pattern, which simulate a manufacturing process of the lithography pattern through a simulation experiment, wherein in the simulation experiment, a standing wave is formed along a thickness direction of a photoresist layer due to interference of incident light and reflected light, and a width of a peak of the standing wave is greater than a width of a trough of the standing wave. By adjusting preset parameters, enabling the wave crest of the standing wave to be positioned at the bottom of the photoetching pattern and/or enabling the reflectivity of the substrate to be smaller than a threshold value; when the wave crest of the standing wave is positioned at the bottom of the photoetching pattern, the width of the wave crest is larger, so that the bottom of the photoetching pattern is wider, namely the contact area between the photoetching pattern and the substrate is larger, and the stability of the formed photoetching pattern can be higher. Meanwhile, the simulation is carried out through a simulation experiment, and then parameters meeting the conditions in the simulation process are used in the experimental product, so that the investment of actual production can be reduced, and the research and development speed is increased.
Drawings
FIG. 1: the present embodiment provides a schematic diagram of a simulation system for lithography.
FIG. 2: the present embodiment provides a flowchart of a simulation method of a lithographic pattern.
FIG. 3: step S1 is shown in the corresponding schematic diagram.
FIG. 4: schematic representation of a reticle.
FIG. 5: step S2 is shown in the corresponding schematic diagram.
FIG. 6: schematic representation of standing waves.
FIG. 7: schematic illustration of a lithographic pattern.
FIG. 8: schematic representation of the topography of the lithographic pattern.
FIG. 9: another illustration of the topography of the lithographic pattern.
FIG. 10: another illustration of the topography of the lithographic pattern.
FIG. 11: the thickness of the anti-reflection layer and the reflectivity of the substrate.
FIG. 12: another structure diagram of step S1.
FIG. 13: the thickness of the anti-reflection layer, the deviation degree of the critical dimension and the thickness of the photoresist layer.
Description of the symbols
10: a simulation system; 11: a parameter setting unit; 12: an exposure simulation unit; 13: a parameter adjustment unit; 14: a development simulation unit; 15: a judgment unit; 101: a substrate; 102: an anti-reflection layer; 103: a photoresist layer; 103 a: photoetching a pattern; 104: a mask plate; 104 a: a light-transmitting region; 104 b: a shielded area; 105: incident light; 106: reflecting the light; 107: standing waves; 107 a: wave crest; 107 b: a wave trough.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
As shown in fig. 1, the present embodiment provides a simulation system 10 for lithography patterns, wherein the simulation system 10 includes a parameter setting unit 11, an exposure simulation unit 12, a parameter adjusting unit 13, a development simulation unit 14, and a determination unit 15. The parameter setting unit 11 is used to design a substrate thickness parameter, a photoresist thickness parameter and a mask, that is, the substrate, the photoresist layer and the mask are designed by the parameter setting unit 11, that is, the thickness of the substrate, the thickness of the photoresist layer, for example, the thickness of the substrate is increased or decreased, or the thickness of the photoresist layer is increased or decreased by the parameter setting unit 11. When an anti-reflection layer is required to be formed on the substrate, the substrate thickness parameter may further include an anti-reflection layer thickness parameter. In this embodiment, the photoresist layer is on the substrate, and the mask is on the photoresist layer. In this embodiment, the reticle may include an exposed region and a non-exposed region. The exposed areas can pass light, and the non-exposed areas can not pass light.
As shown in FIG. 1, in the present embodiment, the exposure simulation unit 12 is used for simulating an exposure process, i.e. simulating an incident light irradiated on the photoresist layer through the mask, such as simulating a yellow light irradiated on the photoresist layer. When incident light irradiates on the photoresist layer, the incident light penetrates through the photoresist layer to reach the substrate, the incident light is reflected by the substrate to form reflected light, and the incident light and the reflected light generate interference to form standing waves along the thickness direction of the photoresist. The standing wave may include peaks and valleys, it being noted that the width of a peak may be greater than the width of a valley.
As shown in fig. 1, in the present embodiment, the parameter adjusting unit 13 is configured to adjust preset parameters to adjust the positions of the peaks and valleys of the standing wave. The position of the peaks and valleys of the standing wave is adjusted, for example, by adjusting the thickness of the substrate and the energy of the exposure. Of course, the baking temperature can be adjusted to adjust the positions of the peaks and valleys of the standing wave.
As shown in fig. 1, in the present embodiment, the development simulation unit 14 is used to simulate a development process to obtain a lithography pattern. The lithographic pattern is on a substrate. Meanwhile, the appearance of the photoetching pattern can be obtained. If the width of the bottom of the photoetching pattern is smaller, the contact area between the photoetching pattern and the substrate is small, and the stability of the photoetching pattern is poor; if the width of the bottom of the lithography pattern is large, the contact area between the lithography pattern and the substrate is large, and the stability of the lithography pattern is strong.
As shown in fig. 1, in this embodiment, after the lithographic pattern is formed, the determining unit 15 may determine whether the adjusted preset parameter can be applied to the experiment according to the topography of the lithographic pattern, for example, when the bottom of the lithographic pattern is wide, for example, when the peak of the standing wave is located at the bottom of the lithographic pattern, the stability of the lithographic pattern is strong, and the adjusted preset parameter can be applied to the experiment. If the stability of the lithographic pattern is poor when the bottom of the lithographic pattern is narrow, for example, when the trough of the standing wave is located at the bottom of the lithographic pattern, the preset parameters need to be adjusted again so that the crest is located at the bottom of the lithographic pattern, and thus the bottom of the lithographic pattern is widened. Of course, the determining unit 15 may also determine whether the adjusted preset parameter can be applied to the experiment according to the reflectivity of the substrate, for example, when the reflectivity is less than 0.1, it indicates that the incident light and the reflected light form a standing wave, and the influence of the standing wave effect is small, so that it can be determined that the stability of the lithography pattern is high.
As shown in fig. 1, in this embodiment, the simulation system 10 obtains a large number of lithography patterns by simulating the formation process of the lithography patterns and adjusting preset parameters, and determines the stability of the lithography patterns by observing the topography of the lithography patterns and determining the contact area between the lithography patterns and the substrate. If the contact area between the photoetching pattern and the substrate is large, the adjusted preset parameters are better, so that the parameters for obtaining the photoetching pattern with high stability can be selected, and the parameters are applied to experiments, thereby reducing the investment of actual production.
As shown in FIG. 1, in the present embodiment, the simulation system 10 may be applied in a computer system, which may include a storage system for storing the usage process of the simulation system 10. The storage system includes, for example, a semiconductor or solid state memory, magnetic tape, a removable computer diskette, a Random Access Memory (RAM), a read-only memory (ROM), a rigid magnetic disk and an optical disk.
As shown in fig. 2, the present embodiment further provides a simulation method of a lithographic pattern, including:
s1: presetting a substrate thickness parameter, a photoresist layer thickness parameter and a mask plate;
s2: simulating incident light to irradiate on a light resistance layer according to the substrate thickness parameter, the light resistance layer thickness parameter and the mask, wherein the incident light is reflected by the substrate to form reflected light, and the reflected light and the incident light form standing waves;
s3: adjusting preset parameters to adjust the positions of wave crests and wave troughs of the standing waves;
s4: simulating development processing to obtain the photoetching pattern;
s5: judging whether the wave crest of the standing wave is positioned at the bottom of the photoetching pattern and/or judging whether the reflectivity of the substrate is smaller than a threshold value; if so, using the adjusted preset parameters in an experiment; if not, the preset parameters are adjusted again.
As shown in fig. 1 and 3, in step S1, a substrate thickness parameter, a photoresist layer thickness parameter and a mask are preset by the parameter setting unit 11 to design the substrate 101, the photoresist layer 103 and the mask 104. The parameter setting unit 11 can adjust the thickness of the substrate 101 by adjusting the substrate thickness parameter, the parameter setting unit 11 can adjust the thickness of the photoresist layer 103 by adjusting the photoresist layer thickness parameter, and the parameter setting unit 11 can also adjust the positions of the light-transmitting region 104a and the shielding region 104b of the mask 104. It should be noted that the substrate thickness parameter also includes an anti-reflection layer thickness parameter, so that when the anti-reflection layer 102 is disposed on the substrate 101, the thickness of the anti-reflection layer 102 can be adjusted. In the present embodiment, the thickness parameter of the anti-reflection layer, that is, the thickness of the anti-reflection layer 102, is adjusted to achieve the purpose of adjusting the thickness of the substrate 101.
As shown in fig. 3, in the present embodiment, the parameter setting unit 11 designs the initial thickness of the substrate 101, the anti-reflection layer 102 and the photoresist layer 103, so as to form the substrate 101, the anti-reflection layer 102 and the photoresist layer 103. Anti-reflective layer 102 is on substrate 101, photoresist layer 103 is on anti-reflective layer 102, and mask 104 is on photoresist layer 103.
As shown in fig. 4, in the present embodiment, the reticle 104 may include a light-transmitting region 104a and a shielding region 104 b. Light can pass through the transmissive region 104a, and light cannot pass through the blocking region 104 b. The light passes through the transparent region 104a to form an exposed region on the photoresist layer 103, and the light cannot pass through the blocking region 104b, thereby forming a non-exposed region on the photoresist layer 103. In the present embodiment, the positions of the light-transmitting area 104a and the shielding area 104b can be adjusted by the parameter setting unit 11.
As shown in fig. 1 and 5, in step S2, the exposure process is simulated by the exposure simulation unit 12, that is, the simulation incident light is irradiated on the photoresist layer 103 through the light-transmitting area 104a, for example, the simulation yellow light is irradiated on the photoresist layer 103. As can be seen from fig. 5, the incident light 105 is irradiated onto the photoresist layer 103 through the light-transmitting region 104a, the incident light 105 enters the photoresist layer 103 and reaches the substrate 101, and the incident light 105 is reflected to form the reflected light 106. After the areas of the photoresist layer 103 irradiated by the incident light 105 are subjected to a developing process, the areas irradiated by the incident light 105 are removed, thereby forming a photolithographic pattern.
As shown in fig. 5 to 6, in the present embodiment, when the incident light 105 and the reflected light 106 meet, that is, a standing wave 107 is formed along the thickness direction of the photoresist layer 103, the standing wave 107 includes, for example, a peak 107a and a valley 107 b. As can be seen from fig. 6, when the standing wave 107 is formed, the width between the peaks 107a is larger than the width between the valleys 107b, and therefore it can be concluded that when the peaks 107a of the standing wave 107 are located at the bottom of the lithographic pattern, the width of the bottom of the lithographic pattern is larger, the contact area of the lithographic pattern with the substrate 101 is larger, and therefore the stability of the lithographic pattern is higher.
As shown in fig. 2, 5, and 6, in step S3, the preset parameters are adjusted by the parameter adjusting unit 13 to adjust the positions of the peaks 107a and the valleys 107 b. In the present embodiment, since the substrate 101 has the anti-reflection layer 102 thereon, the thickness of the anti-reflection layer 102, that is, the thickness of the substrate 101, can be adjusted. In the present embodiment, after the parameter setting unit 11 determines the initial thickness of the antireflection layer 102, the thickness of the antireflection layer 102 is sequentially increased or decreased by the parameter adjusting unit 13, thereby changing the positions of the peaks 107a and the valleys 107b of the standing wave 107. When the thickness of anti-reflection layer 102 is changed, the path of incident light 105 and the path of reflected light 106 are changed, and thus the positions of peaks 107a and valleys 107b of standing wave 107 are changed; the topography of the lithographic pattern can also vary. It should be noted that, in the present embodiment, the thickness of the anti-reflection layer 102 is sequentially increased or decreased within a preset range, so as to form a plurality of standing waves 107, and then the development process is simulated, so that the lithographic pattern can be obtained, and the topography of the lithographic pattern can be obtained. The predetermined range is, for example, 0 to 300 nm.
As shown in fig. 1 and 7, in step S4, a dummy development process is performed by the development simulation unit 14, and after the dummy development process, the photoresist layer 103 in the exposed regions is removed and the photoresist layer 103 in the non-exposed regions is left, forming the lithography pattern 103 a. In the present embodiment, each time the thickness of the anti-reflection layer 102 is adjusted, one development process is simulated, and one lithography pattern 103a is obtained, so that the topography of the lithography pattern 103a can also be known.
As shown in fig. 1 and fig. 8 to 10, in step S5, after the development simulation is performed, the determination unit 15 determines the stability of the lithography pattern 103a based on the topography of the lithography pattern 103 a. For example, when the thickness of the anti-reflection layer 102 is adjusted to 60nm, 100nm, and 130nm in this order by the parameter adjusting unit 13, the topography of the obtained lithography pattern 103a after the simulation development is shown in fig. 8 to 10 in this order. For example, when the thickness of anti-reflective layer 102 is 60nm, the valley 107b of standing wave 107 is located at the bottom of the photoresist pattern 103a, i.e., the width of the bottom of the photoresist pattern 103a is narrower, i.e., the contact area between the bottom of the photoresist pattern 103a and substrate 101 is smaller, and thus the stability of the photoresist pattern 103a is poor. For another example, when the thickness of the anti-reflective layer 102 is 100nm, the half-wave peak of the standing wave 107 is located at the bottom of the lithography pattern 103a, that is, the width of the bottom of the lithography pattern 103a is increased, that is, the contact area between the bottom of the lithography pattern 103a and the substrate 101 is larger, so that the stability of the lithography pattern 103a is better. For another example, when the thickness of the anti-reflective layer 102 is 130nm, the peak 107b of the standing wave 107 is located at the bottom of the lithography pattern 103a, that is, the width of the bottom of the lithography pattern 103a, that is, the contact area between the bottom of the lithography pattern 103a and the substrate 101 becomes larger, so that the stability of the lithography pattern 103a is good. Therefore, the determination unit 15 can determine whether the peak 107a is located at the bottom of the lithography pattern 103 a. If the peak 107a is located at the bottom of the lithography pattern 103a, which means that the contact area of the lithography pattern 103a and the substrate 101 is large, the stability of the lithography pattern 103a is good, and the thickness of the anti-reflection layer 102 can be applied to the experiment. If the peak 107a is not located at the bottom of the pattern 103a, it means that the contact area between the pattern 103a and the substrate 101 is small, the stability of the pattern 103a is poor, and therefore, the thickness of the anti-reflection layer 102 needs to be adjusted again so that the peak 107a is located at the bottom of the pattern 103 a.
As shown in fig. 11, in the present embodiment, in step S5, it is also possible to determine whether the reflectivity of the substrate 101 is smaller than the threshold value. If the reflectivity of the substrate 101 is less than the threshold value, the stability of the lithography pattern 103a is good, and if the reflectivity of the substrate 101 is greater than the threshold value, the stability of the lithography pattern 103a is poor. As can be seen from fig. 9, when the thickness of anti-reflection layer 102 is gradually increased from 50nm, the reflectivity of substrate 101 is less than a threshold value (e.g., 0.1), and thus the stability of lithographic pattern 103a is gradually improved when the thickness of anti-reflection layer 102 is gradually greater than 50 nm. The lower the reflectivity of the substrate 101, the smaller the amplitude of the standing wave 107 formed by the incident light 105 and the reflected light 106, i.e. the smaller the standing wave effect, i.e. the smaller the stability impact on the lithographic pattern 103 a.
As shown in fig. 2, in the present embodiment, it is also possible to simultaneously determine whether the peak 107a of the standing wave 107 is located at the bottom of the lithography pattern 103a and determine whether the reflectivity of the substrate 101 is less than the threshold value. After the preset parameter is adjusted, the peak 107a is located at the bottom of the lithography pattern, and the reflectivity of the substrate 101 is smaller than the threshold, which indicates that the preset parameter can be applied to the experiment. In the determination, it is first determined whether the peak 107a is located at the bottom of the lithography pattern 103a, and then it is determined whether the reflectance of the substrate 101 is smaller than a threshold value.
As shown in fig. 1 and 12, in the present embodiment, after the substrate thickness parameter, the photoresist layer thickness parameter and the mask are preset by the parameter setting unit 11, the initial thicknesses of the substrate 101 and the photoresist layer 103 can be determined, and the positions of the light-transmitting region 104a and the shielding region 104b of the mask 104 can be determined. It should be noted that, when the substrate thickness parameter does not include the anti-reflective layer thickness parameter, that is, the substrate 101 does not have the anti-reflective layer 102 thereon, the thickness of the substrate 101 cannot be changed by adjusting the thickness of the anti-reflective layer 102.
As shown in fig. 1 and 12, in the present embodiment, the developing simulation unit 14 may further include a simulation of a baking process of the photoresist layer 103, that is, a simulation of a baking temperature and a baking time of the photoresist layer 103 before the developing process. Therefore, in step S3, the parameter adjustment unit 13 may also adjust the baking temperature so that the peak 107a is located at the bottom of the lithography pattern 103 a. For example, the baking temperature is sequentially increased or decreased within a preset range, so that a plurality of standing waves 107 can be obtained, and then, after determining whether the peak 107a is located at the bottom of the lithography pattern 103a or whether the reflectivity of the substrate 101 is smaller than a preset value, if the peak 107a is located at the bottom of the lithography pattern 103a and/or the reflectivity of the substrate 101 is smaller than the preset value, the baking temperature and the baking time can be applied to an experiment, and if the peak 107a is not located at the bottom of the lithography pattern 103a and the reflectivity of the substrate 101 is greater than a threshold value, the baking temperature or the baking time needs to be adjusted again by the parameter adjusting unit 13. In the embodiment, since the photoresist layer 103 is weakly acidic, the acid absorption (bottom) of the photoresist layer 103 can be controlled by controlling the baking temperature and the baking time, for example, the baking temperature and the baking time are controlled within a predetermined range to adjust the acid absorption at the bottom, so as to form a plurality of different lithography patterns 103a, and then it is determined whether the peak 107a is located at the bottom of the lithography pattern 103a and/or whether the reflectivity of the substrate 101 is less than the threshold. The baking temperature and baking time may be applied to the experiment if the peak 107a is located at the bottom of the lithography pattern 1073 and/or the reflectivity of the substrate 101 is less than the threshold, and if the peak 107a is not located at the bottom of the lithography pattern 103a and the reflectivity of the substrate 101 is less than the threshold, the baking temperature and baking time may need to be adjusted again and then determined.
As shown in fig. 3 and 13, in some embodiments, when anti-reflection layer 102 is disposed on substrate 101, the thickness of substrate 101 can be adjusted by adjusting the thickness of anti-reflection layer 102. When the photoresist layer 103 is spin-coated on the anti-reflective layer 102, the thickness of the photoresist layer 103 is not uniform due to the different thickness of the photoresist layer 103 and the limitation of the spin-coating process. As shown in fig. 11, when the thickness of the anti-reflective layer 102 is increased, for example, when the thickness of the anti-reflective layer 102 is greater than 100nm, although the thickness of the photoresist layer 103 is different, the variation of the shift of the critical dimension is more stable. Therefore, the stability of the profile of the lithography pattern 103a can be judged by the shift degree of the critical dimension. In this embodiment, since the adjacent lithography patterns 103a are formed with the critical dimension, the shift of the critical dimension may also represent the shift of the lithography pattern 103 a. Therefore, the present embodiment may also determine the stability of the lithography pattern by the offset degree of the lithography pattern 103a, so as to determine the thickness of the anti-reflection layer 102, and apply the determined thickness of the anti-reflection layer 102 to the experiment.
In summary, the present invention provides a simulation method and a simulation system for a lithography pattern, wherein a simulation experiment is performed to simulate a manufacturing process of the lithography pattern, in the simulation experiment, a standing wave is formed along a thickness direction of a photoresist layer due to interference of incident light and reflected light, a width of a peak of the standing wave is greater than a width of a trough of the standing wave, and a preset parameter is adjusted to enable the peak of the standing wave to be located at a bottom of the lithography pattern and/or enable a reflectivity of a substrate to be smaller than a threshold; when the wave crest of the standing wave is positioned at the bottom of the photoetching pattern, the width of the wave crest is larger, so that the bottom of the photoetching pattern is wider, namely the contact area between the photoetching pattern and the substrate is larger, and the stability of the formed photoetching pattern can be higher. Meanwhile, the simulation is carried out through a simulation experiment, and then parameters meeting the conditions in the simulation process are used in the experimental product, so that the investment of actual production can be reduced, and the research and development speed is increased.
Reference throughout this specification to "one embodiment", "an embodiment", or "a specific embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment, and not necessarily all embodiments, of the present invention. Thus, respective appearances of the phrases "in one embodiment", "in an embodiment", or "in a specific embodiment" in various places throughout this specification are not necessarily referring to the same embodiment. Furthermore, the particular features, structures, or characteristics of any specific embodiment of the present invention may be combined in any suitable manner with one or more other embodiments. It is to be understood that other variations and modifications of the embodiments of the invention described and illustrated herein are possible in light of the teachings herein and are to be considered as part of the spirit and scope of the present invention.
It will also be appreciated that one or more of the elements shown in the figures can also be implemented in a more separated or integrated manner, or even removed for inoperability in some circumstances or provided for usefulness in accordance with a particular application.
Additionally, any reference arrows in the drawings/figures should be considered only as exemplary, and not limiting, unless otherwise expressly specified. Further, as used herein, the term "or" is generally intended to mean "and/or" unless otherwise indicated. Combinations of components or steps will also be considered as being noted where terminology is foreseen as rendering the ability to separate or combine is unclear.
As used in the description herein and throughout the claims that follow, "a", "an", and "the" include plural references unless otherwise indicated. Also, as used in the description herein and throughout the claims that follow, unless otherwise indicated, the meaning of "in …" includes "in …" and "on … (on)".
The above description of illustrated embodiments of the invention, including what is described in the abstract of the specification, is not intended to be exhaustive or to limit the invention to the precise forms disclosed herein. While specific embodiments of, and examples for, the invention are described herein for illustrative purposes only, various equivalent modifications are possible within the spirit and scope of the present invention, as those skilled in the relevant art will recognize and appreciate. As indicated, these modifications may be made to the present invention in light of the foregoing description of illustrated embodiments of the present invention and are to be included within the spirit and scope of the present invention.
The systems and methods have been described herein in general terms as the details aid in understanding the invention. Furthermore, various specific details have been given to provide a general understanding of the embodiments of the invention. One skilled in the relevant art will recognize, however, that an embodiment of the invention can be practiced without one or more of the specific details, or with other apparatus, systems, assemblies, methods, components, materials, parts, and/or the like. In other instances, well-known structures, materials, and/or operations are not specifically shown or described in detail to avoid obscuring aspects of embodiments of the invention.
Thus, although the present invention has been described herein with reference to particular embodiments thereof, a latitude of modification, various changes and substitutions are intended in the foregoing disclosures, and it will be appreciated that in some instances some features of the invention will be employed without a corresponding use of other features without departing from the scope and spirit of the invention as set forth. Thus, many modifications may be made to adapt a particular situation or material to the essential scope and spirit of the present invention. It is intended that the invention not be limited to the particular terms used in following claims and/or to the particular embodiment disclosed as the best mode contemplated for carrying out this invention, but that the invention will include any and all embodiments and equivalents falling within the scope of the appended claims. Accordingly, the scope of the invention is to be determined solely by the appended claims.
The above description is only a preferred embodiment of the present application and a description of the applied technical principle, and it should be understood by those skilled in the art that the scope of the present invention related to the present application is not limited to the technical solution of the specific combination of the above technical features, and also covers other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the inventive concept, for example, the technical solutions formed by mutually replacing the above features with (but not limited to) technical features having similar functions disclosed in the present application.
Other technical features than those described in the specification are known to those skilled in the art, and are not described herein in detail in order to highlight the innovative features of the present invention.

Claims (7)

1. A method for simulating a lithographic pattern, comprising:
presetting a substrate thickness parameter, a photoresist layer thickness parameter and a mask plate;
simulating incident light to irradiate on a light resistance layer according to the substrate thickness parameter, the light resistance layer thickness parameter and the mask, wherein the incident light is reflected by the substrate to form reflected light, and the reflected light and the incident light form standing waves;
adjusting preset parameters to adjust the positions of wave crests and wave troughs of the standing waves;
simulating development processing to obtain the photoetching pattern;
judging whether the wave crest of the standing wave is positioned at the bottom of the photoetching pattern and/or judging whether the reflectivity of the substrate is smaller than a threshold value;
if so, using the adjusted preset parameters in an experiment;
if not, adjusting the preset parameters again;
when the substrate thickness parameter comprises an anti-reflection layer thickness parameter, the preset parameter comprises an anti-reflection layer thickness parameter;
sequentially increasing or decreasing the thickness of the anti-reflection layer within a preset range according to the thickness parameter of the anti-reflection layer so as to obtain a plurality of standing waves;
and when the position of the peak of any standing wave is positioned at the bottom of the photoetching pattern and/or the reflectivity of the substrate is smaller than a threshold value, determining the thickness of the anti-reflection layer.
2. The simulation method of claim 1, further comprising simulating a baking process of the photoresist layer after the simulating development process, wherein the baking process comprises adjusting at least a temperature parameter.
3. The simulation method according to claim 2, wherein the temperature is sequentially increased or decreased within a preset range according to the temperature parameter to obtain a plurality of the standing waves.
4. The simulation method according to claim 3, wherein the temperature of the baking process of the photoresist layer is determined when the position of the peak of any of the standing waves is at the bottom of the lithography pattern and/or the reflectivity of the substrate is less than a threshold value.
5. The simulation method according to claim 1, wherein when the peak of the standing wave is located at the bottom of the lithography pattern, the width of the peak of the standing wave is equal to the width of the bottom of the lithography pattern.
6. The simulation method according to claim 1, wherein the determining step further comprises determining whether a degree of deviation of the lithographic pattern is smaller than a threshold value.
7. A system for simulating a lithography pattern using the method for simulating a lithography pattern according to any one of claims 1 to 6, comprising:
the parameter setting unit is used for presetting a substrate thickness parameter and a photoresist layer parameter;
the exposure simulation unit is used for simulating incident light to irradiate on the photoresist layer, the incident light forms reflected light after being reflected by the substrate, and the reflected light and the incident light form standing waves;
the parameter adjusting unit is used for adjusting preset parameters so as to adjust the positions of wave crests and wave troughs of the standing waves;
the development simulation unit is used for simulating development processing to obtain the photoetching pattern;
the judging unit is used for judging whether the wave crest of the standing wave is positioned at the bottom of the photoetching pattern and/or judging whether the reflectivity of the substrate is smaller than a threshold value;
if so, using the adjusted preset parameters in an experiment; if not, the preset parameters are adjusted again.
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CN1405632A (en) * 2001-09-11 2003-03-26 株式会社东芝 Method for determining optical constant of reflection-prevention film and method for forming photoresist pattern
CN109283796A (en) * 2017-07-21 2019-01-29 中芯国际集成电路制造(上海)有限公司 A kind of lithography simulation system
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CN1405632A (en) * 2001-09-11 2003-03-26 株式会社东芝 Method for determining optical constant of reflection-prevention film and method for forming photoresist pattern
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