CN112259537A - Preparation method of programmable diode and ferroelectric memory - Google Patents
Preparation method of programmable diode and ferroelectric memory Download PDFInfo
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- CN112259537A CN112259537A CN202011152398.2A CN202011152398A CN112259537A CN 112259537 A CN112259537 A CN 112259537A CN 202011152398 A CN202011152398 A CN 202011152398A CN 112259537 A CN112259537 A CN 112259537A
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- tungsten plug
- upper electrode
- programmable diode
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- 238000002360 preparation method Methods 0.000 title claims abstract description 25
- 230000015654 memory Effects 0.000 title claims abstract description 20
- 229910052721 tungsten Inorganic materials 0.000 claims abstract description 45
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims abstract description 41
- 239000010937 tungsten Substances 0.000 claims abstract description 41
- 238000000034 method Methods 0.000 claims abstract description 25
- 230000008569 process Effects 0.000 claims abstract description 17
- 239000002346 layers by function Substances 0.000 claims abstract description 14
- 239000000463 material Substances 0.000 claims abstract description 13
- 238000000151 deposition Methods 0.000 claims abstract description 12
- 239000010409 thin film Substances 0.000 claims abstract description 4
- 238000000231 atomic layer deposition Methods 0.000 claims description 8
- 238000005229 chemical vapour deposition Methods 0.000 claims description 8
- 238000005566 electron beam evaporation Methods 0.000 claims description 8
- 238000004549 pulsed laser deposition Methods 0.000 claims description 8
- 238000004544 sputter deposition Methods 0.000 claims description 8
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 5
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 4
- 230000004888 barrier function Effects 0.000 claims description 4
- 238000009792 diffusion process Methods 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 4
- 239000010410 layer Substances 0.000 claims description 4
- 150000002736 metal compounds Chemical class 0.000 claims description 4
- 238000005498 polishing Methods 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 4
- 238000000206 photolithography Methods 0.000 claims description 2
- 238000003860 storage Methods 0.000 abstract description 3
- 238000004519 manufacturing process Methods 0.000 description 7
- 239000010408 film Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- HTXDPTMKBJXEOW-UHFFFAOYSA-N iridium(IV) oxide Inorganic materials O=[Ir]=O HTXDPTMKBJXEOW-UHFFFAOYSA-N 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000001066 destructive effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
- H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
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Abstract
一种可编程二极管的制备方法，包括以下步骤：采用标准CMOS工艺形成钨栓塞；以所述钨栓塞作为下电极，并在钨栓塞上沉积功能层材料如铁电薄膜；在所述功能层材料上沉积上电极；图形化上电极和功能层，完成所述可编程二极管的制备。本发明还公开了一种采用如上所述的可编程二极管的制备方法所制备得到的可编程二极管的铁电存储器，本发明所提出的可编程二极管的制备方法，不需要生长下电极，降低了工艺的复杂度；本发明所提出的铁电存储器，由一个晶体管和一个可编程二极管构成，该设计是根据二极管的极性不同来存储信息的，因此可以进一步缩小器件面积，提高存储密度。
A preparation method of a programmable diode, comprising the following steps: using a standard CMOS process to form a tungsten plug; using the tungsten plug as a lower electrode, and depositing a functional layer material such as a ferroelectric thin film on the tungsten plug; The upper electrode is deposited on the upper electrode; the upper electrode and the functional layer are patterned to complete the preparation of the programmable diode. The present invention also discloses a ferroelectric memory with a programmable diode prepared by using the above-mentioned preparation method of the programmable diode. The preparation method of the programmable diode proposed by the present invention does not require the growth of the lower electrode, and reduces the The complexity of the process; the ferroelectric memory proposed by the present invention is composed of a transistor and a programmable diode. The design stores information according to the polarity of the diode, so the device area can be further reduced and the storage density can be improved.
Description
Technical Field
The invention relates to the technical field of memory architecture design, in particular to a preparation method of a programmable diode and a ferroelectric memory.
Background
Ferroelectric materials have wide applications in the field of microelectronics manufacturing and memory technology. In the prior art, ferroelectric materials are mostly used for ferroelectric memories, in the integration architecture of the traditional ferroelectric memory, a transistor and a ferroelectric capacitor (1T1C) are required to be integrated, the ferroelectric memory in the structure of 1T1C stores information based on the charge change of the capacitor, the unit area is too large to be beneficial to high-density integration, and destructive reading is performed. Therefore, a ferroelectric memory having a smaller device area and a higher memory density is needed.
Disclosure of Invention
In view of the above, the present invention provides a method for manufacturing a programmable diode and a ferroelectric memory, so as to partially solve at least one of the above technical problems.
In order to achieve the above object, as an aspect of the present invention, there is provided a method for manufacturing a programmable diode, including the steps of:
forming a tungsten plug by adopting a standard CMOS process;
taking the tungsten plug as a lower electrode, and depositing a functional layer material such as a ferroelectric film on the tungsten plug;
depositing an upper electrode on the functional layer material;
and patterning the upper electrode and the functional layer to finish the preparation of the programmable diode.
The forming of the tungsten plug by using the CMOS process specifically includes:
forming a tungsten plug hole above the MOS device by photoetching and etching;
depositing a diffusion barrier layer Ti/TiN with the thickness range of 3 nm-50 nm;
filling the holes with tungsten by adopting plasma enhanced chemical vapor deposition, wherein the thickness of the tungsten is 50-5000 nm;
and forming a tungsten plug through chemical mechanical polishing, wherein the diameter of the tungsten plug is 20 nm-90 nm.
The ferroelectric film is prepared by one of the processes of electron beam evaporation, chemical vapor deposition, pulsed laser deposition, atomic layer deposition or sputtering.
Wherein the upper electrode is made of W, Ru, Al, Ti and conductive metal compounds of TiN, TaN and IrO2、ITO、IZO。
The upper electrode is prepared by one of the processes of electron beam evaporation, chemical vapor deposition, pulsed laser deposition, atomic layer deposition or sputtering.
Wherein the thickness range of the upper electrode is 5 nm-200 nm.
As another aspect of the invention, the invention also provides the programmable diode prepared by the preparation method.
As a further aspect of the present invention, there is also provided a ferroelectric memory comprising a programmable diode and a transistor as described above.
Based on the above technical solution, the method for manufacturing the programmable diode and the ferroelectric memory of the present invention have at least one or a part of the following advantages compared with the prior art:
(1) the preparation method of the programmable diode provided by the invention does not need to grow a lower electrode, thereby reducing the complexity of the process;
(2) the ferroelectric memory provided by the invention is composed of a transistor and a programmable diode, and the design stores information according to different polarities of the diode, so that the area of the device can be further reduced, and the storage density can be improved.
Drawings
Fig. 1 is a schematic flow chart of a method for manufacturing a programmable diode according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of step S11 in the preparation method according to the embodiment of the present invention;
FIG. 3 is a schematic diagram of step S12 in the preparation method according to the embodiment of the present invention;
fig. 4 is a schematic diagram of step S13 in the preparation method according to the embodiment of the present invention.
Detailed Description
The invention discloses a preparation method of a programmable diode, which comprises the following steps:
forming a tungsten plug by adopting a standard CMOS process;
taking the tungsten plug as a lower electrode, and depositing a functional layer material such as a ferroelectric film on the tungsten plug;
depositing an upper electrode on the functional layer material;
and patterning the upper electrode and the functional layer to finish the preparation of the programmable diode.
The forming of the tungsten plug by using the CMOS process specifically includes:
forming a tungsten plug hole above the MOS device by photoetching and etching;
depositing a diffusion barrier layer Ti/TiN with the thickness range of 3 nm-50 nm;
filling the holes with tungsten by adopting plasma enhanced chemical vapor deposition, wherein the thickness of the tungsten is 50-5000 nm;
and forming a tungsten plug through chemical mechanical polishing, wherein the diameter of the tungsten plug is 20 nm-90 nm.
The ferroelectric film is prepared by one of the processes of electron beam evaporation, chemical vapor deposition, pulsed laser deposition, atomic layer deposition or sputtering. The upper electrode is made of W, Ru, Al, Ti and conductive metal compounds TiN, TaN and IrO2ITO, IZO. The upper electrode is prepared by one of the processes of electron beam evaporation, chemical vapor deposition, pulsed laser deposition, atomic layer deposition or sputtering.
Wherein the thickness range of the upper electrode is 5 nm-200 nm.
In order that the objects, technical solutions and advantages of the present invention will become more apparent, the present invention will be further described in detail with reference to the accompanying drawings in conjunction with the following specific embodiments.
Fig. 1 is a schematic flow chart of a method for manufacturing a programmable diode; the method specifically comprises the following steps:
s11: forming a tungsten plug by adopting a standard CMOS process;
as shown in fig. 2, step S1 specifically includes forming a tungsten plug hole above the MOS device by photolithography and etching;
depositing a diffusion barrier layer Ti/TiN with the thickness range of 3 nm-50 nm;
filling the holes with tungsten by adopting Plasma Enhanced Chemical Vapor Deposition (PECVD), wherein the thickness of the tungsten is 50-5000 nm;
and forming a tungsten plug 21 through chemical mechanical polishing, wherein the diameter of the tungsten plug 21 is 20 nm-90 nm.
Wherein, a part of fig. 2 shows a cross-sectional view after the conventional CMOS process is performed to the end of the tungsten plug 21. The subsequent process steps are performed on the upper surface of tungsten plug 21 as shown in part b of fig. 2.
S12: taking a tungsten plug 21 as a lower electrode, and depositing a functional layer material such as a ferroelectric film 22 on the tungsten plug 21; as shown in fig. 3.
The ferroelectric thin film 22 can be prepared by electron beam evaporation, chemical vapor deposition, pulsed laser deposition, atomic layer deposition, or sputtering.
In the step, the tungsten plug is directly used as the lower electrode without additionally manufacturing the lower electrode, so that the process steps can be saved, and the process complexity is reduced.
S13: depositing an upper electrode 23 on the functional layer material; as shown in fig. 4.
The material of the upper electrode 23 includes but is not limited to W, Ru, Al, Ti and conductive metal compound TiN, TaN, IrO2、ITO、IZO。
The upper electrode 23 can be prepared by processes such as electron beam evaporation, chemical vapor deposition, pulsed laser deposition, atomic layer deposition or sputtering.
The thickness of the upper electrode 23 is in the range of 5nm to 200 nm.
S14: and patterning the upper electrode and the functional layer to finish the preparation of the programmable diode.
The invention also discloses a programmable diode prepared by the preparation method of the programmable diode and a ferroelectric memory adopting the programmable diode, wherein the ferroelectric memory comprises a transistor and a programmable ferroelectric diode (1T1D), and the design is used for storing information according to different polarities of the diode, so that the area of the device can be further reduced, and the storage density of the memory can be improved.
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are only exemplary embodiments of the present invention and are not intended to limit the present invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (8)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011152398.2A CN112259537A (en) | 2020-10-22 | 2020-10-22 | Preparation method of programmable diode and ferroelectric memory |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011152398.2A CN112259537A (en) | 2020-10-22 | 2020-10-22 | Preparation method of programmable diode and ferroelectric memory |
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| CN112259537A true CN112259537A (en) | 2021-01-22 |
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| CN202011152398.2A Pending CN112259537A (en) | 2020-10-22 | 2020-10-22 | Preparation method of programmable diode and ferroelectric memory |
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1675769A (en) * | 2002-08-20 | 2005-09-28 | 皇家飞利浦电子股份有限公司 | Ferroelectric device and method of manufacturing such a device |
| US20060073613A1 (en) * | 2004-09-29 | 2006-04-06 | Sanjeev Aggarwal | Ferroelectric memory cells and methods for fabricating ferroelectric memory cells and ferroelectric capacitors thereof |
| WO2011091709A1 (en) * | 2010-01-28 | 2011-08-04 | 复旦大学 | Ferro-resistive random access memory (ferro-rram), operation method and manufacturing mehtod thereof |
| CN102683585A (en) * | 2011-03-18 | 2012-09-19 | 中国科学院微电子研究所 | Resistance memory integrated with standard CMOS (complementary Metal oxide semiconductor) process and preparation method thereof |
| CN102683584A (en) * | 2011-03-18 | 2012-09-19 | 中国科学院微电子研究所 | Metal oxide resistor memory integrated with standard CMOS (complementary Metal oxide semiconductor) process and preparation method thereof |
| CN106910759A (en) * | 2017-02-22 | 2017-06-30 | 中国科学院微电子研究所 | Transition metal oxide-based selector and preparation method thereof |
| CN110544742A (en) * | 2019-08-29 | 2019-12-06 | 华中科技大学 | A kind of ferroelectric phase change hybrid memory unit, memory and operation method |
-
2020
- 2020-10-22 CN CN202011152398.2A patent/CN112259537A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1675769A (en) * | 2002-08-20 | 2005-09-28 | 皇家飞利浦电子股份有限公司 | Ferroelectric device and method of manufacturing such a device |
| US20060073613A1 (en) * | 2004-09-29 | 2006-04-06 | Sanjeev Aggarwal | Ferroelectric memory cells and methods for fabricating ferroelectric memory cells and ferroelectric capacitors thereof |
| WO2011091709A1 (en) * | 2010-01-28 | 2011-08-04 | 复旦大学 | Ferro-resistive random access memory (ferro-rram), operation method and manufacturing mehtod thereof |
| CN102683585A (en) * | 2011-03-18 | 2012-09-19 | 中国科学院微电子研究所 | Resistance memory integrated with standard CMOS (complementary Metal oxide semiconductor) process and preparation method thereof |
| CN102683584A (en) * | 2011-03-18 | 2012-09-19 | 中国科学院微电子研究所 | Metal oxide resistor memory integrated with standard CMOS (complementary Metal oxide semiconductor) process and preparation method thereof |
| CN106910759A (en) * | 2017-02-22 | 2017-06-30 | 中国科学院微电子研究所 | Transition metal oxide-based selector and preparation method thereof |
| CN110544742A (en) * | 2019-08-29 | 2019-12-06 | 华中科技大学 | A kind of ferroelectric phase change hybrid memory unit, memory and operation method |
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Application publication date: 20210122 |