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CN112271257B - A kind of preparation method of stretchable semiconductor device - Google Patents

A kind of preparation method of stretchable semiconductor device Download PDF

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CN112271257B
CN112271257B CN202010991589.1A CN202010991589A CN112271257B CN 112271257 B CN112271257 B CN 112271257B CN 202010991589 A CN202010991589 A CN 202010991589A CN 112271257 B CN112271257 B CN 112271257B
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electrode
substrate
sacrificial layer
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CN112271257A (en
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张敏
黄巍宏
焦浩轩
黄秋月
张娇娜
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Peking University Shenzhen Graduate School
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/80Constructional details
    • H10K10/82Electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40Organic transistors
    • H10K10/46Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462Insulated gate field-effect transistors [IGFETs]
    • H10K10/491Vertical transistors, e.g. vertical carbon nanotube field effect transistors [CNT-FETs]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10Deposition of organic active material
    • H10K71/12Deposition of organic active material using liquid deposition, e.g. spin coating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/60Forming conductive regions or layers, e.g. electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/621Providing a shape to conductive layers, e.g. patterning or selective deposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/20Carbon compounds, e.g. carbon nanotubes or fullerenes
    • H10K85/221Carbon nanotubes

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Abstract

The invention relates to a preparation method of a stretchable semiconductor device, which comprises the following steps: forming a substrate sacrificial layer on a substrate; forming a substrate on the base plate sacrificial layer; forming a first electrode sacrificial layer on a substrate; forming a first electrode on the first electrode sacrificial layer; removing the first electrode sacrificial layer; forming a dielectric layer on the first electrode; forming a second electrode sacrificial layer on the dielectric layer; forming a second electrode and a third electrode on the second electrode sacrificial layer; forming a channel layer between the second electrodes; and removing the second electrode sacrificial layer. The invention further includes another method of making a stretchable semiconductor device.

Description

一种可拉伸半导体器件的制备方法A kind of preparation method of stretchable semiconductor device

技术领域technical field

本发明涉及一种制备方法,特别地涉及一种可拉伸半导体器件的制备方法。The present invention relates to a preparation method, in particular to a preparation method of a stretchable semiconductor device.

背景技术Background technique

可拉伸半导体器件可以大致分为本征可拉伸和非本征可拉伸两种。非本征可拉伸半导体器件可通过将传统的硬质材料制作成特殊的结构,或者使用特殊方法实现一定的拉伸性。但这些处理方式会在大面积图形化,工作稳定性,拉伸性等方面受到影响和限制。本征可拉伸半导体器件的制备材料,包括衬底,介电层,电极,半导体层,互连线均为可拉伸结构。本征可拉伸半导体能够在大面积集成,拉伸稳定性方面存在优势。Stretchable semiconductor devices can be roughly classified into two types: intrinsically stretchable and extrinsically stretchable. Extrinsic stretchable semiconductor devices can achieve certain stretchability by fabricating traditional hard materials into special structures or using special methods. However, these processing methods will be affected and limited in large-area patterning, work stability, and stretchability. The preparation materials of intrinsically stretchable semiconductor devices, including substrates, dielectric layers, electrodes, semiconductor layers, and interconnects are all stretchable structures. Intrinsically stretchable semiconductors have advantages in large-area integration and tensile stability.

制造本征可拉伸半导体器件需要使用可拉伸的材料,但是这些材料大多数都是基于溶液的,可拉伸半导体器件在结构上是层叠结构的,在基于溶液法沉积下一层材料时,可能会对已制备好的底层材料造成破坏,引起包括溶解,混合或起皱等问题。因此,通常分别制备每层结构,再通过多步转移工艺将多层结构转移到同一衬底上,从而完成本征可拉伸半导体器件的制备。然而,由于这种工艺在转移过程中需要复杂的对准操作,导致所制备的器件尺寸较大从而影响器件集成密度,同时,器件良率也较低。Fabrication of intrinsically stretchable semiconductor devices requires the use of stretchable materials, but most of these materials are solution-based. Stretchable semiconductor devices are structurally stacked, and when the next layer of material is deposited based on solution methods , may cause damage to the prepared base material, causing problems including dissolution, mixing or wrinkling. Therefore, each layer structure is usually prepared separately, and then the multilayer structure is transferred to the same substrate through a multi-step transfer process, thereby completing the fabrication of intrinsically stretchable semiconductor devices. However, since such a process requires a complicated alignment operation during the transfer process, the size of the fabricated device is large, which affects the device integration density, and at the same time, the device yield is also low.

近些年来,喷墨打印为实现无损器件集成提供了一种解决方案,通过选取合适的正交油墨避免材料混溶,该方式在制备可拉伸半导体方面取得了重大进展。但是,受限于当前的喷墨打印技术,通过打印方式制备的可拉伸半导体器件,往往表现出相对较低的图形分辨率,因此限制了器件特征尺寸进一步缩小。同时,在实现打印油墨稳定性方面仍然具有一定困难,尤其在针对新材料的油墨制备方面也存在不小挑战,这些因素限制了通过打印工艺实现高度集成。In recent years, inkjet printing has provided a solution to achieve non-destructive device integration, and significant progress has been made in fabricating stretchable semiconductors by choosing suitable orthogonal inks to avoid material miscibility. However, limited by current inkjet printing technology, stretchable semiconductor devices prepared by printing often exhibit relatively low graphic resolution, thus limiting the further reduction of device feature size. At the same time, there are still certain difficulties in achieving the stability of printing inks, especially in the preparation of inks for new materials. These factors limit the realization of high integration through the printing process.

因此,寻找一种方法来制造本征可拉伸半导体器件,使其同时具有高可拉伸性,高电学性能,小的特征尺寸以及可批量生产,对开发可拉伸半导体器件至关重要。Therefore, finding a way to fabricate intrinsically stretchable semiconductor devices with high stretchability, high electrical performance, small feature size, and mass production at the same time is crucial for the development of stretchable semiconductor devices.

发明内容SUMMARY OF THE INVENTION

针对现有技术中存在的技术问题,本发明提出了一种可拉伸半导体器件的制备方法,包括:在基板上形成基板牺牲层;在基板牺牲层上形成衬底;在衬底上形成第一电极牺牲层;在第一电极牺牲层上形成第一电极层并对其进行图形化形成第一电极;去除第一电极牺牲层;在第一电极上形成介电层;在介电层上形成第二电极牺牲层;在第二电极牺牲层上形成第二电极层,并对其进行图形化形成第二电极和第三电极;在第二电极和第三电极之间形成沟道层,并对其进行图形化形成沟道;以及去除第二电极牺牲层。In view of the technical problems existing in the prior art, the present invention provides a method for preparing a stretchable semiconductor device, which includes: forming a substrate sacrificial layer on a substrate; forming a substrate on the substrate sacrificial layer; forming a first substrate on the substrate an electrode sacrificial layer; forming a first electrode layer on the first electrode sacrificial layer and patterning it to form a first electrode; removing the first electrode sacrificial layer; forming a dielectric layer on the first electrode; on the dielectric layer forming a second electrode sacrificial layer; forming a second electrode layer on the second electrode sacrificial layer, and patterning it to form a second electrode and a third electrode; forming a channel layer between the second electrode and the third electrode, and patterning it to form a channel; and removing the second electrode sacrificial layer.

特别的,在形成所述第一电极牺牲层和/或第二电极牺牲层后,进一步包括:前烘处理。In particular, after forming the first electrode sacrificial layer and/or the second electrode sacrificial layer, the method further includes: pre-baking treatment.

特别的,所述基板材料包括硅片或玻璃。Particularly, the substrate material includes silicon wafer or glass.

特别的,所述基板牺牲层材料包括葡聚糖或PVA。Particularly, the material of the substrate sacrificial layer includes dextran or PVA.

特别的,所述衬底材料包括PDMS、Ecoflex或PUU。In particular, the substrate material includes PDMS, Ecoflex or PUU.

特别的,所述第一电极牺牲层和/或第二电极牺牲层材料包括IGZO或Al2O3Particularly, the material of the first electrode sacrificial layer and/or the second electrode sacrificial layer includes IGZO or Al 2 O 3 .

特别的,所述第一电极、第二电极材料和/或第三电极包括金属性碳纳米管或导电纳米线。Particularly, the first electrode, the second electrode material and/or the third electrode include metallic carbon nanotubes or conductive nanowires.

特别的,其中所述介电层材料包括PUU、PDMS或SEBS。Particularly, the dielectric layer material includes PUU, PDMS or SEBS.

特别的,其中所述沟道层材料包括半导体性碳纳米管。Particularly, the channel layer material includes semiconducting carbon nanotubes.

特别的,其中所述基板牺牲层和/或介电层形成过程中进一步包括固化过程,固化温度为20℃到100℃,固化时间为1小时至12小时,其中所述固化温度与固化时间成反比。In particular, the formation process of the substrate sacrificial layer and/or the dielectric layer further includes a curing process, the curing temperature is 20°C to 100°C, and the curing time is 1 hour to 12 hours, wherein the curing temperature and the curing time are different. inversely proportional.

特别的,在形成所述基板牺牲层前,进一步包括:对所述基板进行亲水性处理。In particular, before forming the substrate sacrificial layer, the method further includes: performing hydrophilic treatment on the substrate.

特别的,在去除所述第二电极牺牲层后,进一步包括:去除所述基板牺牲层。Particularly, after removing the second electrode sacrificial layer, the method further includes: removing the substrate sacrificial layer.

本发明进一步包括一种可拉伸半导体器的件制备方法,包括:在基板上形成基板牺牲层;在基板牺牲层上形成衬底;在衬底上形成第一电极牺牲层;在第一电极牺牲层上形成第一电极层并对其进行图形化形成第二电极和第三电极;在第二电极和第三电极之间形成沟道层,并对其图形化形成沟道;去除第一电极牺牲层;在第二电极、第三电极和沟道上形成介电层;在介电层上形成第二电极牺牲层;在第二电极牺牲层上形成第二电极层并对其进行图形化形成第一电极;去除第二电极牺牲层。The present invention further includes a method for fabricating a stretchable semiconductor device, comprising: forming a substrate sacrificial layer on a substrate; forming a substrate on the substrate sacrificial layer; forming a first electrode sacrificial layer on the substrate; forming a first electrode layer on the sacrificial layer and patterning it to form a second electrode and a third electrode; forming a channel layer between the second electrode and the third electrode, and patterning it to form a channel; removing the first electrode electrode sacrificial layer; forming a dielectric layer on the second electrode, the third electrode and the channel; forming a second electrode sacrificial layer on the dielectric layer; forming a second electrode layer on the second electrode sacrificial layer and patterning it forming a first electrode; removing the second electrode sacrificial layer.

特别的,在形成所述第一电极牺牲层和/或第二电极牺牲层后,进一步包括:前烘处理。In particular, after forming the first electrode sacrificial layer and/or the second electrode sacrificial layer, the method further includes: pre-baking treatment.

特别的,所述基板材料包括硅片或玻璃。Particularly, the substrate material includes silicon wafer or glass.

特别的,所述基板牺牲层材料包括葡聚糖或PVA。Particularly, the material of the substrate sacrificial layer includes dextran or PVA.

特别的,所述衬底材料包括PDMS、Ecoflex或PUU。In particular, the substrate material includes PDMS, Ecoflex or PUU.

特别的,所述第一电极牺牲层和/或第二电极牺牲层材料包括IGZO或Al2O3Particularly, the material of the first electrode sacrificial layer and/or the second electrode sacrificial layer includes IGZO or Al 2 O 3 .

特别的,所述第一电极、第二电极和/或第三电极材料包括金属性碳纳米管或导电纳米线。Particularly, the materials of the first electrode, the second electrode and/or the third electrode include metallic carbon nanotubes or conductive nanowires.

特别的,其中所述介电层材料包括PUU、PDMS或SEBS。Particularly, the dielectric layer material includes PUU, PDMS or SEBS.

特别的,其中所述沟道层材料包括半导体性碳纳米管。Particularly, the channel layer material includes semiconducting carbon nanotubes.

特别的,其中所述基板牺牲层和/或介电层形成过程中进一步包括固化过程,固化温度为20℃到100℃,固化时间为1小时至12小时,其中所述固化温度与固化时间成反比。In particular, the formation process of the substrate sacrificial layer and/or the dielectric layer further includes a curing process, the curing temperature is 20°C to 100°C, and the curing time is 1 hour to 12 hours, wherein the curing temperature and the curing time are different. inversely proportional.

特别的,在形成所述基板牺牲层前,进一步包括:对所述基板进行亲水性处理。In particular, before forming the substrate sacrificial layer, the method further includes: performing hydrophilic treatment on the substrate.

特别的,在去除所述第二电极牺牲层后,进一步包括:去除所述基板牺牲层。Particularly, after removing the second electrode sacrificial layer, the method further includes: removing the substrate sacrificial layer.

附图说明Description of drawings

下面,将结合附图对本发明的优选实施方式进行进一步详细的说明,其中:Below, the preferred embodiments of the present invention will be described in further detail in conjunction with the accompanying drawings, wherein:

图1A~图1L是根据本发明的一个实施例一种可拉伸半导体器件的制备方法制备器件结构示意图;1A to 1L are schematic diagrams illustrating the structure of a device prepared by a method for fabricating a stretchable semiconductor device according to an embodiment of the present invention;

图2A~图2L是根据本发明的一个实施例一种可拉伸半导体器件的制备方法制备器件结构立体图;2A-2L are perspective views of device structures prepared by a method for fabricating a stretchable semiconductor device according to an embodiment of the present invention;

图3是根据本发明的一个实施例一种可拉伸半导体器件的制备方法流程示意图;3 is a schematic flowchart of a method for fabricating a stretchable semiconductor device according to an embodiment of the present invention;

图4A是根据本发明的一个实施例一种可拉伸半导体器件的制备方法所制备的可拉伸半导体拉伸状态图;4A is a drawing state diagram of a stretchable semiconductor prepared by a method for fabricating a stretchable semiconductor device according to an embodiment of the present invention;

图4B是根据本发明的一个实施例一种可拉伸半导体器件的制备方法所制备的可拉伸半导体拉伸度不同情况下IDS-VGS关系图;4B is an I DS - V GS relationship diagram of a stretchable semiconductor prepared by a method for fabricating a stretchable semiconductor device according to an embodiment of the present invention under different stretches;

图4C是根据本发明的一个实施例一种可拉伸半导体器件的制备方法所制备的可拉伸半导体拉伸度、迁移率和亚阈值摆幅关系图。FIG. 4C is a graph showing the relationship between stretchability, mobility and subthreshold swing of a stretchable semiconductor fabricated by a method for fabricating a stretchable semiconductor device according to an embodiment of the present invention.

具体实施方式Detailed ways

为使本发明实施例的目的、技术方案和优点更加清楚,下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。In order to make the purposes, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments These are some embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

在以下的详细描述中,可以参看作为本申请一部分用来说明本申请的特定实施例的各个说明书附图。在附图中,相似的附图标记在不同图式中描述大体上类似的组件。本申请的各个特定实施例在以下进行了足够详细的描述,使得具备本领域相关知识和技术的普通技术人员能够实施本申请的技术方案。应当理解,还可以利用其它实施例或者对本申请的实施例进行结构、逻辑或者电性的改变。In the following detailed description, reference may be made to the accompanying drawings, which are considered a part of this application to illustrate specific embodiments of the application. In the figures, like reference numerals describe substantially similar components in the different figures. The specific embodiments of the present application are described in sufficient detail below to enable those of ordinary skill with relevant knowledge and technology in the art to implement the technical solutions of the present application. It should be understood that other embodiments may also be utilized or structural, logical or electrical changes may be made to the embodiments of the present application.

为了制备具有高可拉伸性,高电学性能,小的特征尺寸以及可批量生产的本征可拉伸半导体器件,光刻和等离子蚀刻的传统工艺在工艺兼容性、设备成熟度和低成本方面具有许多优势。然而,大部分可拉伸的有机弹性体不耐等离子刻蚀,且难以在上面直接通过溶液法沉积其他材料,所以,在基于光刻工艺制造可拉伸半导体器件的过程中,引入适用于所选取材料体系的保护层尤为重要。但无机保护层的引入,会造成晶体管的电学性能在拉伸后出现明显退化。因此,在光刻平台上制备可拉伸半导体器件的发展较为缓慢。In order to fabricate intrinsically stretchable semiconductor devices with high stretchability, high electrical performance, small feature size, and mass production, traditional processes of photolithography and plasma etching have been developed in terms of process compatibility, equipment maturity, and low cost. Has many advantages. However, most stretchable organic elastomers are not resistant to plasma etching, and it is difficult to deposit other materials directly on them by solution methods. Therefore, in the process of fabricating stretchable semiconductor devices based on photolithography, the introduction of It is particularly important to select the protective layer of the material system. However, the introduction of an inorganic protective layer will cause the electrical properties of the transistor to be significantly degraded after stretching. Therefore, the development of stretchable semiconductor devices on lithographic platforms has been slow.

本申请提供了一种制备本征可拉伸半导体器件的方法,在利用了光刻和等离子刻蚀的优势例如对准效果等的同时,规避了之前的问题,实现了高可拉伸性、高电学性能稳定、小尺寸的可拉伸半导体器件的制备。The present application provides a method for preparing an intrinsically stretchable semiconductor device, which avoids the previous problems while utilizing the advantages of photolithography and plasma etching, such as alignment effects, and achieves high stretchability, Fabrication of stretchable semiconductor devices with high electrical stability and small size.

下面,将结合附图对本发明的优选实施方式进行进一步详细的说明,其中:Below, the preferred embodiments of the present invention will be described in further detail in conjunction with the accompanying drawings, wherein:

图1A~图1L是根据本发明的一个实施例一种可拉伸半导体器件的制备方法制备器件结构示意图,图2A~图2L是根据本发明的一个实施例一种可拉伸半导体器件的制备方法制备器件结构立体图,图3是根据本发明的一个实施例一种可拉伸半导体器件的制备方法流程示意图。其中,图2A~图2L与图1A~图1L中的结构一一对应,图3与图1A~图1L中的步骤一一对应。下面结合附图对本申请进行详细阐述。其中,所涉及方法步骤仅为示例性表述,图中仅以一种底栅晶体管为例进行了展示,如本领域技术人员所熟知,所公开方法同样适用于其他类型半导体器件,例如二极管等。1A to 1L are schematic diagrams illustrating the structure of a device prepared by a method for fabricating a stretchable semiconductor device according to an embodiment of the present invention, and FIGS. 2A to 2L are the fabrication of a stretchable semiconductor device according to an embodiment of the present invention. The method is a perspective view of a device structure, and FIG. 3 is a schematic flowchart of a method for fabricating a stretchable semiconductor device according to an embodiment of the present invention. 2A to 2L correspond to the structures in FIGS. 1A to 1L one-to-one, and FIG. 3 corresponds to the steps in FIGS. 1A to 1L one-to-one. The present application will be described in detail below with reference to the accompanying drawings. The method steps involved are only exemplary representations, and only one bottom-gate transistor is shown in the figure. As known to those skilled in the art, the disclosed method is also applicable to other types of semiconductor devices, such as diodes and the like.

本申请所涉及方法中,无特殊说明的情况下,聚合物固化过程不在步骤中赘述。在一些实施例中,固化温度为20℃至100℃,固化时间为1小时至12小时,固化时间和固化温度成反比。无特殊说明的情况下,固化过程不在步骤中体现。In the methods involved in the present application, unless otherwise specified, the polymer curing process is not repeated in the steps. In some embodiments, the curing temperature is 20°C to 100°C, the curing time is 1 hour to 12 hours, and the curing time and curing temperature are inversely proportional. Without special instructions, the curing process is not reflected in the steps.

步骤1001:基板表面亲水性处理。根据一个实施例,基板可以包括硅片,亲水处理可以包括氧等离子处理。Step 1001 : hydrophilic treatment on the surface of the substrate. According to one embodiment, the substrate may include a silicon wafer, and the hydrophilic treatment may include oxygen plasma treatment.

在一些实施例中,如图1A和图2A所示,以硅片作为制备工艺的基板101,先用氧等离子体以例如100W的功率将基板101表面处理5分钟。处理后的基板101亲水性得到提升。在一些实施例中,基板101可以是硅片,或者可由其他硬质材料替代,例如玻璃。当然,也可以利用其他方法来对基板101进行亲水处理。In some embodiments, as shown in FIG. 1A and FIG. 2A , a silicon wafer is used as the substrate 101 in the preparation process, and the surface of the substrate 101 is first treated with oxygen plasma at a power of 100 W for 5 minutes. The hydrophilicity of the processed substrate 101 is improved. In some embodiments, the substrate 101 may be a silicon wafer, or may be replaced by other hard materials, such as glass. Of course, other methods can also be used to perform hydrophilic treatment on the substrate 101 .

步骤1002:在基板上形成基板牺牲层。根据一个实施例,基板牺牲层可以包括葡聚糖。Step 1002 : forming a substrate sacrificial layer on the substrate. According to one embodiment, the substrate sacrificial layer may include dextran.

在一些实施例中,如图1B和图2B所示,将葡聚糖以1:10比例溶于去离子水,并在40℃下搅动1小时,形成葡聚糖溶液。在基板101表面以2000rpm旋涂葡聚糖溶液,时长50s,以得到550纳米厚的基板牺牲层102。再在加热板上以120℃进行烘烤处理,时长5min。当然,也可以采用其他方法形成基板牺牲层102。在一些实施例中,基板牺牲层102也可以采用其他材料,如PVA等,只要这种材料具有水溶性且对器件其他结构无影响即可。In some embodiments, as shown in FIGS. 1B and 2B , dextran was dissolved in deionized water at a ratio of 1:10 and agitated at 40° C. for 1 hour to form a dextran solution. The dextran solution was spin-coated on the surface of the substrate 101 at 2000 rpm for 50 s to obtain the substrate sacrificial layer 102 with a thickness of 550 nm. Then bake on a heating plate at 120°C for 5 min. Of course, other methods can also be used to form the substrate sacrificial layer 102 . In some embodiments, the substrate sacrificial layer 102 can also be made of other materials, such as PVA, as long as the material is water-soluble and has no effect on other structures of the device.

本申请所涉及可拉伸半导体器件虽然为本征可拉伸器件,但在制备过程中仍需要刚性结构(如基板)作为该半导体器件的支撑结构。而在制备完成后,需要将可拉伸半导体器件与刚性支撑结构分离。基板牺牲层即可作为二者之间的过渡层而存在,制备过程中填充在基板和可拉伸半导体器件之间,制备完成后可以轻易去除以实现基板和可拉伸半导体的分离。Although the stretchable semiconductor device involved in the present application is an intrinsically stretchable device, a rigid structure (such as a substrate) is still required as a supporting structure for the semiconductor device during the fabrication process. After fabrication, the stretchable semiconductor device needs to be separated from the rigid support structure. The substrate sacrificial layer can exist as a transition layer between the two. It is filled between the substrate and the stretchable semiconductor device during the preparation process, and can be easily removed after the preparation to realize the separation of the substrate and the stretchable semiconductor device.

步骤1003:在基板牺牲层上形成衬底。根据一个实施例,衬底可以包括PDMS材料。Step 1003 : forming a substrate on the sacrificial layer of the substrate. According to one embodiment, the substrate may comprise PDMS material.

在一些实施例中,如图1C和图2C所示,预聚物和固化剂的质量比为10:1混合,以形成PDMS溶液。将含有PDMS的溶液以800rpm的速度旋涂在基板牺牲层102表面,时长60s。然后,在70℃恒温条件下,将该半导体器件处理15min。之后,再次分别以1500rpm和3000rpm旋涂PDMS溶液。形成一个可伸缩的介质膜,厚度约为1.25μm,即为衬底103。然后70℃恒温条件下,将该半导体器件再额外放置2h。当然,也可以利用其他方法形成PDMS层。在一些实施例中,衬底103也可以采用其他弹性材料,如Ecoflex,PUU等。In some embodiments, as shown in Figures 1C and 2C, the prepolymer and curing agent are mixed in a mass ratio of 10:1 to form the PDMS solution. The solution containing PDMS was spin-coated on the surface of the substrate sacrificial layer 102 at a speed of 800 rpm for 60 s. Then, the semiconductor device was processed for 15 min under a constant temperature of 70°C. After that, the PDMS solution was spin-coated again at 1500 rpm and 3000 rpm, respectively. A stretchable dielectric film with a thickness of about 1.25 μm is formed, which is the substrate 103 . Then, under the constant temperature condition of 70° C., the semiconductor device was placed for an additional 2 h. Of course, other methods can also be used to form the PDMS layer. In some embodiments, the substrate 103 can also be made of other elastic materials, such as Ecoflex, PUU, and the like.

步骤1004:在衬底上形成第一电极牺牲层。根据一个实施例,第一电极牺牲层可以包括IGZO。Step 1004 : forming a first electrode sacrificial layer on the substrate. According to one embodiment, the first electrode sacrificial layer may include IGZO.

在一些实施例中,如图1D和图2D所示,在氩气气氛内,氧浓度为6%,气压0.43Pa的条件下,以100w功率磁控溅射IGZO,时长85s。在衬底103上形成第一电极牺牲层104,厚度为12nm。在一些实施例中,第一电极牺牲层104可以包括其他具有酸可刻蚀性的无机材料,如Al2O3等。当然,也可以利用其他方法形成第一电极牺牲层104。In some embodiments, as shown in FIG. 1D and FIG. 2D , in an argon atmosphere, the oxygen concentration is 6%, and the gas pressure is 0.43Pa, IGZO is magnetron sputtered with a power of 100w for 85s. A first electrode sacrificial layer 104 is formed on the substrate 103 with a thickness of 12 nm. In some embodiments, the first electrode sacrificial layer 104 may include other inorganic materials having acid etchability, such as Al 2 O 3 and the like. Of course, other methods can also be used to form the first electrode sacrificial layer 104 .

第一电极牺牲层104可以保护衬底103在对电极的图形化过程中不受氧等离子体的破坏。同时,提高衬底103的浸润性,以提高旋涂在其上的碳纳米管的管密度。The first electrode sacrificial layer 104 can protect the substrate 103 from being damaged by oxygen plasma during the patterning process of the counter electrode. At the same time, the wettability of the substrate 103 is improved to increase the tube density of the carbon nanotubes spin-coated thereon.

在一些实施例中,为了释放热应力,形成第一电极牺牲层104后进一步包括器件前烘过程。In some embodiments, in order to release thermal stress, a device pre-baking process is further included after forming the first electrode sacrificial layer 104 .

步骤1005:在第一电极牺牲层上形成第一电极层,并对其进行图形化形成第一电极。根据一个实施例,第一电极层材料可以包括金属性碳纳米管。Step 1005 : forming a first electrode layer on the first electrode sacrificial layer, and patterning it to form a first electrode. According to one embodiment, the material of the first electrode layer may include metallic carbon nanotubes.

在一些实施例中,如图1E和图2E所示,将金属性碳纳米管(M-CNTs)的水分散液(0.9wt%)以4000rpm旋涂至第一电极牺牲层104,时长40s。旋涂完成后,半导体器件在120℃进行退火处理,时长10min,形成第一电极层。之后,通过光刻和氧等离子体刻蚀将其图形化为第一电极105。其中,氧等离子体刻蚀参数为氧气为3l·min-1,氮气为5sccm,功率100w,时长45分钟。当然,也可以利用其他方法形成第一电极105。根据一个实施例,可以利用等离子刻蚀对第一电极层105进行图形化,从而形成第一电极。In some embodiments, as shown in FIGS. 1E and 2E , an aqueous dispersion (0.9 wt %) of metallic carbon nanotubes (M-CNTs) was spin-coated onto the first electrode sacrificial layer 104 at 4000 rpm for 40 s. After the spin coating is completed, the semiconductor device is annealed at 120° C. for 10 minutes to form a first electrode layer. After that, it is patterned into the first electrode 105 by photolithography and oxygen plasma etching. The oxygen plasma etching parameters were 3 l·min −1 for oxygen, 5 sccm for nitrogen, 100 w for power, and 45 minutes for the duration. Of course, other methods can also be used to form the first electrode 105 . According to one embodiment, the first electrode layer 105 may be patterned using plasma etching to form the first electrode.

在一些实施例中,第一电极105配置为晶体管的栅电极。In some embodiments, the first electrode 105 is configured as a gate electrode of a transistor.

步骤1006:去除第一电极牺牲层。Step 1006: Remove the first electrode sacrificial layer.

在一些实施例中,如图1F和图2F所示,将当前半导体器件浸入盐酸溶液(去离子水中1:50稀释)以去除第一电极牺牲层104。第一电极105附着于衬底103。然后取出半导体器件,在120℃下干燥5min。当然,也可以利用其他方法去除第一电极牺牲层。In some embodiments, as shown in FIGS. 1F and 2F , the current semiconductor device is immersed in a hydrochloric acid solution (diluted 1:50 in deionized water) to remove the first electrode sacrificial layer 104 . The first electrode 105 is attached to the substrate 103 . The semiconductor device was then taken out and dried at 120° C. for 5 min. Of course, other methods can also be used to remove the first electrode sacrificial layer.

第一电极牺牲层在形成第一电极105过程中保护了衬底103在图形化过程中不受氧等离子体的破坏。同时,提高衬底103的浸润性,以提高旋涂在其上的碳纳米管的管密度。在刻蚀过程中,由于碳纳米管之间存在空隙,因此盐酸可以透过这些空隙对电极牺牲层进行刻蚀。对第一电极牺牲层在纵向的刻蚀速度大于横向的刻蚀速度。在第一电极牺牲层被刻蚀掉之后,电极可以在原位置沿竖直方向下落,附着在衬底上,而不发生漂移。在第一电极105形成后,电极牺牲层本身不再是器件所需结构,通过盐酸去除电极牺牲层,不但可以避免在拉伸试验中影响可拉伸半导体器件的电学和机械性能,还可以去除碳纳米管中残留的分散剂,同时对于器件其他结构无影响。The first electrode sacrificial layer during the formation of the first electrode 105 protects the substrate 103 from being damaged by the oxygen plasma during the patterning process. At the same time, the wettability of the substrate 103 is improved to increase the tube density of the carbon nanotubes spin-coated thereon. During the etching process, due to the existence of voids between the carbon nanotubes, hydrochloric acid can etch the electrode sacrificial layer through these voids. The etching speed of the first electrode sacrificial layer in the longitudinal direction is greater than the etching speed in the lateral direction. After the first electrode sacrificial layer is etched away, the electrode can be dropped in a vertical direction at the original position and attached to the substrate without drifting. After the first electrode 105 is formed, the electrode sacrificial layer itself is no longer the required structure of the device. Removing the electrode sacrificial layer by hydrochloric acid can not only avoid affecting the electrical and mechanical properties of the stretchable semiconductor device in the tensile test, but also remove the The residual dispersant in the carbon nanotubes has no effect on other structures of the device.

步骤1007:在第一电极上形成介电层。根据一个实施例,介电层可以包括PUU。Step 1007 : forming a dielectric layer on the first electrode. According to one embodiment, the dielectric layer may include a PUU.

在一些实施例中,如图1G和图2G所示,先将PPG-TDI和APDS以100:10.7的比例混合于四氢呋喃中,形成浓度为170mg·ml-1的溶液,然后在35℃条件下搅拌2h,形成PUU溶液。将PUU溶液以5000rpm旋涂在第一电极105上,时长50s,形成1μm的介电层106。然后在100℃温度下,退火5小时以去除THF溶剂。当然,也可以利用其他方法形成介电层106。在一些实施例中,介电层106可以包括其他耐腐蚀有机弹性介电材料,如PDMS,SEBS等。In some embodiments, as shown in FIG. 1G and FIG. 2G , PPG-TDI and APDS were first mixed in tetrahydrofuran at a ratio of 100:10.7 to form a solution with a concentration of 170 mg·ml −1 , and then at 35° C. Stirred for 2 h, a PUU solution was formed. The PUU solution was spin-coated on the first electrode 105 at 5000 rpm for 50 s to form a 1 μm dielectric layer 106 . It was then annealed at 100°C for 5 hours to remove the THF solvent. Of course, other methods can also be used to form the dielectric layer 106 . In some embodiments, the dielectric layer 106 may include other corrosion-resistant organic elastic dielectric materials, such as PDMS, SEBS, and the like.

步骤1008:在介电层上形成第二电极牺牲层。Step 1008 : forming a second electrode sacrificial layer on the dielectric layer.

在一些实施例中,如图1H所示,通过溅射IGZO(参数参考步骤1004),在介电层106上形成第二电极牺牲层107,厚度为12nm。当然,也可以利用其他方法形成第二电极牺牲层107。In some embodiments, as shown in FIG. 1H , a second electrode sacrificial layer 107 is formed on the dielectric layer 106 with a thickness of 12 nm by sputtering IGZO (parameters refer to step 1004 ). Of course, other methods can also be used to form the second electrode sacrificial layer 107 .

在一些实施例中,为了释放热应力,形成第二电极牺牲层107后进一步包括器件前烘过程。In some embodiments, in order to release thermal stress, a device pre-baking process is further included after the second electrode sacrificial layer 107 is formed.

第二电极牺牲层107可以保护介电层106在图形化过程中不受氧等离子体的破坏。同时,提高介电层106的浸润性,以提高旋涂在其上的碳纳米管的管密度。The second electrode sacrificial layer 107 can protect the dielectric layer 106 from being damaged by oxygen plasma during the patterning process. At the same time, the wettability of the dielectric layer 106 is improved to increase the tube density of the carbon nanotubes spin-coated thereon.

步骤1009:在第二电极牺牲层上形成第二电极层,并对其进行图形化形成第二电极和第三电极。Step 1009 : forming a second electrode layer on the second electrode sacrificial layer, and patterning it to form a second electrode and a third electrode.

在一些实施例中,如图1I所示,将制备好的M-CNTs水分散液(0.3wt%)以3000rpm旋涂在第二电极牺牲层107上,时长40s。再在100℃条件下,退火10min,以形成第二电极层。再通过光刻和氧等离子刻蚀将其图形化为第二电极108和第三电极109。其中,氧等离子刻蚀参数为氧气为3l·min-1,氮气为5sccm,100W功率,时长40min。在一些实施例中,第二电极配置为晶体管的源电极和漏电极。当然,也可以利用其他方法形成第二电极108和第三电极109。In some embodiments, as shown in FIG. 1I , the prepared M-CNTs aqueous dispersion (0.3 wt %) was spin-coated on the second electrode sacrificial layer 107 at 3000 rpm for 40 s. Then, under the condition of 100° C., annealing is performed for 10 min to form a second electrode layer. It is then patterned into a second electrode 108 and a third electrode 109 by photolithography and oxygen plasma etching. Among them, the oxygen plasma etching parameters were 3 l·min −1 for oxygen, 5 sccm for nitrogen, 100 W power, and 40 min for the duration. In some embodiments, the second electrode is configured as a source electrode and a drain electrode of the transistor. Of course, other methods can also be used to form the second electrode 108 and the third electrode 109 .

步骤1010:在第二电极和第三电极之间形成沟道层,并对其进行图形化形成沟道。Step 1010: Form a channel layer between the second electrode and the third electrode, and pattern it to form a channel.

在一些实施例中,如图1J所示,将CNTs(直径1.0-1.4nm,长度1-2μm)以0.01mg mL-1的浓度分散在含分散剂的DCE(1,2二氯乙烷)溶液中。先对溶液进行30分钟超声处理,然后将溶液以1500rpm旋涂在第二牺牲层108上,时长40s。之后,在100℃下退火15min,以形成沟道层。再通过光刻和氧等离子体刻蚀对所述沟道层进行图形化,形成位于栅电极105上方、第二电极108和第三电极109之间的沟道110。其中,氧等离子刻蚀参数为氧气为3l·min-1,氮气为5sccm,100W功率,时长25min。在一些实施例中,所述沟道110的宽度为20μm,长度为5-100μm。当然,也可以利用其他方法形成沟道110。In some embodiments, as shown in Figure 1J, CNTs (1.0-1.4 nm in diameter, 1-2 μm in length) were dispersed in DCE (1,2 dichloroethane) containing dispersant at a concentration of 0.01 mg mL -1 in solution. The solution was first sonicated for 30 minutes, and then spin-coated on the second sacrificial layer 108 at 1500 rpm for 40 s. After that, annealing was performed at 100° C. for 15 min to form a channel layer. The channel layer is then patterned by photolithography and oxygen plasma etching to form a channel 110 located above the gate electrode 105 and between the second electrode 108 and the third electrode 109 . Among them, the oxygen plasma etching parameters were 3 l·min −1 for oxygen, 5 sccm for nitrogen, 100 W power, and 25 min for the duration. In some embodiments, the channel 110 has a width of 20 μm and a length of 5-100 μm. Of course, other methods can also be used to form the channel 110 .

步骤1011:去除第二电极牺牲层。Step 1011: Remove the second electrode sacrificial layer.

在一些实施例中,如图1K所示,将半导体器件浸入盐酸溶液(浓度同上),时长100s,以去除第二电极牺牲层107。第二电极牺牲层107上侧结构附着在其下侧结构上。然后,将新得到的半导体器件加热至70℃并维持2h,以提升附着力。当然,也可以利用其他方法去除第二电极牺牲层。In some embodiments, as shown in FIG. 1K , the semiconductor device is immersed in a hydrochloric acid solution (with the same concentration as above) for 100 s to remove the second electrode sacrificial layer 107 . The upper structure of the second electrode sacrificial layer 107 is attached to the lower structure thereof. Then, the newly obtained semiconductor device was heated to 70 °C for 2 h to improve the adhesion. Of course, other methods can also be used to remove the second electrode sacrificial layer.

第二电极牺牲层107在形成第二电极108、第三电极109和沟道层110的过程中保护了介电层106在图形化过程中不受氧等离子体的破坏。同时,提高衬底103的浸润性,以提高旋涂在其上的碳纳米管的管密度。在刻蚀过程中,由于碳纳米管之间存在空隙,因此盐酸可以透过这些空隙对电极牺牲层进行刻蚀。对第二电极牺牲层在纵向的刻蚀速度大于横向的刻蚀速度。在第二电极牺牲层被刻蚀掉之后,所述电极和沟道层可以在原位置沿竖直方向下落,附着在衬底上,而不发生漂移。在第二电极108、第三电极109和沟道层110形成后,第二电极牺牲层107本身不再是器件所需结构,通过盐酸去除电极牺牲层,不但可以避免在拉伸试验中影响可拉伸半导体器件的电学和机械性能,还可以去除碳纳米管中上残留的分散剂,同时对于器件其他结构无影响。The second electrode sacrificial layer 107 protects the dielectric layer 106 from being damaged by oxygen plasma during patterning during the formation of the second electrode 108, the third electrode 109 and the channel layer 110. At the same time, the wettability of the substrate 103 is improved to increase the tube density of the carbon nanotubes spin-coated thereon. During the etching process, due to the existence of voids between the carbon nanotubes, hydrochloric acid can etch the electrode sacrificial layer through these voids. The etching speed of the second electrode sacrificial layer in the longitudinal direction is greater than the etching speed in the lateral direction. After the second electrode sacrificial layer is etched away, the electrode and the channel layer can be dropped in the vertical direction at the original position and attached to the substrate without drifting. After the second electrode 108, the third electrode 109 and the channel layer 110 are formed, the second electrode sacrificial layer 107 itself is no longer the required structure of the device. Removing the electrode sacrificial layer by hydrochloric acid can not only avoid the influence of the tensile test Stretching the electrical and mechanical properties of semiconductor devices can also remove residual dispersants in carbon nanotubes without affecting other structures of the device.

步骤1012:去除基板牺牲层。Step 1012: Remove the substrate sacrificial layer.

在一些实施例中,如图1L所示,选取半导体器件一角,将衬底103与基板101部分剥离,然后将整个半导体器件浸入去离子水中。由于基板牺牲层102溶于水,一定时间后,基板牺牲层102消失,可拉伸半导体器件与基板101分离。将可拉伸半导体器件通过氮气吹干,并在70℃条件下烘烤10min,得到最终的可拉伸半导体器件。当然,也可以利用其他方法去除基板牺牲层。In some embodiments, as shown in FIG. 1L, a corner of the semiconductor device is selected, the substrate 103 is partially peeled off from the substrate 101, and then the entire semiconductor device is immersed in deionized water. Since the substrate sacrificial layer 102 is soluble in water, after a certain period of time, the substrate sacrificial layer 102 disappears, and the stretchable semiconductor device is separated from the substrate 101 . The stretchable semiconductor device was dried by nitrogen and baked at 70°C for 10 min to obtain the final stretchable semiconductor device. Of course, other methods can also be used to remove the substrate sacrificial layer.

在上述方法中形成的是底栅的可拉伸半导体器件。当然,在一些实施例中,也可以利用类似的方法形成顶栅可拉伸半导体器件。对基板进行处理、形成基板牺牲层以及可拉伸衬底的方法与前述相同,在可拉伸衬底上可以形成第一电极牺牲层,然后在第一电极牺牲层上先形成第二电极和第三电极(例如源漏极)和导电沟道,然后去除第一电极牺牲层。然后在第二第三电极以及导电沟道上再形成介电层,并在介电层上形成第二电极牺牲层,并且在第二电极牺牲层上形成第一电极(例如栅电极),然后去除第二电极牺牲层,最后通过去除基板牺牲层实现将可拉伸半导体器件从基板上的剥离。Formed in the above method is a bottom gate stretchable semiconductor device. Of course, in some embodiments, a top-gate stretchable semiconductor device may also be formed using a similar method. The methods for processing the substrate, forming the substrate sacrificial layer and the stretchable substrate are the same as the above-mentioned methods. The first electrode sacrificial layer can be formed on the stretchable substrate, and then the second electrode and the The third electrode (eg, source and drain) and the conductive channel, and then the first electrode sacrificial layer is removed. Then a dielectric layer is formed on the second and third electrodes and the conductive channel, a second electrode sacrificial layer is formed on the dielectric layer, and a first electrode (such as a gate electrode) is formed on the second electrode sacrificial layer, and then removed The second electrode sacrificial layer, and finally the stretchable semiconductor device is peeled off from the substrate by removing the substrate sacrificial layer.

本申请所涉及方法制备的半导体器件具有优秀的可拉伸性,和拉伸后电学特性稳定的特点。图4A是根据本发明的一个实施例一种可拉伸半导体器件的制备方法所制备的可拉伸半导体拉伸状态图。所制备的半导体器件,经过如图所示的拉伸,甚至多次拉伸后,其可拉伸性和电学特性依然稳定。The semiconductor device prepared by the method of the present application has the characteristics of excellent stretchability and stable electrical properties after stretching. 4A is a drawing state diagram of a stretchable semiconductor prepared by a method for fabricating a stretchable semiconductor device according to an embodiment of the present invention. The prepared semiconductor device, after stretching as shown in the figure, even after multiple stretching, its stretchability and electrical properties are still stable.

图4B是根据本发明的一个实施例一种可拉伸半导体器件的制备方法所制备的可拉伸半导体拉伸度不同情况下IDS-VGS关系图。其中,图中所示实验结果是在VDS=-1V的情况下,IDS-VGS关系图。图中,曲线401是所制备半导体器件在拉伸度为0%(未拉伸)的情况下,IDS-VGS的关系曲线。曲线402是所制备半导体器件经受拉伸度为10%的拉伸形变后,IDS-VGS的关系曲线。曲线403是所制备半导体器件在经受拉伸度为20%的拉伸形变后,IDS-VGS的关系曲线。曲线404是所制备半导体器件在经受拉伸度为30%的拉伸形变后,IDS-VGS的关系曲线。曲线405是所制备半导体器件在经受拉伸度为40%的拉伸形变后,IDS-VGS的关系曲线。曲线406是所制备半导体器件在经受拉伸度为50%的拉伸形变后,IDS-VGS的关系曲线。由图中曲线可以清晰看出,在拉伸度不同的情况下,各个曲线之间的变化幅度很小。4B is a graph showing the relationship between I DS and V GS of the stretchable semiconductor prepared by a method for fabricating a stretchable semiconductor device according to an embodiment of the present invention under different stretch degrees. Among them, the experimental results shown in the figure are the relationship diagram of I DS - V GS under the condition of V DS =-1V. In the figure, the curve 401 is the relationship curve of I DS - V GS under the condition that the stretched degree of the fabricated semiconductor device is 0% (unstretched). Curve 402 is the relationship between I DS and V GS after the fabricated semiconductor device is subjected to tensile deformation with a tensile degree of 10%. Curve 403 is the relationship between I DS and V GS of the fabricated semiconductor device after being subjected to tensile deformation with a tensile degree of 20%. Curve 404 is the relationship between I DS and V GS of the fabricated semiconductor device after being subjected to tensile deformation with a tensile degree of 30%. Curve 405 is the relationship between I DS and V GS of the fabricated semiconductor device after being subjected to tensile deformation with a tensile degree of 40%. Curve 406 is the I DS - V GS relationship of the fabricated semiconductor device after being subjected to a tensile deformation of 50% elongation. It can be clearly seen from the curves in the figure that in the case of different stretching degrees, the variation between the curves is very small.

图4C是根据本发明的一个实施例一种可拉伸半导体器件的制备方法所制备的可拉伸半导体拉伸度、迁移率和亚阈值摆幅关系图。其中,曲线410是载流子迁移率和拉伸度的关系,曲线411是器件亚阈值摆幅和拉伸度的关系。由图中曲线可以清晰看出,在拉伸度不同的情况下,两个曲线整体的变化率都非常小。FIG. 4C is a graph showing the relationship between stretchability, mobility and subthreshold swing of a stretchable semiconductor fabricated by a method for fabricating a stretchable semiconductor device according to an embodiment of the present invention. The curve 410 is the relationship between the carrier mobility and the stretch degree, and the curve 411 is the relationship between the device subthreshold swing and the stretch degree. It can be clearly seen from the curves in the figure that the overall rate of change of the two curves is very small when the degree of stretch is different.

图4B和图4C清晰的表明,在拉伸度发生变化时,本申请所涉及方法制备的半导体器件的电学特性非常稳定。FIG. 4B and FIG. 4C clearly show that the electrical properties of the semiconductor device prepared by the method involved in the present application are very stable when the stretching degree is changed.

本申请所述方法,以碳纳米管(或导电纳米线)网络作为源/漏/栅/沟道层,以实现高性能的本征可拉伸半导体。创造性的提出,在制备过程中加入电极牺牲层,以提高衬底和介电层的浸润性,同时保护衬底和介电层在图形化过程中不受氧等离子体的破坏。而且,电极牺牲层可以在器件制造结束时去除,提高可拉伸半导体器件在拉伸过程中的稳定性。与现有可拉伸半导体相比,本申请所制备的可拉伸半导体器件尺寸更小,驱动电流密度更大,而且场效应迁移率更高。本申请所述方法制备的可拉伸半导体器件在50%拉伸应变下,经过2000次拉伸循环后仍保持其出色的电学性能。The method described in this application uses a network of carbon nanotubes (or conductive nanowires) as source/drain/gate/channel layers to achieve high-performance intrinsically stretchable semiconductors. It is creatively proposed that an electrode sacrificial layer is added during the preparation process to improve the wettability of the substrate and the dielectric layer, and at the same time protect the substrate and the dielectric layer from being damaged by oxygen plasma during the patterning process. Also, the electrode sacrificial layer can be removed at the end of device fabrication, improving the stability of the stretchable semiconductor device during the stretching process. Compared with the existing stretchable semiconductors, the stretchable semiconductor devices prepared in the present application are smaller in size, higher in driving current density, and higher in field-effect mobility. The stretchable semiconductor device prepared by the method described in this application still maintains its excellent electrical properties under 50% tensile strain after 2000 stretching cycles.

上述实施例仅供说明本发明之用,而并非是对本发明的限制,有关技术领域的普通技术人员,在不脱离本发明范围的情况下,还可以做出各种变化和变型,因此,所有等同的技术方案也应属于本发明公开的范畴。The above-mentioned embodiments are only for the purpose of illustrating the present invention, rather than limiting the present invention. Those of ordinary skill in the relevant technical field can also make various changes and modifications without departing from the scope of the present invention. Therefore, all Equivalent technical solutions should also belong to the scope of the disclosure of the present invention.

Claims (24)

1. A method of making a stretchable semiconductor device, comprising:
forming a substrate sacrificial layer on a substrate;
forming a substrate on the base plate sacrificial layer;
forming a first electrode sacrificial layer on a substrate;
forming a first electrode layer on the first electrode sacrificial layer and patterning the first electrode layer to form a first electrode;
removing the first electrode sacrificial layer to enable the first electrode to fall and be attached to the substrate;
forming a dielectric layer on the first electrode;
forming a second electrode sacrificial layer on the dielectric layer;
forming a second electrode layer on the second electrode sacrificial layer, and patterning the second electrode layer to form a second electrode and a third electrode;
forming a channel layer between the second electrode and the third electrode, and patterning the channel layer to form a channel; and
removing the second electrode sacrificial layer to enable the second electrode, the third electrode and the channel layer to fall and be attached to the dielectric layer;
wherein the substrate, the first electrode, the second electrode, the third electrode, the channel, and the dielectric layer have stretchability.
2. The method of claim 1, further comprising, after forming the first and/or second electrode sacrificial layers: and (5) pre-baking treatment.
3. The method of claim 1, the substrate material comprising silicon wafer or glass.
4. The method of claim 1, the substrate sacrificial layer material comprising dextran or PVA.
5. The method of claim 1, the substrate material comprising PDMS, Ecoflex, or PUU.
6. The method of claim 1, the first and/or second electrode sacrificial layer material comprising IGZO or Al 2 O 3
7. The method of claim 1, the first electrode, second electrode material, and/or third electrode comprising metallic carbon nanotubes or conductive nanowires.
8. The method of claim 1, wherein the dielectric layer material comprises PUU, PDMS, or SEBS.
9. The method of claim 1, wherein the channel layer material comprises semiconducting carbon nanotubes.
10. The method of claim 1, wherein the substrate sacrificial layer and/or dielectric layer forming process further comprises a curing process, wherein the curing temperature is 20 ℃ to 100 ℃ and the curing time is 1 hour to 12 hours, and wherein the curing temperature is inversely proportional to the curing time.
11. The method of claim 1, further comprising, prior to forming the substrate sacrificial layer: and carrying out hydrophilic treatment on the substrate.
12. The method of claim 1, further comprising, after removing the second electrode sacrificial layer: and removing the substrate sacrificial layer.
13. A method of making a stretchable semiconductor device, comprising:
forming a substrate sacrificial layer on a substrate;
forming a substrate on the base plate sacrificial layer;
forming a first electrode sacrificial layer on a substrate;
forming a first electrode layer on the first electrode sacrificial layer and patterning the first electrode layer to form a second electrode and a third electrode;
forming a channel layer between the second electrode and the third electrode, and patterning the channel layer to form a channel;
removing the first electrode sacrificial layer to enable the second electrode, the third electrode and the channel to fall and be attached to the substrate;
forming a dielectric layer on the second electrode, the third electrode and the channel;
forming a second electrode sacrificial layer on the dielectric layer;
forming a second electrode layer on the second electrode sacrificial layer and patterning the second electrode layer to form a first electrode;
removing the second electrode sacrificial layer to enable the first electrode to fall and be attached to the dielectric layer;
wherein the substrate, the first electrode, the second electrode, the third electrode, the channel, and the dielectric layer have stretchability.
14. The method of claim 13, further comprising, after forming the first and/or second electrode sacrificial layers: and (5) pre-baking treatment.
15. The method of claim 13, the substrate material comprising silicon wafer or glass.
16. The method of claim 13, the substrate sacrificial layer material comprising dextran or PVA.
17. The method of claim 13, the substrate material comprising PDMS, Ecoflex, or PUU.
18. The method of claim 13, the first and/or second electrode sacrificial layer material comprising IGZO or Al 2 O 3
19. The method of claim 13, the first, second and/or third electrode material comprising metallic carbon nanotubes or conductive nanowires.
20. The method of claim 13, wherein the dielectric layer material comprises PUU, PDMS, or SEBS.
21. The method of claim 13, wherein the channel layer material comprises semiconducting carbon nanotubes.
22. The method of claim 13, wherein the substrate sacrificial layer and/or dielectric layer forming process further comprises a curing process, wherein the curing temperature is 20 ℃ to 100 ℃ and the curing time is 1 hour to 12 hours, and wherein the curing temperature is inversely proportional to the curing time.
23. The method of claim 13, further comprising, prior to forming the substrate sacrificial layer: and carrying out hydrophilic treatment on the substrate.
24. The method of claim 13, further comprising, after removing the second electrode sacrificial layer: and removing the substrate sacrificial layer.
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