CN112486852B - Solid state disk and address mapping method thereof - Google Patents

Abstract

The embodiment of the application discloses a solid state disk and an address mapping method thereof, wherein the method comprises the following steps: when the solid state disk receives a segment of data sent by a host end and a logical block address corresponding to the segment of data, judging whether the logical block address corresponding to the segment of data is continuous or not; when the corresponding logical block addresses of the segment data are continuous, the continuous data in the logical block addresses are sequentially stored in a segment of continuous physical block addresses in the flash memory, and a binary tree data structure is adopted to store the first and the last logical block addresses and the corresponding physical block addresses, which are new page mapping table management methods, so as to replace the original method for managing page mapping tables by using a linear table. According to the embodiment, for the solid state disk with the cache, the input cost in the aspect of cache is reduced, and the redundant cache space can be used for improving the performance of the solid state disk; for the solid state disk without cache, the time for reading and writing the mapping table of the mapping page from the flash memory is greatly shortened, and the reading and writing performance of the solid state disk is improved.

Description

A solid state hard disk and address mapping method thereof

Technical Field

The present invention relates to data processing and storage technology, and more particularly to a solid state drive and an address mapping method thereof.

Background technique

Since the address of the data sent by the host (logical block address: LBA) and the address stored in the flash memory (NAND) (physical block address: PBA) are not sequentially corresponding, which means that LBA x is not necessarily stored at the PBA x position in the flash memory, the firmware in the solid-state drive (SSD) (a program running in the SSD firmware chip) is required to match the two one-to-one. Otherwise, when the host wants to read the data corresponding to a certain logical block address, the firmware cannot find the location of the data in the flash memory, resulting in data loss.

Current state of the art: Currently, solid-state drives generally use page mapping to manage the mapping relationship from LBA to PBA, as shown in Figure 1.

That is, whenever the host writes a page (PAGE) of data, the firmware of the SSD will write the data to a physical page and correspond the logical block address of the data to the physical block address. Specific steps: the host sends the data to be written and the corresponding logical block address to the SSD; the firmware finds the free flash physical block and the corresponding physical address; the firmware in the SSD writes the data sent by the host to the physical block; finally, the firmware associates the logical block address of the data with the physical block address. In a SSD with cache (DRAM), the firmware will use a continuous cache space as the storage of the mapping table, that is, cache address X stores the PBA corresponding to LBA0, cache address X+1 stores the PBA corresponding to LBA1, and cache address X+y stores the PBA corresponding to LBAy.

This solution allows faster host-side read speeds and less performance fluctuations during continuous reading and writing in cached firmware, but the cache hardware cost is high. In non-cached firmware, the performance of reading and writing to an empty disk is high, and then the host-side read and write speeds drop significantly, resulting in lower performance.

Currently, there is a large gap between the performance of SSDs without cache and SSDs with cache. One of the important reasons is that SSDs with cache store page mapping tables in cache, and reading page mapping tables in cache is much faster than reading them from flash memory, so the former has better performance; however, SSDs with cache will increase production costs and sales prices due to the large-capacity cache, weakening the price competitiveness of the product.

Therefore, according to the existing flash memory organization structure, the page mapping table size is about 1/1024 of the available space of the SSD. Since the page mapping table needs to occupy a certain amount of space, it will occupy most of the cache space in a cached SSD, resulting in an increase in cache cost; secondly, in a non-cached SSD, every time the host reads or writes data at a certain logical block address, the firmware must read or write the page mapping table from the flash memory, which will reduce the host data read and write speed.

Summary of the invention

The embodiment of the present application provides a solid-state drive and an address mapping method thereof. For a solid-state drive with a cache, the manufacturer's investment cost in the cache can be reduced, and the excess cache space can be used to improve the performance or reliability of the solid-state drive; for a solid-state drive without a cache, the amount of data in the mapping relationship read and written from the flash memory can be greatly reduced, thereby improving the read and write performance of the solid-state drive.

An embodiment of the present application provides an address mapping method for a solid state drive, and the method may include:

When the solid state drive receives a segment of data and a logical block address corresponding to the segment of data sent by the host, it determines whether the logical block address corresponding to the segment of data is continuous;

When the logical block addresses corresponding to the segment of data are continuous, the continuous data in the logical block addresses are stored in sequence in a continuous physical block address in the flash memory;

A binary tree data structure is used to store the first and last logical block addresses and the corresponding physical block address of the data segment.

In an exemplary embodiment of the present application, when the solid state drive has a cache, the method may further include:

After the solid state drive receives the segment of data and the logical block address corresponding to the segment of data, the segment of data and the logical block address corresponding to the segment of data are stored in the cache, and the data in the cache to be written into the flash memory are sorted according to the logical block address of the data, and when the data stored in the cache accumulates to a preset data threshold, it is determined whether the logical block addresses corresponding to the sorted data in the cache are continuous;

When the logical block addresses corresponding to the data in the cache are continuous, the continuous data in the logical block addresses are stored in sequence in a continuous physical block address in the flash memory;

When the logical block addresses corresponding to the data in the cache are discontinuous, the discontinuous data in the logical block addresses are stored in continuous or discontinuous physical block addresses in the flash memory.

In an exemplary embodiment of the present application, when the solid state drive has a cache, the method may further include: establishing a mapping relationship between the first and last addresses of consecutive logical block addresses and the first and last addresses of consecutive physical block addresses, and storing the mapping relationship in a binary tree data structure.

In an exemplary embodiment of the present application, storing the mapping relationship in a binary tree data structure may include:

The logical block address is found from the binary tree data structure, and it is detected whether data has been written to the logical block address before. When data has not been written to the logical block address before, the mapping relationship is newly inserted into the binary tree data structure; when data has been written to the logical block address before, the mapping relationship is used to update the previous mapping relationship in the binary tree data structure, and a preset garbage collection module is notified to perform garbage collection on the previous mapping relationship.

In an exemplary embodiment of the present application, the method may further include:

When the newly added and modified mapping relationships in the binary tree data structure accumulate to a set threshold, the newly added and modified mapping relationships in the binary tree data structure are saved in a flash memory.

In an exemplary embodiment of the present application, the method may further include:

Before storing the data to be stored in the flash memory, the data to be stored is divided into a plurality of parts; and the plurality of parts are stored in the flash memory in parallel through a plurality of channels.

In an exemplary embodiment of the present application, when the solid state drive does not have a cache, the method may further include:

When the logical block addresses corresponding to the segment of data are continuous, the continuous data in the logical block addresses are directly stored in sequence in a segment of continuous physical block addresses in the flash memory.

In an exemplary embodiment of the present application, the method may further include:

Loading a corresponding page mapping table from the flash memory according to the logical block address corresponding to the segment of data, updating the mapping relationship corresponding to the logical block address corresponding to the segment of data in the page mapping table, and storing the modified page mapping table in the flash memory;

When the host reads data, it loads the corresponding page mapping table according to the logical block address corresponding to the data segment, queries the corresponding mapping relationship in the page mapping table to obtain the corresponding physical block address range, and reads the corresponding data from the flash memory according to the physical block address range and returns it to the host.

In an exemplary embodiment of the present application, before sequentially storing the continuous data in the logical block address into a continuous physical block address in the flash memory, the method may further include:

Searching for the segment of continuous physical block addresses from the flash memory, and returning the first and last addresses of the segment of continuous physical block addresses;

When the segment of continuous physical block addresses contains a bad block, the bad block is automatically skipped during reading and writing.

An embodiment of the present application also provides a solid state drive, which may include a flash memory and a firmware chip, wherein instructions are stored in the firmware chip, and when the instructions are executed by the firmware chip, any of the above-mentioned address mapping methods for the solid state drive is implemented.

Compared with the related art, the embodiment of the present application may include: when the solid-state hard disk receives a segment of data sent by the host end and the logical block address corresponding to the segment of data, it is determined whether the logical block address corresponding to the segment of data is continuous; when the logical block address corresponding to the segment of data is continuous, the continuous data in the logical block address is stored in sequence in a segment of continuous physical block addresses in the flash memory; a binary tree data structure is used to save the first and last logical block addresses and the corresponding physical block addresses corresponding to the segment of data. Through this embodiment, for solid-state hard disks with cache, the manufacturer's investment cost in cache is reduced, and the excess cache space can also be used to improve the performance or reliability of the solid-state hard disk; for solid-state hard disks without cache, the amount of data in the read and write mapping relationship from the flash memory is greatly reduced, thereby improving the read and write performance of the solid-state hard disk.

Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or be understood by implementing the present application. Other advantages of the present application can be realized and obtained by the schemes described in the description and the drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings are used to provide an understanding of the technical solution of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solution of the present application and do not constitute a limitation on the technical solution of the present application.

FIG1 is a flow chart of an address mapping method for a solid state drive according to an embodiment of the present application;

FIG2 is a schematic diagram of a page mapping table managed using a binary tree data structure according to an embodiment of the present application;

FIG. 3 is a block diagram of the solid-state hard disk according to an embodiment of the present application.

Detailed ways

The present application describes multiple embodiments, but the description is exemplary rather than restrictive, and it is obvious to those skilled in the art that there may be more embodiments and implementations within the scope of the embodiments described in the present application. Although many possible feature combinations are shown in the drawings and discussed in the specific embodiments, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with any other feature or element in any other embodiment, or may replace any other feature or element in any other embodiment.

The present application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features and elements disclosed in the present application may also be combined with any conventional features or elements to form a unique invention scheme defined by the claims. Any features or elements of any embodiment may also be combined with features or elements from other invention schemes to form another unique invention scheme defined by the claims. Therefore, it should be understood that any feature shown and/or discussed in the present application may be implemented individually or in any appropriate combination. Therefore, except for the limitations made according to the attached claims and their equivalents, the embodiments are not subject to other restrictions. In addition, various modifications and changes may be made within the scope of protection of the attached claims.

In addition, when describing representative embodiments, the specification may have presented the method and/or process as a specific sequence of steps. However, to the extent that the method or process does not rely on the specific order of the steps described herein, the method or process should not be limited to the steps of the specific order described. As will be understood by those of ordinary skill in the art, other sequences of steps are also possible. Therefore, the specific sequence of the steps set forth in the specification should not be interpreted as a limitation to the claims. In addition, the claims for the method and/or process should not be limited to the steps of performing them in the order written, and those skilled in the art can easily understand that these sequences can be changed and still remain within the spirit and scope of the embodiments of the present application.

The embodiment of the present application provides an address mapping method for a solid state drive. As shown in FIG1 , the method may include steps S101-S103:

S101, when the solid state drive receives a segment of data and a logical block address corresponding to the segment of data sent by the host, determining whether the logical block address corresponding to the segment of data is continuous;

S102, when the logical block addresses corresponding to the segment of data are continuous, sequentially storing the continuous data in the logical block addresses into a continuous physical block address in the flash memory;

S103. Use a binary tree data structure to store the first and last logical block addresses and the corresponding physical block address of the data segment.

In an exemplary embodiment of the present application, when the firmware receives the data to be stored on the host side and the corresponding logical block address, the data will be stored in the flash memory (NAND) in sequence, that is, the first and last LBA (logical block address) and PBA (physical block address, or physical block address) corresponding to a segment of data are used to establish a page mapping table, which is different from the existing method of establishing a page mapping table using a linear table. Since the page mapping table occupies a certain storage space, it will occupy a large amount of cache space in a cached solid-state hard disk. The method of establishing a mapping table using the first and last LBA and PBA can effectively reduce the storage space occupied by the mapping table in the cache, and can reduce the manufacturer's cost in terms of cache; in a non-cached solid-state hard disk, the present invention can effectively reduce the number of mapping tables to be read and written, thereby reducing the time for the firmware (a program running in the solid-state hard disk firmware chip) to read and write the mapping table from the flash memory, thereby improving the host-side read and write speed of the non-cached solid-state hard disk.

In an exemplary embodiment of the present application, when the solid state drive has a cache, the method may further include:

After the solid state drive receives the segment of data and the logical block address corresponding to the segment of data, the segment of data and the logical block address corresponding to the segment of data are stored in the cache, and the data in the cache to be written into the flash memory are sorted according to the logical block address of the data, and when the data stored in the cache accumulates to a preset data threshold, it is determined whether the logical block addresses corresponding to the sorted data in the cache are continuous;

When the logical block addresses corresponding to the data in the cache are continuous, the continuous data in the logical block addresses are stored in sequence in a continuous physical block address in the flash memory;

When the logical block addresses corresponding to the data in the cache are discontinuous, the discontinuous data in the logical block addresses are stored in continuous or discontinuous physical block addresses in the flash memory.

In an exemplary embodiment of the present application, when the host sends a piece of data and the corresponding logical block address to the solid-state drive, the firmware first stores the data and the corresponding LBA in the cache. When the data stored in the cache accumulates to a certain data threshold (which can be set according to the specific situation), it determines whether the LBA of these data is continuous. If it is continuous, the data with continuous LBA is stored in sequence in a continuous physical space in the flash memory (that is, the PBA is continuous), and the data with non-continuous LBA is stored in different flash memory physical blocks.

In an exemplary embodiment of the present application, before sequentially storing the continuous data in the logical block address into a continuous physical block address in the flash memory, the method may further include:

Searching for the segment of continuous physical block addresses from the flash memory, and returning the first and last addresses of the segment of continuous physical block addresses;

When the segment of continuous physical block addresses contains a bad block, the bad block is automatically skipped during reading and writing.

In an exemplary embodiment of the present application, when the data in the cache accumulates to a certain threshold, the firmware searches for a segment of continuous physical block addresses in the flash memory and returns the first and last two addresses of this segment of continuous physical block addresses. If this segment of continuous physical block addresses contains bad blocks or bad pages, the firmware automatically skips it when reading and writing.

In an exemplary embodiment of the present application, the method may further include:

Before storing the data to be stored in the flash memory, the data to be stored is divided into a plurality of parts; and the plurality of parts are stored in the flash memory in parallel through a plurality of channels.

In an exemplary embodiment of the present application, in order to speed up the read and write rates, the firmware can enable multi-channel storage, that is, divide a segment of data into multiple parts, and send different parts of data to the flash memory through multiple channels at the same time. At this time, the organization of PBA can be managed in the manner of page 0 of block 0 of channel 0 as PBA0, and page 0 of block 0 of channel 1 as PBA1.

In an exemplary embodiment of the present application, when the solid state drive has a cache, the method may further include: establishing a mapping relationship between the first and last addresses of consecutive logical block addresses and the first and last addresses of consecutive physical block addresses, and storing the mapping relationship in a binary tree data structure.

In the exemplary embodiment of the present application, for the management of the page mapping table, the current popular solution is to manage the page mapping table in the form of a linear table, that is, a certain continuous cache is used as a storage page mapping table. When the PBA corresponding to LBAx needs to be found, the base address of the page mapping table in the cache and the offset of the LBA can be directly accessed. For example, LBA0 of the page mapping table is stored in cache a, and a PBA occupies i bytes, then the PBA corresponding to LBAx is stored at (a+x*i). However, the page mapping relationship generated by the embodiment of the present application is not suitable for this management method. The embodiment of the present application adopts a binary tree management solution, that is, the mapping relationship LBAx-PBAy is stored in a binary tree data structure for easy management, as shown in Figure 2.

In the exemplary embodiment of the present application, the core innovation is to use a binary tree data structure to manage and store a new page mapping table that is different from the previous ones, so that the embodiment of the present application has the characteristics of high efficiency and practical applicability in the management and storage of page mapping tables.

In an exemplary embodiment of the present application, storing the mapping relationship in a binary tree data structure may include:

The logical block address is found from the binary tree data structure, and it is detected whether data has been written to the logical block address before. When data has not been written to the logical block address before, the mapping relationship is newly inserted into the binary tree data structure; when data has been written to the logical block address before, the mapping relationship is used to update the previous mapping relationship in the binary tree data structure, and a preset garbage collection module is notified to perform garbage collection on the previous mapping relationship.

In an exemplary embodiment of the present application, when data has been stored in the flash memory, the firmware has obtained the LBA and corresponding PBA of the data, that is, LBAx-LBA(x+y) corresponds to PBAk-PBA(k+y). The firmware can search the binary tree according to the LBA. If the segment of LBA has not been written with data before, the mapping relationship is newly inserted into the binary tree; if the segment of LBA has been written with data before, the old mapping relationship is replaced with the new mapping relationship, and the old mapping relationship is fed back to the garbage collection module for garbage collection.

In an exemplary embodiment of the present application, the method may further include:

When the newly added and modified mapping relationships in the binary tree data structure accumulate to a set threshold, the newly added and modified mapping relationships in the binary tree data structure are saved in a flash memory.

In an exemplary embodiment of the present application, since the solid-state drive needs to ensure that user data is not lost in the event of an abnormal power failure in some cases, it is necessary to frequently save the latest page mapping table to the flash memory to prevent the loss of user data due to the loss or error of the page mapping table. Therefore, when the new mapping relationship accumulates to a certain threshold (which can be set manually), the new mapping relationship can be saved to the flash memory to prevent the loss of user data due to abnormal power failure.

In an exemplary embodiment of the present application, when the solid-state drive does not have a cache, if the host side needs to read certain data, the firmware first queries the PBA corresponding to the LBA of the data from the binary tree page mapping table, and then reads the data from the corresponding area of the flash memory according to the PBA range and sends it to the host side.

In an exemplary embodiment of the present application, when the solid state drive does not have a cache, the method may further include:

When the logical block addresses corresponding to the segment of data are continuous, the continuous data in the logical block addresses are directly stored in sequence in a segment of continuous physical block addresses in the flash memory.

In an exemplary embodiment of the present application, the method may further include:

The corresponding page mapping table is loaded from the flash memory according to the logical block address corresponding to the segment data, and the mapping relationship corresponding to the logical block address corresponding to the segment data in the page mapping table is updated, and the modified page mapping table is stored in the flash memory.

In an exemplary embodiment of the present application, when the host side reads data, the corresponding page mapping table is loaded according to the logical block address corresponding to the data segment, the corresponding mapping relationship in the page mapping table is queried to obtain the corresponding physical block address range, and the corresponding data is read from the flash memory according to the physical block address range and returned to the host side.

In an exemplary embodiment of the present application, when the SSD does not have a cache: when the host sends a piece of data and the corresponding logical block address to the SSD, the firmware will store the data directly in the flash memory; and the firmware will load the corresponding page mapping table from the flash memory according to the LBA of the data, then update the mapping relationship of the LBA segment, and finally store the modified mapping table in the flash memory. If the data is read from the SSD, the firmware first loads the corresponding page mapping table according to the LBA corresponding to the data, queries the corresponding mapping relationship to obtain the PBA range, and then reads the corresponding data from the flash memory according to the PBA range and returns it to the host.

In the exemplary embodiments of the present application, the scheme of the embodiments of the present application is explained below through two specific embodiments.

In an exemplary embodiment of the present application, for example, a large number of pictures posted by users are usually stored on the current social software server, and the size of a picture is often tens of KB (kilobits) after compression, and some pictures may reach several MB (megabits). If the existing solid-state hard disk using a linear table to manage the mapping relationship is used, if a mapping relationship is generated for every 4KB of data, a 28KB picture will generate 7 mapping relationships, that is, 7 PBAs are stored; if the method of the embodiment of the present application is used, only two LBAs (the first and last LBAs corresponding to the data) and two PBAs (the first and last PBAs corresponding to the data when the data is stored) need to be stored, and generally the LBA and PBA are equal in size, which saves a lot of space compared to the conventional method. If the picture size is 4MB, the solid-state hard disk using a linear table to manage the mapping relationship will store 4096/4, that is, 1024 PBAs, while the solid-state hard disk using the embodiment of the present application still only needs to store two LBAs and two PBAs, and the size of the mapping table will be greatly reduced.

In the exemplary embodiment of the present application, for example, assuming that the size of an LBA is a byte, and the size of a PBA is b bytes, the solid-state drive generates a mapping relationship for each 4096 bytes of data stored. If the solid-state drive is to store c bytes of data, then the existing solid-state drive that uses a linear table to manage the mapping relationship generally spends (c/4096)*b bytes to store the mapping relationship generated by the data; if the new mapping relationship establishment method of the embodiment of the present application is adopted, only 2 (a+b) bytes are needed to store the mapping relationship generated by the data. In addition, in a cached solid-state drive, the existing solid-state drive will use most of the cache space to store the mapping relationship. The reduction of the mapping relationship can reduce the manufacturer's investment cost in the cache on the one hand, and the excess cache space can also be used to improve the performance or reliability of the solid-state drive; in a non-cached solid-state drive, the embodiment of the present application can greatly reduce the amount of data read and written from the flash memory to the mapping relationship, thereby improving the read and write performance of the solid-state drive.

The embodiment of the present application also provides a solid state drive 1, as shown in FIG3 , which may include a flash memory 11 and a firmware chip 12, wherein instructions are stored in the firmware chip, and when the instructions are executed by the firmware chip, the address mapping method of the solid state drive described in any one of the above items is implemented.

It will be appreciated by those skilled in the art that all or some of the steps, systems, and functional modules/units in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementations, the division between the functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all components may be implemented as software executed by a processor, such as a digital signal processor or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or temporary medium). As known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those of ordinary skill in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

Claims (7)

1. A method for address mapping of a solid state drive, wherein the solid state drive has a cache, and the method comprises: When the solid state drive receives a segment of data and a logical block address corresponding to the segment of data sent by the host, determining whether the logical block address corresponding to the segment of data is continuous, including: storing the segment of data and the logical block address corresponding to the segment of data in the cache, and sorting the data in the cache to be written into the flash memory according to the logical block address of the data, and when the data stored in the cache accumulates to a preset data threshold, determining whether the logical block addresses corresponding to the sorted data in the cache are continuous; When the logical block addresses corresponding to the segment of data are continuous, the continuous data in the logical block addresses are sequentially stored in a continuous segment of physical block addresses in the flash memory, including: when the logical block addresses corresponding to the data in the cache are continuous, the continuous data in the logical block addresses are sequentially stored in a continuous segment of physical block addresses in the flash memory; or when the logical block addresses corresponding to the data in the cache are discontinuous, the discontinuous data in the logical block addresses are stored in continuous or discontinuous physical block addresses in the flash memory; A binary tree data structure is used to store the first and last logical block addresses and the corresponding physical block address of the data segment. 2. The address mapping method of a solid state drive according to claim 1, characterized in that the method further comprises: establishing a mapping relationship between the first and last addresses of continuous logical block addresses and the first and last addresses of continuous physical block addresses, and storing the mapping relationship in a binary tree data structure. 3. The address mapping method of a solid state drive according to claim 2, wherein storing the mapping relationship in a binary tree data structure comprises: The logical block address is found from the binary tree data structure, and it is detected whether data has been written to the logical block address before. When data has not been written to the logical block address before, the mapping relationship is newly inserted into the binary tree data structure; when data has been written to the logical block address before, the mapping relationship is used to update the previous mapping relationship in the binary tree data structure, and a preset garbage collection module is notified to perform garbage collection on the previous mapping relationship. 4. The address mapping method of a solid state drive according to claim 2 or 3, characterized in that the method further comprises: When the newly added and modified mapping relationships in the binary tree data structure accumulate to a set threshold, the newly added and modified mapping relationships in the binary tree data structure are saved in a flash memory. 5. The address mapping method of a solid state drive according to claim 1, characterized in that the method further comprises: Before storing the data to be stored in the flash memory, the data to be stored is divided into a plurality of parts; and the plurality of parts are stored in the flash memory in parallel through a plurality of channels. 6. The address mapping method of a solid state drive according to claim 1, characterized in that before sequentially storing the continuous data in the logical block address into a continuous physical block address in the flash memory, the method further comprises: Searching for the segment of continuous physical block addresses from the flash memory, and returning the first and last addresses of the segment of continuous physical block addresses; When the segment of continuous physical block addresses contains a bad block, the bad block is automatically skipped during reading and writing. 7. A solid state drive, comprising a flash memory and a firmware chip, wherein the firmware chip stores instructions, wherein when the instructions are executed by the firmware chip, the address mapping method for the solid state drive according to any one of claims 1 to 6 is implemented.