CN112491362B - LC oscillator with multiple sections of wide tuning ranges - Google Patents
LC oscillator with multiple sections of wide tuning ranges Download PDFInfo
- Publication number
- CN112491362B CN112491362B CN202011361581.3A CN202011361581A CN112491362B CN 112491362 B CN112491362 B CN 112491362B CN 202011361581 A CN202011361581 A CN 202011361581A CN 112491362 B CN112491362 B CN 112491362B
- Authority
- CN
- China
- Prior art keywords
- transistor
- capacitor
- voltage
- oscillator
- bias
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000003990 capacitor Substances 0.000 claims abstract description 133
- 238000003491 array Methods 0.000 claims abstract description 22
- 230000000903 blocking effect Effects 0.000 claims abstract description 18
- 230000003071 parasitic effect Effects 0.000 claims description 6
- 230000000295 complement effect Effects 0.000 claims description 3
- 238000000034 method Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000010355 oscillation Effects 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1206—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification
Landscapes
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
Abstract
The invention discloses a multi-section wide tuning range LC oscillator, and belongs to the field of circuit design. The multi-stage wide tuning range LC oscillator of the present invention includes: the variable capacitance module comprises a first voltage-controlled output voltage end, a first blocking capacitor, a first variable capacitor, a second voltage-controlled output voltage end, a second blocking capacitor, a second variable capacitor, a bias voltage end, a first bias resistor, a second bias resistor and a control voltage end; the weight capacitor module comprises a plurality of groups of switch capacitor arrays, wherein one group of switch capacitor arrays comprises a first weight capacitor, a second weight capacitor, a first load resistor, a second load resistor, a first inverter, a second inverter, a first transistor, a second transistor, a third transistor and a fourth transistor. The invention realizes tuning curves with multiple sections, wide range and low gain.
Description
Technical Field
The invention relates to the field of circuit design, in particular to a multi-section wide tuning range LC oscillator.
Background
Ring oscillators are easy to integrate but have poorer phase noise performance than LC oscillators. Ring oscillator with CMOS inverter cascade, assuming that the initial voltage of each node is the logic threshold V of the inverter when the circuit starts to operate trip . If the inverters are identical and the device is noise free, the circuit will always remain in this state, but the noise component will disturb the voltage at each node, resulting in a continuously amplified waveform, and eventually the signal reaches the supply voltage swing. The basic principle is that, assuming that the circuit starts, the output voltage V of the first-stage inverter X ＝V DD V at this time Y ＝0，V Z ＝V DD When the circuit starts to operate, the input of the first stage inverter is V Z I.e. high level, V X Start to drop to zero forcing V Y After passing through an inverter delay T D Then rise to V DD And V is Z After passing through an inverter delay T D And then falls to zero. Then the circuit is at T between successive node voltages D Time-delay oscillation, the generated oscillation period is 6T D The frequency is 1/(6T) D ). The number of loop inversions must be an odd number of times or the circuit will lock.
The ring oscillator in the differential cascade has the greatest advantage compared with the ring oscillator in the CMOS inverter cascade in that the count can be even, only one of the ring oscillators is connected into a non-inverting ring oscillator, and the circuit is more flexible.
However, the prior art can meet certain frequency output requirements, but has the disadvantages of lower output frequency, narrower tuning range, larger tuning gain and poor noise performance, so that good frequency index cannot be improved after frequency division.
Disclosure of Invention
The invention mainly provides a multi-section wide tuning range LC oscillator, which solves the problems of lower output frequency, narrower tuning range and poor noise performance in the prior art.
In order to solve the problems, the invention adopts a technical scheme that: the LC oscillator comprises a variable capacitor module, a first voltage-controlled output voltage end, a first blocking capacitor, a first variable capacitor, a second voltage-controlled output voltage end, a second blocking capacitor, a second variable capacitor, a bias voltage end, a first bias resistor, a second bias resistor and a control voltage end, wherein the first voltage-controlled output voltage end is connected with the first variable capacitor through the first blocking capacitor, the second voltage-controlled output voltage end is connected with the second variable capacitor through the second blocking capacitor, the bias voltage end is connected with one end of the first bias resistor and one end of the second bias resistor, and the control voltage end is connected with one end of the first variable capacitor and one end of the second variable capacitor; the weight capacitor module comprises a plurality of groups of switch capacitor arrays, wherein one group of switch capacitor arrays comprises a first weight capacitor, a second weight capacitor, a first load resistor, a second load resistor, a first inverter, a second inverter, a first transistor, a second transistor, a third transistor and a fourth transistor, wherein the first transistor and the third transistor are of the same type, the second transistor and the fourth transistor are of the transistors of the complementary type with the first transistor, a circuit terminal is connected with the grid electrodes of the first transistor and the third transistor, a circuit terminal is respectively connected with the grid electrodes of the second transistor and the fourth transistor through the first inverter and the second inverter, a first voltage-controlled output voltage end is connected with the drain electrode of the first transistor through the first weight capacitor, the drain electrode of the second transistor is connected with the drain electrode of the first transistor through the first load resistor, a second voltage-controlled output voltage end is connected with the drain electrode of the third transistor through the second weight capacitor, and the drain electrode of the fourth transistor is connected with the drain electrode of the third transistor through the second load resistor.
The technical scheme of the invention has the following beneficial effects: the invention designs an LC oscillator with multiple sections and wide tuning range. The LC oscillator has high output frequency, small layout area, high linearity of tuning curve due to the variable capacitance structure with bias voltage, wide tuning range due to the multi-bit weight capacitance structure, large frequency margin, small tuning gain and good noise performance.
Drawings
FIG. 1 is a schematic diagram of one embodiment of a multi-stage wide tuning range LC oscillator of the present invention;
FIG. 2 is a schematic diagram of an embodiment of a multi-stage wide tuning range LC oscillator of the present invention;
FIG. 3 is a schematic diagram of another embodiment of a multi-stage wide tuning range LC oscillator of the present invention;
fig. 4 is a schematic diagram of another embodiment of a multi-stage wide tuning range LC oscillator of the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making clear and defining the scope of the present invention.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises an element.
Fig. 1 shows an embodiment of a multi-stage wide tuning range LC oscillator of the present invention. In this embodiment, the LC oscillator with multiple-bit wide tuning range of the present invention includes a variable capacitance module and a weight capacitance module. In order to facilitate understanding of the technical solution of the present invention, the multi-segment wide tuning range LC oscillator of the present invention will be described with reference to fig. 2, 3 and 4.
In one embodiment of the present invention, a multi-segment wide tuning range LC oscillator may generate waveform signals at frequencies up to 1000MHz or more. The LC oscillator with multiple-section wide tuning range has three types of transformer feedback type, inductance three-point type and capacitance three-point type. All three types of the liquid crystal display devices adopt an LC resonant circuit as a frequency-selecting network, generally adopt an LC parallel circuit, and the quality factor is an important index of the LC parallel circuit and is also called as a Q value. The greater the Q value, the steeper the phase angle of the LC parallel circuit impedance changes with frequency, and the better the frequency selective effect.
In one embodiment of the present invention, the variable capacitance module includes a first voltage-controlled output voltage terminal, a first blocking capacitor, a first variable capacitor, a second voltage-controlled output voltage terminal, a second blocking capacitor, a second variable capacitor, a bias voltage terminal, a first bias resistor, a second bias resistor, and a control voltage terminal, where the first voltage-controlled output voltage terminal is connected to the first variable capacitor through the first blocking capacitor, the second voltage-controlled output voltage terminal is connected to the second variable capacitor through the second blocking capacitor, the bias voltage terminal is connected to one end of the first bias resistor and one end of the second bias resistor, and the control voltage terminal is connected to one end of the first variable capacitor and one end of the second variable capacitor.
In a specific embodiment of the present invention, one end of the first signal source is connected to the first voltage-controlled output voltage terminal after passing through the voltage dividing resistor, and the other end of the first signal source is directly connected to the second voltage-controlled output voltage terminal. The first signal source not only can provide voltage for the first voltage-controlled output voltage terminal and the second voltage-controlled output voltage terminal, but also can output various waveforms.
In one embodiment of the invention, the second signal source provides a voltage at the control voltage terminal and the third signal source provides a voltage at the bias voltage terminal. Separate signal sources provide respective voltages for the different voltage terminals, respectively, which facilitates signal routing of the control circuit.
In an embodiment of the present invention, fig. 2 is a schematic diagram of an embodiment of a multi-stage wide tuning range LC oscillator according to the present invention, in the variable capacitance structure shown in fig. 2, a control voltage terminal vctrl provides voltages to two ends of the variable capacitance, a capacitance value of the variable capacitance is controlled, a voltage provided by a bias voltage terminal vbias provides voltage bias to the variable capacitance through the bias resistor, a first signal source provides voltages to a first voltage-controlled output voltage terminal vco1 and a second voltage-controlled output voltage terminal vco2, a second signal source provides voltages to the control voltage terminal vctrl, and a third signal source provides voltages to the bias voltage terminal vbias, where the first signal source may also provide various waveforms.
In a specific embodiment of the present invention, the voltage bias provided by the first bias resistor controls the capacitance value of the first variable capacitor, so that the capacitance value of the first variable capacitor is within the linear variation range of the first capacitor; and controlling the capacitance value of the second variable capacitor through the voltage bias provided by the second bias resistor, so that the capacitance value of the second variable capacitor is in the linear variation range of the second capacitor. The linear change of the capacitance can be accurately predicted, is convenient for circuit design, and can obtain a wide capacitance value range of the variable capacitance.
In a specific example of the present invention, the capacitance value of the variable capacitor is typically changed by changing the voltage across the capacitor, and in general, the voltage across the variable capacitor will not be exactly within the range of the linear change of the capacitor in the actual circuit, for example, the voltage across the capacitor needs to be within the range of 1.5V to 2V, the capacitance value of the variable capacitor is linearly changed, in the remaining voltage range, the capacitance value of the variable capacitor is non-linearly changed, and the circuit can only operate in the voltage range of 0.5V to 1V, at this time, the bias voltage terminal can provide a voltage bias of 1V to the variable capacitor through the bias resistor, so that the variable capacitor operates in the range of the linear change of the capacitor, the linear change of the capacitor can be accurately predicted, and the circuit design is convenient, and a relatively wide range of the capacitance value of the variable capacitor can be obtained.
In one embodiment of the present invention, the variable capacitance structure shown in fig. 2 has two variable capacitances, two bias resistors and two blocking capacitances. Variable capacitance C in general var A value of 100-500 fF, a blocking capacitance C 0 Is coupled to and unable to provide a variable capacitance C var Has a larger influence, and thus the blocking capacitance C 0 Is typically of the order of 10 pF. R is R bias Is a bias resistor for controlling the variable capacitance C var The operating range of (a) is an open-circuit bias point, so that the resistance of the bias resistor is large, but thermal noise is introduced due to the excessively large resistance of the bias resistor, so that the resistance of the bias resistor is generally 5-10 KΩ.
In one embodiment of the present invention, the control voltage Vctrl is used to control the capacitance value of the variable capacitor; dc blocking capacitor C 0 The bias circuit of the variable capacitor is independent of other circuits, so that the bias circuit and the other circuits are not mutually influenced.
In one embodiment of the present invention, the capacitor module includes a plurality of groups of switch capacitor arrays, wherein one group of switch capacitor arrays includes a first capacitor, a second capacitor, a first load resistor, a second load resistor, a first inverter, a second inverter, a first transistor, a second transistor, a third transistor and a fourth transistor, wherein the first transistor and the third transistor are of the same type, the second transistor and the fourth transistor are of a complementary type to the first transistor, a circuit terminal is connected to gates of the first transistor and the third transistor, a circuit terminal is connected to gates of the second transistor and the fourth transistor through the first inverter and the second inverter, respectively, a first voltage-controlled output voltage terminal is connected to a drain of the first transistor through the first capacitor, a drain of the second transistor is connected to a drain of the first transistor through the first load resistor, a second voltage-controlled output voltage terminal is connected to a drain of the second transistor through the second capacitor, and a drain of the fourth transistor is connected to a drain of the third transistor through the second load resistor.
In one embodiment of the present invention, the first transistor and the third transistor are NMOS, and the sources of the first transistor and the third transistor are grounded.
In one embodiment of the present invention, the second transistor and the fourth transistor are PMOS, and the sources of the second transistor and the fourth transistor are connected to an external power source.
In a specific embodiment of the present invention, the weight capacitance values in the plurality of groups of switched capacitor arrays are sequentially changed according to a preset proportion sequence, wherein the preset proportion comprises a power proportion.
In one embodiment of the invention, the weighting capacitor may be varied in a ratio of 1:2:4:8 … … to vary the capacitance value to increase the tuning frequency range of the voltage controlled output voltage and to maintain the quality factor relatively constant throughout the range, which is primarily the voltage controlled output voltage tuning frequency range.
In one embodiment of the present invention, the design of the weight capacitors is shown in fig. 3, and fig. 3 shows one of the sets of switched capacitor arrays. B (B) 0 The first group of switch circuit terminals of the switch capacitor array adopts a symmetrical structure, namely two switch capacitor circuits are connected between the two switch circuit terminals by using a dotted line. The first group of switched capacitor arrays is formed by two switched capacitor capacitors of the same structure. The first group of switch capacitor arrays comprises two inverters of the same type, two capacitors of the same type, two resistors of the same type, two N-channel MOS transistors and two P-channel MOS transistors. Switch circuit terminal B 0 An external signal is connected to the gate of the first transistor, the source of the first transistor is grounded, and a voltage U is formed between the gate and the source GS1 . When U is GS1 When the resistance is larger than the starting voltage of the first transistor, the first transistor is turned on, at the moment, an internal resistance exists between the drain electrode and the source electrode of the first transistor, and the resistance cannot be ignored, namely the on-resistance of the first transistor. When the output voltage of the first voltage-controlled output voltage terminal is low, the first voltage-controlled output voltage terminal is connected to the drain of the first transistor after passing through the first weight capacitor to form a voltage U between the drain and the source of the first transistor DS1 . In U DS1 About zero, U GS1 The on-resistance of the first transistor is approximately equal to U under the condition of being far larger than the on-voltage of the first transistor GS1 Inversely proportional, in order to obtain a small on-resistance, as large U as possible should be taken GS1 Values. Switch circuit terminal B 0 The input high potential is changed into low potential after passing through the first inverter and is input to the grid electrode of the second transistor, the source electrode of the second transistor is connected with the high potential to form a voltage U between the grid sources GS2 . When U is GS2 And when the voltage is smaller than the starting voltage of the second transistor, the second transistor is turned on. The output voltage of the first voltage-controlled output voltage terminal is low, and is connected to the drain of the second transistor after passing through the first weight capacitor and the first load resistor to form a voltage U between the drain and the source of the second transistor DS2 . Likewise, switch circuit terminal B 0 A high potential input connected to the gate of the third transistor, the source of the third transistor being grounded to form a voltage U between the gate and the source GS3 . When U is GS3 And when the voltage is larger than the starting voltage of the third transistor, the third transistor is turned on. When the output voltage of the second voltage-controlled output voltage terminal is low, the second capacitor is connected to the drain of the third transistor to form a voltage U between the drain and the source of the third transistor DS3 . Switch circuit terminal B 0 The input high potential is changed into low potential after passing through the first inverter and is input to the grid electrode of the fourth transistor, the source electrode of the fourth transistor is connected with high potential, and a voltage U is formed between the grid and the source electrode GS4 . When U is GS4 And when the voltage is smaller than the starting voltage of the fourth transistor, the fourth transistor is turned on. When the output voltage of the second voltage-controlled output voltage terminal is low, the second voltage-controlled output voltage terminal is connected with the second load resistor through the second weight capacitorForming a voltage U between the drain and the source of the fourth transistor at the drain of the fourth transistor DS4 。
In one embodiment of the present invention, another set of switched capacitor arrays among the sets of switched capacitor arrays is shown in fig. 4. Likewise, there is a third group, a fourth group of switched capacitor arrays, and the number of groups of switched capacitor arrays is determined according to the number of tuning curves that the user wants to obtain. The first voltage-controlled output circuit end and the second voltage-controlled output circuit end provide voltages for a plurality of groups of switch capacitor arrays. B (B) 1 The switch circuit terminal of the second group of switch capacitor array has the same structure as the first group of switch capacitor array, namely, the switch capacitor array is connected by two weight capacitors, two load resistors, two inverters and four transistors in the same connection mode. In the multiple groups of switch capacitor arrays, the load resistance of each switch capacitor circuit has the same value, and the inverters are all of the same type. The weight capacitors of each switch capacitor circuit have different values, and if four groups of switch capacitor arrays are provided, 8 switch capacitor circuits are used in the four groups of switch capacitor arrays, so that 8 weight capacitors are also used, and the 8 weight capacitors can be set according to the ratio of 1:2:4:8:16:32:64:128 and can also be set according to the ratio of 1:2:3:4:5:6:7:8. The resistance of the on-resistance of each transistor in the four groups of switch capacitor arrays is required to ensure that the current of the weight capacitor in the switch capacitor circuit can normally flow.
In one embodiment of the present invention, the VCO refers to an oscillating circuit having an output frequency corresponding to an input control voltage, and the operating state of the VCO or an element parameter of the oscillating circuit is controlled by the input control voltage to form a voltage-controlled oscillator. The input voltage of the voltage-controlled oscillation circuit is continuously reduced, and the amplitude of the output voltage is increased as much as possible by optimizing the phase noise, so that the voltage-controlled gain K can be realized vco And (3) lowering.
In one embodiment of the invention, the design of the weight capacitor adopts a switched capacitor array, so that more tuning curves can be obtained, and the voltage-controlled gain K is realized vco Reduced jitterThe movement is reduced, and the performance is better; and meanwhile, the tuning width is wider, and the frequency margin is better.
In a specific embodiment of the present invention, on-resistance values of the first transistor and the second transistor when parasitic capacitance values of the first transistor and the second transistor are not greater than a first weight capacitance value of a certain proportion are respectively determined as operation on-resistance values of the first transistor and the second transistor. The current circulation of the first weight bit is ensured, and the influence on the Q value and the phase noise of the resonant circuit in the LC oscillator with the multi-section wide tuning range is also ensured to be smaller.
In a specific embodiment of the present invention, the on-resistance values of the third transistor and the fourth transistor when the parasitic capacitance values of the third transistor and the fourth transistor are not greater than the second weight capacitance value of a certain proportion are respectively determined as the operation on-resistance values of the third transistor and the fourth transistor. The current circulation of the second weight bit is ensured, and the influence on the Q value and the phase noise of the resonant circuit in the LC oscillator with the multi-section wide tuning range is also ensured to be smaller.
In one embodiment of the present invention, the design of the weight capacitor is the design of the tuning curve, the key point of the weight capacitor design is the design of the switch structure and the capacitance value of the weight capacitor, and the key point of the switch structure design is the values of the on-resistance and the off-resistance of the transistor.
In one embodiment of the present invention, the smaller the resistance of the on-resistance is theoretically, but decreasing the resistance of the on-resistance increases the area of the circuit, thereby increasing the parasitic capacitance of the transistor, resulting in losing the advantage of the switched capacitor array, and thus requiring a compromise. In general, when the parasitic capacitance of the transistor does not exceed 1/10 of the weight capacitance, the on-resistance of the transistor is preferably obtained at this time.
In one embodiment of the present invention, the smaller the resistance values of the on-resistances of the first transistor, the second transistor, the third transistor, and the fourth transistor, the smaller the influence on the quality factor of the resonant circuit in the multi-segment wide tuning range LC oscillator.
In one embodiment of the present invention, when the first transistor and the second transistor are turned on as switches, the resistance of the corresponding on-resistances is as small as possible, so as to ensure the current flow of the weight capacitor, and at the same time, the smaller the resistance of the on-resistances is, the smaller the Q value of the component circuit in the LC oscillator with the multi-segment wide tuning range is, and the smaller the influence on the phase noise of the resonant circuit in the LC oscillator with the multi-segment wide tuning range is.
In a specific embodiment of the present invention, the turn-off resistance values of the first transistor and the second transistor are respectively greater than a first preset threshold value, so that when the first transistor and the second transistor are turned off, the working states of the first transistor and the second transistor are not affected by the voltages at two ends of the first capacitor; and the turn-off resistance values of the third transistor and the fourth transistor are respectively larger than a second preset threshold value, so that when the third transistor and the fourth transistor are disconnected, the working states of the third transistor and the fourth transistor are not influenced by the voltages at two ends of the second capacitor.
In one embodiment of the present invention, the off-resistances of the first transistor and the second transistor refer to resistance values of the off-resistances corresponding to the first transistor and the second transistor after the first transistor and the second transistor are turned off as switches should be as large as possible, so as to prevent the first weighting capacitor from affecting the working states of the first transistor and the second transistor at the moment; the turn-off resistance of the third transistor and the fourth transistor means that after the third transistor and the fourth transistor are turned off as switches, the resistance values of the turn-off resistances corresponding to the third transistor and the fourth transistor should be as large as possible, so as to prevent the second weighting capacitor from affecting the working states of the third transistor and the fourth transistor at the moment.
The foregoing description is only illustrative of the present invention and is not intended to limit the scope of the invention, and all equivalent structural changes made by the present invention and the accompanying drawings, or direct or indirect application in other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A multi-segment wide tuning range LC oscillator comprising:
the variable capacitor module comprises a first voltage-controlled output voltage end, a first blocking capacitor, a first variable capacitor, a second voltage-controlled output voltage end, a second blocking capacitor, a second variable capacitor, a bias voltage end, a first bias resistor, a second bias resistor and a control voltage end, wherein the first voltage-controlled output voltage end is connected with the first variable capacitor through the first blocking capacitor, the second voltage-controlled output voltage end is connected with the second variable capacitor through the second blocking capacitor, the bias voltage end is connected with one end of the first bias resistor and one end of the second bias resistor, and the control voltage end is connected with one end of the first variable capacitor and one end of the second variable capacitor;
the weight capacitor module comprises a plurality of groups of switch capacitor arrays, wherein one group of switch capacitor arrays comprises a first weight capacitor, a second weight capacitor, a first load resistor, a second load resistor, a first inverter, a second inverter, a first transistor, a second transistor, a third transistor and a fourth transistor, wherein the first transistor and the third transistor are of the same type, the second transistor and the fourth transistor are of the transistors of the complementary type with the first transistor, a circuit terminal is connected with the gates of the first transistor and the third transistor, the circuit terminal is respectively connected with the gates of the second transistor and the fourth transistor through the first inverter and the second inverter, a first voltage-controlled output voltage end is connected with the drain of the first transistor through the first weight capacitor, the drain of the second transistor is connected with the drain of the first transistor through the first load resistor, a second voltage-controlled output voltage end is connected with the drain of the third transistor through the drain of the second transistor through the second inverter, and the circuit terminal is connected with the drain of the third transistor through the drain of the third transistor.
2. The multi-segment wide tuning range LC oscillator of claim 1, wherein the first transistor and the third transistor are NMOS transistors, the sources of the first transistor and the third transistor being grounded.
3. The multi-segment wide tuning range LC oscillator of claim 1, wherein the second transistor and the fourth transistor are PMOS transistors, and sources of the second transistor and the fourth transistor are connected to an external power supply.
4. The multi-segment wide tuning range LC oscillator of claim 1, wherein the voltage bias provided by the first bias resistor controls the capacitance value of the first variable capacitance such that the capacitance value of the first variable capacitance is in a first capacitance linear variation range; and
and the voltage bias provided by the second bias resistor controls the capacitance value of the second variable capacitor, so that the capacitance value of the second variable capacitor is in a second capacitance linear variation range.
5. The multi-segment wide tuning range LC oscillator of claim 1, wherein the on-resistance values of the first transistor and the second transistor when neither the parasitic capacitance values of the first transistor nor the second transistor are greater than a proportion of the first weight capacitance value are determined as the operating on-resistance values of the first transistor and the second transistor, respectively.
6. The multi-segment wide tuning range LC oscillator of claim 1, wherein the on-resistance values of the third transistor and the fourth transistor when neither the parasitic capacitance values of the third transistor nor the fourth transistor are greater than a proportion of the second weight capacitance value are determined as the operating on-resistance values of the third transistor and the fourth transistor, respectively.
7. The multi-segment wide tuning range LC oscillator of claim 1, wherein the off resistance values of the first transistor and the second transistor are respectively greater than a first preset threshold value, such that when the first transistor and the second transistor are turned off, the operating states of the first transistor and the second transistor are not affected by voltages across the first weight capacitor; and
and the turn-off resistance values of the third transistor and the fourth transistor are respectively larger than a second preset threshold value, so that when the third transistor and the fourth transistor are disconnected, the working states of the third transistor and the fourth transistor are not influenced by the voltages at two ends of the second capacitor.
8. The multi-segment wide tuning range LC oscillator of claim 1, wherein the weight capacitance values in the plurality of sets of switched capacitor arrays are sequentially changed in a predetermined proportional order, wherein the predetermined proportional order comprises a power-to-power ratio.
9. The multi-segment wide tuning range LC oscillator of claim 1,
one end of the first signal source is connected with the first voltage-controlled output voltage end after passing through the voltage dividing resistor, and the other end of the first signal source is directly connected with the second voltage-controlled output voltage end.
10. The multi-segment wide tuning range LC oscillator of claim 1, wherein a second signal source provides a voltage at said control voltage terminal and a third signal source provides a voltage at said bias voltage terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011361581.3A CN112491362B (en) | 2020-11-27 | 2020-11-27 | LC oscillator with multiple sections of wide tuning ranges |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011361581.3A CN112491362B (en) | 2020-11-27 | 2020-11-27 | LC oscillator with multiple sections of wide tuning ranges |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112491362A CN112491362A (en) | 2021-03-12 |
| CN112491362B true CN112491362B (en) | 2024-03-08 |
Family
ID=74936658
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011361581.3A Active CN112491362B (en) | 2020-11-27 | 2020-11-27 | LC oscillator with multiple sections of wide tuning ranges |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112491362B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20110066319A (en) * | 2009-12-11 | 2011-06-17 | 전자부품연구원 | Wideband Voltage Controlled Oscillator |
| CN103187927A (en) * | 2011-12-27 | 2013-07-03 | 中国科学院微电子研究所 | Dual-mode broadband voltage-controlled oscillator |
| CN111565040A (en) * | 2020-07-14 | 2020-08-21 | 南京汇君半导体科技有限公司 | Voltage-controlled oscillator based on dual common mode resonance |
-
2020
- 2020-11-27 CN CN202011361581.3A patent/CN112491362B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20110066319A (en) * | 2009-12-11 | 2011-06-17 | 전자부품연구원 | Wideband Voltage Controlled Oscillator |
| CN103187927A (en) * | 2011-12-27 | 2013-07-03 | 中国科学院微电子研究所 | Dual-mode broadband voltage-controlled oscillator |
| CN111565040A (en) * | 2020-07-14 | 2020-08-21 | 南京汇君半导体科技有限公司 | Voltage-controlled oscillator based on dual common mode resonance |
Non-Patent Citations (1)
| Title |
|---|
| 应用于IMT-A和UWB系统的双频段开关电流源压控振荡器设计;唐欣;黄风义;唐旭升;邵明驰;;东南大学学报(自然科学版);20130630(第03期);全文 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN112491362A (en) | 2021-03-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8076986B2 (en) | Switching capacitor generation circuit | |
| US7852164B2 (en) | Piezoelectric oscillator | |
| CN112234957B (en) | Analog oscillator circuit with negative feedback regulation function | |
| JP4089938B2 (en) | Voltage controlled oscillator | |
| CN113612445B (en) | Temperature compensation LC voltage-controlled oscillator | |
| CN215773047U (en) | LC voltage-controlled oscillator | |
| CN111181553A (en) | Ring oscillator delay unit based on active inductive load | |
| KR100441470B1 (en) | Digitally adjustable crystal oscillator with a monolithic integrated oscillator circuit | |
| CN112953390A (en) | Wide-tuning low-phase-noise high-linearity LC voltage-controlled oscillator | |
| CN113922759B (en) | LC voltage-controlled oscillator | |
| US6943633B2 (en) | Widely tunable ring oscillator utilizing active negative capacitance | |
| US6222423B1 (en) | Voltage controlled ring oscillator delay | |
| CN112491362B (en) | LC oscillator with multiple sections of wide tuning ranges | |
| US6111456A (en) | Semiconductor circuit | |
| US6819189B2 (en) | Voltage-controlled oscillator having short synchronous pull-in time | |
| CN113395042B (en) | High-frequency low-power-consumption low-jitter voltage-controlled oscillator | |
| US11128255B1 (en) | Oscillator circuit | |
| KR100476559B1 (en) | Sine buffer circuit of temperature compensated crystal oscillator | |
| US9722536B2 (en) | Digital controlled oscillator and switchable varactor for high frequency low noise operation | |
| US11799455B2 (en) | Relaxation oscillating circuit | |
| US6255881B1 (en) | High tunability CMOS delay element | |
| US20250239970A1 (en) | Relaxation oscillator | |
| US7109812B2 (en) | Apparatus and method for presenting a linear capacitive output in response to a voltage input | |
| KR100959024B1 (en) | Voltage-controlled oscillator with improved phase noise and frequency-voltage tuning linearity | |
| CN113098393A (en) | Voltage-controlled oscillator with adjustable frequency and integrated circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information |
Country or region after: China Address after: A1009, floor 9, block a, No. 9, Shangdi Third Street, Haidian District, Beijing 100085 Applicant after: Beijing Bairui Internet Technology Co.,Ltd. Address before: 7-1-1, building C, 7 / F, building 2-1, No.2, Shangdi Information Road, Haidian District, Beijing 100085 Applicant before: BARROT WIRELESS Co.,Ltd. Country or region before: China |
|
| CB02 | Change of applicant information | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |