CN112803761B - Power management circuit and electronic equipment - Google Patents

Abstract

The application discloses a power management circuit and electronic equipment belongs to power management technical field. The power management circuit includes: at least two first switch assemblies; an inductive circuit connected to the at least two first switch assemblies; the inductance circuit comprises an inductance component and a second switch component which are connected in parallel, and the on-resistance of the second switch component is smaller than that of the inductance component; the at least two first switch assemblies are conducted through the second switch assembly under the condition that the second switch assemblies are conducted; the at least two first switch assemblies are turned on by the inductance assembly with the second switch assembly turned off. The embodiment of the application provides a power management circuit which can reduce unnecessary heating of the circuit and save energy consumption.

Description

Power management circuits and electronic equipment

technical field

The application belongs to the technical field of power management, and in particular relates to a power management circuit and electronic equipment.

Background technique

With the diversification of functions of smart mobile terminals and the trend of larger screens bringing about a sharp increase in power consumption, users' demands on the battery life of smart mobile terminals are also increasing. How to adjust the battery life of the mobile terminal while satisfying the requirements of the user has become a widely concerned issue.

Mobile terminals are generally powered by lithium batteries, and the power supply voltage is generally in the range of 3.0 to 4.45V, which changes with the change of battery power. However, the power supply voltage required by the platform and peripherals is different, and a DC-DC power management module is required to For deployment, the DC-DC (DC-DC) commonly used in mobile terminal power management modules, such as Buck-Boost and Boost-Bypass modules, when working in Bypass mode, are usually The Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), which is input to the output channel, is normally open, and passes through the power inductor to the output. In this case, if the load terminal consumes a lot of power, the current The on-resistance (Rdson) loss of the power inductor is relatively large, which is directly lost by heat, which is not conducive to efficiency improvement and battery life.

Contents of the invention

The embodiment of the present application provides a power management circuit and electronic equipment, which can solve the problem that when the power management module of the mobile terminal works in Bypass mode, the MOSFETs that are input to the output path are usually turned on, and pass directly to the output through the power inductor. Under the circumstances, if the power consumption at the load end is large, the Rdson loss flowing through the power inductor is relatively large, which will be directly heated and lost, resulting in a problem of high energy consumption.

In order to solve the above-mentioned technical problems, the application is implemented as follows:

In the first aspect, the embodiment of the present application provides a power management circuit, including:

at least two first switch assemblies;

an inductive circuit connected to the at least two first switch assemblies;

Wherein, the inductance circuit includes an inductance component and a second switch component connected in parallel, and the on-resistance of the second switch component is smaller than the on-resistance of the inductance component;

When the second switch component is turned on, the at least two first switch components are turned on through the second switch component;

When the second switch component is turned off, the at least two first switch components are turned on through the inductance component.

In a second aspect, an embodiment of the present application provides an electronic device, including the power management circuit as described in the first aspect.

The beneficial effects of the present invention are:

In the above solution, by setting the inductance circuit in parallel with the inductance component and the second switch component, when the second switch component is turned on, the at least two first switch components are turned on through the second switch component, so that the inductance component Short circuit can effectively avoid heat loss of inductive components, thereby reducing energy consumption.

Description of drawings

FIG. 1 is a schematic structural diagram of a power management circuit according to an embodiment of the present application;

Fig. 2 is a schematic diagram of the composition and structure of the second switch assembly of the embodiment of the present application;

Fig. 3 is one of the detailed structural diagrams of the power management circuit;

Figure 4 is a schematic diagram of the working principle in Buck mode;

Figure 5 is a schematic diagram of the working principle in Boost mode;

Figure 6 is a schematic diagram of the working principle in Bypass mode;

Figure 7 is a schematic diagram of the working principle of Q _BYP ;

Fig. 8 is the second schematic diagram of the detailed structure of the power management circuit;

FIG. 9 is the third schematic diagram of the detailed structure of the power management circuit.

Detailed ways

The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of this application.

The terms "first", "second" and the like in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific sequence or sequence. It should be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the application can be practiced in sequences other than those illustrated or described herein, and that references to "first," "second," etc. distinguish Objects are generally of one type, and the number of objects is not limited. For example, there may be one or more first objects. In addition, "and/or" in the specification and claims means at least one of the connected objects, and the character "/" generally means that the related objects are an "or" relationship.

The power management circuit and electronic equipment provided by the embodiments of the present application will be described in detail below through specific embodiments and application scenarios with reference to the accompanying drawings.

As shown in Figure 1, the embodiment of the present application provides a power management circuit, including:

at least two first switch assemblies 100;

an inductance circuit 200 connected to the at least two first switch components 100;

Wherein, the inductance circuit 200 includes an inductance component 210 and a second switch component 220 connected in parallel, the on-resistance of the second switch component 220 is smaller than the on-resistance of the inductance component 210;

When the second switch component 220 is turned on, the at least two first switch components 100 are turned on through the second switch component 220;

When the second switch component 220 is turned off, the at least two first switch components 100 are turned on through the inductance component 210 .

It should be noted that the power management circuit has a power input terminal connected to an external power supply terminal, and a power output terminal for supplying power to a load. When the power management circuit is used specifically, the voltage at the power input terminal is at the When the load connected to the terminal is within the input working range (that is, the power management circuit works in the bypass (Bypass) mode), the second switch component 220 is in a conduction working state, and the second switch component 220 makes the inductance component 210 short-circuited , because there is no current passing through the inductance component 210, the loss of electric energy caused by the heating of the inductance component 210 can be avoided; when the voltage at the power input terminal is not within the input working range of the load connected to the power output terminal (that is, the power management circuit When working in a non-Bypass mode (for example, Buck mode or Boost mode), the second switch component 220 is in an off working state, and the inductance component 210 can work normally.

It should further be noted that, in order to avoid the influence of the second switch component 220 on the power management circuit when the inductance component 210 works normally, as further shown in FIG. 2 , the second switch component 220 includes: a transistor 221 and a the diode 222;

Wherein, the diode 222 is configured as a pair of tubes, and no current flows through the diode 222 when the second switch component is turned off and turned on.

That is to say, when the second switch component is turned off, no current flows through the transistor 221 and the diode 222, and when the second switch component is turned on, current flows through the transistor 221, and the diode 222 No current will pass through.

It should be noted that because the diode 222 is formed parasiticly due to the process of the transistor 221, in order to achieve the purpose that no current will flow through the diode 222, two transistors can be used to form a large transistor, so that the two transistors The diode 222 in the structure is in the form of back-to-tube, and the parasitic circuit on the transistor can also be processed to obtain a diode in the form of back-to-tube.

It should be noted that, in order to reduce the heat loss of the second switch component as much as possible, optionally, the on-resistance of the second switch component is generally less than or equal to 10 milliohms.

It should also be noted that, in order to be able to control the working states of the first switch component and the second switch component, the power management circuit further includes:

The controllers respectively connected to the first switch assembly and the second switch assembly are used to control the working states of the at least two first switch assemblies and the second switch assembly.

Taking the inductance component 210 as a power inductor and the second switch component as a transistor as an example, the power management circuit of the embodiment of the present application will be described in detail as follows in specific application scenarios.

Scenario 1. The power management circuit is a Buck-Boost circuit

Specifically, as shown in FIG. 3, in such an application scenario, the at least two first switch components include: a first transistor (Q1), a second transistor (Q2), a third transistor (Q3) and a fourth Transistor (Q4);

Q1, Q2, Q3 and Q4 are all connected to the controller through the control terminal;

Wherein, the first terminal of Q1 is connected to the power input terminal (Vin), the second terminal of Q1 is connected to the first terminal of Q2, and the second terminal of Q2 is grounded; the first terminal of Q3 is grounded, and the second terminal of Q3 It is connected with the first end of Q4, and the second end of Q4 is used as the power supply output end (Vout);

The first end of the inductance circuit is respectively connected to the second end of Q1 and the first end of Q2, and the second end of the inductance circuit is respectively connected to the second end of Q3 and the first end of Q4, that is, The first end of the power inductor (L) is respectively connected to the second end of Q1 and the first end of Q2, the second end of the power inductor (L) is respectively connected to the second end of Q3 and the first end of Q4, and the transistor ( The first end of Q _BYP ) is respectively connected to the second end of Q1 and the first end of Q2, and the second end of the transistor (Q _BYP ) is respectively connected to the second end of Q3 and the first end of Q4;

The first terminal of the input capacitor (Cin) is connected to Vin, and the second terminal is grounded; the first terminal of the output capacitor (Cout) is connected to Vout, and the second terminal is grounded; the first terminal of the load (R) is connected to Vout, and the second terminal is connected to Vout. end grounded.

It should be noted that in this scenario, the controller controls the working states of Q1, Q2, Q3, and Q4 to control the circuit to work in the boost (Buck) mode, step-down (Boost) mode and bypass mode respectively. (Bypass) mode.

1. When the power management circuit works in Buck mode, the controller controls Q4 to turn on, the controller controls Q3 and Q _BYP to turn off, the controller controls one of Q1 and Q2 to turn on, and the other to turn off .

That is to say, in this mode, Q4 is in normally open mode, Q3 and Q _BYP are in off mode, Q1 and Q2 are in switch mode, by controlling Q1 and Q2, the input power can be converted between the power inductor and the output capacitor , step down to supply power to the load R; when Q1 is turned on and Q2 is turned off, the power inductor is charged; when Q1 is turned off and Q2 is turned on, the power inductor stores energy and delivers it to the output capacitor to supply power to the load. Its working principle is shown in Figure 4. The direction of the arrow is the flow of current, and the cross sign indicates that the transistor is in an off state.

2. When the power management circuit works in Boost mode, the controller controls Q1 to turn on, the controller controls Q2 and Q _BYP to disconnect, the controller controls one of Q3 and Q4 to turn on, and the other closure.

That is to say, in this mode, Q1 is in normally open mode, Q2 and Q _BYP are in off mode, Q3 and Q4 are in switch mode, by controlling Q3 and Q4, the input power can be converted between the power inductor and the output capacitor , the boost supplies power to the load R; when Q3 is turned on and Q4 is turned off, the input charges the power inductor; when Q3 is turned off and Q4 is turned on, the energy stored in the power inductor is delivered to the output capacitor to supply power to the load. Its working principle is shown in Figure 5. The direction of the arrow in the figure is the flow direction of the current, and the cross sign indicates that the transistor is in an off state.

3. When the power management circuit works in Bypass mode, the controller controls Q1, Q _BYP and Q4 to be turned on, and the controller controls Q2 and Q3 to be turned off.

It should be noted that in the prior art, when in this mode, the circuit will directly supply power to the load through Q1, L and Q4, and L is affected by the process technology, etc., the DC impedance Rdson will be relatively large, if the load terminal operating current When it is relatively large, the P=I ² Rdson loss is very large, which is not conducive to the battery life of electronic equipment, and at the same time, the heat will be more serious. In this application, by increasing the bypass Q _BYP , when the power management circuit enters Bypass mode, the controller synchronously controls When Q _BYP is turned on, since the conduction resistance of Q _BYP is very small, most of the load current will pass through Q _BYP , which greatly reduces the loss caused by the conduction resistance of L. Its working principle is shown in Figure 6, and the direction of the arrow in the figure is The direction of current flow, the cross sign indicates that the transistor is in the off state.

It should also be noted that, in order to avoid the influence of the Q _BYP parasitic path on the loop when the power management circuit is in Buck mode or Boost mode, the diode on Q _BYP is made into a pair of tubes, that is, the parasitic path is from Vin to Vout or from Vout to Vin are all non-conductive, and the current flow on Q _BYP is shown in Figure 7, where the cross indicates that the current does not pass, and the arrow indicates the current flows.

Scenario 2: The power management circuit is a Buck-Bypass circuit

Specifically, as shown in FIG. 8, in such an application scenario, the at least two first switch components include: a first transistor (Q1) and a second transistor (Q2), and both Q1 and Q2 are connected to the control terminal through the control terminal. device connection;

Wherein, the first terminal of Q1 is connected to the power input terminal (Vin), the second terminal of Q1 is connected to the first terminal of Q2, and the second terminal of Q2 is grounded;

The first end of the inductance circuit is respectively connected to the second end of Q1 and the first end of Q2, and the second end of the inductance circuit is used as the power supply output terminal (Vout); that is, the power inductor (L) first The terminals are respectively connected to the second terminal of Q1 and the first terminal of Q2, the second terminal of L is used as Vout, the first terminal of the transistor (Q _BYP ) is respectively connected to the second terminal of Q1 and the first terminal of Q2, Q _BYP The second terminal is connected to Vout;

The first terminal of the input capacitor (Cin) is connected to Vin, and the second terminal is grounded; the first terminal of the output capacitor (Cout) is connected to Vout, and the second terminal is grounded; the first terminal of the load (R) is connected to Vout, and the second terminal is connected to Vout. end grounded.

It should be noted that, in this scenario, the controller controls the working states of Q1, Q2 and Q _BYP to control the power supply circuit to work in a boost (Buck) mode and a bypass (Bypass) mode respectively.

When the power management circuit works in Buck mode, the controller controls one of Q1 and Q2 to be turned on, and the other is turned off, and the controller controls Q _BYP to be turned off; that is, in this mode, Q1 and Q2 Q2 is in switch mode and Q _BYP is in cutoff mode.

When the power management circuit works in Bypass mode, the controller controls Q1 and Q _BYP to be turned on, and the controller controls Q2 to be turned off, that is to say, in this mode, Q2 is turned off, Q1 is normally turned on, and turned on synchronously Q _BYP , reduces the loss caused by the DC resistance of the power inductor.

Scenario 3: The power management circuit is a step-down (Boost-Bypass) circuit

Specifically, as shown in FIG. 9, in such an application scenario, the at least two first switch components include: a first transistor (Q1) and a second transistor (Q2), and both Q1 and Q2 communicate with the the controller connection;

The first end of the inductance circuit is connected to the power input terminal (Vin), the second end of the inductance circuit is respectively connected to the first end of Q1 and the first end of Q2, and the second end of Q1 is used as the power output terminal ( Vout), the second terminal of Q2 is grounded; that is, the first terminal of the power inductor (L) is connected to Vin, the second terminal of L is respectively connected to the first terminal of Q1 and the first terminal of Q2, and the transistor (Q _BYP ) is connected to Vin, and the second terminal of Q _BYP is connected to the first terminal of Q1 and the first terminal of Q2 respectively.

It should be noted that, in this scenario, the controller controls the working states of Q1, Q2 and Q _BYP to control the power supply circuit to work in a boost (Buck) mode and a bypass (Bypass) mode respectively.

When the power management circuit works in Boost mode, the controller controls one of Q1 and Q2 to be turned on, and the other is turned off, and the controller controls Q _BYP to be turned off; that is, in this mode, Q1 and Q2 Q2 is in switching mode and Q _BYP is in off state.

When the power management circuit works in Bypass mode, the controller controls Q1 and Q _BYP to be turned on, and the controller controls Q2 to be turned off, that is to say, in this mode, Q2 is turned off, Q1 is normally turned on, and turned on synchronously Q _BYP , reduces the loss caused by the DC resistance of the power inductor.

It should be noted that the embodiment of the present application reduces the loss caused by the DC resistance of the power inductor, reduces heat generation and improves battery life.

An embodiment of the present application further provides an electronic device, including the above-mentioned power management circuit.

It should be noted that the electronic equipment provided with the power management circuit can reduce the heat generation of the electronic equipment and improve the battery life of the electronic equipment.

It should be noted that, in this document, the term "comprising", "comprising" or any other variation thereof is intended to cover a non-exclusive inclusion such that a process, method, article or apparatus comprising a set of elements includes not only those elements, It also includes other elements not expressly listed, or elements inherent in the process, method, article, or device. Without further limitations, an element defined by the phrase "comprising a ..." does not preclude the presence of additional identical elements in the process, method, article, or apparatus comprising that element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved. Functions are performed, for example, the described methods may be performed in an order different from that described, and various steps may also be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

Through the description of the above embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus a necessary general-purpose hardware platform, and of course also by hardware, but in many cases the former is better implementation. Based on such an understanding, the technical solution of the present application can be embodied in the form of a software product in essence or the part that contributes to the prior art, and the computer software product is stored in a storage medium (such as ROM/RAM, disk, CD) contains several instructions to enable a terminal (which may be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in various embodiments of the present application.

The embodiments of the present application have been described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementations. The above-mentioned specific implementations are only illustrative and not restrictive. Those of ordinary skill in the art will Under the inspiration of this application, without departing from the purpose of this application and the scope of protection of the claims, many forms can also be made, all of which belong to the protection of this application.

Claims (10)

1. A power management circuit, comprising:

at least two first switch assemblies;

an inductive circuit connected to the at least two first switch assemblies;

the inductance circuit comprises an inductance component and a second switch component which are connected in parallel, and the on-resistance of the second switch component is smaller than that of the inductance component;

when the power management circuit works in a bypass mode, the second switch assemblies are conducted, the at least two first switch assemblies are conducted through the second switch assemblies, and the inductance assemblies are short-circuited;

when the power management circuit works in a non-bypass mode, the second switch assemblies are disconnected, and the at least two first switch assemblies are conducted through the inductance assemblies;

the second switch assembly includes: a transistor and a diode connected in parallel with the transistor,

wherein the diode is arranged in a tube form.

2. The power management circuit of claim 1, wherein the second switch assembly comprises: a transistor and a diode connected in parallel with the transistor;

wherein the diode is arranged in a tube form, and no current passes through the diode under the condition that the second switch assembly is opened and closed.

3. The power management circuit of claim 1, further comprising:

and the controller is respectively connected with the first switch assembly and the second switch assembly and is used for controlling the working states of the at least two first switch assemblies and the second switch assemblies.

4. The power management circuit of claim 3, wherein the at least two first switch assemblies comprise: a first transistor, a second transistor, a third transistor, and a fourth transistor;

the first transistor, the second transistor, the third transistor and the fourth transistor are all connected with the controller through control ends;

the first end of the first transistor is connected with the power input end, the second end of the first transistor is connected with the first end of the second transistor, and the second end of the second transistor is grounded;

the first end of the third transistor is connected with the first end of the fourth transistor, and the second end of the fourth transistor is used as a power supply output end;

the first end of the inductance circuit is respectively connected with the second end of the first transistor and the first end of the second transistor, and the second end of the inductance circuit is respectively connected with the second end of the third transistor and the first end of the fourth transistor.

5. The power management circuit of claim 4 wherein the controller controls the first transistor, the second switch assembly, and the fourth transistor to be on and the controller controls the second transistor and the third transistor to be off when the voltage at the power input is within an input operating range of a load to which the power output is connected;

when the voltage of the power input end is not in the input working range of the load connected with the power output end, the controller controls the fourth transistor to be conducted, the controller controls the third transistor and the second switch component to be disconnected, and the controller controls one of the first transistor and the second transistor to be conducted, and the other transistor to be turned off; or the controller controls the first transistor to be turned on, the controller controls the second transistor and the second switch component to be turned off, and the controller controls one of the third transistor and the fourth transistor to be turned on and the other to be turned off.

6. The power management circuit of claim 3, wherein the at least two first switch assemblies comprise: the first transistor and the second transistor are connected with the controller through control ends;

the first end of the first transistor is connected with the power input end, the second end of the first transistor is connected with the first end of the second transistor, and the second end of the second transistor is grounded;

the first end of the inductance circuit is respectively connected with the second end of the first transistor and the first end of the second transistor, and the second end of the inductance circuit is used as a power supply output end.

7. The power management circuit of claim 3, wherein the at least two first switch assemblies comprise: the first transistor and the second transistor are connected with the controller through control ends;

the first end of the inductance circuit is connected with the power input end, the second end of the inductance circuit is connected with the first end of the first transistor and the first end of the second transistor respectively, the second end of the first transistor is used as the power output end, and the second end of the second transistor is grounded.

8. The power management circuit according to claim 6 or 7, wherein the controller controls the first transistor and the second switching component to be turned on, and the controller controls the second transistor to be turned off, in a case where the voltage of the power input terminal is within an input operation range of a load to which the power output terminal is connected;

and when the voltage of the power input end is not in the input working range of the load connected with the power output end, the controller controls one of the first transistor and the second transistor to be turned on, the other transistor to be turned off, and the controller controls the second switch assembly to be turned off.

9. The power management circuit of claim 1, further comprising:

an input capacitance and an output capacitance;

the first end of the input capacitor is connected with the power input end, and the second end of the input capacitor is grounded; the first end of the output capacitor is connected with the power supply output end, and the second end of the output capacitor is grounded.

10. An electronic device comprising a power management circuit as claimed in any one of claims 1 to 9.

Images