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CN112885291A - Pixel circuit, driving method thereof and display panel - Google Patents

Pixel circuit, driving method thereof and display panel Download PDF

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Publication number
CN112885291A
CN112885291A CN202110057011.3A CN202110057011A CN112885291A CN 112885291 A CN112885291 A CN 112885291A CN 202110057011 A CN202110057011 A CN 202110057011A CN 112885291 A CN112885291 A CN 112885291A
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China
Prior art keywords
transistor
module
signal input
light
light emitting
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CN202110057011.3A
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Chinese (zh)
Inventor
刘权
陶子超
张金方
韩珍珍
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Hefei Visionox Technology Co Ltd
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Hefei Visionox Technology Co Ltd
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Priority to CN202110057011.3A priority Critical patent/CN112885291A/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

The invention provides a pixel circuit, a driving method thereof and a display panel, wherein the pixel circuit comprises: the device comprises a driving transistor, a storage module, a data writing module, a light emitting control module, a first reset module and a light emitting module; the first reset module is used for resetting the light-emitting module in an initialization stage and a data writing stage; the data writing module is used for writing data voltage into the grid electrode of the driving transistor in a data writing stage; the storage module is used for storing the grid voltage of the driving transistor; the driving transistor is used for outputting a driving current according to the data voltage; the light emitting control module is used for controlling the driving current to be output to the light emitting module in a light emitting stage; the light emitting module is used for emitting light according to the driving current. Embodiments of the present invention provide a pixel circuit, a driving method thereof, and a display panel, so as to avoid a light-emitting module from emitting light by mistake before a light-emitting stage on the basis of not additionally introducing a signal line.

Description

Pixel circuit, driving method thereof and display panel
Technical Field
The invention relates to the technical field of display, in particular to a pixel circuit, a driving method thereof and a display panel.
Background
In the display process of the display panel, data voltage is written into the grid electrode of the driving transistor in the pixel circuit, so that the driving transistor generates corresponding driving current to drive the light-emitting diode to emit light in the light-emitting stage.
However, the light emitting diode in the prior art has the problem of light emission error in the non-light emitting stage, which affects the display effect of the display panel.
Disclosure of Invention
Embodiments of the present invention provide a pixel circuit, a driving method thereof, and a display panel, so as to avoid a light-emitting module from emitting light by mistake before a light-emitting stage on the basis of not additionally introducing a signal line.
In a first aspect, the present invention provides a pixel circuit comprising: the device comprises a driving transistor, a storage module, a data writing module, a light emitting control module, a first reset module and a light emitting module;
the first reset module is used for resetting the light-emitting module in an initialization stage and a data writing stage;
the data writing module is used for writing data voltage into the grid electrode of the driving transistor in the data writing stage;
the storage module is used for storing the grid voltage of the driving transistor;
the driving transistor is used for outputting a driving current according to the data voltage;
the light-emitting control module is used for controlling the driving current to be output to the light-emitting module in a light-emitting stage;
the light emitting module is used for emitting light according to the driving current.
Optionally, the first reset module includes a first transistor and a second transistor;
a grid electrode of the first transistor is connected with a first scanning signal input end, a first pole of the first transistor and a first end of the light-emitting module are respectively connected with a first power signal input end, and a second pole of the first transistor is connected with a second end of the light-emitting module;
the grid electrode of the second transistor is connected with a second scanning signal input end, the first pole of the second transistor is connected with the first power supply signal input end, and the second pole of the second transistor is connected with the second end of the light-emitting module. An implementable manner of the first reset module is provided.
Optionally, the pixel circuit further includes a second reset module; the control end of the second reset module is connected with the third scanning signal input end, the first end of the second reset module is connected with the first power signal input end, the second end of the second reset module is connected with the second pole of the driving transistor, and the second reset module is used for resetting the second pole of the driving transistor in the reset stage. The light emitting module is prevented from emitting light before the light emitting stage.
Optionally, the second reset module includes a third transistor; a gate of the third transistor is connected to the third scan signal input terminal, a first pole of the third transistor is connected to the first power supply signal input terminal, and a second pole of the third transistor is connected to the second pole of the driving transistor. One possible implementation of the second reset module is provided.
Optionally, the pixel circuit further includes an initialization module, a control end of the initialization module is connected to the first scan signal input end, a first end of the initialization module is connected to the initialization voltage input end, and a second end of the initialization module is connected to the gate of the driving transistor. The initialization module of the present embodiment can initialize the gate of the driving transistor.
Optionally, the initialization module includes a fourth transistor;
a gate of the fourth transistor is connected to the first scan signal input terminal, a first pole of the fourth transistor is connected to the initialization voltage input terminal, and a second pole of the fourth transistor is connected to the gate of the driving transistor. One possible embodiment of an initialization module is provided.
Optionally, the pixel circuit further includes a fifth transistor, and the light emission control module includes a sixth transistor and a seventh transistor; the storage module comprises a storage capacitor, the data writing module comprises an eighth transistor, and the light emitting module comprises a light emitting device;
a gate of the fifth transistor is connected to the second scan signal input terminal, a first pole of the fifth transistor is connected to the second pole of the driving transistor, and a second pole of the fifth transistor is connected to the gate of the driving transistor;
a grid electrode of the sixth transistor is connected with the light-emitting control signal input end, a first pole of the sixth transistor is connected with the second power supply signal input end, and a second pole of the sixth transistor is connected with the first pole of the driving transistor;
a gate of the seventh transistor is connected to the light emission control signal input terminal, a first electrode of the seventh transistor is connected to the second electrode of the driving transistor, and a second electrode of the seventh transistor is connected to an anode of the light emitting device;
a gate of the eighth transistor is connected to a gate of the fifth transistor, a first electrode of the eighth transistor is connected to a data voltage input terminal, and a second electrode of the eighth transistor is connected to a first electrode of the driving transistor;
and the cathode of the light-emitting device is connected with the first power signal input end. Embodiments of a plurality of transistors included in the pixel circuit are provided.
In a second aspect, an embodiment of the present invention provides a driving method for a pixel circuit, for driving the pixel circuit according to the embodiment of the present invention, where the method includes:
in an initialization stage, the first reset module resets the light emitting module;
in a data writing phase, the first reset module resets the light emitting module, the data writing module writes data voltage into the grid electrode of the driving transistor, and the storage module stores the grid electrode voltage of the driving transistor;
in a light emitting stage, the driving transistor outputs a driving current according to the data voltage, and the light emitting control module controls the driving current to be output to the light emitting module; the light emitting module is used for emitting light according to the driving current.
Optionally, the pixel circuit includes a second reset module, a control end of the second reset module is connected to a third scan signal input end, a first end of the second reset module is connected to a first power signal input end, and a second end of the second reset module is connected to the second pole of the driving transistor;
the driving method of the pixel circuit further includes, after the data writing phase:
in a reset phase, the second reset module resets the second pole of the driving transistor.
In a third aspect, an embodiment of the present invention further provides a display panel, where the display panel includes the pixel circuit provided in the embodiment of the present invention.
The pixel circuit provided by the embodiment of the invention comprises the first reset module, and the light-emitting module is reset by the first reset module in the initialization stage and the data writing stage, so that the electric potentials of the first end and the second end of the light-emitting module are equal, the light-emitting module can not emit light before the light-emitting stage, a reset signal line does not need to be additionally arranged, the complexity of arranging the signal line in the display panel is avoided, and the resolution ratio of the display panel is favorably improved.
Drawings
Fig. 1 is a schematic structural diagram of a pixel circuit provided in the prior art;
fig. 2 is a schematic structural diagram of another pixel circuit provided in the prior art;
fig. 3 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 8 is a driving timing diagram of a pixel circuit according to an embodiment of the invention;
fig. 9 is a flowchart illustrating a driving method of a pixel circuit according to an embodiment of the invention;
fig. 10 is a schematic structural diagram of a display panel according to an embodiment of the present invention.
Detailed Description
The embodiments of the present invention will be described in further detail with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of and not restrictive on the broad invention. It should be further noted that, for convenience of description, only some structures, not all structures, relating to the embodiments of the present invention are shown in the drawings.
The inventor finds that the pixel circuit in the prior art has the problem of false light emission in the non-light-emitting stage through long-term research, and specifically the following steps are included: fig. 1 is a schematic structural diagram of a pixel circuit provided in the prior art, where a first double-gate transistor M1 and a second transistor M2 in fig. 1 are P-type transistors, and referring to fig. 1, in an initialization stage, when a first scan signal input by a first scan signal input terminal Sa1 is at a low level, the first double-gate transistor M1 and the second transistor M2 are turned on, and an initialization voltage input by an initialization voltage input terminal Vref1 resets a gate of a driving transistor DTFT1 and an anode of a light emitting device, for example, the initialization voltage may be-3V, so as to avoid that a gate potential of the driving transistor DTFT1 is too low, which results in that a time required in a data writing stage is too long. As described in the background art, when the driving transistor DTFT1 is affected by temperature and the characteristics of the driving transistor DTFT1 drift (for example, in the case where the temperature is relatively low, the characteristics of the driving transistor DTFT1 drift from the saturation region to the linear region), it is necessary to restore the characteristics of the driving transistor DTFT1 to the saturation region, and it is necessary to lower the first power supply signal input from the first power supply signal input terminal VSS1, illustratively, from-3V to-6V, and during the initialization phase, the anode potential of the light emitting device is-3V, the cathode of the light emitting device is-6V, the anode-cathode difference of the light emitting device is 3V, and the light emitting device has false light emission during the initialization phase.
In view of the above problems, a person skilled in the art separately inputs a reference voltage to the anode of the light emitting device, and fig. 2 is a schematic structural diagram of another pixel circuit provided by the prior art, and referring to fig. 2, a first pole of the first double-gate transistor M1 is connected to the first initialization voltage input terminal Vref2, and a first pole of the second transistor M2 is connected to the second initialization voltage input terminal Vref3, that is, the first double-gate transistor M1 and the second transistor M2 are connected to different initialization voltage input terminals, at this time, the first initialization voltage input terminal Vref2 may be set to provide the first initialization voltage to reset the gate of the driving transistor DTFT2, for example, the first initialization voltage may be-3V, so as to avoid that the gate potential of the driving transistor DTFT1 is too low, which results in too long time required in the data writing phase. While the second initialization voltage input terminal Vref3 provides a second initialization voltage to reset the anode of the light emitting device. The second initialization voltage can be adaptively adjusted according to the change of the first power supply signal, and the error light emission of the light emitting device caused by too large potential difference between the anode and the cathode of the light emitting device is avoided on the basis of resetting the anode of the light emitting device. However, this method requires two reference voltage signal lines for outputting different reference voltage signals, which results in excessive signal lines in the display panel and affects the resolution of the display panel.
For the above reasons, an embodiment of the present invention provides a pixel circuit, and fig. 3 is a schematic structural diagram of the pixel circuit provided in the embodiment of the present invention, and referring to fig. 3, the pixel circuit includes: a driving transistor DTFT, a memory module 110, a data writing module 120, a light emitting control module 130, a first reset module 140, and a light emitting module 150; the first reset module 140 is used for resetting the light emitting module 150 in an initialization phase and a data writing phase; the data writing module 120 is configured to write a data voltage to the gate of the driving transistor DTFT in a data writing phase; the storage module 110 is used for storing the gate voltage of the driving transistor DTFT; the driving transistor DTFT is used to output a driving current according to the data voltage; the light emitting control module 130 is configured to control the driving current to be output to the light emitting module 150 in a light emitting phase; the light emitting module 150 is configured to emit light according to the driving current.
In particular, fig. 3 exemplarily shows a pixel circuit, which may further include a compensation module 180. A gate of the driving transistor DTFT is connected to the first end of the storage module 110 and the first end of the compensation module 180, a first pole of the driving transistor DTFT is connected to the first end of the light-emitting control module 130 and the first end of the data writing module 120, and a second pole of the driving transistor DTFT is connected to the second end of the light-emitting control module 130 and the second end of the compensation module 180. The control end of the light emitting control module 130 is connected to the light emitting control signal input end EM, the third end of the light emitting control module 130 is connected to the second end of the light emitting module 150, and the fourth end of the light emitting control module 130 is connected to the second power signal input end VDD. The control terminal of the data writing module 120 and the third terminal of the compensation module 180 are connected to the second scan signal input terminal S2, and the second terminal of the data writing module 120 is connected to the data voltage input terminal Vdata. A first end of the light emitting module 150 is connected to the first power signal input terminal VSS and a first end of the first reset module 140, respectively. The second terminal of the first reset module 140 is connected to the second terminal of the light emitting module 150, the third terminal of the first reset module 140 is connected to the first scan signal input terminal S1, and the fourth terminal of the first reset module 140 is connected to the second scan signal input terminal S2.
In the initialization stage, the first end and the second end of the first reset module 140 are conducted by the first scan signal input terminal S1, the first power signal input by the first power signal input terminal VSS passes through the first reset module 140 to the second end of the light emitting module 150, because the first end of the light emitting module 150 is connected to the first power signal input terminal VSS, the potentials of the first end and the second end of the light emitting module 150 are equal, and because there is no potential difference between the first end and the second end of the light emitting module 150, the light emitting module 150 does not emit light, thereby preventing the light emitting module 150 from emitting light by mistake in the initialization stage.
In the data writing phase, the first end and the second end of the data writing module 120 are turned on by the second scan signal input from the second scan signal input end S2, and the data voltage signal input from the data voltage input end Vdata is written into the gate of the driving transistor DTFT through the data writing module 120, the driving transistor DTFT and the compensation module 180, so as to implement the writing of the data voltage signal and the threshold compensation of the driving transistor DTFT. Meanwhile, the second scan signal input at the fourth terminal of the first reset module 140 makes the first terminal and the second terminal of the first reset module 140 conducted, the first power signal input at the first power signal input terminal VSS passes through the first reset module 140 to the second terminal of the light emitting module 150, because the first terminal of the light emitting module 150 is connected to the first power signal input terminal VSS, the potentials of the first terminal and the second terminal of the light emitting module 150 are equal, because there is no potential difference between the first terminal and the second terminal of the light emitting module 150, the light emitting module 150 does not emit light, and the light emitting module 150 is prevented from emitting light by mistake at the data writing stage.
In addition, the first end of the first reset module 140 is connected to the first power signal input terminal VSS, and in the initialization stage and the data writing stage, the first power signal provided by the first power signal input terminal VSS provides the reset signal for the first reset module 140, so that it is not necessary to additionally provide a reset signal line for providing the reset signal for the first reset module 140, thereby avoiding increasing the complexity of signal line arrangement in the display panel, and facilitating to improve the resolution of the display panel.
In the light emitting phase, the light emitting control signal input by the light emitting control signal input terminal EM makes the fourth terminal and the first terminal of the light emitting control module 130 conductive, the second terminal and the third terminal conductive, and then the driving transistor DTFT drives the light emitting module 150 to emit light, while the first reset module 140 is not conductive.
In summary, in the non-light emitting period, the third input terminal and the fourth input terminal of the first reset module 140 respectively control the first power signal to pass through the first reset module 140 to the second terminal of the light emitting module 150 in the initialization period and the data writing period, so that the potentials of the first terminal and the second terminal of the light emitting module 150 are equal, thereby ensuring that the light emitting module 150 does not emit light in the non-light emitting period. Meanwhile, an additional reset signal line is not needed, the complexity of signal line arrangement in the display panel is avoided, and the improvement of the resolution of the display panel is facilitated.
Alternatively, fig. 4 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 4, the first reset module 140 includes a first transistor T1 and a second transistor T2; a gate of the first transistor T1 is connected to the first scan signal input terminal S1, a first pole of the first transistor T1 and a first terminal of the light emitting module 150 are respectively connected to the first power signal input terminal VSS, and a second pole of the first transistor T1 is connected to a second terminal of the light emitting module 150; a gate of the second transistor T2 is connected to the second scan signal input terminal S2, a first pole of the second transistor T2 is connected to the first power signal input terminal VSS, and a second pole of the second transistor T2 is connected to the second terminal of the light emitting module 150.
Specifically, the first transistor T1 and the second transistor T2 are P-type transistors for example. In the initialization stage, the first scan signal input from the first scan signal input terminal S1 is at a low level, the second scan signal input from the second scan signal input terminal S2 is at a high level, the first transistor T1 is turned on, the second transistor T2 is turned off, the first power signal input from the first power signal input terminal VSS is input to the second terminal of the light emitting module 150 through the first transistor T1, since the first terminal of the light emitting module 150 is also connected to the first power signal input terminal VSS, the potentials of the first terminal and the second terminal of the light emitting module 150 are the same, and the light emitting module 150 does not emit light, thereby preventing the light emitting module 150 from emitting light by mistake in the initialization stage. In the data writing stage, the first scan signal input from the first scan signal input terminal S1 is at a high level, the second scan signal input from the second scan signal input terminal S2 is at a low level, the first transistor T1 is turned off, the second transistor T2 is turned on, the first power signal input from the first power signal input terminal VSS is input to the second terminal of the light emitting module 150 through the second transistor T2, since the first terminal of the light emitting module 150 is also connected to the first power signal input terminal VSS, the potentials of the first terminal and the second terminal of the light emitting module 150 are the same, and the light emitting module 150 does not emit light, thereby preventing the light emitting module 150 from emitting light by mistake in the data writing stage. Meanwhile, the second scan signal controls the data writing module 120 to write the data voltage signal inputted from the data voltage input terminal Vdata into the gate of the driving transistor DTFT through the driving transistor DTFT and the compensation module 180, so as to implement writing of the data voltage signal and threshold compensation of the driving transistor DTFT.
The pixel circuit provided by the embodiment of the invention ensures that the potentials of the first end and the second end of the light-emitting module 150 are the same in the initialization stage and the data writing stage, so that the light-emitting module 150 is prevented from emitting light by mistake in the initialization stage and the data writing stage.
Optionally, fig. 5 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 5, the pixel circuit further includes a second reset module 160; the control terminal of the second reset module 160 is connected to the third scan signal input terminal S3, the first terminal of the second reset module 160 is connected to the first power signal input terminal VSS, the second terminal of the second reset module 160 is connected to the second pole of the driving transistor DTFT, and the second reset module 160 is configured to reset the second pole of the driving transistor DTFT in the reset phase.
Specifically, after the data writing phase, the potential of the second pole of the driving transistor DTFT is the data voltage. For example, the data voltage is generally a positive voltage, for example, 0.5 to 6V, which is easy to form a leakage current in the light emitting control module 130, so that the light emitting module 150 emits light after the data writing phase and before the light emitting phase.
In the pixel circuit provided in the embodiment of the invention, in the reset phase (before the light-emitting phase after the data writing phase), the third scan signal input by the third scan signal input terminal S3 can control the first terminal and the second terminal of the second reset module 160 to be conducted, the first power signal input by the first power signal input terminal VSS is input to the second terminal of the driving transistor DTFT through the second reset module 160, the potential of the second terminal of the driving transistor DTFT is equal to the potential of the second terminal of the light-emitting module 150, and the first terminal of the light-emitting module 150 is also connected to the first power signal input terminal VSS, so the potentials of the first terminal and the second terminal of the light-emitting module 150 are the same, thereby preventing the light-emitting control module 130 from emitting light by a leakage current through the light-emitting module 150.
Optionally, with continued reference to fig. 5, the second reset module 160 includes a third transistor T3; a gate electrode of the third transistor T3 is connected to the third scan signal input terminal S3, a first pole of the third transistor T3 is connected to the first power signal input terminal VSS, and a second pole of the third transistor T3 is connected to the second pole of the driving transistor DTFT.
Specifically, taking the third transistor as a P-type transistor as an example, in the reset phase, the third scan signal input from the third scan signal input terminal S3 is at a low level, the third transistor T3 is turned on, the first power signal input from the first power signal input terminal VSS is input to the second electrode of the driving transistor DTFT through the third transistor T3, the potential of the second electrode of the driving transistor DTFT is equal to the potential of the second terminal of the light emitting module 150, and the first terminal of the light emitting module 150 is also connected to the first power signal input terminal VSS, so that the potentials of the first terminal and the second terminal of the light emitting module 150 are the same, thereby preventing the light emitting module 150 from emitting light due to leakage current in the light emitting control module 130.
Optionally, fig. 6 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, referring to fig. 6, the pixel circuit further includes an initialization module 170, a control terminal of the initialization module 170 is connected to the first scan signal input terminal S1, a first terminal of the initialization module 170 is connected to the initialization voltage input terminal Vref, and a second terminal of the initialization module 170 is connected to the gate of the driving transistor DTFT.
Specifically, in the initialization stage, the first scan signal may control the first end and the second end of the initialization module 170 to be connected, and the initialization voltage input by the initialization voltage input terminal Vref is input to the gate of the driving transistor DTFT through the initialization module 170 to reset the gate of the driving transistor DTFT, so that the data voltage of the previous frame is prevented from affecting the data voltage writing of the current frame, and the ghost phenomenon is reduced.
Optionally, with continued reference to fig. 6, the initialization module 170 includes a fourth transistor T4; a gate of the fourth transistor T4 is connected to the first scan signal input terminal S1, a first pole of the fourth transistor T4 is connected to the initialization voltage input terminal Vref, and a second pole of the fourth transistor T4 is connected to the gate of the driving transistor DTFT.
Specifically, the fourth transistor T4 may be a P-type transistor, for example. In the initialization stage, the first scan signal input from the first scan signal input terminal S1 is at a low level, the fourth transistor T4 is turned on, and the initialization voltage is input to the gate of the driving transistor DTFT through the fourth transistor T4, so that the gate voltage of the driving transistor DTFT is the initialization voltage, and the gate reset of the driving transistor DTFT is implemented. The first end of the light emitting module 150 is connected to the first power signal input terminal VSS, and the second end of the light emitting module 150 can be reset by the first power signal input terminal VSS without adding a new initialization signal line, so that resetting the gate of the driving transistor DTFT and the second end of the light emitting module 150 can provide an initialization voltage for the initialization voltage input terminal Vref only through one initialization signal line, and meanwhile, the phenomenon that the light emitting module 150 emits light by mistake due to an excessively large potential difference between the first end and the second end of the light emitting module 150 can be avoided.
Optionally, fig. 7 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 7, the pixel circuit further includes a fifth transistor T5, and the light-emitting control module 130 includes a sixth transistor T6 and a seventh transistor T7; the storage module 110 includes a storage capacitor C, the data writing module 120 includes an eighth transistor T8, and the light emitting module 150 includes a light emitting device OLED; a gate electrode of the fifth transistor T5 is connected to the second scan signal input terminal S2, a first electrode of the fifth transistor T5 is connected to the second electrode of the driving transistor DTFT, and a second electrode of the fifth transistor T5 is connected to the gate electrode of the driving transistor DTFT; a gate of the sixth transistor T6 is connected to the emission control signal input terminal EM, a first pole of the sixth transistor T6 is connected to the second power signal input terminal VDD, and a second pole of the sixth transistor T6 is connected to the first pole of the driving transistor DTFT; a gate electrode of the seventh transistor T7 is connected to the emission control signal input terminal EM, a first electrode of the seventh transistor T7 is connected to the second electrode of the driving transistor DTFT, and a second electrode of the seventh transistor T7 is connected to the anode of the light emitting device OLED; a gate of the eighth transistor T8 is connected to the gate of the fifth transistor T5, a first pole of the eighth transistor T8 is connected to the data voltage input terminal, and a second pole of the eighth transistor T8 is connected to the first pole of the driving transistor DTFT; the cathode of the light emitting device OLED is connected to the first power signal input terminal VSS.
Specifically, the compensation module 180 includes a fifth transistor T5, gates of the first transistor T1 and the fourth transistor T4 share the first scan signal input terminal S1, and gates of the second transistor T2, the fifth transistor T5 and the eighth transistor T8 share the second scan signal input terminal S2, so that the number of ports of the pixel circuit is reduced, which is beneficial to improving the pixel density.
Fig. 8 is a driving timing diagram of a pixel circuit according to an embodiment of the present invention, where the driving timing may be used to drive the pixel circuit shown in fig. 7, where each transistor included in the pixel circuit may be a P-type transistor or an N-type transistor, and each transistor is a P-type transistor, where S1 represents a timing of a first scan signal input by the first scan signal input terminal S1, S2 represents a timing of a second scan signal input by the second scan signal input terminal S2, S3 represents a timing of a third scan signal input by the third scan signal input terminal S3, and EM represents a timing of a light emission control signal input by the light emission control signal input terminal EM. With reference to fig. 7 and 8, the working process of the pixel circuit includes an initialization phase t0, a data writing phase t1, a reset phase t2 and a light emitting phase t3, and the specific working process is as follows:
in the initialization stage T0, a low level signal is input from the first scan signal input terminal S1, the first transistor T1 and the fourth transistor T4 are turned on, and the initialization voltage input from the initialization voltage input terminal Vref is written to the gate of the driving transistor DTFT through the fourth transistor T4, thereby resetting the gate of the driving transistor DTFT. Meanwhile, a first power signal input by the first power signal input terminal VSS is input to the anode of the light emitting device OLED through the first transistor T1, and the potentials of the anode and the cathode of the light emitting device OLED are equal, so that even if the magnitude of the first power signal is changed, the potentials of the cathode and the anode of the light emitting device OLED are always equal, thereby ensuring that the light emitting device OLED does not emit light in the initialization stage. The second scan signal input terminal S2 inputs a high level signal, and the second transistor T2, the fifth transistor T5, and the eighth transistor T8 are turned off. The third scan signal input terminal S3 inputs a high level signal, and the third transistor T3 is turned off. The emission control signal input terminal EM inputs a high level signal, and the sixth transistor T6 and the seventh transistor T7 are turned off. After the initialization period t0, the gate of the driving transistor DTFT is at a low level, and the driving transistor DTFT is turned on.
In the data writing period T1, the first scan signal input terminal S1 inputs a high level signal, and the first transistor T1 and the fourth transistor T4 are turned off. A low level signal is input to the second scan signal input terminal S2, the second transistor T2, the fifth transistor T5, and the eighth transistor T8 are turned on, and a data voltage signal input from the data voltage input terminal Vdata is written to the gate of the driving transistor DTFT through the eighth transistor T8, the driving transistor DTFT, and the fifth transistor T5, so that writing of the data voltage signal and threshold compensation of the driving transistor DTFT are realized. Meanwhile, a first power signal input by the first power signal input terminal VSS is input to the anode of the light emitting device OLED through the second transistor T2, and the potentials of the anode and the cathode of the light emitting device OLED are equal, so that even if the magnitude of the first power signal is changed, the potentials of the cathode and the anode of the light emitting device OLED are always equal, thereby ensuring that the light emitting device OLED does not emit light in the data writing stage. The third scan signal input terminal S3 inputs a high level signal, and the third transistor T3 is turned off. The emission control signal input terminal EM inputs a high level signal, and the sixth transistor T6 and the seventh transistor T7 are turned off. Therefore, the phenomenon that the OLED emits light by mistake in the initialization stage and the data writing stage is avoided, the reset signal line does not need to be additionally arranged, the complexity of signal line arrangement in the display panel is avoided, and the improvement of the resolution of the display panel is facilitated.
In the reset period T2, the first scan signal input terminal S1 inputs a high level signal, and the first transistor T1 and the fourth transistor T4 are turned off. The second scan signal input terminal S2 inputs a high level signal, and the second transistor T2, the fifth transistor T5, and the eighth transistor T8 are turned off. A low level signal is input from the third scan signal input terminal S3, the third transistor T3 is turned on, the first power signal input from the first power signal input terminal VSS is input to the second electrode of the driving transistor DTFT through the third transistor T3, and the voltage of the second electrode of the driving transistor DTFT is equal to the cathode potential of the light emitting device OLED, so that no leakage current passes through the seventh transistor T7 even if the magnitude of the first power signal is changed, thereby ensuring that the light emitting device OLED does not emit light during the reset phase. The emission control signal input terminal EM inputs a high level signal, and the sixth transistor T6 and the seventh transistor T7 are turned off.
In the light emitting period T3, the first scan signal input terminal S1 inputs a high level signal, and the first transistor T1 and the fourth transistor T4 are turned off. The second scan signal input terminal S2 inputs a high level signal, and the second transistor T2, the fifth transistor T5, and the eighth transistor T8 are turned off. The third scan signal input terminal S3 inputs a high level signal, and the third transistor T3 is turned off. The light emitting control signal input terminal EM inputs a low level signal, the sixth transistor T6 and the seventh transistor T7 are turned on, and the driving transistor DTFT drives the light emitting device OLED to emit light.
In the pixel circuit provided in the embodiment of the present invention, the first pole of the first transistor T1 and the cathode of the light emitting device OLED are respectively connected to the first power signal input terminal VSS, the second pole of the first transistor T1 is connected to the anode of the light emitting device OLED, the first pole of the second transistor T2 is connected to the cathode of the light emitting device OLED, the second pole of the second transistor T2 is connected to the anode of the light emitting device OLED, and the first transistor T1 and the second transistor T2 are respectively turned on in the initialization stage and the data writing stage, so that potentials of the cathode and the anode of the light emitting device OLED are always equal in the initialization stage and the data writing stage, and the light emitting device OLED is prevented from emitting light by mistake in the initialization stage and the data writing stage, and meanwhile, a reset signal line does not need to be additionally provided, thereby avoiding increasing complexity of signal line setting in the display panel, and facilitating improvement of resolution of the display panel. In addition, the first transistor T1 and the fourth transistor T4 share the first scan signal input terminal S1, and the second transistor T2, the fifth transistor T5 and the eighth transistor T8 share the second scan signal input terminal S2, so that the number of ports of the pixel circuit is reduced, which is advantageous to increase the pixel density.
The embodiment of the invention also provides a driving method of the pixel circuit, which is used for driving the pixel circuit of the embodiment of the invention. Fig. 9 is a flowchart illustrating a driving method of a pixel circuit according to an embodiment of the present invention, and referring to fig. 9, the method includes:
310. in an initialization stage, the first reset module resets the light emitting module;
320. in a data writing stage, the first reset module resets the light emitting module, the data writing module writes data voltage into the grid electrode of the driving transistor, and the storage module stores the grid electrode voltage of the driving transistor;
330. in the light-emitting stage, the driving transistor outputs driving current according to the data voltage, and the light-emitting control module controls the driving current to be output to the light-emitting module; the light emitting module is used for emitting light according to the driving current.
According to the technical scheme of the embodiment of the invention, the first reset module resets the light-emitting module in the initialization stage and the data writing stage, so that the potentials of the first end and the second end of the light-emitting module are equal, the light-emitting module can not emit light before the light-emitting stage, a reset signal line does not need to be additionally arranged, the complexity of signal line arrangement in the display panel is avoided being increased, and the resolution of the display panel is favorably improved.
Optionally, the pixel circuit comprises a second reset module,
the control end of the second reset module is connected to the third scan signal input end, the first end of the second reset module is connected to the first power signal input end, the second end of the second reset module is connected to the second pole of the driving transistor, and the driving method of the pixel circuit further includes, after the data writing stage:
in a reset phase, the second reset module resets the second pole of the driving transistor.
In the pixel circuit provided in the embodiment of the present invention, in the reset phase (before the light-emitting phase after the data writing phase), the third scan signal input by the third scan signal input end may control the first end and the second end of the second reset module to be conducted, the first power signal input by the first power signal input end is input to the second electrode of the driving transistor through the second reset module, the potential of the second electrode of the driving transistor is equal to the potential of the second end of the light-emitting module, and the first end of the light-emitting module is also connected to the first power signal input end, so that the potentials of the first end and the second end of the light-emitting module are the same, thereby preventing the light-emitting control module from emitting light by mistake due to leakage current.
Fig. 10 is a schematic structural diagram of a display panel according to an embodiment of the present invention, and referring to fig. 10, a display panel 200 according to an embodiment of the present invention includes a pixel circuit according to any embodiment of the present invention. The display panel 200 further includes a scan driving circuit 210, a data driving circuit 220, and a driving chip 230, the data driving circuit 220 being integrated in the driving chip 230, and a plurality of data lines (D1, D2, D3 … …), a plurality of scan lines (S1, S2, S3 … …); the port of the scan driving circuit 210 is electrically connected to the scan line, and the port of the data driving circuit 220 is electrically connected to the data line. The display panel provided by the embodiment of the invention includes the pixel circuit provided by any embodiment of the invention, so that the display panel has the beneficial effects, and details are not repeated here.
It should be noted that the foregoing is only a preferred embodiment of the present invention and the technical principles applied. Those skilled in the art will appreciate that the embodiments of the present invention are not limited to the specific embodiments described herein, and that various obvious changes, adaptations, and substitutions are possible, without departing from the scope of the embodiments of the present invention. Therefore, although the embodiments of the present invention have been described in more detail through the above embodiments, the embodiments of the present invention are not limited to the above embodiments, and many other equivalent embodiments may be included without departing from the concept of the embodiments of the present invention, and the scope of the embodiments of the present invention is determined by the scope of the appended claims.

Claims (10)

1. A pixel circuit, comprising: the device comprises a driving transistor, a storage module, a data writing module, a light emitting control module, a first reset module and a light emitting module;
the first reset module is used for resetting the light-emitting module in an initialization stage and a data writing stage;
the data writing module is used for writing data voltage into the grid electrode of the driving transistor in the data writing stage;
the storage module is used for storing the grid voltage of the driving transistor;
the driving transistor is used for outputting a driving current according to the data voltage;
the light-emitting control module is used for controlling the driving current to be output to the light-emitting module in a light-emitting stage;
the light emitting module is used for emitting light according to the driving current.
2. The pixel circuit according to claim 1, wherein the first reset module comprises a first transistor and a second transistor;
a grid electrode of the first transistor is connected with a first scanning signal input end, a first pole of the first transistor and a first end of the light-emitting module are respectively connected with a first power signal input end, and a second pole of the first transistor is connected with a second end of the light-emitting module;
the grid electrode of the second transistor is connected with a second scanning signal input end, the first pole of the second transistor is connected with the first power supply signal input end, and the second pole of the second transistor is connected with the second end of the light-emitting module.
3. The pixel circuit according to claim 1 or 2, further comprising a second reset module;
the control end of the second reset module is connected with the third scanning signal input end, the first end of the second reset module is connected with the first power signal input end, the second end of the second reset module is connected with the second pole of the driving transistor, and the second reset module is used for resetting the second pole of the driving transistor in the reset stage.
4. The pixel circuit of claim 3, wherein the second reset module comprises a third transistor;
a gate of the third transistor is connected to the third scan signal input terminal, a first pole of the third transistor is connected to the first power supply signal input terminal, and a second pole of the third transistor is connected to the second pole of the driving transistor.
5. The pixel circuit according to any of claims 1-4, further comprising an initialization module, wherein a control terminal of the initialization module is connected to the first scan signal input terminal, a first terminal of the initialization module is connected to the initialization voltage input terminal, and a second terminal of the initialization module is connected to the gate of the driving transistor.
6. The pixel circuit according to claim 5, wherein the initialization module comprises a fourth transistor;
a gate of the fourth transistor is connected to the first scan signal input terminal, a first pole of the fourth transistor is connected to the initialization voltage input terminal, and a second pole of the fourth transistor is connected to the gate of the driving transistor.
7. The pixel circuit according to claim 6, further comprising a fifth transistor, wherein the light emission control module comprises a sixth transistor and a seventh transistor; the storage module comprises a storage capacitor, the data writing module comprises an eighth transistor, and the light emitting module comprises a light emitting device;
a gate of the fifth transistor is connected to the second scan signal input terminal, a first pole of the fifth transistor is connected to the second pole of the driving transistor, and a second pole of the fifth transistor is connected to the gate of the driving transistor;
a grid electrode of the sixth transistor is connected with the light-emitting control signal input end, a first pole of the sixth transistor is connected with the second power supply signal input end, and a second pole of the sixth transistor is connected with the first pole of the driving transistor;
a gate of the seventh transistor is connected to the light emission control signal input terminal, a first electrode of the seventh transistor is connected to the second electrode of the driving transistor, and a second electrode of the seventh transistor is connected to an anode of the light emitting device;
a gate of the eighth transistor is connected to a gate of the fifth transistor, a first electrode of the eighth transistor is connected to a data voltage input terminal, and a second electrode of the eighth transistor is connected to a first electrode of the driving transistor;
and the cathode of the light-emitting device is connected with the first power signal input end.
8. A method of driving a pixel circuit, for driving the pixel circuit of any one of claims 1-7, the method comprising:
in an initialization stage, the first reset module resets the light emitting module;
in a data writing phase, the first reset module resets the light emitting module, the data writing module writes data voltage into the grid electrode of the driving transistor, and the storage module stores the grid electrode voltage of the driving transistor;
in a light emitting stage, the driving transistor outputs a driving current according to the data voltage, and the light emitting control module controls the driving current to be output to the light emitting module; the light emitting module is used for emitting light according to the driving current.
9. The method according to claim 8, wherein the pixel circuit comprises a second reset block, a control terminal of the second reset block is connected to a third scan signal input terminal, a first terminal of the second reset block is connected to a first power signal input terminal, and a second terminal of the second reset block is connected to the second pole of the driving transistor;
the driving method of the pixel circuit further includes, after the data writing phase:
in a reset phase, the second reset module resets the second pole of the driving transistor.
10. A display panel comprising the pixel circuit according to any one of claims 1 to 7.
CN202110057011.3A 2021-01-15 2021-01-15 Pixel circuit, driving method thereof and display panel Pending CN112885291A (en)

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Application publication date: 20210601