CN112953219A - Boost control circuit - Google Patents

Abstract

The invention discloses a boosting control circuit. The boost control circuit includes an inductor, a first switch connected in series with the inductor between the input terminal and the output terminal of the boost control circuit, and a second switch connected in series with the inductor between the input terminal and the ground, characterized in that , further comprising: a switch controller configured to generate a voltage feedback signal representing the output voltage of the boost control circuit and a current sampling signal representing the current flowing through the second switch, respectively for controlling the first switch and the second switch The turn-on and turn-off of the first control signal and the second control signal. According to the boost control circuit provided by the embodiments of the present invention, a switch control signal is generated by a switch controller to control the on and off of corresponding switches of the boost control circuit based on the switch control signal, thereby modulating the output voltage control.

Description

boost control circuit

technical field

The invention belongs to the field of integrated circuits, and in particular relates to a boosting control circuit.

Background technique

Generally, conventional voltage regulation systems are voltage regulation control systems with current feedback. The biggest feature of this traditional system is that it needs to sample the inductor current to generate current feedback and participate in the voltage and current loop control of the voltage regulation system.

However, in order to perform current sampling, it is often necessary to introduce a complex circuit structure for current sampling, which greatly increases the circuit area and increases the complexity of circuit design.

SUMMARY OF THE INVENTION

Embodiments of the present invention provide a boost control circuit, which no longer uses the traditional method of detecting and sampling inductor current, but generates a switch control signal through a switch controller, so as to control the boost control circuit based on the switch control signal. The corresponding switches are turned on and off, and then the output voltage is modulated and controlled.

An embodiment of the present invention provides a boost control circuit, including an inductor, a first switch connected in series with the inductor between an input end and an output end of the boost control circuit, and a first switch connected in series with the inductor between the input end and ground The second switch is characterized in that, further comprising: a switch controller configured to generate a control circuit based on the voltage feedback signal representing the output voltage of the boost control circuit and the current sampling signal representing the current flowing through the second switch, respectively. A first control signal and a second control signal for turning on and off the first switch and the second switch.

According to the boost control circuit provided by the embodiment of the present invention, the switch controller includes a third switch, a fourth switch, and a capacitor, and the switch controller is further configured to: based on the voltage feedback signal and the current sampling signal, generate a signal for controlling the second a second control signal for turning on and off the switch and the third switch; based on the second control signal and the voltage on the capacitor, generating a first control signal for controlling the turning on and off of the first switch and the fourth switch ; wherein, the charging and discharging of the capacitor is related to the turn-on and turn-off of the third switch and the fourth switch.

According to the boost control circuit provided by the embodiment of the present invention, the switch controller is further configured to: generate the second control signal based on the first comparison result between the voltage feedback signal and the first reference signal and the current sampling signal.

According to the boost control circuit provided by the embodiment of the present invention, the switch controller is further configured to: generate the second control signal based on the first comparison result and the second comparison result between the current sampling signal and the second reference signal.

According to the boost control circuit provided by the embodiment of the present invention, the third switch and the fourth switch are connected in series between the current source and the ground, the capacitor is connected in parallel between the two ends of the fourth switch, and the switch controller further includes: a first comparison a trigger configured to generate a second comparison result based on the current sampling signal and the second reference signal; a flip-flop configured to generate a second control signal based on the first comparison result and the second comparison result; and a generator configured to To generate the first control signal based on the second control signal and a voltage across the capacitor, wherein the voltage across the capacitor is the voltage across the capacitor in a discharged state.

According to the boost control circuit provided by the embodiment of the present invention, the conduction time of the second switch and the third switch is determined by the following formula:

Among them, T _on is the turn-on time of the second switch and the third switch, Vref2 is the second reference signal, Rsns is the resistance value of the resistor used to generate the current sampling signal, and I0 is the turn-on time of the second switch. The corresponding inductor current, L is the inductance value of the inductor, and Vin is the input voltage of the boost control circuit.

According to the boost control circuit provided by the embodiment of the present invention, the conduction time of the first switch and the fourth switch is determined by the following formula:

Wherein, Toff is the turn-on time of the first switch and the fourth switch, and Vout is the output voltage.

According to the boost control circuit provided by the embodiment of the present invention, the first switch, the second switch, the third switch, and the fourth switch are all metal oxide semiconductor field effect transistors, and the trigger is an RS trigger.

The boost control circuit provided according to the embodiment of the present invention further includes: a second comparator configured to generate a first comparison signal based on the voltage feedback signal and the first reference signal; a voltage divider circuit configured to compare the output voltage by performing voltage division to generate a voltage feedback signal; a first diode, two poles of the first diode are respectively connected to the source and drain of the first switch, and the gate of the first switch receives the first control signal; and a second a diode, two poles of the second diode are respectively connected to the source and drain of the second switch, and the gate of the second switch receives the second control signal.

According to the boost control circuit provided by the embodiment of the present invention, the boost control circuit operates in a continuous conduction mode or a discontinuous conduction mode.

The boost control circuit of the embodiment of the present invention no longer uses the traditional method of detecting and sampling the inductor current, but generates a switch control signal through a switch controller, so as to control the corresponding switch of the boost control circuit based on the switch control signal The turn-on and turn-off of , and then modulate and control the output voltage.

Description of drawings

In order to illustrate the technical solutions of the embodiments of the present invention more clearly, the following briefly introduces the accompanying drawings that need to be used in the embodiments of the present invention. For those of ordinary skill in the art, without creative work, the Additional drawings can be obtained from these drawings.

FIG. 1 shows a schematic structural diagram of a boost control circuit 100 provided by the prior art;

FIG. 2 is a schematic structural diagram of a boost control circuit 200 provided by an embodiment of the present invention;

3 is a schematic structural diagram of a switch controller in a boost control circuit provided by an embodiment of the present invention;

FIG. 4 is a schematic waveform diagram of each signal in a boost control circuit in a continuous conduction mode provided by an embodiment of the present invention; and

FIG. 5 is a schematic waveform diagram of each signal in a boost control circuit in a discontinuous conduction mode provided by an embodiment of the present invention.

Detailed ways

The features and exemplary embodiments of various aspects of the present invention will be described in detail below. In order to make the objectives, technical solutions and advantages of the present invention more clear, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only configured to explain the present invention, and are not configured to limit the present invention. It will be apparent to those skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is only intended to provide a better understanding of the present invention by illustrating examples of the invention.

It should be noted that, in this document, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any relationship between these entities or operations. any such actual relationship or sequence exists. Moreover, the terms "comprising", "comprising" or any other variation thereof are intended to encompass a non-exclusive inclusion such that a process, method, article or device that includes a list of elements includes not only those elements, but also includes not explicitly listed or other elements inherent to such a process, method, article or apparatus. Without further limitation, an element defined by the phrase "comprises" does not preclude the presence of additional identical elements in a process, method, article, or device that includes the element.

In order to better understand the present invention, first, the prior art is introduced. Referring to FIG. 1 , FIG. 1 shows a schematic structural diagram of a boost control circuit 100 provided in the prior art.

In FIG. 1, the boost control circuit 100 includes an inductor L, a switch M1, a switch M2, a diode D1, a diode D2, and a capacitor C1. As shown in FIG. 1, one end of the inductor L is connected to the input end of the circuit, and the inductor L The other end of the switch M1 is connected to one end of the switch M1, the other end of the switch M1 is connected to the output end of the circuit, and the output end is grounded via the capacitor C1, one end of the switch M2 is connected to the common end of the inductor L and the switch M1, and the other end of the switch M2 One end is grounded, and the switch control signals used to control the turn-on and turn-off of switches M1 and M2 are HG and LG, respectively, and the two poles of diode D1 are connected to two terminals in switch M1 except the terminal for receiving the HG signal while the two poles of the diode D2 are connected between two terminals in the switch M2 except the terminal for receiving the LG signal.

Wherein, Vin is the input voltage of the boost control circuit 100, Vout is the output voltage of the boost control circuit 100, for the boost control circuit 100, the output voltage Vout is greater than the input voltage Vin; M1 and M2 are used to control the boost For example, M1 is the output control switch, M2 is the inductance energy storage opening switch; L is the inductance used to control the boost; Ton is the ON time of the control switch M2, and Toff is the ON time of the control switch M1.

In this traditional circuit, a current sampling circuit is added to sample the inductor current to generate a current feedback signal, and based on the current feedback signal, the switches M1 and M2 are controlled to be turned on and off, and then The output voltage Vout is modulated so that the output voltage Vout can be greater than the input voltage Vin.

However, this traditional method of sampling the inductor current through a current sampling circuit to generate current feedback and then modulating the output voltage based on the current feedback greatly increases the circuit area and increases the complexity of circuit design.

In order to solve the problems in the prior art, an embodiment of the present invention provides a boost control circuit. The boost control circuit provided by the embodiment of the present invention no longer detects and samples the inductor current, but establishes the modulation control of the output voltage through the principle of volt-second balance.

It should be noted that the boost control circuit provided in the embodiment of the present invention is only an example implementation manner, which is not limited by the present invention. For example, the principle provided in the embodiment of the present invention can also be substantially applied to, for example, Buck control circuits, etc., their equivalents and configurations, etc. are within the scope of the present invention.

Continuing to refer to Figure 1, based on the principle of volt-second balance, when the output switch M2 is turned on, the change of the current flowing through the inductor can be expressed as the following formula:

It can be seen that in Equation (1), the inductor current IL is a function of Vin and T _on , as described above, in the conventional configuration, this inductor current is sensed and sampled and generated across a resistor (eg, resistor R0) voltage (as shown in equation (2)), and then input this voltage into the loop control of the boost control circuit.

where k is the coefficient with which the inductor current is detected and sampled, and it is a constant. Resistor R0 is a resistor used to convert current into voltage. The resistor R0 can be a resistor connected in series with an inductor L, or it can be a resistor used to convert current into voltage in a current sampling circuit. Vin is the input voltage of the structure , T _on is the on-time of switch M2.

As an example, referring to FIG. 2 , FIG. 2 is a schematic structural diagram of a boost control circuit 200 provided by an embodiment of the present invention.

As shown in FIG. 2 , the boost control circuit 200 may include an inductor L, a switch M3 , a switch M4 , a diode D3 , a diode D4 , a capacitor C2 , a switch controller 210 , a comparator 220 and a voltage divider circuit 230 .

As one example, the switch controller 210 may be configured to generate a voltage feedback signal (eg, Vfb) representing the output voltage of the boost control circuit 200 and a current sampling signal (eg, Vsns) representing the current flowing through the switch M4 The signal HG is used to control the turn-on and turn-off of the switch M3, and the signal LG is used to control the turn-on and turn-off of the switch M4, respectively.

Specifically, in some embodiments, the switches M3 and M4 may be MOS transistors (Metal-Oxide-Semiconductor, metal oxide semiconductor field effect transistor).

As an example, one end of the inductor L can be connected to the input end of the circuit 200, the other end of the inductor L can be connected to one end of the switch M3, the other end of the switch M3 can be connected to the output end of the circuit 200, and the two poles of the diode D3 can be connected To both ends of switch M3 (eg, source and drain), one end of switch M4 may be connected to inductor L and the common terminal of switch M3 (eg, node a), the other end of switch M4 may be connected to ground via resistor Rsns, a diode The two poles of D4 may be connected to both ends of switch M4 (eg, source and drain), where the resistor Rsns is used to sample the current flowing through switch M4 to generate a current sampling signal (eg, Vsns), where the current sampling The signal Vsns is a rising ramp signal similar to V _ramp1 , and the switch controller 210 may be used to receive a voltage feedback signal (eg, Vfb) and a current sampling signal (eg, Vsns) characterizing the output voltage of the circuit 200 to generate two Switch control signals (eg, LG and HG), where the gate of switch M3 can receive signal HG to turn on and off based on signal HG, and the gate of switch M4 can receive signal LG to conduct based on signal LG. It is turned on and off, thereby modulating the output voltage Vout of the boost control circuit 200 .

In some embodiments, the voltage divider circuit 230 may be used to divide the output voltage Vout of the boost control circuit 200 to generate a voltage feedback signal (eg, Vfb), and the comparator 220 may be used to receive the reference signal Vref and the voltage A feedback signal (eg, Vfb), eg, the negative input of comparator 220 may be used to receive the reference signal Vref, and the positive input may be used to receive the voltage feedback signal Vfb to compare the two and generate the signal Vc to output to the switch controller 210, and wherein the voltage divider circuit 230 may include two resistors (eg, R1 and R2) connected in series, which is not limited in the present invention.

With the above technical solutions provided by the embodiments of the present invention, it is no longer necessary to detect and sample the inductor current, but to generate a switch control signal through a switch controller to control the turn-on and turn-off of the switch, thereby modulating the output voltage. On the premise of ensuring the conversion efficiency, a booster circuit with a small area is realized, and the voltage modulation is realized by using less resources, so as to be suitable for applications with limited resources.

As an example, referring to FIG. 3 , FIG. 3 is a schematic structural diagram of a switch controller in a boost control circuit provided by an embodiment of the present invention.

In the embodiment shown in FIG. 3, the switch controller 210 may include switches SW1 and SW2 and a capacitor C3, and the switch controller 210 may be configured to generate a control switch SW1 based on the voltage feedback signal Vfb and the current sampling signal Vsns and M4 (see FIG. 2 ) turn on and off the control signal LG, which in turn generates the control for turning on and off switches SW2 and M3 (see FIG. 2 ) based on the signal LG and the voltage on capacitor C3 signal HG, and capacitor C3 charges when switch SW1 is on and switch SW2 is off, and discharges when switch SW1 is off and switch SW2 is on. In some embodiments, the switches SW1 and SW2 may be MOS transistors.

The following describes in detail by way of example. Specifically, as shown in FIG. 3 , the switch controller 210 may further include a comparator 2101, a flip-flop 2102, a Toff generator, etc. In some embodiments, the flip-flop 2102 may be RS flip-flop.

As an example, the two input terminals of the comparator 2101 may receive the signal Vsns and the reference voltage Vref2, for example, the negative input terminal of the comparator 2101 may be used to receive the reference voltage Vref2, and the non-inverting input terminal may be used to receive the signal Vsns, To compare the two, the output of comparator 2101 may be connected, for example, to the reset terminal (labeled R) of RS flip-flop 2102, and the output of comparator 220 (see FIG. 2) may be connected to the reset terminal of RS flip-flop 2102. Bit terminal (marked as S), the output terminal of RS flip-flop 2102 can be connected to one terminal (eg, gate) of switch SW1 to control the turn-on and turn-off of switch SW1, which is connected in series with the current source Between (marked I1) and ground, capacitor C3 is connected in parallel across switch SW2, the output of the RS flip-flop can also be connected to one input of the Toff generator, and the other input of the Toff generator can be connected to The common terminal of switch SW1 and switch SW2 to receive the voltage on capacitor C3 in the discharge state, the output terminal of the Toff generator can be connected to one terminal (eg, gate) of switch SW2 to control the turn-on and turn-off of switch SW2 .

Specifically, the comparator 2101 may be configured to receive the current sampling signal Vsns and the reference signal Vref2 (for determining whether the current sampling signal Vsns is raised to the reference signal Vref2), to compare the two, and output the comparison result to the RS trigger The RS flip-flop 2102 also receives the comparison result Vc from the comparator 220 (see FIG. 2 ) to output a control signal LG to the switches SW1 and M4 based on the two comparison results to control the conduction of the switches SW1 and M4 and off, that is, Ton is the on time of SW1 and M4, when the signal LG controls the switch SW1 to turn on, the current source (for example, I1, the current source can provide the current magnitude of Vin/R1) to the capacitor C3 charging, a rising ramp voltage is generated on capacitor C3 (which will be described in detail below), and the switch SW2 is turned on (or turned on after a predetermined period of time) at the moment when SW1 is switched from on to off. without limitation), at which point capacitor C3 is discharged, creating a falling ramp voltage on capacitor C3 (which will be described in detail below), the rising and falling ramp voltages are labeled Vramp in Figure 3, Toff generator 2103 may be configured to generate a signal HG based on the signal LG and the voltage on the capacitor C3 in the discharge state (ie, the falling ramp voltage), which in turn controls the on and off of the switch SW2 based on the signal HG.

To sum up, the Ton is determined by the time when the sampling current flowing through the switch M4 reaches the reference current. The formula of Ton is as follows:

Among them, T _on is the turn-on time of switches SW1 and M4, Vref2 is the reference signal, Rsns is the resistance value of the resistor used to generate the current sampling signal Vsns, I0 is the inductor current corresponding to the moment when the switch M4 is turned off to turn on, For discontinuous conduction (DCM) mode, I0 is 0, L is the inductance value of the inductor, and Vin is the input voltage to the boost control circuit.

Since the inductance L, the voltage Vin and the time Ton are all known, in the circuit provided by the embodiment of the present invention, a similar current is generated, and has the same functional relationship between Vin and Ton as the formula (1), it can be characterized this inductor current. Among them, when the switch SW1 is turned on and the switch SW2 is turned off, the capacitor C3 is in a charging state, and the current I1 generates a rising ramp voltage on the capacitor C3. The maintenance time of the ramp voltage is Ton, and the capacitor C3 in the charging state. The ramp voltage can be expressed as:

只要选择

V_ramp2就可以完全代表V_ramp1。here,

just choose

V _ramp2 can then fully represent V _ramp1 .

Similarly, according to the principle of volt-second balance, in Figure 1, when the switch M2 is turned off and the switch M1 is turned on, the following formula is satisfied:

Based on this principle, in the embodiment shown in FIG. 3 , when the switch SW1 is turned off and the switch SW2 is turned on, the current I2 begins to discharge the capacitor C3, and the discharge time is Toff. During the discharge phase, the voltage on the capacitor C3 is linear falling, a falling ramp voltage is generated on capacitor C3, and the pulse width of switch SW2 is Toff. It should be noted that the implementation of its circuit is not limited to the embodiments provided by the present invention, and those skilled in the art can design the circuit based on the volt-second balance principle described above without departing from the spirit and scope of the present invention. other implementations. Selecting I2 as the following formula can satisfy the volt-second balance reflected in formula (5).

Referring to FIG. 3 and FIG. 4 , FIG. 4 is a schematic waveform diagram of each signal in a boost control circuit in a continuous conduction mode provided by an embodiment of the present invention. Among them, FIG. 4(a) shows a schematic diagram of the relationship between the voltage Vramp on the capacitor shown in FIG. 3 and time; FIG. 4(b) shows the relationship between the signal LG shown in FIG. 3 and time. and FIG. 4( c ) shows a graph of the relationship between the signal HG and time shown in FIG. 3 .

As an example, when the switch SW1 is turned on and the switch SW2 is turned off, the current I1 starts to charge the capacitor C3 for a charging time of Ton (corresponding to the time period T0-T1 in FIG. 4 ). During the time period T0-T1, Voltage Vramp on capacitor C3 rises linearly (eg, during time period T0-T1, voltage Vramp rises linearly from V1 (valley) to V2 (peak), see equation (4)), and signal LG is high, while signal HG is at a low level; and when switch SW1 is turned off and switch SW2 is turned on, current I2 begins to discharge capacitor C3 for a time of Toff (corresponding to time period T1-T2), during which time period T1-T2, The voltage on capacitor C3 (ie, Vramp) falls linearly (eg, during time period T1-T2, signal Vramp falls linearly from V2 (peak) to V1 (valley), see equation (6)), and signal LG is low level, while the signal HG is at a high level.

Referring to FIGS. 3 and 4 , the generation of the control signal HG of the switch SW2 is characterized by a Toff generator in FIG. 3 . The rising edge of the signal HG can be generated by the falling edge of the signal LG (for example, at time T1, the signal LG switches from a high level to a low level, so that the signal HG switches from a low level to a high level, see FIG. 4 . ), and the falling edge of the signal HG is generated when the signal Vramp drops from the peak value V2 to the valley value V1 (for example, at time T2, when the signal Vramp drops to the valley value V1, the signal HG switches from high level to low level , see Figure 4).

The discharge current of the capacitor C3 is selected according to formula (6), and the time for the signal Vramp to drop from the peak value V2 to the valley value V1 is the time Toff required to achieve the volt-second balance.

In this way, the current relationship of the inductor current reflected by the formula (5) when the boosted switches M3 and M4 work under the volt-second balance can be converted into the voltage relationship shown in the formula (7):

so,

Therefore, the input voltage Vin, the output voltage Vout, and the on-time Ton of the switches SW1 and M4 (see formula (3)) are all known parameters, and the on-time Toff of the switches SW2 and M3 is set based on the formula (8), During the Toff period (eg, from time T1 to time T2 in FIG. 4 ), switches M3 and SW2 are turned on.

As an example, the working principle of the boost control circuit provided by the embodiment of the present invention is introduced with reference to FIG. 2 . When the voltage feedback signal Vfb is smaller than the reference signal Vref, the output signal Vc of the comparator 220 is inverted, and its rising edge can turn on the switch Switch SW1 in controller 210 (see FIG. 3 ). Subsequently, the output signal Vc of the comparator 220 is reset. After the on-time Ton has elapsed, the switch SW1 is turned off, that is, the switch SW1 remains in the on-state during the on-time Ton. In some embodiments, the switch SW2 may be turned on after the moment when the switch SW1 is turned off, for example, at an interval of more than ten nanoseconds (which can be selected according to requirements), so that the switch SW2 is turned off after the on time Toff has elapsed, That is, the switch SW2 remains in the on state during the on time Toff. In some other embodiments, the interval time can be zero, that is, when the switch SW1 is turned off, the switch SW2 can be turned on immediately, so that the switch SW2 is turned off after the on-time Toff, that is, the switch SW2 is turned on. The ON state is maintained during the ON time Toff.

When the switch SW2 is turned off, the output of the comparator 220 is enabled. If the output signal Vc of the comparator 220 flips a rising edge, the above-mentioned operation for the next cycle starts immediately. At this time, the boost control circuit works in a continuous Conduction mode (Constant Current Mode, CCM), as shown in Figure 4. Otherwise, wait until the output signal Vc of the comparator 220 flips to a rising edge, and then starts the above operation in the next cycle. At this time, the boost control circuit works in the Discrete Current Mode (DCM), as shown in the figure As shown in FIG. 5, FIG. 5 is a schematic waveform diagram of each signal in the boost control circuit in the discontinuous conduction mode provided by the embodiment of the present invention, wherein the time period (T3-T2) represents the above-mentioned waiting time.

To sum up, the boost control circuit provided by the embodiment of the present invention no longer uses the traditional method of detecting and sampling the inductor current, but establishes the boost regulation control of the output voltage based on the volt-second balance principle. The purpose of this circuit is to realize a booster circuit with a smaller area under the premise of ensuring the conversion efficiency, that is, to realize the modulation of the output voltage with the smallest resource, and then use it in the application with limited resources.

The boost control circuit provided by the embodiment of the present invention uses a general constant on time structure, and the modulation control of the output switch is realized based on the principle of volt-second balance, and the change of the inductor current is replaced by RC conversion. It can be seen that , the turn-on time of the output switch of the boost control circuit is determined by constant turn-on time and RC conversion substitution.

It is to be understood that the present invention is not limited to the specific arrangements and processes described above and shown in the figures. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above-described embodiments, several specific steps are described and shown as examples. However, the method process of the present invention is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change the sequence of steps after comprehending the spirit of the present invention.

The functional blocks shown in the above-described structural block diagrams may be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, it may be, for example, an electronic circuit, an application specific integrated circuit (ASIC), suitable firmware, a plug-in, a function card, or the like. When implemented in software, elements of the invention are programs or code segments used to perform the required tasks. The program or code segments may be stored in a machine-readable medium or transmitted over a transmission medium or communication link by a data signal carried in a carrier wave. A "machine-readable medium" may include any medium that can store or transmit information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, radio frequency (RF) links, and the like. The code segments may be downloaded via a computer network such as the Internet, an intranet, or the like.

It should also be noted that the exemplary embodiments mentioned in the present invention describe some methods or systems based on a series of steps or devices. However, the present invention is not limited to the order of the above steps, that is, the steps may be performed in the order mentioned in the embodiments, or may be different from the order in the embodiments, or several steps may be performed simultaneously.

The above are only specific implementations of the present invention. Those skilled in the art can clearly understand that, for the convenience and simplicity of the description, the specific working process of the above-described systems, modules and units may refer to the foregoing method embodiments. The corresponding process in , will not be repeated here. It should be understood that the protection scope of the present invention is not limited to this. Any person skilled in the art can easily think of various equivalent modifications or replacements within the technical scope disclosed by the present invention, and these modifications or replacements should all cover within the protection scope of the present invention.

Claims (10)

1. A boost control circuit, comprising an inductor, a first switch connected in series with the inductor between an input end and an output end of the boost control circuit, and a first switch connected in series with the inductor at the input end The second switch between the ground and the ground, further comprising: A switch controller configured to generate a voltage feedback signal indicative of an output voltage of the boost control circuit and a current sampling signal indicative of a current flowing through the second switch to generate control of the first switch and the second switch, respectively. The first control signal and the second control signal for turning on and off the second switch. 2. The boost control circuit of claim 1, wherein the switch controller comprises a third switch, a fourth switch, and a capacitor, and the switch controller is further configured to: based on the voltage feedback signal and the current sampling signal, generating the second control signal for controlling the turn-on and turn-off of the second switch and the third switch; based on the second control signal and the voltage on the capacitor, generating the first control signal for controlling the turn-on and turn-off of the first switch and the fourth switch; wherein, The charging and discharging of the capacitor is related to the turning on and off of the third switch and the fourth switch. 3. The boost control circuit of claim 2, wherein the switch controller is further configured to: The second control signal is generated based on the first comparison result between the voltage feedback signal and the first reference signal and the current sampling signal. 4. The boost control circuit of claim 3, wherein the switch controller is further configured to: The second control signal is generated based on the first comparison result and the second comparison result between the current sampling signal and the second reference signal. 5 . The boost control circuit according to claim 4 , wherein the third switch and the fourth switch are connected in series between the current source and the ground, and the capacitor is connected in parallel with the fourth switch. 6 . Both ends of the switch controller also include: a first comparator configured to generate the second comparison result based on the current sampling signal and the second reference signal; a flip-flop configured to generate the second control signal based on the first comparison result and the second comparison result; and A generator is configured to generate the first control signal based on the second control signal and a voltage across the capacitor, wherein the voltage across the capacitor is a voltage across the capacitor in a discharged state. 6. The boost control circuit according to claim 5, wherein the conduction time of the second switch and the third switch is determined by the following formula:

Wherein, T _on is the conduction time of the second switch and the third switch, Vref2 is the second reference signal, Rsns is the resistance value of the resistor used to generate the current sampling signal, and I0 is the The inductor current corresponding to the moment when the second switch is turned off to on, L is the inductance value of the inductor, and Vin is the input voltage of the boost control circuit. 7. The boost control circuit according to claim 5, wherein the conduction time of the first switch and the fourth switch is determined by the following formula:

Wherein, Toff is the on-time of the first switch and the fourth switch, and Vout is the output voltage. 8 . The boost control circuit according to claim 5 , wherein the first switch, the second switch, the third switch, and the fourth switch are all metal-oxide-semiconductor field effects. 9 . tube, and the flip-flop is an RS flip-flop. 9. The boost control circuit according to claim 8, further comprising: a second comparator configured to generate the first comparison signal based on the voltage feedback signal and the first reference signal; a voltage divider circuit configured to generate the voltage feedback signal by dividing the output voltage; a first diode, two poles of the first diode are respectively connected to the source and drain of the first switch, the gate of the first switch receiving the first control signal; and A second diode, two poles of the second diode are respectively connected to the source and drain of the second switch, and the gate of the second switch receives the second control signal. 10 . The boost control circuit according to claim 1 , wherein the boost control circuit operates in a continuous conduction mode or a discontinuous conduction mode. 11 .

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