CN113013175A - Manufacturing method of SONOS device - Google Patents
Manufacturing method of SONOS device Download PDFInfo
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- CN113013175A CN113013175A CN202110469842.1A CN202110469842A CN113013175A CN 113013175 A CN113013175 A CN 113013175A CN 202110469842 A CN202110469842 A CN 202110469842A CN 113013175 A CN113013175 A CN 113013175A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
- H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
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Abstract
The invention provides a manufacturing method of an SONOS device, which comprises the steps of firstly providing a semiconductor substrate, defining a storage area, a selection area and a peripheral logic area on the semiconductor substrate, forming an ONO layer on the semiconductor substrate, covering the storage area, the selection area and the peripheral logic area by the ONO layer, coating photoresist on the front surface of the semiconductor substrate and developing, opening the selection area and the peripheral logic area, removing the ONO layer of the selection area and the peripheral logic area, then carrying out surface cleaning, coating the photoresist on the front surface of the semiconductor substrate and developing, opening the storage area and the selection area, and finally carrying out surface cleaning after ion implantation in the storage area and the selection area. According to the invention, surface cleaning is carried out twice in the manufacturing process of the SONOS device, so that a good cleaning effect is achieved, residual polymer and photoresist are thoroughly removed, the uniformity of subsequent ion implantation can be effectively improved, and the uniformity and reliability of the device are improved.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a manufacturing method of an SONOS device.
Background
Flash memory (Flash memory) is a non-volatile memory developed based on erasable programmable read-only memory (EPROM) and electrically erasable programmable read-only memory (EEPROM), has the characteristics of low price, relatively simple process, and convenient and rapid multiple erasing and writing, and has been widely used in the field of storage since the past. However, the flash memory with the floating gate structure needs high-voltage operation in the processes of reading, writing and erasing, while the Complementary Metal Oxide Semiconductor (CMOS) does not need high-voltage operation, and the flash memory is a double-layer polysilicon structure with a floating gate and a control gate, and the CMOS is a single-layer polysilicon structure, so that the integration difficulty of the flash memory and the CMOS device is large and the process is complex. The SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) technology can be well compatible with the CMOS process, as long as the SONOS device is embedded on the basis of a logic platform, and the SONOS device has a small unit size, low operating voltage, low price, and is very competitive in manufacturing, use and cost.
The conventional SONOS device structure generally includes two devices, namely, a select transistor (SG) and a storage transistor (CG), wherein a region where the storage transistor is located is a storage transistor region (i.e., a CG region), a region where the select transistor is located is a select transistor region (i.e., an SG region), and a peripheral logic region. The memory region requires an ONO (Oxide-Nitride-Oxide) structure, and the select region and the peripheral logic region do not require an ONO structure. The prior art typically forms an ONO stack by in-situ growth, but the ONO stack covers a select area and a peripheral logic area in addition to a memory area, and thus the ONO stack in the select area and the peripheral logic area needs to be removed to form an ONO structure in the memory area.
In the prior art, an ONO structure of a storage tube area is formed by dry etching, but because plasma, ONO, photoresist and the like in the dry etching process easily form polymers with moisture in the air, subsequent ion injection is not uniform, so that the uniformity of a device is influenced, corrosion defects are easily generated when metal silicide is formed subsequently, electric leakage is increased, and the reliability is reduced.
Disclosure of Invention
The invention aims to provide a manufacturing method of an SONOS device, which aims to solve the problem that in the prior art, in the process of forming an ONO structure of a storage tube area by dry etching, plasma, ONO, photoresist and the like are easy to form polymers with moisture in the air, so that subsequent ion injection is not uniform, and the uniformity of the device is affected.
In order to achieve the technical purpose, the invention provides a method for manufacturing a SONOS device, which comprises the following steps:
providing a semiconductor substrate, wherein the semiconductor substrate is defined with a storage area, a selection area and a peripheral logic area, an ONO layer is formed on the semiconductor substrate and covers the storage area, the selection area and the peripheral logic area;
coating photoresist on the front surface of the semiconductor substrate and developing, and opening the selection area and the peripheral logic area;
removing the ONO layer of the selection area and the peripheral logic area;
cleaning the surface;
coating photoresist on the front surface of the semiconductor substrate, developing, and opening the storage tube area and the selection tube area;
performing ion implantation in the memory area and the logic area;
and (5) cleaning the surface.
Optionally, the ONO layer includes a tunnel oxide layer, a nitride layer, and a first blocking oxide layer sequentially stacked on the semiconductor substrate.
Optionally, the ONO layer in the selection area and the peripheral logic area is removed by dry etching.
Optionally, wet etching is used for surface cleaning.
Optionally, a sacrificial oxide layer is further formed on the semiconductor substrate, and the ONO layer covers the sacrificial oxide layer.
Optionally, when the ONO layer in the selection area and the peripheral logic area is removed, the sacrificial oxide layer is also removed.
Optionally, before the ONO layer is formed on the semiconductor substrate, the method further includes:
and pre-cleaning the semiconductor substrate.
Optionally, the reagent used in the wet etching is a phosphoric acid solution or a hydrofluoric acid solution.
The invention provides a manufacturing method of an SONOS device, which has the following beneficial technical effects: when the manufacturing method is adopted to manufacture the SONOS device, a semiconductor substrate is provided, a storage area, a selection area and a peripheral logic area are defined on the semiconductor substrate, an ONO layer is formed on the semiconductor substrate, the ONO layer covers the storage area, the selection area and the peripheral logic area, photoresist is coated and developed on the front surface of the semiconductor substrate, the selection area and the peripheral logic area are opened, surface cleaning is carried out after the ONO layer of the selection area and the ONO layer of the peripheral logic area are removed, photoresist is coated and developed on the front surface of the semiconductor substrate, the storage area and the selection area are opened, and finally surface cleaning is carried out after ion implantation is carried out on the storage area and the selection area. According to the invention, by adding one surface cleaning procedure, the surface cleaning is carried out twice in the manufacturing process of the SONOS device, so that a good cleaning effect is achieved, the residual polymer and photoresist are thoroughly removed, the uniformity of subsequent ion injection can be effectively improved, and the uniformity and reliability of the device are improved. In addition, the embodiment is also correspondingly provided with an exposure and development process, so that the time interval from the etching process of the storage tube area to the ion implantation process can be effectively prolonged, the rejection rate of the SONOS device in the manufacturing process is reduced, and the production cost is saved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a flowchart illustrating a method for fabricating a SONOS device according to an embodiment of the present invention;
fig. 2 is a schematic cross-sectional view of the SONOS device according to the embodiment of the present invention after performing step S3;
fig. 3 is a cross-sectional view of the SONOS device after performing step S4 according to an embodiment of the present invention;
fig. 4 is a cross-sectional view of the SONOS device after performing step S5 according to an embodiment of the present invention;
fig. 5 is a schematic cross-sectional view of the SONOS device according to the embodiment of the present invention after performing step S5;
fig. 6 is a cross-sectional view of the SONOS device after performing step S6 according to an embodiment of the present invention;
fig. 7 is a cross-sectional view of the SONOS device after performing step S7 according to an embodiment of the present invention;
fig. 8 is a comparison between an SEM image of a SONOS device fabricated by the method for fabricating a SONOS device according to the present embodiment and an SEM image of a SONOS device fabricated by a conventional method for fabricating a SONOS device according to an embodiment of the present invention;
wherein the reference numerals in the accompanying figures 1 to 8 are as follows:
1-a memory zone area; 2-selecting a pipe area; 10-a semiconductor substrate; 20-sacrificial oxide layer; 30-an ONO layer; 40-photoresist.
Detailed Description
The method for fabricating a SONOS device according to the present invention is further described in detail with reference to the accompanying drawings and the embodiments. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
The core idea of the invention is to provide a manufacturing method of the SONOS device, which can achieve good cleaning effect by performing surface cleaning twice before ion implantation, realize thorough removal of residual polymer and photoresist, effectively improve uniformity of subsequent ion implantation, and improve uniformity and reliability of the device.
Therefore, the present invention provides a method for manufacturing a SONOS device, please refer to fig. 1, where the method specifically includes the following steps:
in step S1, a semiconductor substrate 10 is provided, the semiconductor substrate 10 defines a memory area 1, a selection area 2 and a peripheral logic area (not shown), an ONO layer 30 is formed on the semiconductor substrate 10, and the ONO layer 30 covers the memory area 1, the selection area 2 and the peripheral logic area. The material of the semiconductor substrate 10 may be silicon, germanium, silicon carbide, or the like, silicon-on-insulator or germanium-on-insulator, or may be other materials, such as a group iii or v compound such as gallium arsenide. The semiconductor substrate 10 may also be implanted with certain dopant ions to change electrical parameters according to design requirements.
Further, before the ONO layer 30 is formed on the semiconductor substrate 10, the method further includes pre-cleaning the semiconductor substrate 10 to remove a natural oxide layer on the surface of the semiconductor substrate 10, so as to improve the stability of the SONOS device.
Specifically, the ONO layer 30 includes a tunnel oxide layer, a nitride layer, and a first blocking oxide layer (not shown) sequentially stacked on the semiconductor substrate.
Further, in order to prevent the semiconductor substrate 10 from being damaged by the subsequent process, a sacrificial oxide layer 20 is formed on the surface of the semiconductor substrate 10, the sacrificial oxide layer 20 is located below the ONO layer 30, and the sacrificial oxide layer 20 is made of, for example, silicon oxide. The sacrificial oxide layer 20 may be used to protect the semiconductor substrate during fabrication of the SONOS device.
In step S2, photoresist is coated and developed on the front surface of the semiconductor substrate, and the select area and the peripheral logic area are opened.
Specifically, a photoresist 40 is coated on the front surface of the semiconductor substrate 10, and after exposure and development, the select area 2 and the peripheral logic area are opened, while the photoresist is kept covered in the memory area 1.
In step S3, the ONO layers in the select area and the peripheral logic area are removed.
Specifically, referring to fig. 2, the remaining photoresist 40 is used as a barrier to perform a dry etching process to remove the sacrificial oxide layer, the tunneling oxide layer, the nitride layer and the first blocking oxide layer in the select transistor area 2 and the peripheral logic area.
In step S4, surface cleaning is performed.
Specifically, referring to fig. 3, the semiconductor substrate 10 is surface-cleaned by wet etching to remove the remaining photoresist 40 and the polymer remaining by dry etching, so as to ensure uniformity of the subsequent ion implantation. The reagent used for wet etching can be a phosphoric acid solution or a hydrofluoric acid solution.
In step S5, photoresist is coated and developed on the front surface of the semiconductor substrate, and the memory region and the select region are opened.
Specifically, referring to fig. 4 and 5, a photoresist 40 is coated on the front surface of the semiconductor substrate 10, and after exposure and development, the memory region 1 and the select region 2 are opened, while the photoresist is kept covered in the peripheral logic region.
In this embodiment, an exposure and development process is added, so that the time interval from the etching process of the memory tube region 1 to the ion implantation process can be effectively prolonged, and interruption of the manufacturing process of the SONOS device during continuous production is avoided, which causes the semi-finished product of the SONOS device to be excessively exposed in the air to grow unnecessary polymers when waiting for the next process, thereby causing rejection of the semi-finished product of the SONOS device and affecting the production cost.
In step S6, ion implantation is performed in the memory area 2 and the selected area 1. Please refer to fig. 6.
In step S7, surface cleaning is performed.
Specifically, referring to fig. 7, the semiconductor substrate 10 is surface-cleaned by wet etching to remove the remaining photoresist 40 and the polymer remaining by dry etching, so as to ensure uniformity of the subsequent ion implantation. The reagent used for wet etching can be a phosphoric acid solution or a hydrofluoric acid solution.
Referring to fig. 8, a right diagram in fig. 8 is an SEM (scanning electron microscope) diagram of the SONOS device manufactured by the method for manufacturing the SONOS device according to the present embodiment, and a left diagram in fig. 5 is an SEM diagram of the SONOS device manufactured by the method for manufacturing the conventional SONOS device, as is apparent from a comparison between the left diagram and the right diagram in fig. 5, the right diagram in fig. 5 shows that the SONOS device has higher device flatness and device uniformity than the left diagram in fig. 5. Therefore, in the embodiment, by adding one surface cleaning process, surface cleaning is performed twice in the manufacturing process of the SONOS device, so that a good cleaning effect is achieved, the residual polymer and the photoresist are thoroughly removed, the uniformity of subsequent ion implantation can be effectively improved, and the uniformity and the reliability of the device are improved. In addition, the embodiment is also correspondingly provided with an exposure and development process, so that the time interval from the etching process of the storage tube area to the ion implantation process can be effectively prolonged, the rejection rate of the SONOS device in the manufacturing process is reduced, and the production cost is saved.
It should be noted that the manufacturing method of the SONOS device provided in this embodiment has strong versatility, and is not only suitable for the manufacturing process of the SONOS device, but also suitable for the manufacturing process of a semiconductor device, such as a diode manufacturing process.
In summary, the manufacturing method of the SONOS device provided in the present invention has the following advantages: when the manufacturing method is adopted to manufacture the SONOS device, a semiconductor substrate is provided, a storage area, a selection area and a peripheral logic area are defined on the semiconductor substrate, an ONO layer is formed on the semiconductor substrate, the ONO layer covers the storage area, the selection area and the peripheral logic area, photoresist is coated and developed on the front surface of the semiconductor substrate, the selection area and the peripheral logic area are opened, surface cleaning is carried out after the ONO layer of the selection area and the ONO layer of the peripheral logic area are removed, photoresist is coated and developed on the front surface of the semiconductor substrate, the storage area and the selection area are opened, and finally surface cleaning is carried out after ion implantation is carried out on the storage area and the selection area. According to the invention, by adding one surface cleaning procedure, the surface cleaning is carried out twice in the manufacturing process of the SONOS device, so that a good cleaning effect is achieved, the residual polymer and photoresist are thoroughly removed, the uniformity of subsequent ion injection can be effectively improved, and the uniformity and reliability of the device are improved. In addition, the embodiment is also correspondingly provided with an exposure and development process, so that the time interval from the etching process of the storage tube area to the ion implantation process can be effectively prolonged, the rejection rate of the SONOS device in the manufacturing process is reduced, and the production cost is saved.
Finally, it should be noted that the above embodiments are only for illustrating the technical solutions of the present invention and not for limiting, and although the present invention is described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions may be made on the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention.
Claims (8)
1. A method for manufacturing a SONOS device is characterized by comprising the following steps:
providing a semiconductor substrate, wherein the semiconductor substrate is defined with a storage area, a selection area and a peripheral logic area, an ONO layer is formed on the semiconductor substrate and covers the storage area, the selection area and the peripheral logic area;
coating photoresist on the front surface of the semiconductor substrate and developing, and opening the selection area and the peripheral logic area;
removing the ONO layer of the selection area and the peripheral logic area;
cleaning the surface;
coating photoresist on the front surface of the semiconductor substrate, developing, and opening the storage tube area and the selection tube area;
performing ion implantation in the memory area and the logic area;
and (5) cleaning the surface.
2. The method of fabricating the SONOS device of claim 1, wherein the ONO layer comprises a tunnel oxide layer, a nitride layer, and a first blocking oxide layer sequentially stacked on the semiconductor substrate.
3. The method of fabricating the SONOS device of claim 1, wherein the ONO layer is removed in the select area and the peripheral logic area using a dry etch.
4. The method of fabricating the SONOS device of claim 1, wherein the surface cleaning is performed by wet etching.
5. The method of fabricating the SONOS device of claim 1, wherein a sacrificial oxide layer is further formed on the semiconductor substrate, and the ONO layer covers the sacrificial oxide layer.
6. The method of fabricating the SONOS device of claim 5, wherein the sacrificial oxide layer is also removed when removing the ONO layers in the select area and the peripheral logic area.
7. The method of fabricating the SONOS device of claim 1, wherein before forming the ONO layer on the semiconductor substrate, further comprising:
and pre-cleaning the semiconductor substrate.
8. The method of fabricating the SONOS device of claim 4, wherein the wet etching uses a reagent selected from a phosphoric acid solution and a hydrofluoric acid solution.
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| CN202110469842.1A CN113013175B (en) | 2021-04-28 | 2021-04-28 | Manufacturing method of SONOS device |
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| CN113013175B CN113013175B (en) | 2024-05-31 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116130386A (en) * | 2023-02-22 | 2023-05-16 | 普冉半导体(上海)股份有限公司 | Optimization method and device for nonvolatile memory bit process |
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| CN108878427A (en) * | 2017-03-30 | 2018-11-23 | 瑞萨电子株式会社 | Semiconductor devices and its manufacturing method |
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| CN1534767A (en) * | 2003-04-02 | 2004-10-06 | �����ɷ� | Method for manufacturing read-only memory |
| KR20060007159A (en) * | 2004-07-19 | 2006-01-24 | 주식회사 하이닉스반도체 | SONOS dual gate dielectric manufacturing method |
| US6946349B1 (en) * | 2004-08-09 | 2005-09-20 | Chartered Semiconductor Manufacturing Ltd. | Method for integrating a SONOS gate oxide transistor into a logic/analog integrated circuit having several gate oxide thicknesses |
| CN106887433A (en) * | 2017-02-08 | 2017-06-23 | 上海华虹宏力半导体制造有限公司 | SONOS processes |
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| CN116130386A (en) * | 2023-02-22 | 2023-05-16 | 普冉半导体(上海)股份有限公司 | Optimization method and device for nonvolatile memory bit process |
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