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CN113031863A - SSD command correlation management method and device, computer equipment and storage medium - Google Patents

SSD command correlation management method and device, computer equipment and storage medium Download PDF

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Publication number
CN113031863A
CN113031863A CN202110295185.3A CN202110295185A CN113031863A CN 113031863 A CN113031863 A CN 113031863A CN 202110295185 A CN202110295185 A CN 202110295185A CN 113031863 A CN113031863 A CN 113031863A
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command
new command
unit
read
new
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CN202110295185.3A
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CN113031863B (en
Inventor
王猛
徐伟华
贾宗铭
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Shenzhen Union Memory Information System Co Ltd
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Shenzhen Union Memory Information System Co Ltd
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656Data buffering arrangements
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659Command handling arrangements, e.g. command buffers, queues, command scheduling
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)

Abstract

The invention relates to a method and a device for managing SSD command correlation, a computer device and a storage medium, wherein the method comprises the following steps: acquiring a new command issued by a host; judging whether the new command is a read-write command or not; if yes, updating the read-write command queue to be processed; judging whether the new command and the read-write command to be processed have correlation or not; if yes, pausing the hardware, and executing and processing a new command by the firmware; if not, the hardware executes the new command; if not, checking the command synchronous execution bitmap; judging whether the new command needs to be synchronously executed or not; if so, suspending the hardware, and executing and processing a new command by the firmware; if not, the firmware executes to process the new command. The invention can automatically identify the correlation of the new command, can automatically execute the new command without correlation by hardware, ensures high performance, and can correctly identify the new command with correlation and send the new command to firmware for processing, thereby ensuring the correctness of data.

Description

SSD command correlation management method and device, computer equipment and storage medium
Technical Field
The present invention relates to the technical field of SSD command dependency management, and in particular, to a method and an apparatus for SSD command dependency management, a computer device, and a storage medium.
Background
SSD (solid state disk) has been widely used in various occasions, and has been gradually replacing the conventional HDD in the PC market at present, providing better experience for users in terms of reliability and performance. With the speed of the host interface and the NAND interface being increased, the performance requirement of the SSD is higher, taking PCIe Gen 4x4 as an example, the upper limit of the bandwidth thereof can reach 7GB/s, and under such high bandwidth requirement, various hardware acceleration units are generally introduced into the SSD in advance to process the read/write command, thereby avoiding/reducing the delay/bottleneck of the firmware participation. When the hardware is automatically executed, due to the requirement of the client and the complexity of implementation, the hardware generally only accelerates the read/write commands, but there is a problem of correlation between the read/write commands and between other types of commands, which if not considered, may result in a data consistency problem.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides an SSD command dependency management method, an SSD command dependency management device, a computer device and a storage medium.
In order to solve the technical problems, the invention adopts the following technical scheme:
an SSD command dependency management method, comprising the steps of:
acquiring a new command issued by a host;
judging whether the new command is a read-write command or not;
if the read-write command is the read-write command, updating the read-write command queue to be processed;
judging whether the new command and the read-write command to be processed have correlation or not;
if yes, pausing the hardware, and executing and processing a new command by the firmware;
if not, the hardware executes the new command;
if the command is not the read-write command, checking the command synchronous execution bitmap;
judging whether the new command needs to be synchronously executed or not;
if so, suspending the hardware, and executing and processing a new command by the firmware;
if not, the firmware executes to process the new command.
The further technical scheme is as follows: before the step of obtaining the new command issued by the host, the method further comprises: the configuration commands synchronously execute the bitmaps.
The further technical scheme is as follows: the correlation is based on whether the logical address spaces coincide.
The further technical scheme is as follows: the synchronous execution refers to suspending subsequent command acquisition or processing and exclusively processing a new command.
An SSD command dependency management apparatus, comprising: the device comprises an acquisition unit, a first judgment unit, an updating unit, a second judgment unit, a first pause processing unit, a first execution processing unit, a checking unit, a third judgment unit, a second pause processing unit and a second execution processing unit;
the acquisition unit is used for acquiring a new command issued by the host;
the first judging unit is used for judging whether the new command is a read-write command;
the updating unit is used for updating the read-write command queue to be processed;
the second judging unit is used for judging whether the new command and the read-write command to be processed have correlation or not;
the first pause processing unit is used for pausing hardware, and the firmware executes and processes a new command;
the first execution processing unit is used for executing and processing a new command by hardware;
the checking unit is used for checking a command synchronous execution bitmap;
the third judging unit is used for judging whether the new command needs to be synchronously executed;
the second pause processing unit is used for pausing hardware, and the firmware executes and processes a new command;
and the second execution processing unit is used for executing and processing the new command by the firmware.
The further technical scheme is as follows: further comprising: and the configuration unit is used for configuring the command synchronization execution bitmap.
The further technical scheme is as follows: the correlation is based on whether the logical address spaces coincide.
The further technical scheme is as follows: the synchronous execution refers to suspending subsequent command acquisition or processing and exclusively processing a new command.
A computer device comprising a memory having stored thereon a computer program and a processor that when executed implements an SSD command dependency management method as described above.
A storage medium storing a computer program comprising program instructions which, when executed by a processor, may implement an SSD command dependency management method as described above.
Compared with the prior art, the invention has the beneficial effects that: the method can automatically identify the correlation of the new command, can automatically execute the new command without correlation by hardware, and ensures high performance, and can correctly identify the new command with correlation and send the new command to firmware for processing, thereby ensuring the correctness of data.
The invention is further described below with reference to the accompanying drawings and specific embodiments.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
FIG. 1 is a schematic diagram of a conventional SSD access application;
FIG. 2 is a schematic diagram of an application of a conventional SSD in a hardware acceleration processing unit;
fig. 3 is a flowchart illustrating an SSD command dependency management method according to an embodiment of the invention;
FIG. 4 is a schematic diagram illustrating an application of SSD command dependency management according to an embodiment of the present invention;
FIG. 5 is a schematic block diagram of an SSD command dependency management apparatus provided by an embodiment of the present invention;
FIG. 6 is a schematic block diagram of a computer device provided by an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
Referring to the embodiments shown in fig. 1 to 6, in the conventional technology shown in fig. 1, the access flow of the conventional SSD is as follows:
the host sends a command to the SSD hardware module;
the SSD hardware module PCIe/NVMe receives the command and then transfers the command to the firmware module for processing;
the SSD front-end module splits the command into mapping units (typically 4 KB);
submitting an operation request to a buffer management module and distributing a read-write buffer;
if the command is a write command, establishing data transmission with the host according to the allocated buffer area, and informing the host that the command is finished after the data transmission is finished;
if the command is a read command, submitting an operation request to a mapping table management module;
the mapping table management module is responsible for allocating corresponding physical addresses (write commands) according to the logical addresses or converting the logical addresses into NAND physical addresses (read commands);
submitting an operation request to a back-end module, and enabling the back-end module to initiate a read/write request for the NAND according to the physical address;
waiting for the NAND read/write operation request to complete;
if a read command, the data is loaded into the NAND Cache Register at this time. After the data Ready, the transfer of data from the NAND Cache Register to the host is initiated.
In the whole process, the read-write access request of the host needs to be processed by more firmware, which is limited by the performance of the CPU, so that the delay is large, and the requirement cannot be met under the background of the performance requirement of the SSD with high bandwidth and low delay.
Referring to the application of the conventional SSD shown in fig. 2 added with a hardware acceleration processing unit, the hardware read/write acceleration unit manages an independent write buffer, and for a host write command, the hardware acceleration unit directly allocates the write buffer and writes host data to inform the host of completion, and for a host read command, the hardware acceleration unit directly searches a mapping table, initiates data reading according to a physical storage address, transmits the data reading to the host, and informs the host of completion of the command. However, in this scenario, there is a data consistency problem caused by command dependency: complicated correlation problems exist between read-write commands and non-read-write commands (such as TRIM/Format …), when the hardware acceleration unit processes the read-write commands, paths of the read commands and the write commands are different, and for the read commands, a mapping table needs to be inquired to load data from a NAND; for the write command, the write command can be directly written into the memory, the mapping table is intensively updated and the NAND is written after a period of time, further, some non-read and write commands, such as TRIM/Format, etc., can directly mark data invalid, such various correlations can cause data errors read by the host if the data are incorrectly processed.
Referring to fig. 3 to 4, the present invention discloses a method for managing SSD command dependency, comprising the following steps:
s1, acquiring a new command issued by the host;
before the step of S1, the method further includes: the host computer is powered on, the configuration commands synchronously execute the bitmap, and hardware is enabled.
S2, judging whether the new command is a read-write command;
and judging whether the new command is a read-write command or not through the correlation checking module.
S3, if the command is read-write command, updating the read-write command queue to be processed;
wherein, adding a read-write command queue to be processed: the access logic address space of all uncompleted host commands is maintained in the queue, when the hardware receives a new host read-write command, the access logic address space is added into the queue, when the corresponding command is completed, the data transmission and the NAND data read-write at the host end are completed, and the queue record is deleted.
S4, judging whether the new command and the read-write command to be processed have correlation;
the correlation check module is further configured to perform conflict check and processing, and when a new host read/write command is received, may perform correlation check with a previous incomplete command in the read/write command queue to be processed, to determine whether a conflict exists, where the correlation check may be determined based on whether a logical address space overlaps. If the conflict exists, the execution of the hardware is suspended, the new read-write command is given to the firmware for processing, and the hardware is restarted after the firmware processing is finished; and if the conflict does not exist, directly performing hardware processing.
S5, if yes, pausing the hardware, and executing and processing a new command by the firmware;
s6, if not, executing new command by hardware (equivalent to direct processing by hardware read-write accelerating unit);
s7, if not, checking command synchronous executing bitmap;
s8, judging whether the new command needs to be executed synchronously;
wherein, synchronous execution means suspending subsequent command acquisition or processing, exclusively processing a new command, adding a command synchronous execution bitmap: and when each type of command corresponds to one bit, if the bit is 1, the corresponding command needs to be synchronously executed, otherwise, the corresponding command does not need to be synchronously executed, and when the SSD is powered on, the firmware initializes the bitmap and then starts the hardware.
S9, if necessary, pausing the hardware, and executing and processing the new command by the firmware;
s10, if not, the hardware is not suspended, the hardware can continue to process the subsequent command, and the firmware executes to process the new command.
The invention can automatically identify the correlation of the new command, can automatically execute the new command without correlation by hardware, ensures high performance, and can correctly identify the new command with correlation and send the new command to firmware for processing, thereby ensuring the correctness of data.
Referring to fig. 5, the present invention also discloses an SSD command dependency management device, which includes: an acquiring unit 10, a first judging unit 20, an updating unit 30, a second judging unit 40, a first suspension processing unit 50, a first execution processing unit 60, a checking unit 70, a third judging unit 80, a second suspension processing unit 90, and a second execution processing unit 100;
the acquiring unit 10 is configured to acquire a new command issued by a host;
the first judging unit 20 is configured to judge whether the new command is a read-write command;
the updating unit 30 is configured to update the read-write command queue to be processed;
the second judging unit 40 is configured to judge whether there is a correlation between the new command and the read-write command to be processed;
the first pause processing unit 50 is used for pausing hardware, and firmware executes and processes a new command;
the first execution processing unit 60 is configured to execute and process a new command by hardware;
the checking unit 70, configured to check a command synchronization execution bitmap;
the third judging unit 80 is configured to judge whether a new command needs to be executed synchronously;
the second pause processing unit 90 is used for pausing hardware, and firmware executes and processes a new command;
the second execution processing unit 100 is configured to execute and process the new command by the firmware.
Wherein, the device still includes: a configuration unit 110, configured to configure the command synchronization execution bitmap.
Wherein the correlation is based on whether logical address spaces coincide.
The synchronous execution refers to suspending subsequent command acquisition or processing and exclusively processing a new command.
It should be noted that, as can be clearly understood by those skilled in the art, the specific implementation processes of the SSD command dependency management apparatus and each unit may refer to the corresponding descriptions in the foregoing method embodiments, and for convenience and brevity of description, no further description is provided herein.
The SSD command dependency management means may be implemented in the form of a computer program that is executable on a computer device as shown in fig. 6.
Referring to fig. 6, fig. 6 is a schematic block diagram of a computer device according to an embodiment of the present application; the computer device 500 may be a terminal or a server, where the terminal may be an electronic device with a communication function, such as a smart phone, a tablet computer, a notebook computer, a desktop computer, a personal digital assistant, and a wearable device. The server may be an independent server or a server cluster composed of a plurality of servers.
Referring to fig. 6, the computer device 500 includes a processor 502, memory, and a network interface 505 connected by a system bus 501, where the memory may include a non-volatile storage medium 503 and an internal memory 504.
The non-volatile storage medium 503 may store an operating system 5031 and a computer program 5032. The computer programs 5032 include program instructions that, when executed, cause the processor 502 to perform a SSD command dependency management method.
The processor 502 is used to provide computing and control capabilities to support the operation of the overall computer device 500.
The internal memory 504 provides an environment for the execution of the computer program 5032 in the non-volatile storage medium 503, and when the computer program 5032 is executed by the processor 502, the processor 502 may be enabled to execute an SSD command correlation management method.
The network interface 505 is used for network communication with other devices. Those skilled in the art will appreciate that the configuration shown in fig. 6 is a block diagram of only a portion of the configuration associated with the present application and does not constitute a limitation of the computer device 500 to which the present application may be applied, and that a particular computer device 500 may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.
It should be understood that in the embodiment of the present Application, the Processor 502 may be a Central Processing Unit (CPU), and the Processor 502 may also be other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, and the like. Wherein a general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
It will be understood by those skilled in the art that all or part of the flow of the method implementing the above embodiments may be implemented by a computer program instructing associated hardware. The computer program includes program instructions, and the computer program may be stored in a storage medium, which is a computer-readable storage medium. The program instructions are executed by at least one processor in the computer system to implement the flow steps of the embodiments of the method described above.
Accordingly, the present invention also provides a storage medium. The storage medium may be a computer-readable storage medium. The storage medium stores a computer program, wherein the computer program comprises program instructions that, when executed by a processor, may implement the SSD command dependency management method described above.
The storage medium may be a usb disk, a removable hard disk, a Read-Only Memory (ROM), a magnetic disk, or an optical disk, which can store various computer readable storage media.
Those of ordinary skill in the art will appreciate that the elements and algorithm steps of the examples described in connection with the embodiments disclosed herein may be embodied in electronic hardware, computer software, or combinations of both, and that the components and steps of the examples have been described in a functional general in the foregoing description for the purpose of illustrating clearly the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative. For example, the division of each unit is only one logic function division, and there may be another division manner in actual implementation. For example, various elements or components may be combined or may be integrated into another system, or some features may be omitted, or not implemented.
The steps in the method of the embodiment of the invention can be sequentially adjusted, combined and deleted according to actual needs. The units in the device of the embodiment of the invention can be merged, divided and deleted according to actual needs. In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a storage medium. Based on such understanding, the technical solution of the present invention essentially or partially contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a terminal, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention.
The technical contents of the present invention are further illustrated by the examples only for the convenience of the reader, but the embodiments of the present invention are not limited thereto, and any technical extension or re-creation based on the present invention is protected by the present invention. The protection scope of the invention is subject to the claims.

Claims (10)

  1. An SSD command dependency management method, comprising the steps of:
    acquiring a new command issued by a host;
    judging whether the new command is a read-write command or not;
    if the read-write command is the read-write command, updating the read-write command queue to be processed;
    judging whether the new command and the read-write command to be processed have correlation or not;
    if yes, pausing the hardware, and executing and processing a new command by the firmware;
    if not, the hardware executes the new command;
    if the command is not the read-write command, checking the command synchronous execution bitmap;
    judging whether the new command needs to be synchronously executed or not;
    if so, suspending the hardware, and executing and processing a new command by the firmware;
    if not, the firmware executes to process the new command.
  2. 2. The SSD command correlation management method of claim 1, wherein the step of obtaining the new command issued by the host further comprises: the configuration commands synchronously execute the bitmaps.
  3. 3. The SSD command dependency management method of claim 1, wherein the dependency is based on whether logical address spaces coincide.
  4. 4. The SSD command dependency management method of claim 1, wherein the synchronous execution refers to suspending subsequent command acquisition or processing, exclusively processing new commands.
  5. An SSD command dependency management apparatus, comprising: the device comprises an acquisition unit, a first judgment unit, an updating unit, a second judgment unit, a first pause processing unit, a first execution processing unit, a checking unit, a third judgment unit, a second pause processing unit and a second execution processing unit;
    the acquisition unit is used for acquiring a new command issued by the host;
    the first judging unit is used for judging whether the new command is a read-write command;
    the updating unit is used for updating the read-write command queue to be processed;
    the second judging unit is used for judging whether the new command and the read-write command to be processed have correlation or not;
    the first pause processing unit is used for pausing hardware, and the firmware executes and processes a new command;
    the first execution processing unit is used for executing and processing a new command by hardware;
    the checking unit is used for checking a command synchronous execution bitmap;
    the third judging unit is used for judging whether the new command needs to be synchronously executed;
    the second pause processing unit is used for pausing hardware, and the firmware executes and processes a new command;
    and the second execution processing unit is used for executing and processing the new command by the firmware.
  6. 6. The SSD command dependency management apparatus of claim 5, further comprising: and the configuration unit is used for configuring the command synchronization execution bitmap.
  7. 7. The SSD command dependency management apparatus of claim 5, wherein the dependency is based on whether logical address spaces coincide.
  8. 8. The SSD command dependency management apparatus of claim 5, wherein the synchronous execution means suspending subsequent command acquisition or processing, exclusively processing new commands.
  9. 9. A computer device comprising a memory having stored thereon a computer program and a processor that when executed implements the SSD command dependency management method of any of claims 1-4.
  10. 10. A storage medium storing a computer program comprising program instructions which, when executed by a processor, implement the SSD command dependency management method of any of claims 1-4.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114327281A (en) * 2021-12-30 2022-04-12 深圳忆联信息系统有限公司 TCG software and hardware acceleration method and device for SSD, computer equipment and storage medium

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100801014B1 (en) * 2006-08-21 2008-02-04 삼성전자주식회사 A hard disk drive including a disk having a DOOS boot program embedded therein, a computer system including the same, a firmware download method of the hard disk drive, and a recording medium including the same.
CN106796490A (en) * 2014-10-03 2017-05-31 桑迪士克科技有限责任公司 Hardware automation for memory management
US20170177241A1 (en) * 2015-12-21 2017-06-22 Western Digital Technologies, Inc. Automated latency monitoring
CN109375870A (en) * 2018-09-18 2019-02-22 深圳忆联信息系统有限公司 A kind of method and its system for accelerating SSD main control chip D2H to read without mapping
CN109669635A (en) * 2018-12-19 2019-04-23 深圳忆联信息系统有限公司 Order LBA for solid-state storage main control chip is overlapped detection method and device
CN109783012A (en) * 2017-11-15 2019-05-21 忆锐公司 Reservoir and its controller based on flash memory
US20200210098A1 (en) * 2018-12-28 2020-07-02 Micron Technology, Inc. Interruption of program operations at a memory sub-system

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100801014B1 (en) * 2006-08-21 2008-02-04 삼성전자주식회사 A hard disk drive including a disk having a DOOS boot program embedded therein, a computer system including the same, a firmware download method of the hard disk drive, and a recording medium including the same.
CN106796490A (en) * 2014-10-03 2017-05-31 桑迪士克科技有限责任公司 Hardware automation for memory management
US20170177241A1 (en) * 2015-12-21 2017-06-22 Western Digital Technologies, Inc. Automated latency monitoring
CN109783012A (en) * 2017-11-15 2019-05-21 忆锐公司 Reservoir and its controller based on flash memory
CN109375870A (en) * 2018-09-18 2019-02-22 深圳忆联信息系统有限公司 A kind of method and its system for accelerating SSD main control chip D2H to read without mapping
CN109669635A (en) * 2018-12-19 2019-04-23 深圳忆联信息系统有限公司 Order LBA for solid-state storage main control chip is overlapped detection method and device
US20200210098A1 (en) * 2018-12-28 2020-07-02 Micron Technology, Inc. Interruption of program operations at a memory sub-system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114327281A (en) * 2021-12-30 2022-04-12 深圳忆联信息系统有限公司 TCG software and hardware acceleration method and device for SSD, computer equipment and storage medium
CN114327281B (en) * 2021-12-30 2023-12-05 深圳忆联信息系统有限公司 TCG software and hardware acceleration method and device for SSD, computer equipment and storage medium

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