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CN113067475A - Current superposition type DC-DC converter inductive current detection circuit and method - Google Patents

Current superposition type DC-DC converter inductive current detection circuit and method Download PDF

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Publication number
CN113067475A
CN113067475A CN202110526129.6A CN202110526129A CN113067475A CN 113067475 A CN113067475 A CN 113067475A CN 202110526129 A CN202110526129 A CN 202110526129A CN 113067475 A CN113067475 A CN 113067475A
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current
circuit
inductor
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converter
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阴亚东
许亦云
黄怡涛
王纪鹏
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Fuzhou University
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of DC power input into DC power output
    • H02M3/02Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

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  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

本发明提出一种电流叠加型DC‑DC变换器电感电流检测电路及方法,其特征在于,由电感电流采样电路、V‑I转换电路1、斜坡电压产生电路、V‑I转换电路2、电流叠加电路和I‑V转换电路构成;其输入端包括参考时钟输入CLK2、检测端口VTS1和检测端口VTS2,其输出端包括电流检测电路输出端VCS。基于电感并联电容电阻型电流检测技术,与传统技术中采用电压加法器进行电流检测结果与斜波补偿信号合成不同,本专利使用电流叠加电路实现信号合成。本专利电路具有电路结构简单、检测精度高等优点。

Figure 202110526129

The present invention provides a current superposition type DC-DC converter inductor current detection circuit and method, which is characterized in that an inductor current sampling circuit, a V-I conversion circuit 1, a ramp voltage generating circuit, a V-I conversion circuit 2, a current The superposition circuit and the I-V conversion circuit are formed; the input terminal includes the reference clock input CLK2, the detection port V TS1 and the detection port V TS2 , and the output terminal includes the current detection circuit output terminal V CS . Based on the inductance parallel capacitor resistance type current detection technology, the present patent uses a current superposition circuit to realize the signal synthesis, which is different from the voltage adder used in the traditional technology to perform the current detection result and the ramp compensation signal synthesis. The patented circuit has the advantages of simple circuit structure and high detection accuracy.

Figure 202110526129

Description

Current superposition type DC-DC converter inductive current detection circuit and method
Technical Field
The invention belongs to the technical field of detection circuits, and particularly relates to a current superposition type DC-DC converter inductive current detection circuit and method.
Background
The inductive current detection circuit is a key module of a current mode DC-DC converter, and the currently disclosed common inductive current detection technology comprises external series resistance detection and MOS (metal oxide semiconductor) transistor RDSSensing, SENSEFET. The conversion efficiency is reduced due to the fact that the series resistor in the technologies brings extra power loss, and the MOS transistor RDSThe temperature has great influence on the on-resistance of the power tube during detection, so that the detection precision is reduced, the SENSFET matching degree requires high circuit and is difficult to design, and the like.
Disclosure of Invention
In view of the above, in order to make up for the blank and the deficiency of the prior art, the present invention aims to provide a current superposition type DC-DC converter inductive current detection circuit and method, based on the inductive parallel capacitance-resistance type current detection technology, different from the traditional technology in which a voltage adder is used to synthesize the current detection result and the ramp compensation signal, the present invention uses a current superposition circuit to realize signal synthesis. This patent circuit has advantages such as circuit structure is simple, the detection precision is high.
The invention specifically adopts the following technical scheme:
a current superposition type DC-DC converter inductive current detection circuit is characterized in that: the device comprises an inductive current sampling circuit, a V-I conversion circuit 1, a ramp voltage generating circuit, a V-I conversion circuit 2, a current superposition circuit and an I-V conversion circuit;
the input end of the clock comprises a reference clock input CLK2 and a detection port VTS1And a detection port VTS2The output end of the current detection circuit comprises an output end V of the current detection circuitCS
One end of the input side of the inductive current sampling circuit is connected with the SW end of the DC-DC converter, and the other end of the input side of the inductive current sampling circuit is connected with the output end V of the DC-DC converterOUT(ii) a The inductive current sampling circuit consists of two parts of circuits: an inductance DCR sampling circuit and a high-pass filter; the input end of the high-pass filter is connected to the output end V of the inductance DCR sampling circuitSEN1(ii) a The input end of the V-I conversion circuit 1 is connected with the output end V of the inductive current sampling circuitSEN2(ii) a The input end of the ramp voltage generating circuit is connected with a reference clock input CLK 2; the input end of the V-I conversion circuit 2 is connected with a rampOutput end V of voltage generating circuitSLO(ii) a One end of the input side of the current superposition circuit is connected with the output end I of the V-I conversion circuit 1SENAnd the other end is connected with the output end I of the V-I conversion circuit 2SLO(ii) a The input end of the I-V conversion circuit is connected with the output end I of the current superposition circuitTO
Furthermore, the inductance DCR sampling circuit is composed of a resistor R1And a capacitor C1Are connected in series, the high-pass filter being formed by a resistor R2And a capacitor C2And (4) forming.
Further, the DC-DC converter is a negative-voltage direct-current DC-DC converter.
Further, the negative voltage DC-DC converter driving clocks P1, P2 and P3 control the on and off of the switching tubes MP1, MN1 and MN 2; when the switching tubes MP1 and MN1 are turned on, the switching tube MN2 is turned off, and the input voltage V isINCharging the inductor L, and increasing the inductor current; when the switching tubes MP1 and MN1 are turned off, the switching tube MN2 is turned on, the inductor L discharges, and the inductor current decreases;
by detecting the output end voltage V of the inductance DCR sampling circuitSEN1Sensing to obtain the magnitude of the inductive current; the voltage V of the output end of the inductance DCR sampling circuitSEN1Input to a high-pass filter to retain a voltage VSEN1Converts the direct current component into direct current voltage V at the same time of the medium alternating current componentBIS1(ii) a Voltage signal V at the output of the high-pass filterSEN2Input to a V-I conversion circuit 1 to generate a voltage signal VSEN2Proportional inductive sampling current ISEN
Further, the reference clock input CLK2 is a clock signal with the same frequency and phase as the driving clock CLK1 in the negative voltage DC-DC converter, and is input to the ramp voltage generating circuit; the ramp voltage generating circuit generates a ramp voltage signal V with a fixed slopeSLOSlope voltage VSLOInput to the V-I conversion circuit 2; the V-I conversion circuit 2 generates and inputs a voltage signal VSLOProportional ramp current ISLO(ii) a The inductor samples the current ISENAnd a ramp current ISLOTransmitted to a current superposition circuit which is used for collecting the electric inductanceSample current ISENAnd a ramp current ISLOAdding to obtain the sum of the inductive sampling current and the ramp currentTOThe superimposed current ITOThe inductive current sampling voltage signal V subjected to slope compensation is obtained through an I-V conversion circuitCS
Compared with the prior art, the current superposition type inductance DCR detection circuit adopted by the invention and the preferred scheme thereof can detect the inductance current signal and perform slope compensation on the inductance current sampling signal; the current superposition type inductance DCR detection circuit can be directly applied to but not limited to a negative voltage DC-DC converter; the current superposition type inductance DCR detection circuit is simple in structure, and compared with a traditional inductance DCR detection circuit in a mode that voltage signals at two ends of a capacitor are amplified through an operational amplifier, the structure adopted by the detection circuit has a wider input voltage range; in the traditional inductance DCR detection circuit, a broadband operational amplifier circuit is needed in a mode of adding the inductance current sampling voltage and the slope voltage by using a voltage adder; the slope compensation of the current superposition type inductance DCR detection circuit adopts a current form to add, so that the transient response speed is ensured, and the circuit has the advantages of simplicity and low power consumption.
Drawings
The invention is described in further detail below with reference to the following figures and detailed description:
fig. 1 is a schematic diagram of a current superposition type DC-DC converter inductive current detection circuit structure (combined with a negative-voltage DC-DC converter) according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an Inverting Buck DC-DC converter circuit structure using a current superposition type DC-DC converter inductive current detection circuit structure according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of output waveforms of main nodes of an Inverting Buck DC-DC converter circuit according to an embodiment of the present invention.
Detailed Description
In order to make the features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail as follows:
as shown in fig. 1, the current superposition type DC-DC converter inductive current detection circuit provided in this embodiment is composed of an inductive current sampling circuit, a V-I conversion circuit 1, a ramp voltage generation circuit, a V-I conversion circuit 2, a current superposition circuit, and an I-V conversion circuit.
The input end of the circuit comprises a reference clock input CLK2 and a detection port VTS1Detection port VTS2The output end of the current detection circuit comprises an output end V of the current detection circuitCS
One end of the input side of the inductive current sampling circuit is connected with the SW end of the negative voltage DC-DC converter, and the other end is connected with the output end V of the negative voltage DC-DC converterOUT(ii) a The inductive current sampling circuit consists of two parts of circuits: inductance DCR sampling circuit and high pass filter, inductance DCR sampling circuit is by resistance R1And a capacitor C1Are connected in series, the high-pass filter being formed by a resistor R2And a capacitor C2And (4) forming. The input end of the high-pass filter is connected to the output end V of the inductor DCR samplingSEN1(ii) a The input end of the V-I conversion circuit 1 is connected with the output end V of the inductive current sampling circuitSEN2(ii) a The input end of the ramp voltage generating circuit is connected with the reference clock input CLK 2; the input end of the V-I conversion circuit 2 is connected with the output end V of the ramp voltage generating circuitSLO(ii) a One end of the input side of the current superposition circuit is connected with the output end I of the V-I conversion circuit 1SENAnd the other end is connected with the output end I of the V-I conversion circuit 2SLO(ii) a The input end of the I-V conversion circuit is connected with the output end I of the current superposition circuitTO
The operation principle of the circuit of the present embodiment will be described below with reference to a negative voltage DC-DC converter, but the present patent is not limited to the DC-DC converter of this type. As shown in fig. 1, the DC-DC converter driving clocks P1, P2, and P3 control the on and off of the switching tubes MP1, MN1, and MN 2. When MP1 and MN1 are turned on, MN2 is turned off, and the input voltage V isINCharging the inductor L, and increasing the inductor current; when MP1 and MN1 are turned off, MN2 is turned on, inductor L discharges, and inductor current decreases. One side of the input end of the inductance DCR sampling circuit is connected with the SW end of the negative voltage DC-DC converter, and the other end of the input end of the inductance DCR sampling circuit is connected with the output V of the negative voltage DC-DC converterOUTAnd (4) detecting the inductive current. By detecting the output end voltage V of the inductance DCR sampling circuitSEN1The magnitude of the inductive current can be sensed correspondingly.Voltage V of output end of inductance DCR sampling circuitSEN1Input to a high-pass filter to retain a voltage VSEN1Converts the direct current component into direct current voltage V at the same time of the medium alternating current componentBIS1. Voltage signal V at the output of a high-pass filterSEN2Input to a V-I conversion circuit 1 to generate a voltage signal VSEN2Proportional inductive sampling current ISEN
The reference clock CLK2 is a clock signal with the same frequency and phase as the driving clock CLK1 in the DC-DC converter, and is input to the ramp voltage generating circuit, which generates a ramp voltage signal V with a fixed slopeSLO. Ramp voltage VSLOInput to the V-I conversion circuit 2; V-I conversion circuit 2 generates and inputs voltage signal VSLOProportional ramp current ISLO. Inductor sampling current ISENAnd a ramp current ISLOTransmitted to a current superposition circuit which samples the current I of the inductorSENAnd a ramp current ISLOAdding to obtain the sum of the inductive sampling current and the ramp currentTOSuperimposed on the current ITOThe inductive current sampling voltage signal V subjected to slope compensation is finally obtained through an I-V conversion circuitCS
As another specific application case, FIG. 2 shows a circuit structure of an Inverting Buck DC-DC converter adopting the structure of the embodiment, wherein one end of the current sampling and slope compensation input side is connected to the SW end of the converter, and the other end is connected to the V end of the converterOUTTerminal, while taking a reference clock input CLK2 from the oscillator, output terminal VCSConnected to the input of the PWM comparator. Inductor current I during normal operation of converterLInductor sampling current ISENRamp current ISLOSuperposed current ITOSlope compensated inductive current detection signal VCSOutput voltage V of PWM comparatorCPIs shown in fig. 3, the output terminal V of the PWM comparatorCPAnd the output terminal CLK1 of the oscillator is input to the SR latch, the output signal V of whichDRThe power switch tube is controlled to be switched on and off through the driving circuit.
The present invention is not limited to the above-mentioned preferred embodiments, and any other various types of current superposition type DC-DC converter inductive current detection circuits and methods can be obtained according to the teaching of the present invention.

Claims (5)

1.一种电流叠加型DC-DC变换器电感电流检测电路,其特征在于:由电感电流采样电路、V-I转换电路1、斜坡电压产生电路、V-I转换电路2、电流叠加电路和I-V转换电路构成;1. A current superposition type DC-DC converter inductor current detection circuit is characterized in that: it is composed of an inductor current sampling circuit, a V-I conversion circuit 1, a ramp voltage generating circuit, a V-I conversion circuit 2, a current superposition circuit and an I-V conversion circuit ; 其输入端包括参考时钟输入CLK2、检测端口VTS1和检测端口VTS2,其输出端包括电流检测电路输出端VCSIts input end includes a reference clock input CLK2, a detection port V TS1 and a detection port V TS2 , and its output end includes a current detection circuit output end V CS ; 所述电感电流采样电路输入侧一端连接DC-DC变换器的SW端,另一端连接DC-DC变换器的输出端VOUT;所述电感电流采样电路由两部分电路组成:电感DCR采样电路和高通滤波器;所述高通滤波器的输入端连接至电感DCR采样电路的输出端VSEN1;所述V-I转换电路1的输入端连接电感电流采样电路的输出端VSEN2;所述斜坡电压产生电路的输入端连接参考时钟输入CLK2;所述V-I转换电路2的输入端连接斜坡电压产生电路的输出端VSLO;所述电流叠加电路输入侧一端连接V-I转换电路1的输出端ISEN,另一端连接V-I转换电路2的输出端ISLO;所述I-V转换电路的输入端接电流叠加电路的输出端ITOOne end of the input side of the inductance current sampling circuit is connected to the SW end of the DC-DC converter, and the other end is connected to the output end VOUT of the DC-DC converter; the inductance current sampling circuit is composed of two parts: the inductance DCR sampling circuit and the high-pass filter; the input end of the high-pass filter is connected to the output end V SEN1 of the inductance DCR sampling circuit; the input end of the VI conversion circuit 1 is connected to the output end V SEN2 of the inductance current sampling circuit; the ramp voltage generating circuit The input end of the VI conversion circuit 2 is connected to the reference clock input CLK2; the input end of the VI conversion circuit 2 is connected to the output end V SLO of the ramp voltage generating circuit; one end of the input side of the current superposition circuit is connected to the output end ISEN of the VI conversion circuit 1, and the other end The output terminal I SLO of the VI conversion circuit 2 is connected; the input terminal of the IV conversion circuit is connected to the output terminal I TO of the current superposition circuit. 2.根据权利要求1所述的电流叠加型DC-DC变换器电感电流检测电路,其特征在于:所述电感DCR采样电路由电阻R1和电容C1串联组成,所述高通滤波器由电阻R2和电容C2组成。2. The current superposition type DC-DC converter inductor current detection circuit according to claim 1, wherein the inductor DCR sampling circuit is composed of a resistor R 1 and a capacitor C 1 in series, and the high-pass filter is composed of a resistor R 1 and a capacitor C 1 in series. R 2 and capacitor C 2 make up. 3.根据权利要求2所述的电流叠加型DC-DC变换器电感电流检测电路,其特征在于:所述DC-DC变换器为负压直流DC-DC变换器。3 . The inductor current detection circuit of a current superposition type DC-DC converter according to claim 2 , wherein the DC-DC converter is a negative-voltage DC-DC converter. 4 . 4.根据权利要求3所述的电流叠加型DC-DC变换器电感电流检测电路的检测方法,其特征在于:所述负压直流DC-DC变换器驱动时钟P1、P2和P3控制开关管MP1、MN1和MN2的导通和关断;当开关管MP1、MN1导通,开关管MN2关断,输入电压VIN对电感L充电,电感电流上升;当开关管MP1、MN1关断,开关管MN2导通,电感L放电,电感电流下降;4. The detection method of the current superposition type DC-DC converter inductance current detection circuit according to claim 3, wherein the negative voltage DC-DC converter drive clocks P1, P2 and P3 control the switch tube MP1 , MN1 and MN2 are turned on and off; when the switch tubes MP1 and MN1 are turned on, the switch tube MN2 is turned off, the input voltage V IN charges the inductor L, and the inductor current rises; when the switch tubes MP1 and MN1 are turned off, the switch tube MN2 is turned on, the inductor L is discharged, and the inductor current decreases; 通过检测所述电感DCR采样电路的输出端电压VSEN1感知得到电感电流大小;所述电感DCR采样电路输出端的电压VSEN1输入至高通滤波器,保留电压VSEN1中交流分量的同时将其直流分量转变为直流电压VBIS1;所述高通滤波器的输出端的电压信号VSEN2输入至V-I转换电路1,产生与电压信号VSEN2成比例的电感采样电流ISENThe inductor current is sensed by detecting the output terminal voltage V SEN1 of the inductive DCR sampling circuit; the voltage V SEN1 at the output terminal of the inductive DCR sampling circuit is input to the high-pass filter, and the DC component of the voltage V SEN1 is retained while its DC component is retained. Converted to a DC voltage V BIS1 ; the voltage signal V SEN2 at the output of the high-pass filter is input to the VI conversion circuit 1 to generate an inductor sampling current ISEN proportional to the voltage signal V SEN2 . 5.根据权利要求4所述的电流叠加型DC-DC变换器电感电流检测电路的检测方法,其特征在于:所述参考时钟输入CLK2为与负压直流DC-DC变换器中驱动时钟CLK1同频同相的时钟信号,输入至斜坡电压产生电路;所述斜坡电压产生电路产生一个固定斜率的斜坡电压信号VSLO,斜坡电压VSLO输入至V-I转换电路2;所述V-I转换电路2产生和输入电压信号VSLO成比例的斜坡电流ISLO;所述电感采样电流ISEN和斜坡电流ISLO传输至电流叠加电路,电流叠加电路对电感采样电流ISEN和斜坡电流ISLO进行相加,得到电感采样电流与斜坡电流之和叠加电流ITO,所述叠加电流ITO经过I-V转化电路,得到经过斜坡补偿的电感电流采样电压信号VCS5. The detection method of the current superposition type DC-DC converter inductor current detection circuit according to claim 4, wherein the reference clock input CLK2 is the same as the driving clock CLK1 in the negative voltage DC-DC converter. The same-phase clock signal is input to the ramp voltage generating circuit; the ramp voltage generating circuit generates a ramp voltage signal V SLO with a fixed slope, and the ramp voltage V SLO is input to the VI conversion circuit 2 ; the VI conversion circuit 2 generates and inputs The ramp current ISLO proportional to the voltage signal V SLO ; the inductor sampling current ISEN and the ramp current ISLO are transmitted to the current superposition circuit, and the current superposition circuit adds the inductor sampling current ISEN and the ramp current ISLO to obtain the inductor The sum of the sampling current and the ramp current superimposes the current I TO , and the superimposed current I TO passes through the IV conversion circuit to obtain a slope-compensated inductor current sampling voltage signal V CS .
CN202110526129.6A 2021-05-14 2021-05-14 Current superposition type DC-DC converter inductive current detection circuit and method Pending CN113067475A (en)

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Application publication date: 20210702