CN113109972B - Array substrate, display panel and display device - Google Patents
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- CN113109972B CN113109972B CN202110455421.3A CN202110455421A CN113109972B CN 113109972 B CN113109972 B CN 113109972B CN 202110455421 A CN202110455421 A CN 202110455421A CN 113109972 B CN113109972 B CN 113109972B
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- G—PHYSICS
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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Abstract
本申请提供一种阵列基板、显示面板及显示装置。所述阵列基板包括衬底、位于衬底上的电极层、位于电极层上的绝缘层及位于绝缘层上的公共电极层。电极层包括多个像素电极、多个数据线及多个辅助信号线，辅助信号线连接稳定的电信号。相邻两个像素电极之间设置有一个数据线或一个辅助信号线。同一像素电极的相对两侧中，其中一侧设有数据线，另一侧设有辅助信号线。像素电极与相邻的数据线之间的距离大于像素电极与相邻的辅助信号线之间的距离。公共电极层包括多个间隔设置的条状电极，每一像素电极上对应设置有两个或两个以上条状电极；条状电极在衬底上的正投影落在对应的像素电极在衬底上的正投影内。
The present application provides an array substrate, a display panel and a display device. The array substrate includes a substrate, an electrode layer located on the substrate, an insulating layer located on the electrode layer and a common electrode layer located on the insulating layer. The electrode layer includes a plurality of pixel electrodes, a plurality of data lines and a plurality of auxiliary signal lines, and the auxiliary signal lines are connected to stable electrical signals. A data line or an auxiliary signal line is arranged between two adjacent pixel electrodes. On the opposite sides of the same pixel electrode, one side is provided with a data line and the other side is provided with an auxiliary signal line. The distance between the pixel electrode and the adjacent data line is greater than the distance between the pixel electrode and the adjacent auxiliary signal line. The common electrode layer includes a plurality of strip electrodes arranged at intervals, and two or more strip electrodes are correspondingly arranged on each pixel electrode; the orthographic projection of the strip electrode on the substrate falls within the orthographic projection of the corresponding pixel electrode on the substrate.
Description
Technical Field
The application relates to the technical field of display, in particular to an array substrate, a display panel and a display device.
Background
ADS (Advanced Super Dimensional Switching) high-grade super-dimensional field switch) liquid crystal display panel has the advantages of wide visual angle, small color deviation and the like, and is a mainstream display panel at present.
The existing ADS type liquid crystal display panel has high probability of screen flicker, and influences the use experience of users.
Disclosure of Invention
The first aspect of the embodiment of the application provides an array substrate. The array substrate includes:
A substrate;
the electrode layer comprises a plurality of pixel electrodes, a plurality of data lines and a plurality of auxiliary signal lines, wherein the auxiliary signal lines are connected with stable electric signals, one data line or one auxiliary signal line is arranged between two adjacent pixel electrodes, one data line is arranged on one of two opposite sides of the same pixel electrode, the other auxiliary signal line is arranged on the other side of the same pixel electrode, and the distance between the pixel electrode and the adjacent data line is larger than the distance between the pixel electrode and the adjacent auxiliary signal line;
An insulating layer on the electrode layer;
The pixel electrode comprises an insulating layer, a common electrode layer positioned on the insulating layer, a pixel electrode and a display device, wherein the common electrode layer comprises a plurality of strip electrodes which are arranged at intervals, two or more strip electrodes are correspondingly arranged on each pixel electrode, and the orthographic projection of the strip electrodes on the substrate falls into the orthographic projection of the corresponding pixel electrodes on the substrate.
In one embodiment, the common electrode layer further includes a plurality of shielding electrodes, one shielding electrode is correspondingly disposed above each of the data lines, and one shielding electrode is correspondingly disposed above each of the auxiliary signal lines; the edge of the orthographic projection of the auxiliary signal line on the substrate is positioned at the inner side of the orthographic projection edge of the shielding electrode corresponding to the auxiliary signal line on the substrate;
The distance between the edge of the orthographic projection of the data line on the substrate and the same side edge of the orthographic projection of the shielding electrode corresponding to the data line on the substrate is a first distance, the distance between the edge of the orthographic projection of the auxiliary signal line on the substrate and the same side edge of the orthographic projection of the shielding electrode corresponding to the auxiliary signal line on the substrate is a second distance, and the first distance is larger than the second distance.
In one embodiment, the first distance is greater than or equal to 3.0 μm.
In one embodiment, the auxiliary signal line is electrically connected to the common electrode layer.
In one embodiment, the distance between the pixel electrode and the adjacent data line is in the range of 4.5 μm to 5 μm.
In one embodiment, the distance between the edge of the orthographic projection of the pixel electrode on the substrate and the edge of the orthographic projection of the strip electrode, which is correspondingly arranged above the edge and is close to the edge, on the same side of the substrate is more than or equal to 2.9 mu m.
In one embodiment, the ratio of the width of the stripe electrode to the distance between two adjacent stripe electrodes above the same pixel electrode ranges from 50% to 60%.
In one embodiment, the width of each of the stripe-shaped electrodes disposed over the same pixel electrode is the same.
In one embodiment, the data line has a width greater than a width of the auxiliary signal line, the width of the data line being equal to a process minimum size.
In one embodiment, each of the data lines extends along a first direction, and a plurality of the data lines are arranged along a second direction; the array substrate further comprises a plurality of scanning lines extending along a second direction and pixel circuits corresponding to the pixel electrodes, wherein the scanning lines are arranged along the first direction;
Pixel circuits corresponding to pixel electrodes positioned at two sides of the data line and adjacent to the data line are connected to the data line;
And a row of pixel electrodes arranged along the second direction corresponds to the two scanning lines, and in the row of pixel electrodes arranged along the second direction, the odd-numbered pixel electrodes are connected to the same scanning line, and the even-numbered pixel electrodes are connected to the same scanning line.
The second aspect of the embodiment of the application provides a display panel, which comprises the array substrate, a counter substrate positioned on the array substrate and a liquid crystal layer positioned between the array substrate and the array substrate.
A third aspect of the embodiments of the present application provides a display device including the above display panel.
The embodiment of the application achieves the main technical effects that:
According to the array substrate, the display panel and the display device provided by the embodiment of the application, the auxiliary signal lines are connected with stable electric signals, so that the auxiliary signal lines have no pulling effect on the adjacent pixel electrodes, the distance between the auxiliary signal lines and the adjacent pixel electrodes can be set smaller, the size of the pixel electrodes in the extending direction perpendicular to the data lines can be set larger, two or more strip-shaped electrodes can be arranged above the pixel electrodes, the capacitance between the pixel electrodes and the corresponding strip-shaped electrodes is improved, the voltage drop of the array substrate is reduced, the risk of screen flicker of the display panel where the array substrate is located is reduced, the electric field between the pixel electrodes and the corresponding strip-shaped electrodes is increased, the transmittance of the display panel where the array substrate is located is also improved, the distance between the pixel electrodes and the adjacent data lines is larger, the parasitic capacitance between the pixel electrodes and the adjacent data lines is smaller, the signal crosstalk received by the pixel electrodes is smaller, and the display effect of the display panel can be ensured.
Drawings
Fig. 1 is a partial cross-sectional view of an array substrate according to an exemplary embodiment of the present application;
fig. 2 is a schematic view of a partial structure of an array substrate according to an exemplary embodiment of the present application;
Fig. 3 is a schematic view showing a partial structure of an array substrate according to an exemplary embodiment of the present application;
Fig. 4 is a partial cross-sectional view of a display panel according to an exemplary embodiment of the present application.
Detailed Description
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with aspects of the application as detailed in the accompanying claims.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this specification and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any or all possible combinations of one or more of the associated listed items.
It should be understood that although the terms first, second, third, etc. may be used herein to describe various information, these information should not be limited by these terms. These terms are only used to distinguish one type of information from another. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope of the application. The term "if" as used herein may be interpreted as "at..once" or "when..once" or "in response to a determination", depending on the context.
The embodiment of the application provides an array substrate, a display panel and a display device. The array substrate, the display panel and the display device according to the embodiments of the present application are described in detail below with reference to the accompanying drawings. The features of the embodiments described below can be supplemented or combined with one another without conflict.
The embodiment of the application provides an array substrate. Referring to fig. 1 to 3, the array substrate 100 includes a substrate 10, an electrode layer on the substrate 10, an insulating layer 20 on the electrode layer, and a common electrode layer 30 on the insulating layer 20.
The electrode layer includes a plurality of pixel electrodes 40, a plurality of data lines 50, and a plurality of auxiliary signal lines 60, and the auxiliary signal lines 60 are connected to stable electrical signals. One of the data lines 50 or one of the auxiliary signal lines 60 is disposed between two adjacent pixel electrodes 40. In the opposite sides of the same pixel electrode 40, one side is provided with the data line 50, and the other side is provided with the auxiliary signal line 60. A distance d1 between the pixel electrode 40 and the adjacent data line 50 is greater than a distance d2 between the pixel electrode 40 and the adjacent auxiliary signal line 60.
The common electrode layer 30 includes a plurality of stripe electrodes 31 disposed at intervals, two or more stripe electrodes 31 are disposed above each pixel electrode 40, and the orthographic projection of the stripe electrode 31 on the substrate 10 falls within the orthographic projection of the corresponding pixel electrode 40 on the substrate 10. In the embodiment shown in fig. 1, two stripe-shaped electrodes 31 are disposed above each pixel electrode 40. In other embodiments, three or more stripe electrodes 31 may be disposed above the pixel electrode correspondingly.
The material of the pixel electrode 40 and the material of the common electrode layer 30 are transparent conductive materials, such as indium tin oxide or indium zinc oxide. The material of the insulating layer 20 is a material having high light transmittance. According to the array substrate provided by the embodiment of the application, the auxiliary signal line 60 is connected with a stable electric signal, so that the auxiliary signal line 60 has no pulling effect on the adjacent pixel electrode 40, the distance between the auxiliary signal line 60 and the adjacent pixel electrode can be set smaller, and the size of the pixel electrode in the extending direction perpendicular to the data line can be set larger, so that two or more strip-shaped electrodes can be arranged above the pixel electrode, the capacitance between the pixel electrode and the corresponding strip-shaped electrode is improved, the voltage drop of the array substrate is reduced, the risk of screen flicker of the display panel where the array substrate is positioned is reduced, the electric field between the pixel electrode and the corresponding strip-shaped electrode is increased, the transmittance of the display panel where the array substrate is positioned is also improved, the parasitic capacitance between the pixel electrode and the adjacent data line is smaller, the signal crosstalk received by the pixel electrode is smaller, and the display effect of the display panel can be ensured.
In one embodiment, the array substrate further includes pixel circuits on the substrate 10, where the pixel circuits may correspond to the pixel electrodes 40 one by one. The pixel circuits are electrically connected to the corresponding pixel electrodes.
The pixel circuit comprises a gate electrode, a gate insulating layer positioned on the gate electrode, a source electrode and a drain electrode positioned on the gate insulating layer, and an active layer positioned on the source electrode and the drain electrode, wherein the source electrode and the drain electrode are respectively overlapped with the active layer. The source electrode, the drain electrode, the data line, and the auxiliary signal line may be formed in one patterning process. The insulating layer covers the source electrode, the drain electrode, the active layer, the data line, the auxiliary signal line, and the pixel electrode.
In the embodiment shown in fig. 1, two stripe electrodes 31 are disposed above the same pixel electrode 40. Through experiments, compared with a display panel with one strip electrode 31 arranged above the same pixel electrode 40, when two strip electrodes 31 are arranged above the same pixel electrode 40, the light transmittance of the display panel can be improved by about 5%. In this way, more stripe electrodes are correspondingly disposed above the pixel electrode 40, so as to effectively improve the light transmittance of the display panel.
In one embodiment, the common electrode layer 30 further includes a plurality of shielding electrodes 32, one shielding electrode 32 is disposed above each of the data lines 50, and one shielding electrode 32 is disposed above each of the auxiliary signal lines 60. The edge of the orthographic projection of the data line 50 on the substrate 10 is positioned inside the orthographic projection edge of the shielding electrode 32 correspondingly arranged above the data line 50 on the substrate 10, and the edge of the orthographic projection of the auxiliary signal line 60 on the substrate 10 is positioned inside the orthographic projection edge of the shielding electrode 32 correspondingly arranged above the auxiliary signal line 60 on the substrate 10. Thus, the shielding electrode 32 can shield the interference signals generated by the data line 50 and the auxiliary signal line 60, which is beneficial to improving the display effect of the display panel where the array substrate is located.
In one embodiment, the front projection of each shielding electrode 32 onto the substrate 10 does not overlap with the front projection of each pixel electrode 40 onto the substrate 10. In this way, the shielding electrode 32 can be prevented from generating signal crosstalk to the pixel electrode 40.
In one embodiment, referring to fig. 2, each of the data lines 50 extends along a first direction, a plurality of the data lines 50 are arranged along a second direction, each of the auxiliary signal lines 60 extends along the first direction, a plurality of the auxiliary signal lines 60 are arranged along the second direction, and each of the stripe-shaped electrodes 31 and each of the shielding electrodes may extend along the first direction.
In one embodiment, the pixel electrode 40 is an anode and the common electrode layer 30 is a cathode. The common electrode layer 30 may further include a connection portion through which each of the stripe-shaped electrodes 31 and each of the shielding electrodes 32 are electrically connected together.
In one embodiment, referring again to FIG. 1, the distance d1 between the pixel electrode 40 and the adjacent data line 50 satisfies the condition that 4.5 μm≤d1≤5μm. By the arrangement, the problems that the parasitic capacitance between the pixel electrode 40 and the adjacent data line 50 is larger, the brightness difference between the sub-pixel where the pixel electrode 40 is positioned and the adjacent sub-pixel is larger, and the local brightness of the display panel is uneven due to the fact that the distance between the pixel electrode 40 and the adjacent data line 50 is too small can be avoided, and the pixel density of the display panel is not improved due to the fact that the distance between the pixel electrode 40 and the adjacent data line 50 is too large can be avoided. In some embodiments, the distance d1 between the pixel electrode 40 and the adjacent data line 50 may be 4.5 μm, 4.6 μm, 4.7 μm, 4.8 μm, 4.9 μm, 5 μm, etc.
In one embodiment, the distance d3 between the edge of the front projection of the pixel electrode 40 on the substrate 10 and the edge of the front projection of the strip electrode 31, which is arranged above the edge and is close to the edge, on the same side of the substrate 10 is equal to or greater than 2.9 μm. By this arrangement, the problem of uneven local brightness of the display panel where the array substrate is located due to the influence of the adjacent wires or electrodes on the electric field between the pixel electrode 40 and the corresponding strip electrode 31, which affects the deflection angle of the liquid crystal molecules and further affects the light transmittance of the sub-pixel where the pixel electrode is located, can be avoided.
Due to process limitations, the distance d2 between the pixel electrode 40 and the adjacent auxiliary signal line 60 is greater than or equal to 3.5 μm, and the distance d4 between the adjacent two strip electrodes is greater than or equal to 3.4 μm in the strip electrodes correspondingly arranged on the same pixel electrode, the widths of the auxiliary signal line 60 and the data line 50 are both greater than or equal to 2.8 μm, and the width of the strip electrode 31 is greater than 2.3 μm.
In the embodiment of the present application, the connection of the auxiliary signal line 60 to the stable electrical signal means that the electrical signal connected to the auxiliary signal line 60 is stable and unchanged during a frame of display. As described above, no parasitic capacitance exists between the auxiliary signal line 60 and the adjacent pixel electrode 40, and no signal crosstalk is caused to the pixel electrode.
In one embodiment, the auxiliary signal line 60 is electrically connected to the common electrode layer 30. During a frame of display, the voltage signal received by the common electrode layer 30 is a stable electrical signal, and the auxiliary signal line 60 is electrically connected to the common electrode layer 30, so that the stability of the electrical signal connected to the auxiliary signal line 60 can be ensured. The auxiliary signal lines 60 may be electrically connected to the common electrode layer 30 through vias provided on the insulating layer 20 at an edge region of the array substrate. In other embodiments, the auxiliary signal line 60 may be grounded.
In one embodiment, the width of the data line 50 is greater than the width of the auxiliary signal line 60, and the width of the data line 50 is equal to the process minimum size. The process minimum size refers to the minimum width of the data line 50 while ensuring that the formed data line 50 is continuously not disconnected. The width of the auxiliary signal line 60 may be a process limit size, which refers to a minimum size that can be achieved by a process, but cannot be ensured that the auxiliary signal line 60 is continuously not disconnected. The width of the auxiliary signal line 60 is small or the disconnection of the auxiliary signal line 60 has substantially no influence on the electric field between the stripe electrode 31 and the pixel electrode 40, and thus the width of the auxiliary signal line 60 may be set to be smaller than the minimum process size. By setting the width of the data line 50 to be larger than the width of the auxiliary signal line 60, the width of the data line 50 is equal to the minimum process dimension, so that the dimension of the pixel electrode 40 in the second direction is set to be maximum on the premise of ensuring that the data line 50 is uninterrupted and the display panel is not affected, which is beneficial to setting more strip-shaped electrodes 31 on the pixel electrode 40.
In some embodiments, the process minimum dimension is 2.8 μm and the process limit dimension is 2.6 μm.
In one embodiment, the ratio of the width of the stripe electrode 31 to the distance d5 between two adjacent stripe electrodes 31 above the same pixel electrode 40 is 50% -60%. By performing simulation, when the ratio of the width of the stripe electrode 31 to the distance d4 between two adjacent stripe electrodes 31 above the same pixel electrode 40 is within the numerical range, the light transmittance of the display panel where the array substrate is located is larger.
In one embodiment, a distance between an edge of the orthographic projection of the data line 50 on the substrate 10 and an edge of the shielding electrode 32 corresponding to the data line 50 on the same side of the orthographic projection of the substrate 10 is a first distance d5, and a distance between an edge of the orthographic projection of the auxiliary signal line 60 on the substrate 10 and an edge of the orthographic projection of the shielding electrode 32 corresponding to the auxiliary signal line 60 on the same side of the substrate 10 is a second distance d6, wherein the first distance d5 is greater than the second distance d6. Since the auxiliary signal line 60 is connected with a stable electric signal, the auxiliary signal line 60 does not pull the adjacent electrode or wire, and the second distance can be set smaller, so that the size of the pixel electrode 40 in the second direction is set larger, more strip-shaped electrodes 31 are more beneficial to being arranged on the pixel electrode 40, and the shielding effect of the shielding electrode 32 on the data line 50 is better when the first distance is set larger, and parasitic capacitance between the data line 50 and the adjacent pixel electrode 40 is avoided.
In one embodiment, the first distance d5 is greater than or equal to 3.0 μm. By the arrangement, the shielding effect of the shielding electrode 32 on the data line 50 can be ensured to be good, parasitic capacitance formed between the data line 50 and the adjacent pixel electrode 40 is avoided, and signal crosstalk of the sub-pixel is reduced.
In one embodiment, the second distance d6 is greater than or equal to 2.5 μm.
In one embodiment, two or more stripe electrodes 31 disposed correspondingly above the same pixel electrode 40 have the same width. When the process errors are the same in the preparation of the strip-shaped electrodes 31, the error ranges of the prepared strip-shaped electrodes 31 are the same, the fluctuation degree of the electric field between each strip-shaped electrode 31 and the corresponding pixel electrode 40 above the same pixel electrode 40 is close, the light effect reduction degree is consistent, and the display effect of the display panel is improved.
In one embodiment, the width of each stripe electrode disposed above each pixel electrode 40 is the same. Thus, the electric field fluctuation degree of each strip electrode 31 is close to that of the corresponding pixel electrode, the light effect is uniform, and the display effect of the display panel is improved.
Under the conditions that d1 is more than or equal to 4.5 mu m, d2 is more than or equal to 2.9 mu m, d3 is more than or equal to 3.5 mu m, d4 is more than or equal to 3.4 mu m, the widths of the auxiliary signal line 60 and the data line 50 are more than or equal to 2.8 mu m, and the width of the strip electrode 31 is more than 2.3 mu m, when the pixel density of the display panel where the array substrate is positioned reaches more than 330, the size of the pixel electrode 40 in the second direction is less than or equal to 25.6 mu m, only one strip electrode 31 can be correspondingly arranged above each pixel electrode 40, the capacitance between the pixel electrode 40 and the strip electrode 31 is too small, the voltage drop of the array substrate is large, the risk of screen flicker of the display panel where the array substrate is positioned is large, and meanwhile, the light transmittance of the display panel where the array substrate is positioned is low.
According to the array substrate provided by the embodiment of the application, the distance d1 between the pixel electrode 40 and the adjacent data line 50 is larger than the distance d2 between the pixel electrode 40 and the adjacent auxiliary signal line 60, and the first distance d5 is larger than the second distance d6, so that two or more strip-shaped electrodes are arranged above the pixel electrode, and the display effect of the display panel is improved.
In one embodiment, the distance d1, the distance d2, the distance d3, the distance d4, the first distance d5, and the second distance d6 are positively correlated with the size of the pixel electrode in the extending direction perpendicular to the data line. The size of the pixel electrode in the extending direction perpendicular to the data line increases, and the distance d1, the distance d2, the distance d3, the distance d4, the first distance d5, and the second distance d5 increase. In one embodiment, the array substrate 100 further includes a plurality of scan lines extending along the second direction, and the plurality of scan lines are arranged along the first direction. The plurality of pixel electrodes 40 of the electrode layer are arranged in an array along the first direction and the second direction.
Pixel circuits corresponding to the pixel electrodes 40 located at both sides of the data line 50 and adjacent to the data line are connected to the data line 50. The plurality of pixel electrodes 40 arranged in the same row along the second direction correspond to two of the scan lines, and among the plurality of pixel electrodes arranged in the same row along the second direction, the odd-numbered pixel electrodes 40 are connected to the same scan line, and the even-numbered pixel electrodes 40 are connected to the same scan line.
Referring to fig. 2 and 3, each scan line 70 of the array substrate 100 extends along the second direction, and a plurality of scan lines 70 are arranged along the first direction. A row of pixel electrodes 40 arranged along the second direction corresponds to two of the scan lines 70, and the two scan lines 70 are located on opposite sides of the row of pixel electrodes. The pixel electrode 40 is divided into a plurality of first pixel electrode groups 101, 102 arranged in a first direction, and the plurality of pixel electrodes 40 of each first pixel electrode group 101 are arranged in a second direction. The pixel electrode 40 is also divided into a plurality of second pixel electrode groups 201, 202, 203, 204 arranged in the second direction, and the plurality of pixel electrodes 40 of each second pixel electrode group 102 are arranged in the first direction.
The first pixel electrode group 101 corresponds to the two scanning lines 71, 72. The pixel circuits 80 corresponding to the odd-numbered pixel electrodes 40 are connected to the scan lines 71, and the pixel circuits 80 corresponding to the even-numbered pixel electrodes 40 are connected to the scan lines 72. The pixel circuits 80 of the second pixel electrode group 201 corresponding to the pixel electrodes 40 of the second pixel electrode group 202 are connected to the data line 51, and the pixel circuits 80 of the second pixel electrode group 203 corresponding to the pixel electrodes of the second pixel electrode group 204 are connected to the data line 52. It should be noted that, in fig. 2, the pixel circuit only shows one thin film transistor, and in practice, the pixel circuit may include two or more thin film transistors, and the pixel circuit may further include a capacitor.
When a scanning signal is supplied to the scanning line 72 and a data signal is supplied to the data line 51, the sub-pixel where the pixel electrode 401 is located emits light, and the other sub-pixels do not emit light, and when a scanning signal is supplied to the scanning line 71 and a data signal is supplied to the data line 51, the sub-pixel where the pixel electrode 402 is located emits light, and the other sub-pixels do not emit light.
It can be known that, although the number of the data lines in the array substrate provided by the embodiment of the application is half of the number of the second pixel electrode groups, each first pixel electrode group corresponds to two scanning lines, and each pixel can be controlled independently without affecting the display effect of the display panel.
In one embodiment, the first direction is a column direction and the second direction is a row direction. In other embodiments, the first direction may be a column direction and the second direction a row direction.
The embodiment of the application also provides a display panel. The display panel comprises the array substrate of any one of the embodiments and a liquid crystal layer positioned on the array substrate.
The display panel further includes a counter substrate, and the liquid crystal layer is positioned between the array substrate and the counter substrate.
Referring to fig. 4, in one embodiment, the display panel further includes a color film layer 90. The color film layer 90 is located on the opposite substrate. The color film layer 90 includes a patterned black matrix 91 and a color film substrate 92 disposed on the black matrix 91. Color display of the display panel can be realized by providing the color film layer 90.
The display panel provided by the embodiment of the application can be an ADS display panel.
The embodiment of the application also provides a display device which comprises the display panel.
The display device may further include a housing in which the display panel is embedded.
The display device provided by the embodiment of the application can be any device with a display function, such as a mobile phone, a tablet personal computer, a television, a notebook computer, a vehicle-mounted device and the like.
For the method embodiments, since the method embodiments basically correspond to the product embodiments, the descriptions of the relevant details and the beneficial effects are only needed to refer to the part of the descriptions of the product embodiments, and the detailed descriptions are omitted.
It is noted that in the drawings, the size of layers and regions may be exaggerated for clarity of illustration. Moreover, it will be understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element or intervening layers may be present. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it can be directly under the other element or intervening layers or elements may be present. In addition, it will be understood that when a layer or element is referred to as being "between" two layers or elements, it can be the only layer between the two layers or elements, or more than one intervening layer or element may also be present. Like reference numerals refer to like elements throughout.
Other embodiments of the application will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the application following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the application pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the application being indicated by the following claims.
It is to be understood that the application is not limited to the precise arrangements and instrumentalities shown in the drawings, which have been described above, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the application is limited only by the appended claims.
Claims (11)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110455421.3A CN113109972B (en) | 2021-04-26 | 2021-04-26 | Array substrate, display panel and display device |
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| CN216083350U (en) * | 2021-04-26 | 2022-03-18 | 京东方科技集团股份有限公司 | Array substrate, display panel and display device |
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