CN113179091B - Fixed slope triangular wave signal generating and sampling circuit - Google Patents

Abstract

The invention is a fixed-slope triangular wave signal generation and sampling circuit, which can be used in any sampling circuit, such as an over/under sampling phase-locked loop circuit and a digital-to-analog converter circuit. The triangular wave generated by this circuit can be used in the sampling circuit instead of the sine signal. The fixed slope in the cycle ensures the consistency of the gain and the linearity of the sampling voltage, which provides convenience for the design of the subsequent circuit. And in the phase-locked loop circuit, the linear circuit has better noise performance than the nonlinear circuit. The invention improves the common current-type triangular wave generating circuit, and proposes a voltage-type triangular wave generating circuit. Compared with the current type, the voltage type replaces the current cut-off switch with a voltage cut-off switch, which eliminates the non-ideal factors such as current overshoot caused by the switch. The corresponding double-switch sampling circuit converts the sampled AC signal into a sampled DC signal, which effectively reduces the negative influence caused by the coupling of the AC signal and ensures the correct result of the subsequent circuit.

Description

A Fixed Slope Triangular Wave Signal Generation and Sampling Circuit

technical field

The invention is a fixed-slope triangular wave signal generation and sampling circuit, which is mainly applied to sampling and holding circuits, such as oversampling phase-locked loops, digital-to-analog converters, and the like.

Background technique

In a sampling circuit, the slope of the sampled signal, that is, the gain of the signal, has an important impact on the performance and design complexity of the circuit. In terms of performance, for example, in an oversampling phase-locked loop circuit, it is necessary to sample the input signal with the feedback signal, and perform corresponding operations on the frequency and phase according to the sampled information. In this kind of circuit, the input signal is usually a sinusoidal signal, and the biggest disadvantage of the sinusoidal signal is that the gain will change with time. The nonlinearity of this gain will cause sampling deviation and affect the noise performance of the loop. This kind of gain change requires additional corresponding quadrature gain, resulting in the need to use additional circuits and consume additional power consumption, and even some structures using current mirrors will contribute a lot of noise; in terms of design complexity, the larger the Signal gain can provide a larger design space for subsequent circuits. As in the phase-locked loop circuit mentioned above, under certain design requirements, increasing the gain of the phase detector affected by the slope of the input signal can leave more space for the resistance of the filter and the gain of the voltage-controlled oscillator. Large adjustment space, reducing the resistance area or reducing the design complexity of the VCO. Therefore, it is very important to have an input signal with good linearity.

The triangular wave signal provides a relatively fixed slope, so it can overcome the above disadvantages. The traditional triangular wave generation circuit can be implemented by an integrator with an operational amplifier as the core, but because the operational amplifier itself has a complex design, high power consumption, and requires the use of resistors and capacitors, the chip area is also large, so it is used in low-power applications. There are larger limitations, and due to the existence of larger resistance and capacitance, it will also affect the system stability in some feedback systems. Compared with the traditional circuit, the triangular wave generating circuit proposed by the present invention can greatly reduce the power consumption of the circuit, and has no influence on the stability of the loop, so it has a wide application prospect.

In the sample-and-hold circuit, a single switch is usually used to sample the signal. During the conduction period of the sampling switch, the change of the sampled signal voltage will be AC coupled to the subsequent circuit through the parasitic capacitance, and a fixed voltage will be generated in some differential applications. poor, affecting the output. The double-switch sampling structure proposed by the present invention can solve the above problems, the two sampling switches work intermittently, avoid the influence caused by the AC coupling of the signal, and can ensure the correct output result of the subsequent stage circuit.

SUMMARY OF THE INVENTION

The present invention replaces the traditional triangular wave generator based on operational amplifiers with MOS tubes and capacitors, reduces the number of components due to the removal of operational amplifiers, and realizes circuit simplification, area optimization and power consumption reduction. At the same time, on the basis of traditional single-tube sampling, a second group of sampling switches and sampling capacitors are added to avoid abnormal output caused by AC coupling of sampling signals.

A fixed-slope triangular wave signal generation and sampling circuit, including a current mirror circuit made of PMOS transistors MP1 and MP2; a switch reset circuit made of a PMOS transistor MP3 and an NMOS transistor MN1; a capacitor C that integrates charges; realizes the first stage The sampling switch SW1 and the sampling capacitor C1; the switch SW2 and the sampling capacitor C2 for the second-stage sampling; the sources of MP1 and MP2 are connected to VDD, the drain and gate of MP1 are short-circuited, and connected to the input Vtri and the source of MP3 ; The gate of MP2 is connected to the drain of MP3, the drain of MP2, the upper plate of capacitor C, one end of switch SW1 and the drain of switch MN1 are connected together; the lower plate of capacitor C, the source of MN1, The lower plates of the capacitors C1 and C2 are connected to the ground; the switch SW1, the upper plate of the capacitor C1, and one end of the switch SW2 are connected together; the switch SW2 and the upper plate of the capacitor C2 are connected together as the output port of the circuit.

The control signal CTR is a square wave signal. When CTR is at a high level, the switch tube MN1 is turned on and MP3 is turned off, and the voltage of the upper plate of the capacitor C drops to 0 to complete the reset operation; when CTR is at a low level, the switch tube MP3 On, MN1 is off, the gate of MP2 is connected to the gate of MP1, forming a current mirror structure, MP2 mirrors the current of MP1, and charges the capacitor C continuously. Since the charging current is fixed, a triangle wave with a fixed slope is generated; and At the same time, the switch tubes SW1 and SW2 are turned on alternately; when SW1 is turned on and SW2 is turned off, the capacitor C1 samples the triangular wave; when SW1 is turned off and SW2 is turned on, C2 samples the DC signal on C1 to realize the AC signal isolation.

The present invention uses the voltage cut-off type of connection instead of the current cut-off type of connection to achieve a wider range of fixed slopes. The invention includes a first-stage sampling circuit composed of a sampling switch SW1 and a sampling capacitor C1; a second-stage sampling circuit composed of a sampling switch SW2 and a sampling capacitor C2; the AC signal is converted into DC through the first-stage sampling, and then the second-stage sampling circuit is composed of the sampling switch SW2 and the sampling capacitor C2. The second-level sampling samples the DC signal, which cuts off the connection between the AC signal and the post-stage circuit and avoids the influence of AC coupling.

Description of drawings

Figure 1 Schematic diagram of different gains at different positions of a sinusoidal signal

Figure 2 Schematic diagram of the sensitivity of the sinusoidal signal to the phase change of the sampled signal at different gains

Figure 3 is a schematic diagram of a triangular wave generating circuit and a corresponding double-switch sampling circuit

Detailed ways

The basic working principle of the present invention is: in one cycle, when CTR is at low level, the switch tube MP3 is turned on, MN1 is turned off, the gates of MP1 and MP2 are turned on through MP3, MP2 mirrors the current in the saturation region of MP1, and the The current charges the upper plate of capacitor C through the drain of MP2, so that the voltage on the capacitor continues to rise, corresponding to the slope part of the triangular wave. When CTR becomes a high level, the switch MN1 is turned on and MP3 is turned off, so that the voltage on the upper plate of the capacitor C is discharged to 0, which corresponds to the reset part of the triangular wave. It should be noted that if you want to keep the charging current fixed, that is, let the triangular wave have a constant slope, you need to ensure that MP2 always works in the saturation region, and when the voltage on the upper plate of the capacitor rises to a certain value, it will make MP2 work in the linear region. The slope of the triangle wave is no longer constant. To solve the above problems, the charging current can be adjusted by adjusting Vtri, so that the voltage on the capacitor is low enough before CTR becomes high, that is, before the triangular wave is reset, to ensure that MP2 always works in the saturation region. In the process of generating the triangular wave signal, the sampling switch SW1 and the sampling switch SW2 are turned on alternately. When the sampling switch SW1 is turned on and the sampling switch SW2 is turned off, the voltage on the sampling capacitor C1 will gradually rise following the triangular wave signal until SW1 is turned off. During the time when SW1 is turned off and SW2 is not turned on, the voltage on C1 gradually tends to be stable, and finally stabilizes to a DC voltage. At this time, the sampling switch SW2 is turned on, so that the sampling capacitor C2 samples the DC voltage on C1, and sampling the DC signal can avoid the influence of the AC coupling on the subsequent circuit.

Of course, the above description is not intended to limit the present invention, and the present invention is not limited to the above examples. Changes, modifications, additions or substitutions made by those skilled in the art within the essential scope of the present invention should also belong to the present invention. the scope of protection of the invention.

Claims (2)

1. A fixed slope triangular wave signal generating and sampling circuit is characterized in that: comprises a current mirror circuit made of PMOS tubes MP1 and MP 2; a switch reset circuit is made of a PMOS tube MP3 and an NMOS tube MN 1; a capacitor C for integrating the charge; a switch SW1 and a sampling capacitor C1 for realizing the first-stage sampling; a switch SW2 and a sampling capacitor C2 for realizing the second-stage sampling; the sources of the PMOS tubes MP1 and MP2 are connected to the power supply VDD; the drain electrode of the PMOS transistor MP1 is in short circuit with the grid electrode and is connected to the input Vtr and the source electrode of the PMOS transistor P3; the grid electrode of the PMOS tube MP2 is connected with the drain electrode of the PMOS tube MP 3; the drain electrode of the PMOS tube MP2, the upper polar plate of the capacitor C, one end of the switch SW1 and the drain electrode of the NMOS tube MN1 are connected together; the lower polar plate of the capacitor C, the source electrode of the NMOS transistor MN1, the lower polar plate of the capacitor C1 and the lower polar plate of the capacitor C2 are all connected to the ground; the other end of the switch SW1, the upper plate of the capacitor C1 and one end of the switch SW2 are connected together; the other end of the switch SW2 and the upper pole plate of the capacitor C2 are connected together to serve as an output port of the circuit; the control signal CTR is connected to the gate of the NMOS transistor MN 1.

2. The fixed-slope triangular wave signal generating and sampling circuit of claim 1, wherein: the control signal CTR is a square wave signal, when the CTR is in a high level, the NMOS tube MN1 is conducted, the PMOS tube MP3 is disconnected, the voltage of an upper polar plate of the capacitor C is reduced to 0, and the reset operation is completed; when the CTR is low level, the PMOS tube MP3 is conducted, the NMOS tube MN1 is disconnected, the grid electrode of the PMOS tube MP2 is connected with the grid electrode of the PMOS tube MP1 to form a current mirror structure, the PMOS tube MP2 mirrors the current of the PMOS tube MP1 to continuously charge the capacitor C, and the charging current is fixed, so that a triangular wave with a fixed slope is generated; at the same time, the switches SW1 and SW2 are alternately turned on; when the SW1 is switched on and the SW2 is switched off, the capacitor C1 samples the triangular wave; when the SW1 is turned off and the SW2 is turned on, the capacitor C2 samples the direct current signal on the capacitor C1, and the isolation of the alternating current signal is realized.

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