CN113270337B

CN113270337B - System-in-package (SiP) chip and electronic shelf label

Info

Publication number: CN113270337B
Application number: CN202010093633.7A
Authority: CN
Inventors: 赵建国; 侯世国; 梁敏; 田向
Original assignee: Hanshuo Technology Co ltd
Current assignee: Hanshuo Technology Co ltd
Priority date: 2020-02-14
Filing date: 2020-02-14
Publication date: 2025-07-22
Anticipated expiration: 2040-02-14
Also published as: CN113270337A

Abstract

The present invention provides a system-level package SiP chip and an electronic shelf label, wherein the system-level package SiP chip includes: a SoC chip; the SoC chip includes: a microcontroller and a radio frequency transceiver; a memory connected to the SoC chip; a near field communication NFC circuit connected to the SoC chip; an electronic paper display EPD driving circuit, the first end of which is connected to the SoC chip and the second end is connected to the electronic paper display; an LED light driving interface, the first end of which is connected to the SoC chip and the second end is connected to an external LED light; a sensor driving interface, the first end of the sensor driving interface is connected to the SoC chip and the second end of the sensor driving interface is connected to the relevant external sensor of the electronic shelf label. The above technical solution makes the electronic shelf label highly integrated, the components occupy a small area, and is conducive to realizing the miniaturization of the whole machine design and high system reliability.

Description

System-in-package (SiP) chip and electronic shelf label

Technical Field

The invention relates to the technical field of electronic shelf labels, in particular to a system-in-package (SiP) chip and an electronic shelf label.

Background

ESL (Electronic Shelf Label) electronic shelf labels are wireless communication equipment powered by button cells and are used for replacing traditional paper price tags to display commodity information. The electronic shelf label uses the electronic paper display screen, has the characteristics of clear display and low power consumption, supports the user to customize the display content, and realizes one-key change.

The complete electronic shelf label system comprises a plurality of electronic shelf labels, an access base station, a server, a control system, intelligent handheld terminal equipment and the like. Firstly, the electronic goods shelf labels are bound with goods on the goods shelf one by one through the handheld terminal equipment. The price data is transmitted to a server through the Ethernet, the server sends the data to an access base station after scheduling, and the access base station transmits the data to the electronic shelf label through wireless communication. The electronic shelf label system supports a batch update mode and a point-to-point update mode.

As shown in fig. 1 and 2, the existing electronic shelf label generally includes a Micro Controller (MCU), a radio frequency Transceiver (Transceiver), a memory (FLASH), peripheral circuits, an Electronic Paper Display (EPD), an indicator light, a battery, and the like. The peripheral circuit mainly comprises a screen driving circuit, an indicator light driving circuit, an NFC circuit, a sensor circuit and the like. The microcontroller controls the radio frequency transceiver to realize the receiving and transmitting of radio frequency signals and complete the uplink and downlink wireless communication, and the memory stores binary codes, price data information and the like. The microcontroller and the radio frequency transceiver can be replaced by a SoC chip integrating the functions of the microcontroller and the radio frequency transceiver, however, the scheme has low integration level, large occupied area of components and parts, is unfavorable for miniaturization of the whole machine design, and meanwhile, the reliability of the system is reduced due to more components and parts.

In view of the above problems, no effective solution has been proposed at present.

Disclosure of Invention

The embodiment of the invention provides a system-in-package (SiP) chip, which is used for enabling an electronic shelf label to have high integration level, small occupied area of components and parts, being beneficial to realizing miniaturization of the whole machine design and high system reliability, and comprises the following components:

The system comprises a chip-level system (SoC) chip, a radio frequency transceiver and a controller, wherein the SoC chip comprises a microcontroller, the radio frequency transceiver is used for controlling each component in the electronic shelf label to work, and the radio frequency transceiver is connected with the microcontroller and used for receiving an instruction sent by an external control center or uploading relevant information of the electronic shelf label to the external control center according to the control of the microcontroller;

the memory is connected with the SoC chip and used for storing information related to the electronic shelf label;

the near field communication NFC circuit is connected with the SoC chip and is used for performing wireless communication with the handheld terminal equipment according to the control of the SoC chip to finish the read-write operation of the information related to the electronic shelf label;

the electronic paper display screen EPD driving circuit is connected with the SoC chip at a first end and connected with the EPD at a second end, and is used for driving the EPD to work according to the control of the SoC chip;

the LED lamp driving interface is connected with the SoC chip at a first end and connected with an external LED lamp at a second end, and is used for driving the external LED lamp to work according to the control of the SoC chip;

The first end of the sensor driving interface is connected with the SoC chip, and the second end of the sensor driving interface is connected with an external sensor related to the electronic shelf label and is used for configuring the external sensor according to a configuration command of the SoC chip or transmitting sensed information to the SoC chip.

The embodiment of the invention also provides an electronic shelf label, which is used for providing an electronic shelf label with high integration level, small occupation area of components, contribution to realizing miniaturization of the whole machine design and high system reliability, and comprises the following components:

A system in package, siP, chip as described above;

The LED lamp is connected with the LED lamp driving interface and is externally connected with the LED lamp;

The sensor is connected with the sensor driving interface and is the related external sensor.

Compared with the scheme that the existing electronic shelf label adopts a separate device design, which has low integration level, complex circuit design, large occupation area of components and devices and can not realize the miniaturization design of the whole machine and the low reliability problem of the system, the technical scheme provided by the embodiment of the invention integrates the SoC chip, the electronic paper display screen EPD driving circuit, the near field communication NFC circuit and the memory into a system-in-package SiP chip, wherein the SoC chip integrates a microcontroller and a radio frequency transceiver to control the memory, the NFC circuit and the EPD driving circuit. Meanwhile, an LED lamp driving interface is provided, so that an external LED lamp is controlled, and a sensor driving interface is provided, so that external sensors and data interaction are configured, the integration level is effectively improved, the occupied area of components is reduced by 90%, and the miniaturization of the whole machine design and the improvement of the system reliability are facilitated.

Drawings

In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of a prior art electronic shelf label;

FIG. 2 is a schematic layout of an electronic shelf label of the prior art;

Fig. 3 is a schematic structural diagram of a system-in-package SiP chip according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of a connection structure between a SoC chip and a memory according to an embodiment of the present invention;

fig. 5 is a schematic diagram of a connection structure between an SoC chip and an NFC circuit in an embodiment of the present invention;

FIG. 6A is a schematic diagram of an EPD driving circuit according to an embodiment of the present invention;

FIG. 6B is a schematic diagram of the connection relationship between the Sip chip and three external devices in the embodiment of the present invention;

FIG. 7 is a schematic layout of a system in package SiP chip according to an embodiment of the present invention;

FIG. 8 is a schematic diagram of the structure of an electronic shelf label according to an embodiment of the present invention;

Fig. 9 is a schematic layout diagram of an electronic shelf label according to an embodiment of the present invention.

Detailed Description

The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

Before describing the embodiments of the present invention, the terms and full names related to the embodiments of the present invention will be described first.

1. ESL: electronic Shelf Label, electronic shelf label.

2. MCU Micro Controller Unit, microcontroller.

3. RF, radio Frequency.

4. EPD, electronic PAPER DISPLAYS, electronic paper display screen.

5. The SiP SYSTEM IN PACKAGE is a system in package, and the system in package integrates various functional chips including a processor, a memory and the like into one package, so that a basically complete function is realized.

6. SoC is System on Chip, chip level System.

7. PCB Printed Circuit Board, printed circuit board.

8. NFC NEAR FIELD Communication, near field Communication.

9. SPI SERIAL PERIPHERAL INTERFACE, serial peripheral interface.

10. IIC is Inter-INTEGRATED CIRCUIT, integrated circuit bus.

The inventor discovers that the existing electronic shelf label has the technical problems that the design scheme of the separation device is adopted, the circuit design is complex, the integration level is low, the occupied area of the PCB is large, the miniaturization of the whole machine design is not facilitated, and meanwhile, the system reliability is low due to more components.

The inventor discovers the technical problems, so a system-in-package SiP chip and an electronic shelf label scheme are provided, and the system-in-package SiP chip provided by the scheme integrates a radio frequency SoC die, an NFC die, a FLASH die and an EPD screen driving circuit in one package, wherein the SoC chip integrates MCU and radio frequency Transceiver functions, controls peripheral FLASH and NFC die, simultaneously provides an LED lamp and a sensor driving interface, effectively improves the integration level, reduces the occupied area of a peripheral circuit by 90%, and is beneficial to realizing the miniaturization of the whole machine design and improving the reliability of a system. Meanwhile, the scheme is a high-integration multi-wafer system level packaging device, and solves the problems of low integration level, complex design, low reliability and the like. Radio frequency communication, NFC communication, screen driving, LED and other peripheral driving can be realized through the SiP chip.

The system-in-package SiP chip and electronic shelf label scheme will be described in detail.

Fig. 3 is a schematic structural diagram of a system-in-package SiP chip according to an embodiment of the present invention, as shown in fig. 3, the system-in-package SiP chip includes:

In particular, the meaning of "external connection" is relative to the SiP chip, for example, the external LED lamp refers to an LED lamp outside the SiP chip, and the external sensor refers to a sensor outside the SiP chip.

The following describes the detailed structure of the SiP chip provided by the present invention with reference to fig. 2 to 7.

In one embodiment, the SoC chip is connected to the memory through a serial peripheral interface SPI.

In the implementation, the memory may be a FLASH memory, where binary codes, product configuration information, and data displayed on a screen are stored. As shown in fig. 4, the SoC may be connected to the FLASH through an SPI (serial peripheral interface ) interface, and send a control command through the SPI interface and complete data reading and writing. The SoC chip is connected with the memory through the SPI, so that the data reading and writing efficiency is guaranteed, and the working efficiency of the electronic shelf label is further guaranteed.

In FIG. 4, CLK is coupled to the EPD clock signal and CS is coupled to the EPD chip select signal, MOSI is the master-output-slave-input and MISO is the master-input-slave-output.

In one embodiment, the SoC chip is connected to the NFC circuit through a serial peripheral interface SPI or an integrated circuit bus IIC interface.

In specific implementation, as shown in fig. 5, the SoC is connected to the NFC through an SPI or IIC interface (integrated circuit bus, inter-INTEGRATED CIRCUIT), so as to complete control and data read/write of the NFC chip (circuit). Through the NFC interface, the external device (e.g., a smart handheld device) may transmit a control command (e.g., a price command for looking up a new or modified commodity represented by the electronic shelf label) or a data content (e.g., commodity introduction information, etc.) to be displayed.

In fig. 5, CS is connected to the EPD chip select signal, SDA is connected to the EPD data signal, INT is input, SCK is clock signal.

In one embodiment, the number of LED lamp driving interfaces is 3.

In specific implementation, the SiP chip provides a 3-way LED lamp driving interface to control the on and off of the external LED lamp. The number of the LED lamp driving interfaces is 3, and the LED lamp driving interface is flexible and convenient.

In one embodiment, the SoC chip is connected to the associated external sensor via an integrated circuit bus IIC interface.

In specific implementation, the SiP chip provides an IIC interface, and may be externally connected with a sensor to complete configuration (e.g. configure what time to report sensor sensing data, etc.) and data interaction (e.g. transmit sensed environmental temperature information to the SiP chip or send a control command for controlling reporting sensing data, etc.).

In one embodiment, the EPD driving circuit includes an EPD boosting circuit, a diode, and a capacitor.

In particular, as shown in fig. 6A, the screen driving circuit (EPD driving circuit) includes a MOS transistor EPD booster circuit, a diode and a capacitor, so that only three devices are required for the SiP periphery to drive the EPD screen. The three peripheral devices are connected to the SiP as shown in fig. 6B, and are shown in fig. 6B as a resistor R10, an inductor L10, and a capacitor C10.

In fig. 6A, the chinese meaning of each pin is shown in table 1 below:

TABLE 1

In one embodiment, the EPD driving circuit includes an EPD boosting circuit including a first transistor Q1, a first diode D1, a second diode D2, a third diode D3, an eighth capacitor C8, and a ninth capacitor C9, wherein:

The device comprises a first transistor Q1, a drain electrode of the first transistor Q1, a grid electrode of the first transistor Q1, a ground sampling resistor R10, a power supply resistor L10, a power supply resistor D10, a ground sampling resistor R10, a power supply resistor D10 and a power supply resistor D1, wherein the source electrode of the first transistor Q1 is connected with a RESE interface of the EPD;

the positive electrode of the first diode D1 is connected with the drain electrode of the first transistor Q1, and the negative electrode of the first diode D1 is connected with the PreVGH interface of the EPD;

the anode of the second diode D2 is connected with the PreVGL interface of the EPD, and the cathode of the second diode D2 is connected with the PREVGLCAP interface of the EPD;

the anode of the third diode D3 is connected with the cathode of the second diode D2, and the cathode of the third diode D3 is connected with the first end of the ninth capacitor C9;

The first end of the eighth capacitor C8 is grounded, and the second end of the eighth capacitor C8 is connected with the cathode of the first diode D1;

the first end of the ninth capacitor C9 is grounded, and the second end of the ninth capacitor is connected to the anode of the second diode D2.

In specific implementation, the source of the first transistor Q1 is connected to the interface RESE of the EPD, the external sampling resistor R10 is connected to ground, the drain of the first transistor Q1 is connected to PREVGLCAP through the external capacitor C10, to vdd_epd (VDD interface of the EPD) through the external power inductor L10, to the anode of the first diode D1, and the gate of the first transistor Q1 is connected to the GDR interface of the EPD. The negative electrode of D1 is connected with the EPD interface PreVGH, the first end of C8 is grounded, and the second end is connected with the negative electrode of D1.

In specific implementation, the positive electrode of the second diode D2 is connected to the EPD interface PreVGL, the negative electrode of the second diode D2 is connected to PREVGLCAP, the positive electrode of the third diode D3 is connected to the negative electrode of the second diode D2, the negative electrode of the third diode D3 is connected to the first end of the ninth capacitor C9, the first end of the ninth capacitor C9 is grounded, and the second end of the ninth capacitor is connected to the positive electrode of the second diode D2.

In practice, Q1, D2, D3, L10, C8, C9, C10 and R10 together form a boost circuit. When GDR is high, inductor L10 stores energy, C8 remains PreVGH high, while C9 charges and C10 discharges, preVGL provides a negative level. When GDR is low, inductor L10 releases energy while charging C8 and C10, preVGH remains output high, and C9 remains low. These two states alternate and the output voltages of PreVGH and PreVGL are controlled by sensing the voltage at RESE, controlling the frequency of change of the GDR.

In specific implementation, the structural design of the booster circuit in the EPD driving circuit in the SIP chip enables the periphery of the SiP to drive the EPD screen only by three devices, so that the integration level is further improved, the occupied area of the devices is further reduced, the miniaturization of the whole machine design is facilitated, and the reliability of the system is improved.

In the implementation, in fig. 6A, the first end of the third capacitor C3 is grounded, the second end is connected to GND of the EPD, the first end of the fourth capacitor C4 is grounded, the second end is connected to VPP of the EPD, the first end of the fifth capacitor C5 is grounded, the second end is connected to VSL of the EPD, the first end of the sixth capacitor C6 is grounded, and the second end is connected to VCOM of the EPD. C3, C4, C5, C6 store charge as storage capacitors.

In particular, in FIG. 6A, the first terminal of R1 is grounded, the second terminal of R1 is connected to GDR of the EPD, the first terminal of C1 is connected to the first terminal of R1, and the second terminal is connected to VGH of the EPD.

In particular, in fig. 6A, C2 and C7 function as a storage capacitor and a filter capacitor.

In one embodiment, core components of the EPD driving circuit, a first diode D1, a second diode D2, a third diode D3, an eighth capacitor C8, and a ninth capacitor C9, are disposed apart from the SoC chip and the NFC circuit.

In specific implementation, as shown in fig. 7, core devices D1, D2, D3, C8 and C9 of the screen driving circuit are far away from the SoC and the NFC radio frequency circuit, so that the flow of plastic packaging materials is prevented from being influenced, the quality of the SiP chip is ensured, and the service life of the electronic shelf label is further ensured.

In one embodiment, the eighth capacitor C8 is disposed on one side along the length direction of the SiP chip, and the ninth capacitor C9 is disposed on the other side along the length direction of the SiP chip.

In specific implementation, as shown in fig. 7, the left side and the right side of the C8 and the C9 are respectively arranged to avoid influencing the flow of plastic package materials, so that the quality of the SiP chip is further ensured, and the service life of the electronic shelf label is further ensured.

In one embodiment, the SoC chip and memory are arranged in a stacked fashion.

In the implementation, as shown in fig. 7, when the SiP is implemented, the SoC and the FLASH adopt a stacking manner, so that the area occupation is further reduced.

In one embodiment, as shown in fig. 3, the system-in-package SiP chip may further include a power interface connected to an external power source for supplying power to the SiP chip.

In the specific implementation, the power interface is arranged, so that the electronic shelf label is convenient to use.

Based on the same inventive concept, the embodiment of the invention also provides an electronic shelf label, as described in the following embodiment. Because the principle of solving the problem of the electronic shelf label is similar to that of the system-level packaging SiP chip, the implementation of the electronic shelf label can be referred to the implementation of the system-level packaging SiP chip, and the repetition is omitted.

Fig. 8 is a schematic structural diagram of an electronic shelf label according to an embodiment of the present invention, as shown in fig. 8, the electronic shelf label includes:

A system in package, siP, chip as described above;

In specific implementation, the circuit design of the whole electronic shelf label is shown in fig. 9, the occupied area of the elements is saved by about 90%, the integration level is high, and the realization of miniaturization of the whole design and high system reliability are facilitated.

In one embodiment, the electronic shelf label may further comprise a battery connected with the system-in-package SiP chip, the LED lamp and the sensor for supplying power to the system-in-package SiP chip, the LED lamp and the sensor.

In the specific implementation, the battery is arranged, so that the electronic shelf label is convenient to use.

In one embodiment, the number of LED lamps is 3.

In particular, the LED light may represent different prompts, for example, to indicate operating conditions, alarm prompts, and the like.

The technical scheme provided by the embodiment of the invention has the beneficial technical effects that:

The integration level is effectively improved, the occupied area of components is reduced by 90%, the miniaturization of the whole machine design is facilitated, and the reliability of the system is improved.

The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, and various modifications and variations can be made to the embodiments of the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A system-in-package SiP chip, comprising:

System-on-chip (SoC) chip; the SoC chip includes: a microcontroller for controlling the operation of various components in the electronic shelf label; a radio frequency transceiver connected to the microcontroller for receiving instructions from an external control center or sending electronic shelf label related information to the external control center under the control of the microcontroller;

A memory, connected to the SoC chip, for storing information related to the electronic shelf label;

A near field communication (NFC) circuit is connected to the SoC chip and is used to wirelessly communicate with a handheld terminal device according to the control of the SoC chip to complete the reading and writing operations of the electronic shelf label related information;

An electronic paper display EPD driving circuit, a first end of which is connected to the SoC chip, a second end of which is connected to the EPD, and is used to drive the EPD to work according to the control of the SoC chip;

An LED lamp driving interface, a first end of which is connected to the SoC chip, and a second end of which is connected to an external LED lamp, and is used to drive the external LED lamp to work according to the control of the SoC chip;

A sensor drive interface, wherein a first end of the sensor drive interface is connected to the SoC chip, and a second end of the sensor drive interface is connected to an external sensor related to the electronic shelf label, and is used to configure the external sensor according to a configuration command of the SoC chip or transmit the sensed information to the SoC chip.

2. The system-in-package SiP chip as claimed in claim 1, wherein the SoC chip is connected to the memory via a serial peripheral interface SPI.

3. The system-in-package SiP chip according to claim 1, wherein the SoC chip is connected to the NFC circuit via a serial peripheral interface SPI or an integrated circuit bus IIC interface.

4 . The system-in-package SiP chip as claimed in claim 1 , wherein the number of the LED lamp driving interfaces is 3.

5. The system-in-package SiP chip according to claim 1, wherein the SoC chip is connected to the relevant external sensor through an integrated circuit bus IIC interface.

6 . The system-in-package SiP chip according to claim 1 , wherein the SoC chip and the memory are arranged in a stacked manner.

7. The system-in-package SiP chip according to claim 1, characterized in that the EPD driving circuit comprises: an EPD boost circuit; the EPD boost circuit comprises: a first transistor (Q1), a first diode (D1), a second diode (D2), a third diode (D3), an eighth capacitor (C8), and a ninth capacitor (C9); wherein:

A first transistor (Q1), the source of the first transistor (Q1) is connected to the RESE interface of the EPD, and is externally connected to a ground sampling resistor (R10); the drain of the first transistor (Q1) is connected to the PreVGLCAP interface of the EPD through an external capacitor (C10), and is connected to the VDD interface of the EPD through an external power inductor (L10); the gate of the first transistor (Q1) is connected to the GDR interface of the EPD;

A first diode (D1), wherein an anode of the first diode (D1) is connected to a drain of the first transistor (Q1), and a cathode of the first diode (D1) is connected to a PreVGH interface of the EPD;

A second diode (D2), wherein an anode of the second diode (D2) is connected to the PreVGL interface of the EPD, and a cathode of the second diode (D2) is connected to the PreVGLCAP interface of the EPD;

The anode of the third diode (D3) is connected to the cathode of the second diode (D2), and the cathode of the third diode (D3) is connected to the first end of the ninth capacitor (C9);

A first end of an eighth capacitor (C8) is grounded, and a second end is connected to a cathode of the first diode (D1);

A first end of the ninth capacitor (C9) is grounded, and a second end of the ninth capacitor is connected to the anode of the second diode (D2).

8. The system-in-package SiP chip as described in claim 7 is characterized in that the first transistor (Q1), the first diode (D1), the second diode (D2), the third diode (D3), the eighth capacitor (C8) and the ninth capacitor (C9) are arranged away from the SoC chip and the NFC circuit.

9. The system-in-package SiP chip according to claim 8, characterized in that the eighth capacitor (C8) is arranged on one side along the length direction of the SiP chip, and the ninth capacitor (C9) is arranged on the other side along the length direction of the SiP chip.

10 . The system-in-package SiP chip according to claim 1 , further comprising: a power interface connected to an external power source for supplying power to the SiP chip.

11. An electronic shelf label, comprising:

The system-in-package SiP chip according to any one of claims 1 to 10;

An LED lamp connected to the LED lamp driving interface; the LED lamp is the external LED lamp;

A sensor is connected to the sensor driving interface; the sensor is the related external sensor.

12. The electronic shelf label according to claim 11, further comprising: a battery connected to the system-in-package SiP chip, the LED light and the sensor to supply power to the system-in-package SiP chip, the LED light and the sensor.

13. The electronic shelf label according to claim 11, wherein the number of the LED lights is 3.