CN113420260B - Semiconductor size measuring and calculating method and device and computer storage medium - Google Patents
Semiconductor size measuring and calculating method and device and computer storage medium Download PDFInfo
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Abstract
The application discloses a method and a device for measuring and calculating semiconductor dimensions and a computer storage medium, and relates to the technical field of measurement. The measurement calculation method comprises the following steps: acquiring characteristic parameters of a semiconductor; constructing a coupling wave equation set based on the characteristic parameters and a strict coupling wave analysis method; and solving the coupled wave equation system based on a Pade approximation method to obtain the structure size of the semiconductor. By the method, the solution of the coupled wave equation can be accelerated, and the measurement and calculation speed of the semiconductor dimension is further improved.
Description
Technical Field
The present application relates to the field of semiconductor technologies, and in particular, to a method and an apparatus for measuring and calculating a semiconductor dimension, and a computer storage medium.
Background
With the development of the times, people have higher and higher requirements on the precision and speed of semiconductor Dimension measurement, in the prior art, a more commonly used method for optically measuring the semiconductor Dimension has a strict coupled wave analysis method, which is a direct and effective electromagnetic field theory, and the semiconductor Dimension with higher precision, such as a certain CD (Critical-Dimension) of a semiconductor device, can be obtained based on the optical characteristic modeling calculation of the strict coupled wave analysis.
The inventor of the present application finds, in long-term research and development work, that the calculation amount of the existing method for measuring and calculating the semiconductor dimension based on the rigorous coupled wave analysis method is large, so that the measurement and calculation speed of the semiconductor dimension is low.
Disclosure of Invention
The technical problem that this application mainly solved is how to improve the measurement calculation speed of semiconductor size.
In order to solve the above technical problem, the first technical solution adopted by the present application is: a method for measuring and calculating semiconductor dimensions is provided. The measurement calculation method comprises the following steps: acquiring characteristic parameters of a semiconductor; constructing a coupling wave equation set based on the characteristic parameters and a strict coupling wave analysis method; and solving the coupled wave equation system based on a Pade approximation method to obtain the structure size of the semiconductor.
In order to solve the above technical problem, the second technical solution adopted by the present application is: a semiconductor dimension measurement and calculation device is provided. The measurement calculation apparatus includes: an acquisition unit configured to acquire characteristic parameters of a semiconductor; the construction unit is used for constructing a coupling wave equation set based on the characteristic parameters and a strict coupling wave analysis method; and the calculating unit is used for solving the coupled wave equation system based on the Pade approximation method so as to obtain the structure size of the semiconductor.
In order to solve the above technical problem, the third technical solution adopted by the present application is: a computer storage medium is provided. The computer storage medium has stored thereon program instructions that, when executed, implement the above-described semiconductor dimension measurement calculation method.
The beneficial effect of this application is: different from the prior art, the method and the device have the advantages that after the characteristic parameters of the semiconductor are obtained and the coupled wave equation set is constructed based on the characteristic parameters and the strict coupled wave analysis method, the rational functions in the coupled wave equation set are approximated by using the Pade approximation method to solve the coupled wave equation set, and the Pade approximation method is adopted to replace the matrix diagonalization calculation process in the traditional strict coupled wave analysis method solving technology, so that the calculated amount can be reduced, and the measurement calculation speed of the size of the semiconductor can be improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic flow chart diagram illustrating an embodiment of a method for measuring and calculating semiconductor dimensions according to the present application;
FIG. 2 is a schematic diagram illustrating a detailed flow chart of step S12 in the method for measuring and calculating the semiconductor dimension of the embodiment of FIG. 1;
FIG. 3 is a schematic diagram illustrating a detailed flow chart of step S13 in the method for measuring and calculating the semiconductor dimension of the embodiment of FIG. 1;
FIG. 4 is a flowchart illustrating a step S31 of the method for measuring and calculating the semiconductor dimension in the embodiment of FIG. 3;
FIG. 5 is a flowchart illustrating a step S32 of the method for measuring and calculating the semiconductor dimension in the embodiment of FIG. 3;
FIG. 6 is a schematic diagram of experimental results of a comparative experiment of the present application in an application scenario;
FIG. 7 is a schematic diagram of an embodiment of a semiconductor dimension measurement computing device according to the present application;
FIG. 8 is a schematic structural diagram of an embodiment of a computer storage medium according to the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, and not all embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application without making any creative effort belong to the protection scope of the present application.
The terms "first" and "second" in this application are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless explicitly specifically limited otherwise. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
The present application first provides a method for measuring and calculating a semiconductor dimension, as shown in fig. 1, where fig. 1 is a schematic flow chart of an embodiment of the method for measuring and calculating a semiconductor dimension. The method for measuring and calculating the semiconductor dimension comprises the following steps:
step S11: acquiring characteristic parameters of a semiconductor;
optionally, the characteristic parameters include geometric parameters and optical parameters, wherein the geometric parameters may include parameters related to the shape, structure, and the like of the semiconductor, which are obtained based on a design drawing of the corresponding semiconductor or based on image recognition and the like, and the optical parameters may include parameters related to the optical properties of the semiconductor, such as the dielectric constant, the wavelength of incident light, and the angle of incident light of the semiconductor. The relevant characteristic parameters can be obtained by performing optical measurements on the semiconductor, that is, by irradiating the semiconductor with light of various wavelengths at a certain incident angle, so as to be used for the subsequent calculation of the size of the semiconductor.
Specifically, the semiconductor may be irradiated with light of a certain wavelength at a certain incident angle, and optical parameters such as a dielectric constant of the semiconductor may be obtained by using a relevant optical calculation method.
Step S12: and constructing a coupling wave equation set based on the characteristic parameters and a strict coupling wave analysis method.
Alternatively, the present embodiment may implement step S12 by the method shown in fig. 2. The method of the present embodiment includes steps S21, S22, and S23.
Step S21: and acquiring the electric field and the magnetic field of the semiconductor in the optical measurement process based on the geometric parameters.
In this embodiment, the electric field E and the magnetic field H of the semiconductor may be expressed based on geometric parameters to form expressions of the electric field E and the magnetic field H, respectively, for use in subsequently constructing a coupled wave equation set.
Step S22: and acquiring an optical parameter matrix of the semiconductor based on the optical parameters and a Fourier transform method.
In this embodiment, two optical parameter matrices F and G required in the subsequent process of constructing the coupled wave equation set can be obtained based on the optical parameters and the fourier transform method.
Step S23: and constructing a differential form coupling wave equation set by utilizing the electric field, the magnetic field and the optical parameter matrix.
A differential form of the coupled wave equation system can be constructed based on the electric field E, the magnetic field H, and the optical parameter matrix configuration F and G acquired in steps S21 and S22.
Specifically, based on the geometric parameters and the optical parameters, a differential form of the coupled wave equation set is constructed as follows:
in the formula, the z-axis of the rectangular coordinate system is perpendicular to the wafer plane where the semiconductor is located.
Based on the differential form of the coupled wave equation, the mathematical relationship between the electric field E, the magnetic field H, and the two optical parameter matrices corresponding to the optical parameters F and G can be expressed visually.
Step S13: and solving the coupled wave equation system based on a Pade approximation method to obtain the structure size of the semiconductor.
In this embodiment, after the equation set of the coupling wave is solved based on the pade approximation method to obtain the measurement calculation data, the regression processing may be performed on the measurement calculation data based on the regression theory to obtain the structure size of the semiconductor.
Alternatively, this embodiment may implement step S13 by the method shown in fig. 3. The method of the present embodiment includes steps S31 and S32.
Step S31: converting the coupled wave equation system in a differential form into a solution equation system in an exponential form, and acquiring the characteristic matrix from the solution equation system in the exponential form.
The differential form of the coupled wave equation set can be constructed based on the obtained geometric parameters and optical parameters, so that the coupled wave equation set is convenient to convert into the exponential form solution equation set, and the indexes in the exponential form solution equation set are convenient to further process subsequently to obtain the solution result.
Further, the present embodiment may implement step S31 by the method as shown in fig. 4. The method of the present embodiment includes steps S41, S42, S43, and S44.
Step S41: the system of coupled wave equations in differential form is converted into a system of solution equations in exponential form.
Step S42: the matrix index is obtained from a solution equation set in exponential form.
Step S43: the matrix index is converted to convert the matrix index to a product of the diagonal matrix and the intermediate matrix.
Step S44: and decomposing the intermediate matrix, and acquiring a characteristic matrix from the decomposed intermediate matrix.
Referring to steps S41, S42, S43 and S44, specifically, the solution equation set of the coupled wave equation set can be written as follows:
wherein,in order to be the phase difference,is the thickness of the film,is the wavelength of the incident light and,is the angular frequency of the incident light and,the incident angle (the angle between the incident direction and the z-axis direction) of the incident light,、andis the dielectric constant of the semiconductor on the x-axis, the y-axis and the z-axis of a rectangular coordinate system respectively,is composed ofProjection on the y-axis, I is the identity matrix.
wherein,in order to be the phase difference,,is the thickness of the film,to enterThe wavelength of the incident light, F and G are the optical parameter matrix,andfor the purpose of the above-mentioned diagonal matrix,is the intermediate matrix described above.
The intermediate matrix is further decomposed as follows:
in the embodiment, based on the conversion of the solved equation in the exponential form on the original coupled wave equation set in the differential form, the matrix conversion and decomposition are performed on the exponential part in the solved equation to obtain the characteristic matrix, and the problem of solving the coupled wave equation set is converted into the problem of solving the characteristic matrix, so that the process of the traditional technology, which requires large calculation amount such as matrix diagonalization, is avoided, and the subsequent solving speed is greatly improved.
Step S32: and solving the characteristic matrix by using a Pade approximation method to obtain the structure size of the semiconductor.
In this embodiment, a pade approximation method is used to approximately express elements in the feature matrix to achieve the purpose of solution, and finally the feature matrix is replaced to the original solution equation to obtain the structure size of the semiconductor.
Further, the present embodiment may implement step S31 by the method shown in fig. 4. The method of the present embodiment includes steps S51 and S52.
Step S51: and approximating the eigenvectors in the characteristic matrix by using a Pade approximation method to obtain the film thickness of the detection beam on the semiconductor.
Step S52: and calculating the structural size of the semiconductor by using the film thickness.
In particular, the method can be carried out based on the Pade approximationApproximating to obtain an approximate expression, wherein the specific flow is as follows:
Calculated based on the flowThe feature matrix can be combined with the correlation formulaAndand calculating, and solving a solution equation of the coupled wave equation system based on the calculation result to obtain the final structure size of the semiconductor.
The present embodiment is based on the Pade approximation pairThe solution is performed since the pade approximation mainly involves multiplication of matrices. Due to the above-mentioned obtaining of the intermediate matrix,The conversion of the intermediate matrix, the acquisition of the feature matrix and the calculation of the feature matrix by the Pade approximation do not involve complicated calculation processes, and the calculation amount required by the whole measurement process is reduced to an extremely low level.
Different from the prior art, the method and the device have the advantages that after the characteristic parameters of the semiconductor are obtained and the coupled wave equation set is constructed based on the characteristic parameters and the strict coupled wave analysis method, the rational functions in the coupled wave equation set are approximated by using the Pade approximation method to solve the coupled wave equation set, and the Pade approximation method is adopted to replace the matrix diagonalization calculation process in the traditional strict coupled wave analysis method solving technology, so that the calculated amount can be reduced, and the measurement calculation speed of the size of the semiconductor can be improved.
It should be noted that, if the direction of the dimension actually required to be measured is not the vertical direction (z-axis direction), the semiconductor can still be vertically divided into a plurality of slices with equal thickness along the vertical direction, the dimension of each slice in the vertical direction is measured, and finally the measurement result is multiplied by a correlation coefficient or subjected to correlation processing and multiplied by the total number of the slices to obtain the dimension required to be measured.
In an application scenario, through the slices, for different numbers of slices, a traditional strict coupled wave analysis method is adopted for measuring the size of the semiconductor, and the scheme adopted by the application is adopted for measuring the size of the semiconductor so as to perform a comparison experiment, wherein the specific process is as follows:
for a differential form the following system of coupled wave equations:
two gaussian integration points are defined as follows:
the coupled wave equation set using the scheme adopted in the present application can be converted into the following form:
the coupled wave equation set adopting the traditional strict coupled wave analysis method can be converted into the following form:
therefore, the convergence rate of the coupled wave equation set adopting the scheme adopted by the application is fourth order, and is higher than that of the coupled wave equation set adopting the traditional strict coupled wave analysis method, namely the required semiconductor size can be obtained more quickly by adopting the scheme adopted by the application.
The experimental result is shown in fig. 6, where a is a curve for measuring the semiconductor size by using the conventional rigorous coupled wave analysis method, and B is a curve for measuring the semiconductor size by using the scheme adopted in the present application, it can be seen intuitively that B reaches the convergence value faster than a with the increase of the number of slices, and thus, the semiconductor size measurement calculation method adopted in the present application also improves the convergence rate during slice measurement.
The present application further provides a semiconductor dimension measurement and calculation apparatus, as shown in fig. 7, fig. 7 is a schematic structural diagram of an embodiment of the semiconductor dimension measurement and calculation apparatus of the present application, and the semiconductor dimension measurement and calculation apparatus 70 of the present embodiment includes: an acquisition unit 71, a construction unit 72, and a calculation unit 73; the obtaining unit 71 is configured to obtain characteristic parameters of the semiconductor; the construction unit 72 is configured to construct a coupled wave equation set based on the characteristic parameters and a strict coupled wave analysis method; the calculating unit 73 is configured to solve the coupled wave equation system based on the pade approximation method to obtain the structure size of the semiconductor.
Optionally, the characteristic parameters include: geometric and optical parameters; the construction unit 72 is specifically configured to:
acquiring an electric field and a magnetic field of the semiconductor based on the geometric parameters;
acquiring an optical parameter matrix of the semiconductor based on optical parameters and a Fourier transform method;
and constructing a differential form coupling wave equation set by utilizing the electric field, the magnetic field and the optical parameter matrix.
Further, the calculating unit 73 is specifically configured to:
converting the coupled wave equation set in the differential form into a solution equation set in the exponential form, and acquiring a characteristic matrix from the solution equation set in the exponential form;
and solving the characteristic matrix by using a Pade approximation method to obtain the structure size of the semiconductor.
Further, the calculating unit 73 is specifically configured to:
converting the coupling wave equation system in a differential form into a solution equation system in an exponential form;
obtaining a matrix index from a solution equation set in an index form;
converting the matrix index to convert the matrix index to a product of the diagonal matrix and the intermediate matrix;
decomposing the intermediate matrix, and acquiring a characteristic matrix from the decomposed intermediate matrix;
approximating the eigenvectors in the characteristic matrix by using a Pade approximation method to obtain the film thickness of the detection beam on the semiconductor;
and calculating the structural size of the semiconductor by using the film thickness.
Different from the prior art, the method and the device have the advantages that after the characteristic parameters of the semiconductor are obtained and the coupled wave equation set is constructed based on the characteristic parameters and the strict coupled wave analysis method, the rational functions in the coupled wave equation set are approximated by using the Pade approximation method to solve the coupled wave equation set, and the Pade approximation method is adopted to replace the matrix diagonalization calculation process in the traditional strict coupled wave analysis method solving technology, so that the calculated amount can be reduced, and the measurement calculation speed of the size of the semiconductor can be improved.
The present application further provides a computer storage medium, as shown in fig. 8, fig. 8 is a schematic structural diagram of an embodiment of the computer storage medium of the present application. The computer storage medium 80 has stored thereon program instructions 81, and the program instructions 81 when executed by a processor (not shown) implement the above-described crowd abnormal situation classification method.
The computer storage medium 80 of the embodiment may be, but is not limited to, a usb disk, an SD card, a PD optical drive, a removable hard disk, a high-capacity floppy drive, a flash memory, a multimedia memory card, a server, etc.
Different from the prior art, the method and the device have the advantages that after the characteristic parameters of the semiconductor are obtained and the coupled wave equation set is constructed based on the characteristic parameters and the strict coupled wave analysis method, the rational functions in the coupled wave equation set are approximated by using the Pade approximation method to solve the coupled wave equation set, and the Pade approximation method is adopted to replace the matrix diagonalization calculation process in the traditional strict coupled wave analysis method solving technology, so that the calculated amount can be reduced, and the measurement calculation speed of the size of the semiconductor can be improved.
In addition, if the above functions are implemented in the form of software functions and sold or used as a standalone product, they may be stored in a storage medium readable by a mobile terminal, that is, the present application also provides a storage device storing program data, which can be executed to implement the method of the above embodiments, and the storage device may be, for example, a usb disk, an optical disk, a server, etc. That is, the present application may be embodied as a software product, which includes several instructions for causing an intelligent terminal to perform all or part of the steps of the methods described in the embodiments.
In the description of the present application, reference to the description of the terms "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing specific logical functions or steps of the process, and the scope of the preferred embodiments of the present application includes other implementations in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the present application.
The logic and/or steps represented in the flowcharts or otherwise described herein, such as an ordered listing of executable instructions that can be viewed as implementing logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device (e.g., a personal computer, server, network device, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions). For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
The above description is only an embodiment of the present application, and is not intended to limit the scope of the present application, and all equivalent structures or equivalent processes performed by the present application and the contents of the attached drawings, which are directly or indirectly applied to other related technical fields, are also included in the scope of the present application.
Claims (5)
1. A method for measuring and calculating semiconductor dimensions is characterized by comprising the following steps:
acquiring characteristic parameters of the semiconductor;
constructing a coupling wave equation set based on the characteristic parameters and a strict coupling wave analysis method;
solving the coupled wave equation set based on a Pade approximation method to obtain the structure size of the semiconductor;
wherein the characteristic parameters include: geometric and optical parameters;
the step of constructing a coupled wave equation set based on the characteristic parameters and a strict coupled wave analysis method comprises the following steps:
acquiring an electric field and a magnetic field of the semiconductor in the optical measurement process based on the geometric parameters;
acquiring an optical parameter matrix of the semiconductor based on the optical parameters and a Fourier transform method;
constructing a differential form coupled wave equation set by utilizing the electric field, the magnetic field and the optical parameter matrix;
the solving the coupled wave equation system based on the Pade approximation method to obtain the structure size of the semiconductor comprises the following steps:
converting the coupling wave equation system in the differential form into an exponential solution equation system, and acquiring a characteristic matrix from the exponential solution equation system;
solving the characteristic matrix by using a Pade approximation method to obtain the structure size of the semiconductor;
the converting the coupled wave equation system in the differential form into a solution equation system in an exponential form, and acquiring the characteristic matrix from the solution equation system in the exponential form comprises:
converting the differential form of the coupled wave equation set into an exponential form of a solution equation set;
obtaining a matrix index from the solution equation set in the exponential form;
converting the matrix index to convert the matrix index to a product of a diagonal matrix and an intermediate matrix;
decomposing the intermediate matrix, and acquiring the feature matrix from the decomposed intermediate matrix;
the transformed matrix index satisfies:
X≡(FG) 1/2 h;
2. The method of claim 1, wherein solving the feature matrix using Pade's approximation to obtain the feature size of the semiconductor comprises:
approximating the eigenvectors in the characteristic matrix by using a Pade approximation method to obtain the film thickness of the detection beam on the semiconductor;
and calculating the structure size of the semiconductor by using the film thickness.
4. a semiconductor dimension measurement calculation apparatus, comprising:
an acquisition unit configured to acquire characteristic parameters of the semiconductor;
the construction unit is used for constructing a coupling wave equation set based on the characteristic parameters and a strict coupling wave analysis method;
the calculating unit is used for solving the coupled wave equation set based on a Pade approximation method so as to obtain the structure size of the semiconductor;
wherein the characteristic parameters include: geometric and optical parameters;
the construction unit is used for acquiring an electric field and a magnetic field of the semiconductor in the optical measurement process based on the geometric parameters, acquiring an optical parameter matrix of the semiconductor based on the optical parameters and a Fourier transform method, and constructing a coupling wave equation set in a differential form by using the electric field, the magnetic field and the optical parameter matrix;
the calculation unit is used for converting the coupling wave equation system in the differential form into a solution equation system in an exponential form and acquiring a characteristic matrix from the solution equation system in the exponential form; the calculation unit further solves the characteristic matrix by using a Pade approximation method to obtain the structure size of the semiconductor;
the solving the coupled wave equation system based on the Pade approximation method to obtain the structure size of the semiconductor comprises the following steps:
converting the coupling wave equation system in the differential form into an exponential solution equation system, and acquiring a characteristic matrix from the exponential solution equation system;
solving the characteristic matrix by using a Pade approximation method to obtain the structure size of the semiconductor;
the converting the coupled wave equation system in the differential form into a solution equation system in an exponential form, and acquiring the characteristic matrix from the solution equation system in the exponential form comprises:
converting the differential form of the coupled wave equation set into an exponential form of a solution equation set;
obtaining a matrix index from the solution equation system in the exponential form;
converting the matrix index to convert the matrix index to a product of a diagonal matrix and an intermediate matrix;
decomposing the intermediate matrix, and acquiring the feature matrix from the decomposed intermediate matrix;
the transformed matrix index satisfies:
X≡(FG) 1/2 h;
5. A computer storage medium storing program instructions that, when executed, implement the semiconductor dimension measurement calculation method according to any one of claims 1 to 3.
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