CN113767480B

CN113767480B - Inorganic light emitting diode chip and manufacturing method thereof

Info

Publication number: CN113767480B
Application number: CN202080000439.8A
Authority: CN
Inventors: 马俊杰; 卢元达; 杨山伟; 岂林霞; 熊志军; 翟明; 孙海威
Original assignee: BOE Technology Group Co Ltd; BOE Jingxin Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; BOE Jingxin Technology Co Ltd
Priority date: 2020-03-31
Filing date: 2020-03-31
Publication date: 2024-11-12
Anticipated expiration: 2040-03-31
Also published as: CN113767480A; WO2021196008A1

Abstract

An inorganic light emitting diode chip master is provided, comprising: an epitaxial layer, a plurality of spacers, and a support reinforcement layer. Wherein, two opposite sides of the epitaxial layer are a first side and a second side respectively; a plurality of spacers disposed on a first side of the epitaxial layer; the support reinforcing layer fills gaps between the plurality of pads.

Description

Inorganic light emitting diode chip and method for manufacturing the same

Technical Field

The disclosure relates to the technical field of display, in particular to an inorganic light-emitting diode chip master, an inorganic light-emitting diode chip, a manufacturing method of the inorganic light-emitting diode chip and a light-emitting diode light-emitting device.

Background

The mini LED (mini Organic Light-emission Diode) display device or micro LED (micro Organic Light-emission Diode) display device is a display device formed by a plurality of small-size LED arrays, has the advantages of high brightness, clear display picture, low power consumption and the like, and has good application prospect.

Disclosure of Invention

In one aspect, an inorganic light emitting diode chip master is provided, comprising: an epitaxial layer, a plurality of spacers, and a support reinforcement layer. Wherein, two opposite sides of the epitaxial layer are a first side and a second side respectively; a plurality of spacers disposed on a first side of the epitaxial layer; the support reinforcing layer fills gaps between the plurality of pads.

In some embodiments, the ratio of the thickness of the epitaxial layer to the thickness of the liner ranges from 1:6 to 1:2.

In some embodiments, the thickness of the at least one liner is 20 μm to 30 μm.

In some embodiments, the material of each pad comprises at least one of copper, aluminum, and copper-aluminum alloy.

In some embodiments, each liner includes a liner body, and a protective layer overlying sidewalls of the liner body and a surface remote from the epitaxial layer; the protective layer is electrically conductive.

In some embodiments, the material of the liner body comprises at least one of copper, aluminum, and copper-aluminum alloy, and the material of the protective layer comprises nickel-gold.

In some embodiments, the support reinforcing layer has a thickness of 20 μm to 30 μm.

In some embodiments, a surface of the support reinforcing layer remote from the epitaxial layer is flush with a surface of the plurality of pads remote from the epitaxial layer. Or the surface of the support reinforcing layer away from the epitaxial layer is lower than the surface of the plurality of pads away from the epitaxial layer.

In some embodiments, the material supporting the reinforcing layer comprises a cured gum-type material.

In some embodiments, the material supporting the reinforcing layer comprises a silicone, an epoxy, or a photoresist.

In some embodiments, the support reinforcing layer is white or black.

In some embodiments, where the support reinforcing layer is white, the material of the support reinforcing layer comprises titanium dioxide. In the case that the support reinforcing layer is black, the material of the support reinforcing layer includes carbon powder.

In some embodiments, a surface of the first side of the epitaxial layer has a plurality of protrusions embedded in the support reinforcement layer.

In some embodiments, the epitaxial layer has a thickness of 5 μm to 10 μm.

In some embodiments, the inorganic light emitting diode chip master has a plurality of inorganic light emitting diode chip regions; the plurality of pads includes a plurality of first pads and a plurality of second pads. The epitaxial layer comprises a plurality of epitaxial layer units, and each inorganic light emitting diode chip area is internally provided with the epitaxial layer unit, a first pad and a second pad.

The epitaxial layer unit includes: a first semiconductor layer, a light emitting layer, a second semiconductor layer and a planarization layer. The first semiconductor layer comprises a first part and a second part, the light-emitting layer is arranged on one side of the first part of the first semiconductor layer, the second semiconductor layer is arranged on one side, far away from the first semiconductor layer, of the light-emitting layer, and the flat layer covers one side, far away from the light-emitting layer, of the second semiconductor layer. The planarization layer has a first via through which the first pad is coupled with the first semiconductor layer and a second via through which the second pad is coupled with the second semiconductor layer within each of the inorganic light emitting diode chip regions.

In some embodiments, the epitaxial layer unit further comprises: the first contact electrode, the insulating layer, the conductive layer and the second contact electrode. Wherein a first contact electrode is disposed between a second portion of the first semiconductor layer and the planarization layer; the first contact electrode is in electrical contact with the second portion of the first semiconductor layer, and the first pad is coupled with the first contact electrode through the first via.

An insulating layer is disposed between the second semiconductor layer and the planarization layer. The conductive layer is disposed between the insulating layer and the planarization layer, and the conductive layer is in electrical contact with the second semiconductor layer. A second contact electrode is arranged between the conductive layer and the flat layer; the second contact electrode is in electrical contact with the conductive layer, and the second pad is coupled with the second contact electrode through the second through hole; and, the orthographic projection of the second contact electrode on the first semiconductor layer is at least partially overlapped with the orthographic projection of the insulating layer on the first semiconductor layer.

In another aspect, there is provided an inorganic light emitting diode chip obtained from the inorganic light emitting diode chip master as described above through a dicing process, the inorganic light emitting diode chip comprising: the epitaxial layer unit, set up in first liner and the second liner of epitaxial layer unit one side, and support reinforcing unit, support reinforcing unit fills in the periphery of first liner and the periphery of second liner.

In some embodiments, the first and second liners have a thickness of 20 μm to 30 μm; the thickness of the supporting and reinforcing unit is 20-30 mu m.

In still another aspect, a method for fabricating an inorganic light emitting diode chip is provided, including: providing a substrate, and forming an epitaxial layer on one side of the substrate; preparing a plurality of pads on a side of the epitaxial layer away from the substrate; forming a support reinforcing layer at the gaps between the plurality of spacers; and stripping the substrate from the epitaxial layer to obtain the inorganic light-emitting diode chip master slice.

In some embodiments, the gaps between the plurality of pads form a support reinforcing layer, comprising: forming a supporting and reinforcing film on one side of the epitaxial layer, on which a plurality of gaskets are formed, by adopting an injection molding process or a film pressing process; and removing the parts of the support reinforcing film, which are covered on the surfaces of the plurality of gaskets far away from the epitaxial layer, by adopting a grinding process, so that the surfaces of the plurality of gaskets far away from the epitaxial layer are exposed.

In some embodiments, the gaps between the plurality of pads form a support reinforcing layer, comprising: forming a supporting and reinforcing film on one side of the epitaxial layer, on which a plurality of gaskets are formed, by adopting a photoresist material; and patterning the support reinforcing film, and removing parts, which are covered on the surfaces of the plurality of gaskets far away from the epitaxial layer, of the support reinforcing film so that the surfaces of the plurality of gaskets far away from the epitaxial layer are exposed.

In some embodiments, the method for manufacturing an inorganic light emitting diode chip further includes: after the substrate is stripped from the epitaxial layer to obtain an inorganic light-emitting diode chip master slice, the inorganic light-emitting diode chip master slice is divided into a plurality of inorganic light-emitting diode chips; and respectively performing spot measurement on the plurality of inorganic light emitting diode chips, and sorting the plurality of inorganic light emitting diode chips according to the spot measurement result.

In still another aspect, there is provided a light emitting diode light emitting device including: an array substrate and a plurality of inorganic light emitting diode chips as described above disposed on the array substrate.

Drawings

In order to more clearly illustrate the technical solutions of the present disclosure, the drawings that need to be used in some embodiments of the present disclosure will be briefly described below, and it is apparent that the drawings in the following description are only drawings of some embodiments of the present disclosure, and other drawings may be obtained according to these drawings to those of ordinary skill in the art. Furthermore, the drawings in the following description may be regarded as schematic diagrams, not limiting the actual size of the products, the actual flow of the methods, the actual timing of the signals, etc. according to the embodiments of the present disclosure.

Fig. 1 is a block diagram of an inorganic light emitting diode chip according to some embodiments in the related art;

Fig. 2 is another block diagram of an inorganic light emitting diode chip according to some embodiments in the related art;

FIG. 3A is a block diagram of a light emitting diode lighting device according to some embodiments of the present disclosure;

FIG. 3B is a graph comparing the luminescence pattern of an inorganic light emitting diode chip according to some embodiments;

fig. 4 is a cross-sectional view taken along section line AA' in fig. 3A.

FIG. 5A is a block diagram of an inorganic light emitting diode chip master according to some embodiments of the present disclosure;

FIG. 5B is another block diagram of an inorganic light emitting diode chip master according to some embodiments of the present disclosure;

fig. 6A is a block diagram of an epitaxial layer unit first semiconductor layer in an inorganic light emitting diode chip according to some embodiments of the present disclosure;

Fig. 6B is a block diagram of an epitaxial layer unit in an inorganic light emitting diode chip according to some embodiments of the present disclosure;

FIG. 7 is a block diagram of an inorganic light emitting diode chip according to some embodiments of the present disclosure;

FIGS. 8A-8G are step diagrams of a method of fabricating an inorganic light emitting diode chip according to some embodiments of the present disclosure;

Fig. 9A-9G are another step diagram of a method of fabricating an inorganic light emitting diode chip according to some embodiments of the present disclosure;

FIG. 10 is a flow chart of a method of fabricating an inorganic light emitting diode chip according to some embodiments of the present disclosure;

FIG. 11A is another flow chart of a method of fabricating an inorganic light emitting diode chip according to some embodiments of the present disclosure;

fig. 11B is yet another flowchart of a method of fabricating an inorganic light emitting diode chip according to some embodiments of the present disclosure.

Detailed Description

The following description of the embodiments of the present disclosure will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present disclosure. All other embodiments obtained by one of ordinary skill in the art based on the embodiments provided by the present disclosure are within the scope of the present disclosure.

Throughout the specification and claims, unless the context requires otherwise, the word "comprise" and its other forms such as the third person referring to the singular form "comprise" and the present word "comprising" are to be construed as open, inclusive meaning, i.e. as "comprising, but not limited to. In the description of the specification, the terms "one embodiment", "some embodiments (some embodiments)", "exemplary embodiment (exemplary embodiments)", "example (example)", "specific example (some examples)", etc. are intended to indicate that a particular feature, structure, material, or characteristic associated with the embodiment or example is included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.

The terms "first" and "second" are used below for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the embodiments of the present disclosure, unless otherwise indicated, the meaning of "a plurality" is two or more.

In describing some embodiments, expressions of "coupled" and "connected" and their derivatives may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more elements are in direct physical or electrical contact with each other. As another example, the term "coupled" may be used in describing some embodiments to indicate that two or more elements are in direct physical or electrical contact.

At least one of "A, B and C" has the same meaning as at least one of "A, B or C" and includes the following combinations of A, B and C: a alone, B alone, C alone, a combination of a and B, a combination of a and C, a combination of B and C, and a combination of A, B and C.

Some embodiments of the present disclosure provide a light emitting diode light emitting device including an array substrate and a plurality of inorganic light emitting diode chips disposed on the array substrate. The plurality of inorganic light emitting diode chips are coupled with the signal sources on the array substrate, and light emission is realized under the action of the signal sources.

In some examples, as shown in fig. 3A, the light emitting diode light emitting device provided in the present disclosure is a light emitting diode display device, for example, a mini LED display device or a micro LED display device, including a plurality of inorganic light emitting diode chips, which may be specifically a sub-millimeter inorganic light emitting diode chip (mini LED chip) or a micro inorganic light emitting diode chip (micro LED chip). The led display device 30 includes an array substrate 20 and a plurality of inorganic led chips 10 disposed on one side of the array substrate 20, where the plurality of inorganic led chips 10 have high density, a large number and small pitch, so that the pixel pitch of the display device can be reduced, the resolution can be improved, and the display device has a better display effect.

Taking a mini LED display device as an example, in order to regulate the light pattern of light emitted by the sub-millimeter inorganic light emitting diode chips, an optical structure needs to be prepared at the gaps of the plurality of sub-millimeter inorganic light emitting diode chips on the array substrate. As shown in fig. 3A, in the mini LED display device 30, a wall 5 surrounding each LED chip 10 and having a certain height is prepared around each LED chip 10, for example, the wall 5 is shaped like a Chinese character kou, and the light pattern of the light emitted by the LED chip 10 can be controlled by controlling parameters such as the height of the wall 5, the distance between the wall 5 and the LED chip 10, and the inclination angle of each side wall of the wall.

As shown in fig. 3B, the inventors simulated the light pattern emitted from a single led chip. As shown in fig. 4, in the case where no enclosure wall is provided (see curve B, the inorganic light emitting diode chip used is the inorganic light emitting diode chip 10' shown in fig. 1), the intensity of the light emitted from the inorganic light emitting diode chip is low in the front view direction of the light emitting side of the inorganic light emitting diode chip, and the brightness of the light measured at each angle of the light emitting side of the inorganic light emitting diode chip is generally low, and the emitted light is relatively dispersed. In the case of providing the enclosure (see curve a, the inorganic light emitting diode chip used is the inorganic light emitting diode chip 10 shown in fig. 7), the light emitted from the inorganic light emitting diode chip is concentrated, and the intensity of the light emitted from the inorganic light emitting diode chip is highest in the forward angular direction of the light emitting side of the inorganic light emitting diode chip. Therefore, if the optical structure is arranged in the mini LED display device, the brightness of the mini LED display device in the forward viewing angle direction is highest during display, so that the display effect of the display device is good. It should be noted that, in this disclosure, the front view direction refers to a position on a normal line of a plane where the inorganic light emitting diode chip (or the display device) is located, and the normal line passes through a geometric center of the inorganic light emitting diode chip (or the display device).

Therefore, the optical structure can achieve the effects of regulating and controlling the light type and improving the display visual angle. According to the current process limits, the height of the optical structure is not greater than 50 μm; to achieve a good dimming effect and to facilitate fabrication of the optical structure, the thickness of the led chip 10 should be smaller than the height of the optical structure.

As shown in fig. 1 and 2, in the related art, the inorganic light emitting diode chip 10 'includes an epitaxial layer 2, and a first pad 31 and a second pad 32 disposed at one side of the epitaxial layer 2, wherein the epitaxial layer 2 includes a light emitting layer, an N-type semiconductor layer, a P-type semiconductor layer, and other multi-layered thin film layers, the first pad 31 and the second pad 32 are coupled with the N-type semiconductor layer and the P-type semiconductor layer in the epitaxial layer 2, respectively, the first pad 31 and the second pad 32 are for coupling with an external signal source, and the inorganic light emitting diode chip 10' can emit light by applying a voltage to the first pad 31 and the second pad 32.

In the related art, one method for manufacturing an inorganic light emitting diode chip is as follows: an epitaxial layer and a plurality of gaskets are sequentially prepared on a substrate, the substrate is thinned to a required thickness through a grinding process, an inorganic light-emitting diode chip master is obtained, and then the inorganic light-emitting diode chip master is segmented to obtain a plurality of inorganic light-emitting diode chips, and the structure of the obtained inorganic light-emitting diode chip 10' is shown in fig. 1. In the preparation method, the inorganic light-emitting diode chip master can be thinned from 700-800 μm to 80 μm by grinding the substrate, and if the substrate is continuously ground, the problem of breakage of the whole substrate can occur, so that serious yield loss is caused. In addition, since the substrate (for example, a sapphire substrate) has a lattice structure, when the mother inorganic light emitting diode chip is divided into a plurality of inorganic light emitting diode chips by a splitting process, the substrate may split along a specific direction in the lattice structure, so that the periphery of the obtained inorganic light emitting diode chip 10 'is irregular, and a bevel edge appears, and thus, the light emission pattern of the inorganic light emitting diode chip 10' is asymmetric with respect to the front view direction of the chip (as shown by a curve B in fig. 4). As shown in fig. 1, since the thickness d1 of the inorganic light emitting diode chip 10' with the substrate 1 is at least 80 μm and is greater than the maximum height (50 μm) of the above optical structure, the optical structure is difficult to manufacture, and the light emitting type of the inorganic light emitting diode chip cannot be effectively improved.

Another preparation method of the inorganic light-emitting diode chip comprises the following steps: after an epitaxial layer and a plurality of pads are sequentially prepared on a substrate, the substrate is peeled off from the epitaxial layer to obtain an inorganic light emitting diode chip master, and then the inorganic light emitting diode chip master is divided to obtain a plurality of inorganic light emitting diode chips, and the structure of the obtained inorganic light emitting diode chip 10' is shown in fig. 2. The inorganic light-emitting diode chip prepared by the method only comprises an epitaxial layer and a liner, and is easy to break under stress due to poor toughness of the epitaxial layer. Therefore, each prepared inorganic light emitting diode chip needs to be subjected to spot measurement so as to be sorted according to the requirement, and the epitaxial layer of the inorganic light emitting diode chip cannot bear the force applied by the positive and negative electrode probes when the spot measurement is performed, so that breakage occurs when the spot measurement is performed, and the epitaxial layer of the inorganic light emitting diode chip also cannot bear the force applied when the inorganic light emitting diode chip is transferred (for example, the inorganic light emitting diode chip is transferred onto an array substrate), so that the difficulty of transferring the inorganic light emitting diode chip is increased.

In summary, the method for manufacturing an inorganic light emitting diode chip and the manufactured inorganic light emitting diode chip 10' in the related art have the following problems, and in the case that the manufactured inorganic light emitting diode chip 10' has the substrate 1, the thickness of the inorganic light emitting diode chip 10' is thicker, which is not beneficial to the manufacture of an optical structure, and the light emission pattern is asymmetric. In the case that the inorganic light emitting diode chip 10 'is prepared without a substrate, the inorganic light emitting diode chip 10' is too fragile to be spot-measured and transferred, and is difficult to be applied to display products.

Based thereon, as shown in fig. 5A and 5B, some embodiments of the present disclosure provide an inorganic light emitting diode chip master 20, comprising: an epitaxial layer 2, a plurality of spacers 3 and a support reinforcing layer 4.

Wherein, the opposite sides of the epitaxial layer 2 are a first side B1 and a second side B2, respectively, a plurality of pads 3 are disposed on the first side B1 of the epitaxial layer 2, and the supporting and reinforcing layer 4 fills the gaps between the plurality of pads 3.

The above-mentioned inorganic light emitting diode chip master 20 is divided to obtain a plurality of inorganic light emitting diode chips 10. For convenience of explanation, as shown in fig. 5A and 5B, the inorganic light emitting diode chip master 20 is divided into a plurality of inorganic light emitting diode chip regions Q, and the plurality of spacers 3 include a plurality of first spacers 31 and a plurality of second spacers 32. The epitaxial layer 2 includes a plurality of epitaxial layer units 2a, and the support reinforcing layer 4 includes a plurality of support reinforcing units 4a. An epitaxial layer unit 2a, a support reinforcing unit 4a, a first spacer 31, and a second spacer 32 are provided in each of the inorganic light emitting diode chip regions Q.

As shown in fig. 7, some embodiments of the present disclosure further provide an inorganic light emitting diode chip 10, where the inorganic light emitting diode chip 10 is obtained by dividing the above-mentioned inorganic light emitting diode chip master 20, and the inorganic light emitting diode chip 10 includes: the epitaxial layer unit 2a, the first pad 31, the second pad 32, and the support reinforcing unit 4a. Wherein the first and second spacers 31 and 32 are disposed at one side of the epitaxial layer unit 2a, and the support reinforcing unit 4a is filled around the first spacer 31 and around the second spacer 32.

The inorganic light emitting diode chip master 20 provided in some embodiments of the present disclosure does not include a substrate, and the supporting and reinforcing layer 4 is filled in the gaps between the plurality of pads 3, so that the strength of the inorganic light emitting diode chip master 20 is enhanced, the situation that the epitaxial layer 2 is broken or damaged easily occurs due to stress is not easy to occur, and compared with the inorganic light emitting diode chip master including a substrate in the related art, the thickness of the inorganic light emitting diode chip master 20 provided in the present disclosure is thinner. Therefore, the inorganic light emitting diode chip 10 obtained by dividing the inorganic light emitting diode chip master 20 does not have the problem of irregular periphery, has the advantages of thinner thickness and higher strength, can bear the force applied during point measurement and the force applied during transfer, reduces the manufacturing difficulty of an optical structure due to the thinner thickness of the inorganic light emitting diode chip 10 after the inorganic light emitting diode chip 10 is transferred onto an array substrate, and can lead the height of the optical structure to be larger than the thickness of the inorganic light emitting diode chip 10, thereby having better dimming effect on light rays emitted by the inorganic light emitting diode chip 10.

As shown in fig. 5A and 5B, in some embodiments, since the inorganic light emitting diode chip master 20 provided in the embodiments of the present disclosure does not include a substrate, in order to enhance the strength of the inorganic light emitting diode chip master 20 so as to not be easily broken, the supporting and reinforcing layer 4 filled in the gaps between the plurality of pads 3 needs to have a certain thickness so that the inorganic light emitting diode chip master 20 is not too thin and too fragile, and likewise, the plurality of pads 3 also need to have a certain thickness so as to ensure that the surfaces of the plurality of pads 3 away from the epitaxial layer 2 can be exposed, and the plurality of pads 3 cannot be too thick so that the total thickness of the inorganic light emitting diode chip master 20 is too thick.

In some examples, the thickness d2 of the at least one spacer 3 is 20 μm to 30 μm, so that the thickness of the spacer 3 can be matched with the thickness of the supporting and reinforcing layer 4, so that the total thickness of the inorganic light emitting diode chip master 20 can be controlled within a reasonable range, and the inorganic light emitting diode chip 10 with moderate thickness and certain strength can be obtained. Illustratively, the inorganic light emitting diode chip master 20 includes all the pads 3 having a thickness of 20 μm to 30 μm, or at least one pad 3 having a thickness of 20 μm, 25 μm, 30 μm, or the like.

In some embodiments, the material of the pad 3 is a material with low cost and good conductivity, which is not limited in this disclosure. Illustratively, the material of each liner 3 includes at least one of copper, aluminum, and copper-aluminum alloy. For example, the material of each pad 3 is copper. Or a part of each pad 3 is made of copper, and another part of the pad 3 is made of copper-aluminum alloy.

In some embodiments, each liner 3 includes a liner body, and a protective layer overlying sidewalls of the liner body and a surface remote from epitaxial layer 2, the protective layer being electrically conductive.

The protective layer is coated on the surface of the liner body, so that the liner body can be protected, the liner body is prevented from being oxidized or corroded by water, the service life of the liner 3 is prolonged, the protective layer can conduct electricity, and the electric coupling effect can be achieved.

In some examples, the material of the pad body includes at least one of copper, aluminum, and copper-aluminum alloy, and the material of the protective layer is a conductive material having high corrosion resistance, and illustratively, the material of the protective layer includes nickel-gold.

In some embodiments, in order to enhance the strength of the inorganic light emitting diode chip mother sheet 20 so as to be less likely to break, the supporting and reinforcing layer 4 filled in the gaps between the plurality of pads 3 needs to have a certain thickness so that the inorganic light emitting diode chip mother sheet 20 is not too thin and too fragile, and at the same time, the thickness of the supporting and reinforcing layer 4 cannot be too thick so that the total thickness of the inorganic light emitting diode chip mother sheet 20 is too thick. Illustratively, as shown in fig. 5A and 5B, the thickness d3 of the support reinforcing layer 4 is 20 μm to 30 μm. For example, the thickness d3 of the support reinforcing layer 4 is 20 μm, 25 μm or 30 μm.

In some embodiments, as shown in fig. 5B, the surface of the support reinforcing layer 4 remote from the epitaxial layer 2 is flush with the surface of the plurality of pads 3 remote from the epitaxial layer 2. That is, the thickness of the support reinforcing layer 4 is consistent with the thickness of the spacer 3, and illustratively, the thickness of the support thickening layer and the thickness of the spacer 3 are both 25 μm, so that the surfaces of the plurality of spacers 3 remote from the epitaxial layer 2 can be exposed to achieve spot sorting of the inorganic light emitting diode chip 10 or coupling with a signal source on a display substrate.

In other embodiments, as shown in fig. 5A, the surface of the support reinforcing layer 4 remote from the epitaxial layer 2 is lower than the surface of the plurality of spacers 3 remote from the epitaxial layer 2. That is, the thickness of the support reinforcing layer 4 is smaller than the thickness of the spacer 3 uniformly, and the thickness of the support thickening layer is 25 μm, and the thickness of the spacer 3 is 30 μm, so that the surface of the plurality of spacers 3 away from the epitaxial layer 2 and a portion of the sidewall can be exposed to achieve spot sorting of the inorganic light emitting diode chip 10 or coupling with a signal source on the display substrate.

In some embodiments, as shown in fig. 5A and 5B, the material supporting the reinforcing layer 4 comprises a cured gum-type material. The cured adhesive material has good fluidity before being cured, can be easily filled in gaps among the plurality of gaskets 3, can be cured into solid with high strength after being filled, and can play a role in enhancing the strength of the inorganic light-emitting diode chip master 20. The present disclosure does not limit the material of the support reinforcing layer 4 as long as the material has the above-described characteristics, and illustratively, the material of the support reinforcing layer 4 includes a silicone gel, an epoxy resin, or a photoresist.

In some embodiments, the support and reinforcement layer 4 is transparent, so that light emitted from the led chip 10 can penetrate the support and reinforcement layer 4 and exit on both sides of the led chip 10.

In other embodiments, the support reinforcing layer 4 has a color, for example, the support reinforcing layer 4 is white or black, to adjust the brightness of the emitted light as desired.

Illustratively, where the support reinforcing layer 4 is white, the material of the support reinforcing layer 4 includes titanium white. For example, the material for supporting the reinforcing layer 4 includes silica gel and titanium white, and the titanium white and the silica gel are mixed according to a certain proportion to form a cured gel material.

In the case that the support reinforcing layer 4 is white, the support reinforcing layer 4 can play a role of reflecting light, and the light emitted from the epitaxial layer 2 of the inorganic light emitting diode chip 10 is reflected by the white support reinforcing layer 4, so that the brightness is enhanced, and thus the inorganic light emitting diode chip 10 can be used in a light emitting product requiring light providing high brightness.

Illustratively, in the case where the support reinforcing layer 4 is black, the material of the support reinforcing layer 4 also includes carbon powder. For example, the material of the support reinforcing layer 4 includes silica gel and carbon powder, and the carbon powder and the silica gel are mixed according to a certain proportion to form a solidified gel material.

In the case that the support reinforcing layer 4 is black, the support reinforcing layer 4 can absorb light, and the light emitted from the epitaxial layer unit 2a of the inorganic light emitting diode chip 10 is attenuated by the light absorption of the black support reinforcing layer 4, so that the inorganic light emitting diode chip 10 can be used in a display product requiring low-brightness light, and the contrast of the display product is increased.

As a possible design, as shown in fig. 5A, the surface of the first side B1 of the epitaxial layer 2 has a plurality of protrusions c embedded in the support-reinforcing layer 4. By providing a plurality of protrusions c on the surface of the first side B1 of the epitaxial layer 2 and embedding the plurality of protrusions c into the support reinforcing layer 4, the bonding force between the epitaxial layer 2 and the support reinforcing layer 4 can be increased, and the epitaxial layer 2 and the support reinforcing layer 4 are not easily separated.

In some embodiments, as shown in fig. 5A and 5B, the thickness d4 of the epitaxial layer 2 is 5 μm to 10 μm.

In some embodiments, as shown in fig. 6A, 6B and 7, the above-mentioned epitaxial layer unit 2a includes: a first semiconductor layer 21, a light emitting layer 22, a second semiconductor layer 23 and a planarization layer 28. Fig. 6B is a plan view of the epitaxial layer unit 2a without the planarization layer 28, and the cross-sectional views of the epitaxial layer unit 2a in fig. 5A, 5B, and 7 are taken along the cross-sectional line BB' in fig. 6B.

The first semiconductor layer 21 includes a first portion 21a and a second portion 21b, and illustratively, as shown in fig. 6A, the first portion 21a of the first semiconductor layer 21 surrounds the second portion 21b.

The light emitting layer 22 is provided on the first portion 21a side of the first semiconductor layer 21. Illustratively, the light emitting layer 22 includes a quantum well superlattice layer.

The light emitting layer 22 includes different materials so that the inorganic light emitting diode chip 10 can emit blue, green, or red light, for example, the material of the light emitting layer 22 includes aluminum indium gallium phosphide (AlGaInP) so that the inorganic light emitting diode chip 10 can emit red light. Or the material of the light emitting layer 22 includes indium gallium nitride (InGaN), so that the inorganic light emitting diode chip 10 can emit blue light. Or the material of the light emitting layer 22 includes aluminum gallium phosphide (AlGaP), so that the inorganic light emitting diode chip 10 can emit green light.

The second semiconductor layer 23 is disposed on a side of the light emitting layer 22 remote from the first semiconductor layer 21.

The planarization layer 28 covers a side of the second semiconductor layer 23 remote from the light emitting layer 22, and has a first via b1 and a second via b2, and in each of the inorganic light emitting diode chip regions Q, a first pad 31 is coupled to the first semiconductor layer 21 through the first via b1, and a second pad 32 is coupled to the second semiconductor layer 23 through the second via b 2. Specifically, the first pad 31 is in contact with the second portion 21b of the first semiconductor layer 21 through the first via b1, and is coupled with the first semiconductor layer 21.

In some examples, the first semiconductor layer 21 is an N-type semiconductor layer, for example, the material of the first semiconductor layer 21 is N-type gallium nitride, and the second semiconductor layer 23 is a P-type semiconductor layer, for example, the material of the first semiconductor layer 21 is P-type gallium nitride. Correspondingly, after the inorganic light emitting diode chip 10 is transferred onto the array substrate, the first pad 31 is coupled with the cathode on the array substrate, and the second pad 32 is coupled with the anode on the array substrate, so that a current path is formed among the first semiconductor layer 21, the light emitting layer 22 and the second semiconductor layer 23, and the light emitting layer 22 emits light under the action of current, thereby realizing the light emission of the inorganic light emitting diode chip 10.

In the above example, in the case where the first semiconductor layer 21 is an N-type semiconductor layer and the second semiconductor layer 23 is a P-type semiconductor layer, the thickness of the first semiconductor layer 21 may be increased so that the thickness of the first semiconductor layer 21 is greater than the thickness of the second semiconductor layer 23, and the thickness of the first semiconductor layer 21 is, for example, 2 to 5 times, for example, 4 times, the thickness of the second semiconductor layer 23, so that the ability of electrons from the first spacer 31 to spread in the first semiconductor layer 21 may be enhanced, and in the N-type semiconductor layer, the electron concentration is higher and the carrier transport rate is greater, the electrons from the first spacer 31 may be ensured to have a larger transport range in the first semiconductor layer 21, thereby improving the light emitting efficiency of the inorganic light emitting diode 10. In this way, there is no need to provide a structure for expanding the carrier transmission range corresponding to the first semiconductor layer 21 in the epitaxial layer unit 2a, and the structure for expanding the carrier transmission range described herein can be seen from the insulating layer 24 and the conductive layer 25 which appear later.

In other examples, the first semiconductor layer 21 is a P-type semiconductor layer, for example, the material of the first semiconductor layer 21 is P-type gallium nitride, and the second semiconductor layer 23 is an N-type semiconductor layer, for example, the material of the first semiconductor layer 21 is N-type gallium nitride. Correspondingly, after the inorganic light emitting diode chip 10 is transferred onto the array substrate, the first pad 31 is coupled with an anode on the array substrate, and the second pad 32 is coupled with a cathode on the array substrate, so that a current path is formed among the first semiconductor layer 21, the light emitting layer 22 and the second semiconductor layer 23, and the light emitting layer 22 emits light under the action of current, thereby realizing the light emission of the inorganic light emitting diode chip 10.

In some embodiments, the epitaxial layer unit 2a further comprises: an insulating layer 24, a conductive layer 25, a first contact electrode 26 and a second contact electrode 27.

The first contact electrode 26 is disposed on the first semiconductor layer 21, and the first pad 31 is coupled to the first contact electrode 26 through a first via. By providing the first contact electrode 26, the first pad 31 can be better coupled with the first semiconductor layer 21, enhancing the carrier transfer rate.

The insulating layer 24 is disposed between the second semiconductor layer 23 and the planarization layer 28.

The conductive layer 25 is disposed between the insulating layer 24 and the planarization layer 28. The conductive layer 25 is in electrical contact with the second semiconductor layer 23, i.e. the conductive layer 25 covers the insulating layer 24 on the side facing away from the first semiconductor layer 21, the orthographic projection of the conductive layer 25 on the first semiconductor layer 21 being greater than the orthographic projection of the insulating layer 24 on the first semiconductor layer 21, so that the conductive layer 25 can be coupled with the second semiconductor layer 23 for current transmission.

Illustratively, the conductive layer 25 is made of a material having better conductivity and stronger bonding force with the second semiconductor layer 23, so that the conductive layer 25 can more effectively transfer current to the second semiconductor layer 23. For example, the material of the conductive layer 25 is Indium Tin Oxide (ITO).

The second contact electrode 27 is disposed between the conductive layer 25 and the planarization layer 28; the second contact electrode 27 is in electrical contact with the conductive layer 25, and the second pad 32 is coupled with the second contact electrode 27 through the second via b 2. And, the orthographic projection of the second contact electrode 27 on the first semiconductor layer 21 at least partially overlaps with the orthographic projection of the insulating layer 24 on the first semiconductor layer 21.

For example, as shown in fig. 6B and 7, the second contact electrode 27 includes a first portion 27a, a second portion 27B, a third portion 27c, and a fourth portion 27d, the second portion 27B, the third portion 27c, and the fourth portion 27d are connected through the first portion 27a, and the second pad 32 is coupled to the second portion 27B of the second contact electrode 27 through a second through hole B2. In this way, the contact area between the second contact electrode 27 and the conductive layer 25 increases, the contact resistance decreases, a higher current density can be obtained under the same voltage condition, and the spreading ability of the current in the conductive layer 25 increases. The insulating layer 24 has the same shape as the second contact electrode 17, and the orthographic projection of the insulating layer 24 on the first semiconductor layer 21 substantially coincides with the orthographic projection of the second contact electrode 17 on the first semiconductor layer 21 (the insulating layer 24 is blocked by the conductive layer 25 in fig. 6B).

In the case where the first semiconductor layer 21 is a P-type semiconductor layer and the second semiconductor layer 23 is an N-type semiconductor layer, by providing the insulating layer 24 and the conductive layer 25 such that the insulating layer 24 is at least partially opposite to the second contact electrode 27 in a direction perpendicular to the plane of the first semiconductor layer 21, it is possible to prevent the current received by the second contact electrode 27 from the second pad 32 from being vertically injected into the second semiconductor layer 23, and the current transmission direction is changed during the transmission of the current to the second semiconductor layer 23 through the conductive layer 25, so that the current can be laterally expanded in the conductive layer 25. The current is transferred to the second semiconductor layer 23 through the portion of the conductive layer 25 coupled with the second semiconductor layer 23, thereby expanding the transfer range of the current in the second semiconductor layer 23, making the current distribution in the second semiconductor layer 23 more uniform, making the region of the light emission layer 22 where electrons and holes are recombined to emit light more uniform, and improving the light emission efficiency of the light emission layer 22.

In some embodiments, as shown in fig. 7, in the inorganic light emitting diode chip 10 provided in some embodiments of the present disclosure, the thickness d2 of the first and second spacers 31 and 32 is 20 μm to 30 μm, and the thickness d3 of the support reinforcing unit 4a is 20 μm to 30 μm.

Illustratively, the thickness of the first and second spacers 31 and 32 is 30 μm, the thickness of the support reinforcing unit 4a is 30 μm, and the surface of the support reinforcing unit 4a away from the epitaxial layer unit 2a is flush with the surface of the first and second spacers 31 and 32 away from the epitaxial layer unit 2 a.

Or the thickness of the first and second spacers 31 and 32 is 30 μm, the thickness of the support reinforcing unit 4a is 25 μm, and the surface of the support reinforcing unit 4a away from the epitaxial layer unit 2a is lower than the surface of the first and second spacers 31 and 32 away from the epitaxial layer unit 2 a.

The inorganic light emitting diode chip 10 provided by some embodiments of the present disclosure has the advantages of thinner thickness and higher strength, and can bear the force applied during the point measurement and the force applied during the transfer, and after the inorganic light emitting diode chip 10 is transferred onto the array substrate, the thickness of the inorganic light emitting diode chip 10 is thinner, so that the manufacturing difficulty of the optical structure is reduced, and the height of the optical structure is greater than the thickness of the inorganic light emitting diode chip 10, so that the dimming effect on the light emitted by the display substrate is better.

As shown in fig. 10, 8A to 8G, and 9A to 9G, some embodiments of the present disclosure further provide a method for manufacturing an inorganic light emitting diode chip 10, the method including:

S1, as shown in fig. 8A, a substrate 1 is provided, and an epitaxial layer 2 is formed on one side of the substrate 1.

In some examples, the substrate 1 is a sapphire substrate or a silicon substrate. A multi-layered thin film comprised by the epitaxial layer 2 is formed on one side of the substrate 1 by a metal organic compound vapor phase epitaxy process. The epitaxial layer 2 includes a plurality of epitaxial layer units 2a. Illustratively, as shown in fig. 8A, there is a certain interval between adjacent epitaxial layer units 2a. The surface of each epitaxial layer unit 2a may be covered with a protective layer having a strong corrosion resistance, so that the die master is cut into individual dies at intervals in the subsequent steps, and since the surface of each epitaxial layer unit 2a is provided with the protective layer, the film covered by the protective layer in the epitaxial layer unit 2a can be protected from corrosion, and the film covered by the protective layer in the epitaxial layer unit 2a is prevented from being directly exposed and being easily oxidized and corroded.

S2, as shown in fig. 8B, a plurality of spacers 3 are prepared on the side of the epitaxial layer 2 remote from the substrate 1.

Illustratively, a plurality of spacers 3 are prepared on the side of the epitaxial layer 2 remote from the substrate 1 using an electrochemical deposition process or an evaporation process. Wherein the plurality of spacers 3 includes a plurality of first spacers 31 and a plurality of second spacers 32, for example, as shown in fig. 8B, one first spacer 31 and one second spacer 32 are prepared on a side of each epitaxial layer unit 2a away from the substrate 1.

In some examples, the material of the liner 3 is at least one of copper, aluminum, and copper-aluminum alloy. The thickness of at least one of the pads 3 is 20 μm to 30 μm.

In some examples, the liner 3 includes a liner body, and a protective layer covering the sidewall of the liner body and the surface far from the epitaxial layer 2, wherein the material of the liner body includes at least one of copper, aluminum and copper-aluminum alloy, and the material of the protective layer includes nickel-gold, in which case, the specific step of S2 is to form the liner bodies of the plurality of liners 3 by using at least one of copper, aluminum and copper-aluminum alloy through an electrochemical deposition process or an evaporation process, and then to coat the sidewall and the surface of the liner bodies of the plurality of liners 3 with nickel-gold material by electroless plating, thereby forming the protective layer.

S3, as shown in fig. 8C to 8E, the support reinforcing layer 4 is formed in the gaps between the plurality of spacers 3.

The thickness of the support reinforcing layer 4 is, for example, 20 μm to 30 μm. The material of the support reinforcing layer 4 is a cured glue type material, and for example, the material of the support reinforcing layer 4 includes silica gel, epoxy resin or photoresist.

In some embodiments, as shown in fig. 11A, 8C to 8E, forming S3 supporting the reinforcing layer 4 at the gaps between the plurality of pads 3, includes:

S31, forming a supporting and reinforcing film 4' on one side of the epitaxial layer 2, on which a plurality of gaskets 3 are formed, by adopting an injection molding process or a film pressing process.

In some examples, as shown in fig. 8C, a stacked structure formed by the substrate 1, the epitaxial layer 2 and the plurality of spacers 3 is fixed in a mold 6, a material supporting the reinforcing layer is injected into the mold 6 so as to cover the plurality of spacers 3, and the material supporting the reinforcing layer is cured, for example, by heat curing or ultraviolet lamp curing, so that a supporting reinforcing film 4' is formed on the side of the substrate 1 where the plurality of spacers 3 are formed.

Illustratively, the material of the support reinforcing layer is silicone or epoxy, and the thickness of the support reinforcing film 4' formed is greater than the thickness of the plurality of pads 3.

And S32, removing the parts of the supporting and reinforcing film 4' which are covered on the surfaces of the plurality of gaskets 3 away from the epitaxial layer by adopting a grinding process, so that the surfaces of the plurality of gaskets 3 away from the epitaxial layer 2 are exposed.

Illustratively, the support reinforcing film 4' is ground using a grinder until the surfaces of the plurality of spacers 3 away from the epitaxial layer 2 are exposed, for example, a portion of the support reinforcing film 4' shown in fig. 8D located above the broken line is removed, leaving a portion of the support reinforcing film 4' located below the broken line, resulting in the support reinforcing layer 4 shown in fig. 8E. The "removing the portions of the support reinforcing film 4 'that cover the surfaces of the plurality of spacers 3 that are away from the epitaxial layer" herein means removing all the portions of the support reinforcing film 4' that are higher than the plurality of spacers 3. At this time, the surface of the support reinforcing layer 4 away from the epitaxial layer 2 is flush with the surfaces of the plurality of spacers 3 away from the epitaxial layer 2, for example, the thickness of the support reinforcing layer 4 and the thickness of the spacers 3 are both 30 μm.

In other embodiments, as shown in fig. 11B, 9C to 9E, S3 for supporting the reinforcing layer 4 is formed in the gaps between the plurality of pads 3, including:

S31', a supporting reinforcement film 4' is formed on the side of the epitaxial layer 2 where the plurality of spacers 3 are formed, using a photoresist material.

Illustratively, as shown in fig. 9C, photoresist is spin-coated on the side of the epitaxial layer 2 where the plurality of spacers 3 are formed, forming a support reinforcing film 4'.

S32', patterning the support reinforcing film 4', and removing portions of the support reinforcing film 4' covering the surfaces of the plurality of spacers 3 away from the epitaxial layer 2 to expose the surfaces of the plurality of spacers 3 away from the epitaxial layer 2.

Illustratively, the support reinforcing film 4' is patterned by an exposure developing process, specifically comprising the following steps:

the support reinforcing film 4 'is exposed, and the exposure depth of the support reinforcing film 4' is controlled by controlling exposure parameters such as the exposure time period, the exposure intensity, and the like. For example, as shown in fig. 9D, the exposure depth in the support reinforcing film 4' is made to be h.

After the support reinforcing film 4' is exposed, a developing solution is applied to the surface of the support reinforcing film 4', and the exposed portion of the developing solution and the support reinforcing film 4' is dissolved in the developing solution, for example, a portion of the support reinforcing film 4' located above the broken line in fig. 9D is dissolved in the developing solution, and this portion is removed, and a portion of the support reinforcing film 4' located below the broken line in fig. 9D is left to obtain the support cured layer 4 (as shown in fig. 9E). At this time, the surface of the support reinforcing layer 4 away from the epitaxial layer 2 is lower than the surface of the plurality of spacers 3 away from the epitaxial layer 2, for example, the thickness of the support reinforcing layer 4 is 25 μm, and the thickness of the spacers 3 is 30 μm.

By adopting the method, the thickness of the supporting and reinforcing layer can be accurately controlled through the exposure and development process, and the preparation precision is high.

S4, as shown in fig. 8F, the substrate 1 is peeled off from the epitaxial layer 2 to obtain the inorganic light emitting diode chip master 20.

In some examples, in the case where the substrate 1 is a sapphire substrate, the manner of peeling the substrate 1 from the epitaxial layer 2 in S4 is to use a laser peeling technique, in which case, before forming the epitaxial layer 2 on one side of the substrate 1 in S1, a step of forming a buffer layer on one side of the substrate 1 is further included, and the material of the buffer layer is illustratively gallium nitride. In this way, in S4, the buffer layer between the substrate 1 and the epitaxial layer 2 is vaporized by the laser light, and the substrate 1 is peeled from the epitaxial layer 2.

In other examples, in the case where the material of the substrate 1 is a silicon substrate, the substrate 1 is peeled from the epitaxial layer 2 in S4 by using an acid etching technique, for example, immersing the substrate 1 in a strong acid etching solution, and etching the substrate 1 to achieve the peeling of the substrate 1 from the epitaxial layer 2.

S5, as shown in fig. 8G, the inorganic light emitting diode chip master 20 is divided into a plurality of inorganic light emitting diode chips 10.

Illustratively, the inorganic light emitting diode chip master 20 is cut into the plurality of inorganic light emitting diode chips 10 according to the divided plurality of inorganic light emitting diode chip areas using a cutting process, which is not limited by the present disclosure, and may be, for example, mechanical cutting or laser cutting. Wherein each inorganic light emitting diode chip 10 includes an epitaxial layer unit 2a, a first pad 31 and a second pad 32 provided at one side of the epitaxial layer unit 2a, and a support reinforcing unit 4a filled around the first pad 31 and around the second pad 32.

S6, respectively performing spot measurement on the plurality of inorganic light emitting diode chips 10, and sorting the plurality of inorganic light emitting diode chips 10 according to the spot measurement result.

Illustratively, the plurality of inorganic light emitting diode chips 10 are spot-measured by a probe method, for example, two probes are respectively contacted with the surfaces of the first pad 31 and the second pad 32, which are far away from the epitaxial layer 2, the optical properties of the respective inorganic light emitting diode chips 10 are measured, and the plurality of inorganic light emitting diode chips 10 are sorted according to the spot measurement result.

According to the preparation method of the inorganic light emitting diode chip 10 provided by some embodiments of the present disclosure, the strength of the inorganic light emitting diode chip master 20 is increased by forming the supporting and reinforcing layer 4 in the gaps between the plurality of pads 3, so that the inorganic light emitting diode chip master 20 can bear the stress during the peeling process of the substrate 1 and cannot be broken or damaged, and compared with the inorganic light emitting diode chip master with the substrate 1, the thickness of the obtained inorganic light emitting diode chip master 20 is reduced, and therefore, the thickness of the obtained inorganic light emitting diode chip 10 is thinner and the strength is higher.

In addition, the inorganic light emitting diode chip 10 prepared by the preparation method provided by the disclosure comprises the supporting and reinforcing units 4a filled around the first liner 31 and the second liner 32, so that the strength of the inorganic light emitting diode chip 10 is improved, and therefore, the inorganic light emitting diode chip 10 can bear the force applied by the probe when the point measurement is performed and can bear the example when the point measurement is performed, and the breakage is not easy to occur.

In some embodiments, the led light emitting device provided in the present disclosure is an led display device, as shown in fig. 3A and fig. 4, in which an array substrate is an array substrate, a plurality of inorganic led chips 10 are packaged on the array substrate 20, and the inorganic led chips 10 may be packaged on the array substrate in a flip-chip or a paste-mounting manner, and in fig. 4, the flip-chip manner is taken as an example.

As shown in fig. 4, the array substrate 20 includes a plurality of thin film transistors TFTs, a plurality of anodes 81 and a plurality of cathodes 82, each anode 81 is coupled to a drain electrode of one thin film transistor TFT, two pads 3 included in each inorganic light emitting diode chip 10 are respectively coupled to one anode 81 and one cathode 82, for example, in the case that a first semiconductor layer of the light emitting layers of the inorganic light emitting diode chips 10 is an N-type semiconductor layer and a second semiconductor layer is a P-type semiconductor layer, the first pad 31 of each inorganic light emitting diode chip 10 is bonded and connected to the cathode 82 through a conductive material 9 (e.g., solder), the second pad 32 of each inorganic light emitting diode chip 10 is coupled to one anode 81 through solder 9, and whether the corresponding inorganic light emitting diode chip 10 emits light is controlled by turning on and off the thin film transistor TFT, thereby realizing display.

In some examples, as shown in fig. 3A, the plurality of inorganic light emitting diode chips 10 include a plurality of blue light inorganic light emitting diode chips, a plurality of red light inorganic light emitting diode chips, and a plurality of green light inorganic light emitting diode chips, and the inorganic light emitting diode chips 10 of three colors are arranged in an array according to a certain rule. The optical structure 5 is disposed around each of the inorganic light emitting diode chips 10, for example, a square enclosure with a certain height, and because the thickness of the inorganic light emitting diode chip 10 provided in some embodiments of the present disclosure is thinner, the difficulty of the preparation process of the optical structure can be reduced, and the height of the optical structure can be greater than the thickness of the inorganic light emitting diode chip 10, so that light emitted by the inorganic light emitting diode chip 10 can be controlled in a light type, and the display viewing angle of the display device can be improved.

In other examples, the LED lighting device provided in the present disclosure is a LED lamp panel, such as a mini LED lamp panel, which may be used as a surface light source, and, for example, the LED lamp panel may be used as a backlight source in a backlight module to provide light for a liquid crystal display device.

The foregoing is merely a specific embodiment of the disclosure, but the protection scope of the disclosure is not limited thereto, and any person skilled in the art who is skilled in the art will recognize that changes or substitutions are within the technical scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

1. A light emitting diode lighting device, comprising:

An array substrate;

A plurality of inorganic light emitting diode chips disposed on the array substrate; the inorganic light-emitting diode chip is obtained by dividing an inorganic light-emitting diode chip master slice; the inorganic light emitting diode chip master has a plurality of inorganic light emitting diode chip areas;

A plurality of optical structures arranged on the array substrate, wherein each optical structure is arranged around one inorganic light emitting diode chip;

The inorganic light emitting diode chip includes:

An epitaxial layer unit;

The first liner and the second liner are arranged on one side of the epitaxial layer unit, which is close to the array substrate; the surfaces of the first pad and the second pad, which are far away from the epitaxial layer unit, are far away from the epitaxial layer unit relative to the surface of the array substrate, which is close to the epitaxial layer unit;

A support reinforcing unit filled around the first pad and around the second pad;

The inorganic light emitting diode chip master comprises:

the epitaxial layer is provided with a first side and a second side at two opposite sides respectively;

A plurality of spacers disposed on a first side of the epitaxial layer; the plurality of pads includes a plurality of the first pads and a plurality of the second pads;

a support reinforcing layer filling gaps between the plurality of pads;

Wherein a surface of the support reinforcing layer remote from the epitaxial layer is lower than a surface of the plurality of pads remote from the epitaxial layer; the surface of the optical structure, which is far away from the array substrate, is far away from the array substrate relative to the surface of the epitaxial layer unit, which is far away from the array substrate.

2. The light emitting diode light emitting device of claim 1, wherein a ratio of a thickness of the epitaxial layer to a thickness of the spacer is in a range of 1:6 to 1:2.

3. The light emitting diode lighting device of claim 1, wherein the thickness of the at least one spacer is 20-30 μm.

4. The light emitting diode lighting device of claim 1, wherein the material of each pad comprises at least one of copper, aluminum, and copper-aluminum alloy.

5. The light emitting diode light emitting device of claim 1, wherein each pad comprises a pad body, and a protective layer covering sidewalls of the pad body and a surface remote from the epitaxial layer; the protective layer is electrically conductive.

6. The light emitting diode lighting device of claim 5, wherein the material of the pad body comprises at least one of copper, aluminum, and copper-aluminum alloy, and the material of the protective layer comprises nickel-gold.

7. The light emitting diode lighting device of claim 1, wherein the thickness of the support reinforcing layer is 20-30 μm.

8. The light-emitting diode light-emitting device according to any one of claims 1 to 7, wherein the material of the supporting and reinforcing layer comprises a cured glue material.

9. The light emitting diode lighting device of claim 8, wherein the material supporting the reinforcement layer comprises a silicone, an epoxy, or a photoresist.

10. The light-emitting diode light-emitting device according to any one of claims 1 to 7, wherein the support reinforcing layer is white or black.

11. The light emitting diode lighting device of claim 10, wherein,

Under the condition that the supporting and reinforcing layer is white, the material of the supporting and reinforcing layer comprises titanium white;

in the case that the support reinforcing layer is black, the material of the support reinforcing layer includes carbon powder.

12. The light-emitting diode light-emitting device according to any one of claims 1 to 7, wherein a surface of the first side of the epitaxial layer has a plurality of protrusions embedded in the support reinforcing layer.

13. The light-emitting diode light-emitting device according to any one of claims 1 to 7, wherein the thickness of the epitaxial layer is 5 μm to 10 μm.

14. The light-emitting diode lighting device according to any one of claims 1-7, wherein,

The epitaxial layer comprises a plurality of epitaxial layer units, and each inorganic light emitting diode chip area is internally provided with an epitaxial layer unit, a first pad and a second pad;

The epitaxial layer unit includes:

a first semiconductor layer; the first semiconductor layer includes a first portion and a second portion;

A light-emitting layer provided on a first portion side of the first semiconductor layer;

A second semiconductor layer disposed on a side of the light emitting layer away from the first semiconductor layer;

A flat layer covering one side of the second semiconductor layer far away from the light-emitting layer; the planarization layer has a first via through which the first pad is coupled with the first semiconductor layer and a second via through which the second pad is coupled with the second semiconductor layer within each of the inorganic light emitting diode chip regions.

15. The light emitting diode light emitting device of claim 14, wherein the epitaxial layer unit further comprises:

A first contact electrode disposed between a second portion of the first semiconductor layer and the planarization layer; the first contact electrode is in electrical contact with the second portion of the first semiconductor layer, and the first pad is coupled with the first contact electrode through the first via;

an insulating layer disposed between the second semiconductor layer and the planarization layer;

a conductive layer disposed between the insulating layer and the planarization layer; the conductive layer is in electrical contact with the second semiconductor layer;

A second contact electrode disposed between the conductive layer and the planarization layer; the second contact electrode is in electrical contact with the conductive layer, and the second pad is coupled with the second contact electrode through the second through hole; and, the orthographic projection of the second contact electrode on the first semiconductor layer is at least partially overlapped with the orthographic projection of the insulating layer on the first semiconductor layer.

16. The light-emitting diode lighting device according to any one of claims 1-7, wherein,

The thickness of the first liner and the second liner is 20-30 mu m;

the thickness of the supporting and reinforcing unit is 20-30 mu m.

17. A method for manufacturing an inorganic light emitting diode chip, wherein the inorganic light emitting diode chip is an inorganic light emitting diode chip included in the light emitting diode light emitting device of any one of claims 1 to 16; the manufacturing method comprises the following steps:

providing a substrate, and forming an epitaxial layer on one side of the substrate;

preparing a plurality of pads on a side of the epitaxial layer away from the substrate;

Forming a support reinforcing layer at the gaps between the plurality of spacers;

And stripping the substrate from the epitaxial layer to obtain the inorganic light-emitting diode chip master slice.

18. The method of fabricating an inorganic light emitting diode chip as set forth in claim 17, wherein the gaps between the plurality of pads form a supporting reinforcement layer, comprising:

Forming a supporting and reinforcing film on one side of the epitaxial layer, on which a plurality of gaskets are formed, by adopting a photoresist material;

and patterning the support reinforcing film, and removing parts, which are covered on the surfaces of the plurality of gaskets far away from the epitaxial layer, of the support reinforcing film so that the surfaces of the plurality of gaskets far away from the epitaxial layer are exposed.