CN113948040B

CN113948040B - Display panel

Info

Publication number: CN113948040B
Application number: CN202111383860.4A
Authority: CN
Inventors: 黄忠守
Original assignee: Vision Technology Co ltd
Current assignee: Vision Technology Co ltd
Priority date: 2021-11-22
Filing date: 2021-11-22
Publication date: 2023-07-07
Anticipated expiration: 2041-11-22
Also published as: CN113948040A; US11508303B1

Abstract

The invention provides a display panel which comprises a pixel array formed by a plurality of pixels, wherein each pixel comprises a pulse generating component, a first switch component, a light emitting component and a second switch component which are sequentially connected in series. The pulse generating assembly outputs a first pulse for controlling the on-off of the first switch assembly and a second pulse for controlling the on-off of the second switch assembly respectively, wherein the phases of the first pulse and the second pulse are opposite, and the first switch assembly and the second switch assembly are synchronously opened or closed. When the first switch component and the second switch component are synchronously started, the anode voltage and the cathode voltage are simultaneously applied to the light-emitting component to excite the light-emitting component to emit light. The two switch components and the light-emitting component share the whole driving voltage, so that the risks of leakage current and harmful parasitic effects in the driving circuit are reduced, and noises generated by two pulse voltages with opposite phases can be mutually offset.

Description

Display panel

Technical Field

The invention relates to the technical field of display, in particular to a display panel.

Background

Micro LED display technology refers to an array of Micro-sized LEDs (Light-Emitting diodes) integrated at high density on one substrate, and the size of each pixel is in the range of several micrometers to hundreds of micrometers according to different sizes of display screens, and since the driving circuit in the pixel occupies a certain area, the size of the LED Light Emitting chip in each pixel is smaller than that of the pixel. In driving such high-density Micro LED display panels, a current mature approach is to solder or electrically connect LED light emitting chips to a CMOS (Complementary Metal Oxide Semiconductor ) integrated circuit with a silicon chip as a substrate. Since Micro LEDs are usually gallium nitride crystals fabricated on a Sapphire (Sapphire) substrate, the Micro LEDs have the characteristics of high conversion efficiency, high brightness, long service life and ultra-fast response speed, and are the most ideal light-emitting sources for various displays in the future. In particular, so-called mass transfer manufacturing techniques for precisely transferring a large number of micrometer-sized gallium nitride grains onto a driving array on another glass substrate or on a silicon substrate have been gradually matured in recent years, and it can be said that the use of Micro LEDs on television screens, mobile phone display screens, and even Micro display screens in AR (Augmented Reality ) glasses has been opened. The excellent light-emitting brightness and lifetime characteristics of the organic light-emitting diode display technology compared to the organic light-emitting diode display technology widely used at present make the display technology industry confirm that this will be a substitute for the organic light-emitting diode display technology and be the leading line of the next generation display technology.

However, current Micro LED technology also faces four technical and manufacturing challenges: electro-optical conversion efficiency, full color, yield, and uniformity of emission color. The functional relationship between the luminous flux emitted by the gallium nitride-doped LED light-emitting region and the injected current, known as conversion efficiency, is not a constant but a nonlinear function. The conversion efficiency is low when the current is small, gradually increases as the injection current increases, and starts to decrease after the conversion efficiency reaches a peak value near a certain current value. During this process, the spectrum of the gallium nitride LED also shifts somewhat. In order to save the power consumption of the LED display screen and to obtain a uniform and consistent emission color, each Micro LED die on the display panel needs to be driven in an equal and highest conversion efficiency current area. In order to represent different brightness or color of the pixel, a more mature way is to make the driving chip perform pulse width modulation (PWM, pulse Width Modulation) current driving on each LED, that is, to implement digitally modulated light-emitting brightness by setting the duty ratio of the current pulse. At each instant of light emission from the LED, the intensity of the light emitted from the LED is the same, but when the length of the light pulse emitted from the LED in the pixel within one frame time is different, the human eye can also feel different average brightness.

However, each mico LED emits a difference in brightness and color driven by the same current due to the manufacturing process and spatial non-uniformity of the material. A full color RGB array requires multiple transfer of at least hundreds of thousands of LED dies that emit three colors red, green, and blue, respectively. The difference of the luminous brightness and the color of each LED crystal grain can be directly displayed on a display screen. After the epitaxial gallium nitride chip is cut into independent grains, according to similar luminous brightness and wavelength partition, the LED grains with luminous characteristics basically in one area are selected to be transferred and welded to different pixel points on the same driving backboard, so that part of LED grains with larger characteristic deviation can only be abandoned. Thus, the yield of the manufacture is reduced and the cost is increased. Even with the combination of single-color LED dies, such as blue LED dies, and red and green quantum dot luminescent materials, there is still a difference in brightness and current characteristics of the blue LED dies, resulting in non-uniformity in brightness or color of individual pixels on the screen.

With the development of Micro LED technology, especially when applied to AR glasses with extremely high pixel density, another technical contradiction will occur and become more serious. This is when the LED is driven with a voltage that achieves a certain brightness or conversion efficiency, which voltage may exceed the ideal driving voltage range for the transistors in the integrated CMOS circuit. With the increase of pixel density, the size and driving voltage of CMOS transistors driving the LED array should be scaled down to suppress various parasitic effects generated in the silicon substrate body at higher driving voltages, such as Latch-up (Latch-up) in CMOS circuits and longitudinal and lateral leakage currents in the body. However, the light emitting diode itself has a characteristic that the brightness thereof is strongly dependent on the passing current or the voltage across the light emitting diode, and the driving voltage of the light emitting diode cannot be reduced accordingly.

Disclosure of Invention

In order to solve the technical difficulties described above, the present invention provides a display panel including a pixel array composed of a plurality of pixels. Each pixel comprises a pulse generating component, a first switching component, a light emitting component and a second switching component which are sequentially connected in series. The first switch component and the second switch component are synchronously turned on or turned off, when the first switch component and the second switch component are synchronously turned on, the anode voltage and the cathode voltage are simultaneously applied to the light-emitting component to excite the light-emitting component to emit light, so that the two switch components and the light-emitting component share the integral driving voltage of the light-emitting component. Even if the driving voltage of the light emitting component is higher, as each switch component bears less than half of the whole driving voltage, the risk of parasitic effect generated due to the fact that the actual driving voltage is higher than the ideal driving voltage can be greatly reduced. The pulse generating component is used for respectively generating a first pulse for controlling the on-off of the first switch component and a second pulse for controlling the on-off of the second switch component, and the phases of the first pulse and the second pulse are opposite, so that noises generated by the two pulses in the pixel array can be mutually inhibited or completely counteracted, and the electrical noise is reduced.

The first switch component and the second switch component may be different types of MOS transistors, for example, the first switch component includes a PMOS transistor or an NMOS transistor, and the second switch component includes an NMOS transistor or a PMOS transistor. The implementation mode of the pulse generating component is to adopt a voltage comparator and a first inverter, wherein a first input end and a second input end of the voltage comparator are respectively input with a data voltage and a sawtooth wave voltage, and an output end of the voltage comparator is connected with the input end of the first inverter, so that the pulse generating component outputs two PWM pulse trains with opposite phases, and the driving mode for controlling the luminous state of the luminous component by using two groups of data voltages with opposite phases is realized. Considering that the reverse pulse is output from the output terminal of the voltage comparator through the additional inverter with additional time delay, a first buffer may be further added between the output terminal of the voltage comparator and the first switching component, so that the phase difference between the forward pulse and the reverse pulse is close to or equal to 180 degrees.

Further, the voltage comparators of the pixels of different pixel rows may input opposite-phase sawtooth voltages, for example, opposite-phase sawtooth voltages are respectively input in odd rows and even rows, so that high-frequency noise induced by the sawtooth voltages on bus lines of the pixel array, such as data lines, may cancel each other, and interference of the sawtooth voltages to analog signals during a data writing stage is reduced. Alternatively, the voltage comparators of the pixels of different pixel columns may input opposite-phase sawtooth voltages, for example, opposite-phase sawtooth voltages are respectively input in odd columns and even columns, so that high-frequency noise induced by the sawtooth voltages on bus lines of the pixel array, such as data lines, may cancel each other, and interference of the sawtooth voltages to analog signals during the data writing stage is reduced.

The light emitting assembly may include one or more light emitting elements. When the light emitting assembly includes a plurality of light emitting elements of the same light emitting color (same color), the plurality of light emitting elements may be connected in series or in parallel. The brightness difference between the same-color light-emitting components can be reduced by screening out grains with different brightness on the same-color micro LED wafer to combine and place the grains in the light-emitting components of one pixel. Specifically, when one light emitting component includes a plurality of light emitting elements of the same color connected in series, micro led dies are reasonably selected and combined so that the brightness difference of the light emitting elements of the same color is less than 10% of the average brightness of all the light emitting elements of the same color on the pixel array under the drive of the same current. Similarly, when one light emitting component comprises a plurality of parallel light emitting elements with the same color, the Micro LED crystal grains are reasonably selected and combined, so that the brightness difference of the light emitting elements with the same color is less than 10% of the average brightness of all the light emitting elements with the same color in the pixel array under the drive of the same voltage. Since the brightness of the light-emitting component is the brightness of the light-emitting elements after being combined, micro LED grains with larger characteristic deviation average value can be combined with other light-emitting elements without waste, the manufacturing yield can be obviously improved, and the light-emitting uniformity of the whole display panel is also improved.

Drawings

Other features, objects and advantages of the present invention will become more apparent upon reading of the detailed description of non-limiting embodiments, made with reference to the following drawings.

FIG. 1 is a schematic diagram of an equivalent circuit of a pixel in a display panel according to the present invention;

fig. 2 is an equivalent circuit schematic diagram of a pixel in a display panel according to a first embodiment of the present invention;

FIG. 3 is a schematic diagram of an equivalent circuit of a pixel in a display panel according to a second embodiment of the present invention;

FIG. 4 is a schematic diagram of a sapphire wafer cut to obtain individual LED dies;

FIG. 5 is a schematic diagram of an LED brightness distribution;

fig. 6 is an equivalent circuit schematic diagram of a pixel in a display panel according to a third embodiment of the present invention;

fig. 7 is an equivalent circuit schematic diagram of a pixel in a display panel according to a fourth embodiment of the present invention;

fig. 8 is an equivalent circuit schematic diagram of a pixel in a display panel according to a fifth embodiment of the present invention;

FIG. 9 is a schematic circuit diagram of an implementation of a pulse generating assembly of the present invention;

fig. 10 is an equivalent circuit schematic diagram of a pixel array in a display panel according to a sixth embodiment of the present invention;

fig. 11 is a schematic diagram of two saw-tooth pulses according to a sixth embodiment of the invention.

Detailed Description

Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments can be embodied in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and thus a repetitive description thereof will be omitted.

The invention provides a display panel which comprises a pixel array composed of a plurality of pixels, wherein each pixel is a self-luminous pixel. Fig. 1 is a schematic diagram of an equivalent circuit of a pixel in a display panel according to the present invention. As shown in fig. 1, each of the pixels 10 includes a pulse generating component 20, a first switching component 41, a light emitting component 50, and a second switching component 42, wherein the first switching component 41, the light emitting component 50, and the second switching component 42 are sequentially connected in sequence. The pulse generating component 50 is used for respectively generating a first pulse 33 for controlling the on-off of the first switch component 41 and a second pulse 34 for controlling the on-off of the second switch component 42. The first switch assembly 41 controls the on-off state between the anode power VA and the first end of the light emitting assembly 50, and the second switch assembly 42 controls the on-off state between the cathode power VC and the second end of the light emitting assembly 50. The first switch assembly 41 and the second switch assembly 42 are synchronously turned on or off, and when the first switch assembly 41 and the second switch assembly 42 are synchronously turned on, the anode voltage and the cathode voltage are simultaneously applied to the light emitting assembly 50 to excite the light emitting assembly to emit light, so that the two

switch assemblies

41,42 and the switch assemblies share the overall driving voltage of the light emitting assembly 50. Even if the driving voltage of the light emitting assembly 50 is high, since each switching

assembly

41,42 assumes less than half of the total driving voltage, the risk of leakage and parasitic effects due to the actual driving voltage being higher than the ideal driving voltage can be greatly reduced. And the phases of the first pulse 33 and the second pulse 34 are opposite so that the noise generated in the pixel array by the two pulses can be mutually suppressed or completely cancelled, thereby reducing the electrical noise.

Fig. 2 is a schematic diagram of an equivalent circuit of a pixel in a display panel according to a first embodiment of the invention. Wherein T1 is a switching transistor having one end connected to a column Data Line in a vertical direction and the other end connected to a storage capacitor Cst storing an analog signal voltage in the pixel. The gate of the transistor T1 is connected to a Scan Line of a row. The periodic scanning pulse on the scanning line turns on the transistor T1, and an externally input analog signal voltage is written into the pixel and stored. This combination of the transistor T1 and the storage capacitor Cst is substantially the same as a usual pixel voltage writing portion of a TFT-OLED pixel or a silicon-based OLED pixel.

As shown in fig. 2, in this embodiment, each of the pixels 11 includes a pulse generating component 20, a first switching component 41, a light emitting component 50, and a second switching component 42. The pulse generating assembly 20 has two input ports, a first input connected to the storage capacitor Cst such that the first input is supplied with a data voltage Vdata, indicated at 31 in fig. 2, and a second input connected to a saw-tooth pulse source, resulting in an input of a saw-tooth voltage Vref, indicated at 32 in fig. 2. This sawtooth pulse source is in one embodiment common to all pixels outside the pixel array, in another embodiment different sawtooth pulse sources may be used differently, or there may be an own oscillator inside each pixel as the pulse source to generate the periodic sawtooth pulse. The pulse generator 20 generates two first and second pulses Vout1 and Vout2 of opposite phases, respectively identified as 33 and 34 in fig. 2, based on the input data voltage Vdata and the sawtooth voltage Vref. In this embodiment, the first pulse 33 and the second pulse 34 are 180 degrees out of phase. Both

pulses

33,34 are digital pulses, i.e. the first pulse 33 and the second pulse 34 have respective high and low amplitudes, one being high and the other being low, and the absolute values of the high and low amplitudes of the first pulse 33 and the second pulse 34 may be the same or different.

In this embodiment, the first switching element 41 includes an NMOS switching transistor, and the second switching element 42 includes a PMOS switching transistor, and the first switching element 41, the light emitting element 50, and the second switching element 42 are sequentially connected in series. One of the switching elements, such as the drain (or source) of the NMOS switching transistor of the first switching element 41, is connected to the anode supply VA, and the other switching element, such as the drain (or source) of the PMOS switching transistor of the second switching element 42, is connected to the cathode supply VC. One output of the pulse generator 20 is connected to the gate of the NMOS switching transistor and the other output is connected to the gate of the PMOS switching transistor. Therefore, when a positive pulse is applied to the NMOS switching transistor, a negative pulse is simultaneously applied to the PMOS switching transistor, and both switching transistors are simultaneously turned on, and the anode and cathode voltages are applied to the light emitting element 50, so that light is emitted.

The voltage driving the light emitting element 50 (the voltage between the anode power supply VA and the cathode power supply VC) may be higher than the driving voltage of a single MOS switch transistor and the silicon-based circuit described therein, but it is already seen from the circuit of fig. 2 that the two switch transistors and the light emitting element share, that is, each switch transistor assumes less than half of the total voltage (VA-VC), so that the risk of generating undesirable effects such as Latch-up in the body of the highly integrated CMOS chip can be greatly reduced. Another advantage of embodiments of the present invention is that the rising and falling edges of the first and second pulses having opposite phases are suppressed or completely cancelled by the impulse noise induced in the pixel array by various parasitic capacitances or effects, thereby reducing the electrical noise.

In this embodiment, the first switching element 41 may also be a PMOS switching transistor, while the second switching element 42 is an NMOS switching transistor. In this embodiment, the first switching element 41 and the second switching element 42 are MOS transistors, but in other alternative embodiments, the first switching element 41 and the second switching element 42 may use two electronic switches in which electrons or holes are conductive bodies, such as N-type and P-type bipolar transistors (BJTs) or N-type and P-type Field Effect Transistors (FETs), respectively.

In order to ensure that the first pulse 33 and the second pulse 34 can simultaneously open the first switch component 41 and the second switch component 42 connected in series with the light emitting component 50, besides the first pulse 33 and the second pulse 34 with different heights and bias voltages respectively generated by the pulse generator 20, the threshold voltages of the MOS transistors adopted by the first switch component 41 and the second switch component 42 can be appropriately adjusted, so that the first switch component 41 and the second switch component 42 can be synchronously opened or closed under respective control pulses.

The rising edge or falling edge of the first pulse and the second pulse may have a certain delay and advance due to the difference of the pulse generating circuits and the load of the driving object, but basically the first switch component and the second switch component can be synchronously turned on and off, and for simplicity, the pulses still having a certain time difference are referred to as opposite phases, without departing from the basic concept of the invention. In the first embodiment, the light emitting assembly 50 may include one or more light emitting elements, which may be organic light emitting diodes or inorganic light emitting diodes, particularly gallium nitride or gallium arsenide light emitting diodes, or may include other electroluminescent films, or even combinations of light emitting diodes of different materials. When a plurality of light emitting elements are included in one light emitting assembly 50, the plurality of light emitting elements have the same light emitting color. Here the same luminescent colors may include red, green, blue, orange, cyan, yellow and white. In addition to crystalline LEDs, the mobility of materials for many LEDs is low, such as organic LED thin films, so that the threshold voltage at which the LED starts to emit light is relatively high, and even 5V to 10V is required to reach a driving voltage of a certain brightness. Such a high voltage is likely to cause breakdown of the gate insulating film in the CMOS circuit, leakage current between diffusion layers, between the diffusion layers and the silicon substrate is large, or parasitic effects such as latch-up occur. In the first embodiment, the two switching transistors share the total voltage, so that the risk of generating adverse effects such as latch-up effect, leakage current and the like in the body of the CMOS chip is reduced, the product yield is remarkably improved, the cost is reduced, and finally, the application range of the Micro LED in various display fields can be enlarged.

Fig. 3 is a schematic diagram of an equivalent circuit of a pixel in a display panel according to a second embodiment of the invention. The pixel 12 shown in fig. 3 differs from the pixel 11 shown in fig. 2 in that: the light emitting assembly includes two light emitting diodes: the first light emitting diode 51 and the second light emitting diode 52, the two

light emitting diodes

51,52 are connected in series with each other, and the two

light emitting diodes

51,52 have the same light emission color. Here the same luminescent colors may include red, green, blue, orange, cyan, yellow and white. Assuming that the driving voltage of each led to achieve a certain brightness is 2.5V, the driving voltage of the light emitting device formed by connecting two leds in series is 5V, that is, if the on-resistance of the first switching device 41 and the second switching device 42 is ignored, the voltage VA-vc=5v between the anode power source VA and the cathode power source VC. The maximum voltage drop experienced by the switching transistor of each switching assembly is 2.5V. For a CMOS chip with high integration, the operating voltage and the withstand voltage of the gate insulating film are reduced according to a certain proportion with the reduction of the transistor, and the reduction of the operating voltage is beneficial to the reduction of the volume of the transistor, so that the CMOS chip can be well applied to an integrated high-density and micro-sized display panel.

In the conventional method for screening and transferring LED dies, if the brightness or color deviation of the LED dies from the same sapphire wafer is too large, the LED dies cannot be used on the same display screen, otherwise, the uniformity of brightness and color of the display screen is affected, so that only the LED dies with large characteristic deviation can be discarded, resulting in a reduction in the utilization rate or yield of the LED dies epitaxially grown on the sapphire wafer, and a great increase in the cost of the display panel. Another advantage of the pixel 12 of the second embodiment is that it can improve the utilization of LEDs on the wafer and the uniformity of the brightness and color of the display screen by using two

LEDs

51,52 in series. Specifically, by connecting two LEDs in series, even if the LED dies are randomly selected, the light emission amount of the light emitting element is twice as large as that of a single LED, and the mean square error of the light emission amount is a multiple of the root number 2, that is, 1.4 of the mean square error of the light emission amount of the single LED. In practice, gallium nitride LED crystal grains can be screened according to a certain rule, and the crystal grains with different brightness are combined, so that not only is the luminous uniformity of each pixel improved, but also the effective utilization rate of the gallium nitride LED crystal grains is improved. This is further described in detail in connection with fig. 4 and 5 below.

The left side of FIG. 4 is a graph of a silicon nitride film formed on Sapphire (Sapphire, al ₂ O ₃ ) The multilayer thin film 9 of gallium nitride light emitting diode grown by MOCVD (Metal Oxide Chemical Vapor Deposition, metal organic chemical vapor deposition) on the wafer (wafer) 916 is cut to obtain a plurality of single gallium nitride LED dies 91 on the right side. Each gallium nitride LED die 91 includes a gallium nitride PN junction 913,915 sandwiching an MQW (Multilayer Quantum Well, multi-layer quantum well) light-emitting layer 914. Each gallium nitride LED die 91 also includes a cutout for the cathode 917 port, a transparent electrode ITO window 912 for outputting LED light, and cathode metal block 911 and anode metal block 917. Due to the uniformity of the MOCVD process on the wafer and the deviation of the cutting and electrode manufacturing positions, the light-emitting brightness and the light-emitting color of each cut LED are not completely the same. The characteristic distribution of a large number of LED dies is assumed to be similar to the gaussian distribution of the luminance of fig. 5, and of course the color thereof has similar distribution characteristics. If only one LED die with a sigma error range around the median brightness is selected and transferred to the display screen array, only 68% of LED dies with luminous characteristics near the peak of the curve can be selected for use, so that the LED dies with luminous characteristics near 32% on both sides of the curve cannot be used and are wasted. In the present invention, however, since one light emitting assembly may include twoThe LED, if one LED grain on the left side of the Gaussian distribution and one LED grain on the right side of the Gaussian distribution are selected, forms a pair of LEDs and are arranged in series in one pixel, and the average brightness of the LED is very close to the brightness of the middle part of the Gaussian distribution. That is, if the median value of the gaussian distribution (if an asymmetric distribution is used instead of the average value mean value) is used as the dividing line, one LED die is selected from left to right so that the combined brightness is substantially equal, in principle, all LED dies on the sapphire wafer can be used up unless that is a defective LED die that does not emit light at all.

In this embodiment, the luminance distribution of fig. 5 is based on a distribution of the luminance of the light emitted when each LED die passes an equal amount of current, and the two

light emitting diodes

51,52 of the light emitting assembly are preferably formed by two LED dies selected at symmetrical positions on both sides of the median of the symmetrical distribution, which are connected in series in the manner of fig. 3, and the two

light emitting diodes

51,52 pass the same amount of current when driven, and the average luminance is substantially the same as that of the other paired LED light emitting assemblies by similar screening and combination. Therefore, in the embodiment, the structure of connecting the two

light emitting diodes

51 and 52 in series and the selection mode of the light emitting diodes are adopted, in the display panel, the brightness difference of the light emitting components with the same light emitting color is smaller than 10% of the average brightness of the light emitting components with the same light emitting color under the drive of the same current, that is, the overall light emitting uniformity of the display panel is greatly enhanced, a larger proportion of light emitting diodes can be applied, the utilization rate and the product yield of the light emitting diodes are improved, the cost of the display panel is reduced, and finally the application range of Micro LEDs in various display fields can be enlarged. In another embodiment, when the light emitting component includes more than two light emitting diodes connected in series in turn, for example, includes three light emitting diodes connected in series, etc., the light emitting diode selection may also be performed by the distribution of the light emitting brightness under the same current, so that the brightness difference of the light emitting components of the same light emitting color under the driving of the same current is less than 10% of the average brightness of the light emitting components of the same color in the display panel.

Fig. 6 is a schematic diagram showing an equivalent circuit of a pixel in a display panel according to a third embodiment of the invention. The pixel 13 differs from the pixel 12 of the second embodiment in that: the light emitting assembly comprises two light emitting

diodes

51,52 connected in parallel with each other, and the method and packaging process for connecting two LED dies in parallel is simpler during manufacture than connecting two LED dies in series. The

light emitting diodes

51,52 also have the same emission color. Here the same luminescent colors may include red, green, blue, orange, cyan, yellow and white. In this third embodiment, the selection and pairing of LED dies forming a light emitting diode are performed based on the brightness distribution after the same magnitude of voltage is applied to each LED die. For example, one LED die on the left side of the median of the luminance distribution curve to which the same voltage is applied and one LED die on the right side of the median in symmetrical positions are selected, and a pair of LEDs are formed and arranged in parallel with each other in one pixel. Since a pair of LED dies in each pixel are driven in parallel, their combined brightness is substantially equal to that of the other pixels. Preferably, the brightness difference of the light emitting components with the same light emitting color under the driving of the same voltage is less than 10% of the average brightness of the light emitting components with the same light emitting color, namely, the overall light emitting uniformity of the display panel is greatly enhanced, a larger proportion of light emitting diodes can be applied, the utilization rate and the product yield of the light emitting diodes are improved, the cost of the display panel is reduced, and finally, the application range of Micro LEDs in various display fields can be enlarged. In another embodiment, when the light emitting component includes more than two light emitting diodes connected in parallel, for example, three light emitting diodes connected in parallel, the light emitting diodes may be selected by the distribution of the light emitting brightness under the same voltage, so that the brightness difference of the light emitting components with the same light emitting color driven by the same voltage is less than 10% of the average brightness of the light emitting components with the same color in the display panel.

The second and third embodiments are both aimed at achieving uniformity of luminance values of each pixel, that is, uniformity of luminance of the display panel. The same method and circuit can also achieve the purpose of averaging the emission colors of the LED dies, for example, selecting the LED dies based on the emission color distribution at the same current, symmetrically selecting two LED dies on the left and right sides of the median of the color distribution, and connecting them in series as a light emitting component; alternatively, LED dies are selected based on the emission color distribution at the same voltage, and two LED dies are symmetrically selected on the left and right sides of the median of the color distribution, and are connected in parallel as a light emitting element.

It is further worth mentioning that there is a difference in the light emission brightness and color between each batch or between each LED wafer due to the manufacturing process, in particular the MOCVD process of gallium nitride or gallium arsenide. To compensate for such differences in performance between lots or wafers, thereby improving the overall production yield of LED dies and uniformity of characteristics of the completed display screen, when the LED dies are screened and combined with reference to the brightness distribution of fig. 5, two LED dies may be selected to be paired at asymmetric positions on both sides of the median with respect to the median, even on one side of the median. For example, the average brightness of the LEDs on one wafer is much lower than that of the other wafer, and two LED dies can be selected to be combined on the right side of the median value so as to achieve the equivalent brightness after being combined with two LEDs on the other wafer.

Fig. 7 is an equivalent circuit diagram of a pixel in a display panel according to a fourth embodiment of the present invention. The pixel 14 differs from the first embodiment in that: an implementation of a pulse generating assembly is provided. In this embodiment the pixel 14 comprises a pulse generating component 21 outputting two PWM pulse trains of opposite phase. The pulse generating component 21 comprises a voltage comparator 211 and an inverter 212 to generate the required first pulse 33 and second pulse 34. Specifically, the first and second input terminals of the voltage comparator 211 are input with the data voltage Vdata and the sawtooth voltage Vref, respectively. The output of the voltage comparator 211 is connected to the input of the inverter 212. The output of the inverter 212 outputs the second pulse 34. Since the output second pulse 34 is passed through an additional stage of CMOS inverter with an additional time delay, in this embodiment, a delay 213 is further added between the output of the voltage comparator 211 and the transistor gate of the first switching element 41, such that the pulse delay of the first pulse 33 is substantially equal to the pulse delay of the second pulse 34 output by the inverter 212. By this structure, the first pulse 33 and the second pulse 34 controlling the first switch assembly 41 and the second switch assembly 42 can be just close to a 180-degree phase difference, thereby avoiding the problem of shortening the effective light emitting time of the LEDs.

In this embodiment, the delay 213 may be formed by a simple RC circuit, where the resistor R and the capacitor C may be distributed resistors or capacitors of the lead itself, or may be independent resistors and capacitors that are added specifically.

In fig. 7, the light emitting assembly is shown to include one light emitting diode 51, and here, the light emitting assembly may be replaced by two parallel

light emitting diodes

51,52 as shown in fig. 6, or by two serial

light emitting diodes

51,52 as shown in fig. 3, or by a structure including more than two light emitting diodes, which is within the scope of the present invention.

Fig. 8 is an equivalent circuit diagram of a pixel in a display panel according to a fifth embodiment of the present invention. The pixel 15 differs from the fourth embodiment in that: a differently configured pulse generating assembly 22 is provided. In this embodiment, the pulse generating component 22 comprises a voltage comparator 221, an inverter 222 and a buffer 223, which buffer 223 acts as a voltage follower, i.e. the delay 213 shown in fig. 7 is replaced by a buffer 223. The output of the voltage comparator 221 is fed to an inverter 222 and a buffer 223, respectively, and two PWM pulse trains with opposite phases are output: a first pulse 33 and a second pulse 34. With the circuit configuration of fig. 8, the first pulse 33 and the second pulse 34 achieve the same process, the time delays of which can be adjusted to be approximately the same, and the capacity of the two

pulses

33,34 to carry the load is greatly improved. For example, a capacitive load may be further added between the first pulse 33 and the transistor gate of the first switching element 41 and between the second pulse 34 and the transistor gate of the second switching element 42, thereby increasing the stability of the display panel against interference and leakage currents.

In fig. 8, the light emitting assembly is shown to include two light emitting

diodes

51,52 in series, where the light emitting assembly may be replaced with two light emitting

diodes

51,52 in parallel as shown in fig. 6, or with one light emitting diode 51 as shown in fig. 7, or with a structure including more than two light emitting diodes, which is within the scope of the present invention.

As shown in fig. 9, a circuit diagram of a specific implementation of a pulse generating assembly according to the present invention is shown. In this embodiment, the pulse generating component 21 includes switching transistors M1 to M11, a source (or drain) of the switching transistor M3 inputs the first power signal VDD, a gate of the switching transistor M1 inputs the data voltage Vdata, a gate of the switching transistor M5 inputs the second power signal VBS, a source (or drain) of the switching transistor M5 inputs the third power signal VSS, and a gate of the switching transistor M2 inputs the sawtooth signal Vref. The circuit formed by the switching transistors M1 to M5 constitutes a voltage comparator with a certain bias voltage. The data voltage Vdata is input from the storage capacitor Cst of the analog circuit, and the saw-tooth wave signal Vref is input from an external periodic saw-tooth wave pulse source. The switching transistor M6 and the switching transistor M7 constitute a source voltage follower of the primary and have a certain bias voltage Vss. The switching transistors M1 to M7 constitute a two-stage open-loop comparator.

The NMOS transistor M8 and the PMOS transistor M9 constitute an output buffer of the positive PWM pulse Vout1, i.e., it outputs the first pulse, and the PMOS transistor M10 and the NMOS transistor M11 constitute a reverse voltage output buffer, providing the negative PWM pulse Vout2, i.e., it outputs the second pulse.

The structure of the pulse generating assembly 21 shown in fig. 9 can be applied to the aforementioned first, second, third and fifth embodiments. The protection scope of the invention also comprises the use of other types of voltage comparators or voltage followers and inverters so as to realize that positive PWM pulses and negative PWM pulses with 180 degrees of output phase difference control the on-off of the first switch component and the second switch component respectively. For example, in order to reduce false triggering of input noise, a voltage comparator with positive feedback, which is inverted or not, can be used, so that the voltage comparator has a certain hysteresis function and thus does not respond to high-frequency noise at the input end in a flip-flop manner. Meanwhile, the invention also comprises circuits using other types of PWM pulse generators so as to realize that positive PWM pulses and negative PWM pulses with 180 degrees of phase difference are output to respectively control the on-off of the first switch component and the second switch component.

Fig. 10 is a schematic diagram showing an equivalent circuit of a pixel array in a display panel according to a sixth embodiment of the invention. The pixel array includes a plurality of pixels 10 arranged in an orthogonal matrix in the lateral and longitudinal directions. Each pixel 10 may employ the structure of the pixel circuit given in the above-described respective embodiments. Located at the bottom of the display panel is a data output module 81 that outputs each pixel signal, and outputs data lines of each column of pixels in parallel. Located to the right is a row scan module 82 that scans each row of pixels sequentially from top to bottom or bottom to top. The scan pulse sequentially turns on the switches of each row of pixels, for example, the switching transistor T1 with reference to the circuit diagram of fig. 2, and then the data signal is written into the storage capacitor within each row of pixels, for example, the storage capacitor Cst with reference to the circuit diagram of fig. 2.

In fig. 10, a sawtooth voltage is output as a sawtooth pulse source by a sawtooth pulse generator 83. Specifically, the output terminal of the sawtooth pulse generator 83 outputs a first sawtooth pulse VR1 through a voltage buffer 85, and outputs a second sawtooth pulse VR2 through an inverter 84. The first saw tooth pulse VR1 and the second saw tooth pulse VR2 are opposite in phase. As shown in the pulse waveform diagram of fig. 11, the first sawtooth pulse VR1 and the second sawtooth pulse VR2 have equal amplitudes and are 180 degrees out of phase. The first sawtooth wave pulse VR1 and the second sawtooth wave pulse VR2 with the opposite pulse polarities drive two groups of different pixels in the whole pixel array, namely, the second input end of the voltage comparator of the first pixel inputs the first sawtooth wave pulse VR1, the second input end of the voltage comparator of the second pixel inputs the second sawtooth wave pulse VR2, and the high-frequency noise induced on the data line can be mutually inhibited or completely counteracted.

Further, in this embodiment, the pixel array includes two sets of pixels located in odd and even rows, or odd and even columns, respectively, of the array. The first sawtooth pulse VR1 is input to the second input end of the voltage comparator of the even-numbered row or even-numbered column, that is, the even-numbered row or even-numbered column is controlled by the first sawtooth pulse VR1, and the second sawtooth pulse VR2 is input to the second input end of the voltage comparator of the odd-numbered row or odd-numbered column, that is, the odd-numbered row or odd-numbered column is controlled by the second sawtooth pulse VR2. The first sawtooth pulse VR1 and the second sawtooth pulse VR2 with opposite phases each drive half the number of array pixels, and the high-frequency noise induced on the data line can cancel each other. This has a significant improvement effect on reducing the disturbance of the analog signal by the sawtooth pulse at the data writing stage and on reducing the false triggering of the PWM generator PG within each pixel.

The foregoing is a further detailed description of the invention in connection with the preferred embodiments, and it is not intended that the invention be limited to the specific embodiments described. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the invention, and these should be considered to be within the scope of the invention.

Claims

1. A display panel comprising a pixel array of a plurality of pixels, each of said pixels comprising:

the pulse generation assembly outputs a first pulse and a second pulse respectively, wherein the phases of the first pulse and the second pulse are opposite;

the light-emitting device comprises a first switch assembly, a light-emitting assembly and a second switch assembly, wherein the first switch assembly, the light-emitting assembly and the second switch assembly are sequentially connected in series, the light-emitting assembly is positioned between the first switch assembly and the second switch assembly, the first switch assembly is directly connected with the first end of the light-emitting assembly, and the second switch assembly is directly connected with the second end of the light-emitting assembly;

the on-off of the first switch component is controlled by the first pulse, the on-off of the second switch component is controlled by the second pulse, and the first switch component and the second switch component are synchronously turned on or turned off.

2. The display panel of claim 1, wherein the pulse generating assembly comprises:

a voltage comparator, a first input terminal and a second input terminal of which are respectively input with a data voltage and a sawtooth voltage;

the input end of the first inverter is connected with the output end of the voltage comparator;

the pulse generating component outputs two PWM pulse trains with opposite phases.

3. The display panel of claim 1, wherein the first switching component comprises an NMOS transistor and the second switching component comprises a PMOS transistor.

4. The display panel of claim 2, wherein the pulse generating assembly further comprises a first buffer assembly, and the output terminal of the voltage comparator is used for controlling the on-off of the first switch assembly through the first buffer assembly.

5. The display panel of claim 4, wherein the first buffer assembly comprises a retarder and a voltage follower.

6. The display panel of claim 4, wherein the voltage comparator comprises a two-stage open loop comparator, the first inverter comprises a reverse output buffer, and the first buffer component comprises a forward output buffer.

7. The display panel according to claim 1, wherein the light emitting assembly includes a plurality of light emitting elements of the same light emitting color, which are connected in series with each other.

8. The display panel according to claim 7, wherein the luminance difference of the light emitting elements of the same light emitting color under the same current drive is less than 10% of the average luminance of the light emitting elements of the same color.

9. The display panel according to claim 1, wherein the light emitting assembly includes a plurality of light emitting elements of the same light emitting color, which are connected in parallel to each other.

10. The display panel according to claim 9, wherein the luminance difference of the light emitting elements of the same light emitting color under the same voltage driving is less than 10% of the average luminance of the light emitting elements of the same color.

11. The display panel according to claim 7 or 9, wherein the same light emission color includes red, green, blue, orange, cyan, yellow, and white.

12. The display panel according to claim 1, wherein the light emitting component comprises an organic light emitting diode or/and an inorganic light emitting diode.

13. The display panel according to claim 2, wherein the pixels of the pixel array include a plurality of first pixels and a plurality of second pixels, the second input terminal of the voltage comparator of the first pixels inputs the first saw-tooth pulse, and the second input terminal of the voltage comparator of the second pixels inputs the second saw-tooth pulse;

the first sawtooth pulse and the second sawtooth pulse are opposite in phase.

14. The display panel of claim 13, wherein the pixel array comprises a plurality of odd rows and a plurality of even rows, the odd rows being spaced apart from the even rows, the odd rows comprising a plurality of the first pixels, the even rows comprising a plurality of the second pixels; alternatively, the pixel array includes a plurality of odd columns and a plurality of even columns, the odd columns are arranged at intervals from the even columns, the odd columns include a plurality of the first pixels, and the even columns include a plurality of the second pixels.

15. The display panel of claim 14, comprising at least one saw-tooth pulse source, wherein an output of the saw-tooth pulse source is coupled to the odd row or the odd column through a second inverter, and wherein an output of the saw-tooth pulse source is coupled to the even row or the even column through a second buffer assembly.