Detailed Description
For the purposes of clarity, technical solutions and advantages of the present disclosure, the following further details the embodiments of the present disclosure with reference to the accompanying drawings.
Fig. 1 is a top view of a light emitting diode provided in an embodiment of the present disclosure. Referring to fig. 1, the light emitting diode includes an epitaxial structure 10, a first electrode 301, a second electrode 302, and a third electrode 303.
Fig. 2 is a schematic structural view of a cross section of a light emitting diode A-A' according to an embodiment of the present disclosure. Referring to fig. 2, the epitaxial structure 10 includes a first semiconductor layer 101, an active layer 102, and a second semiconductor layer 103, which are stacked.
Fig. 3 is a schematic structural view of a section of a light emitting diode B-B' according to an embodiment of the present disclosure. Referring to fig. 1 to 3, the epitaxial structure 10 is a step structure 1001, the step structure 1001 has a step top surface and a step bottom surface, the step bottom surface is located on the surface of the first semiconductor layer 101, the epitaxial structure 10 has a groove 1002, the groove 1002 penetrates through the second semiconductor layer 103 and the active layer 102, the projection of the groove 1002 on the surface of the first semiconductor layer 101 is connected with the step bottom surface, the first electrode 301 is located on the step bottom surface, the second electrode 302 and the third electrode 303 are both located on the surface of the second semiconductor layer 103, and the second electrode 302 and the third electrode 303 are located on both sides of the groove 1002, respectively.
In the embodiment of the disclosure, the epitaxial structure is in a step structure, the step structure is provided with a step top surface and a step bottom surface, the groove penetrates through the second semiconductor layer and the active layer of the epitaxial structure, and the projection of the groove on the surface of the first semiconductor layer is connected with the step bottom surface, so that the second semiconductor layer and the active layer are separated into two parts by the groove.
Because the two parts share the first semiconductor layer and the first electrode, compared with the two epitaxial structures which are respectively provided with steps and the first electrode, the effective light-emitting area is larger, and therefore the brightness of the light-emitting diode is improved. And the first electrode is a common electrode with 2 epitaxy, so that the process is simpler than that of respectively arranging the electrodes, and the manufacturing cost is reduced.
In the disclosed embodiment, the grooves 1002 are bar-shaped grooves, and the width of the grooves is equal throughout, i.e., remains unchanged.
In the disclosed embodiment, the width of the groove 1002 may be 1-20 μm.
In this implementation manner, the above-mentioned width value is adopted, so that the light-emitting area of the epitaxial structure is not reduced too much due to the fact that the groove is too wide, the brightness of the light-emitting diode is reduced, and the manufacturing difficulty is not too high due to the fact that the groove is too narrow.
Illustratively, the width of the groove 1002 is 10 μm.
In other embodiments, the grooves 1002 are bar-shaped grooves, and the width of the grooves may be graded throughout.
In embodiments of the present disclosure, the ratio of the surface areas of the second semiconductor layer 103 on both sides of the groove 1002 may be 0.3:1 to 3:1.
In this implementation, the surface areas of the second semiconductor layers on both sides of the groove adopt the above ratio, so that the surface area difference of the second semiconductor layers on both sides of the groove is not too large, resulting in uneven light emission.
Illustratively, the ratio of the surface areas of the second semiconductor layer 103 on both sides of the recess 1002 is 1:1, i.e., the areas are the same.
In the embodiment of the present disclosure, both portions of the second semiconductor layer 103 divided by the groove 1002 are rectangular.
In other embodiments, the two portions of the second semiconductor layer 103 divided by the groove 1002 may have other shapes, such as a trapezoid or the like.
In the disclosed embodiment, the step structure 1001 is in the shape of a semicircle, the diameter side of which is located at the edge of the epitaxial structure 10.
In this implementation, the shape of the step structure is semi-circular to facilitate a two-sided epitaxial common electrode design.
As shown in fig. 1, the first electrode 301 is in the middle of the semicircle.
In other embodiments, the shape of the step structure 1001 may also be rectangular or other shapes.
In the disclosed embodiment, the second electrode 302 and the third electrode 303 are symmetrically disposed at both sides of the groove 1002.
In this implementation, the second electrode and the third electrode are symmetrically disposed at both sides of the groove, which can improve the uniformity of the electric field.
In other embodiments, the second electrode 302 and the third electrode 303 may also be asymmetrically disposed on both sides of the groove 1002.
In the presently disclosed embodiment, epitaxial structure 10 also has isolation trenches 1003 extending to first semiconductor layer 101.
In the embodiment of the present disclosure, the light emitting diode may further include 2 current blocking layers 104 and 2 transparent conductive layers 105.
The 2 current blocking layers 104 are located on the second semiconductor layer 103 and located at two sides of the groove, and the 2 transparent conductive layers 105 are located on the second semiconductor layer 103 and located at two sides of the groove, and respectively wrap the 2 current blocking layers 104.
In this implementation, the current blocking layer and the transparent conductive layer achieve a current spreading effect.
In the disclosed embodiment, the light emitting diode may further include a passivation layer 106.
The passivation layer 106 covers the epitaxial structure 10, the step structure 1001, the groove 1002, the isolation groove 1003, the transparent conductive layer 105, the first electrode 301, the second electrode 302, and the third electrode 303, and has a through hole 1004 corresponding to the first electrode 301, the second electrode 302, and the third electrode 303.
In this implementation, the passivation layer may protect the light emitting diode, and the through holes may be provided for the electrodes to be electrically connected with external devices.
In the disclosed embodiment, the light emitting diode may further include a substrate 100.
The first semiconductor layer 101 is located on the surface of the substrate 100.
In the embodiment of the present disclosure, the substrate 100 may be any one of a sapphire substrate, a Si substrate, a SiC substrate, and the like, and the material of the substrate is not limited in the embodiment of the present disclosure.
Illustratively, the substrate 100 is a sapphire substrate.
In the embodiment of the present disclosure, the first semiconductor layer 101 may be an N-type semiconductor layer, and the second semiconductor layer 103 may be a P-type semiconductor layer.
In embodiments of the present disclosure, the active layer 102 may be a multiple quantum well layer, such as an InGaN/GaN multiple quantum well layer.
For example, the first semiconductor layer 101 may be an N-type GaN layer, and the second semiconductor layer 103 may be a P-type GaN layer.
In other embodiments, the first semiconductor layer 101 may be a P-type semiconductor layer, and the second semiconductor layer 103 may be an N-type semiconductor layer.
In the disclosed embodiment, the current blocking layer 104 may be an AlGaN or SiO 2 layer.
Illustratively, the current blocking layer 104 is an AlGaN current blocking layer.
In the embodiment of the present disclosure, the transparent conductive layer 105 may be an Indium Tin Oxide (ITO) layer, and the ITO has good transparency and conductivity.
In an embodiment of the present disclosure, the passivation layer 106 may be a SiO 2 passivation layer.
In the disclosed embodiment, the first electrode 301, the second electrode 302, and the third electrode 303 may be AuGe/Au electrodes or AuBe/Au electrodes.
Illustratively, the first electrode 301 is an AuBe/Au electrode, and the second and third electrodes 302 and 303 are AuGe/Au electrodes.
In the presently disclosed embodiment, the first electrode 301 is rectangular.
In other embodiments, the first electrode 301 may also be circular or other shapes.
In the embodiment of the present disclosure, the second electrode 302 and the third electrode 303 may be formed by combining 2 parts, wherein one part is in an elongated shape, and the other part is in a circular shape, and the circular shape is connected with one end of the elongated shape.
In other embodiments, the second electrode 302 and the third electrode 303 are circular, rectangular, or other shapes.
It should be noted that, in the embodiments of the present disclosure, the structure may be selectively increased or decreased based on the structure of the light emitting diode, which is not limited in this disclosure.
Fig. 4 is a flowchart of a method for manufacturing a light emitting diode according to an embodiment of the present disclosure. Referring to fig. 4, the method steps include:
s11, manufacturing an epitaxial structure, wherein the epitaxial structure comprises a first semiconductor layer, an active layer and a second semiconductor layer which are stacked.
In the embodiments of the present disclosure, the substrate may be a sapphire substrate.
S12, carrying out graphical processing on the epitaxial structure to form a step structure and a groove, wherein the step structure is provided with a step top surface and a step bottom surface, the step bottom surface is positioned on the surface of the first semiconductor layer, the groove penetrates through the second semiconductor layer and the active layer, and the projection of the groove on the surface of the first semiconductor layer is connected with the step bottom surface.
Illustratively, this step S12 may include:
Forming a patterned mask layer on the surface of the second semiconductor layer;
and under the shielding of the mask layer, etching the epitaxial structure to form a step structure and a groove extending to the first semiconductor layer.
In the embodiment of the disclosure, the grooves are bar-shaped grooves, and the width of the grooves is equal everywhere, i.e. remains unchanged.
In the embodiment of the disclosure, the width of the groove may be 1-20 μm.
In this implementation manner, the above-mentioned width value is adopted, so that the light-emitting area of the epitaxial structure is not reduced too much due to the fact that the groove is too wide, the brightness of the light-emitting diode is reduced, and the manufacturing difficulty is not too high due to the fact that the groove is too narrow.
Illustratively, the width of the grooves is 10 μm.
In other embodiments, the grooves are bar grooves, and the width of the grooves may be graded throughout.
In the embodiment of the disclosure, the ratio of the surface areas of the second semiconductor layer on both sides of the groove may be 0.3:1 to 3:1.
In this implementation, the surface areas of the second semiconductor layers on both sides of the groove adopt the above ratio, so that the surface area difference of the second semiconductor layers on both sides of the groove is not too large, resulting in uneven light emission.
Illustratively, the ratio of the surface areas of the second semiconductor layer on both sides of the recess is 1:1, i.e. the areas are the same.
In the embodiment of the present disclosure, the two portions of the second semiconductor layer divided by the groove are rectangular.
In other embodiments, the two portions of the second semiconductor layer divided by the groove may have other shapes, such as a trapezoid or the like.
S13, manufacturing a first electrode, a second electrode and a third electrode, wherein the first electrode is positioned on the bottom surface of the step, the second electrode and the third electrode are both positioned on the surface of the second semiconductor layer, and the second electrode and the third electrode are respectively positioned on two sides of the groove.
In the embodiment of the disclosure, the epitaxial structure is in a step structure, the step structure is provided with a step top surface and a step bottom surface, the groove penetrates through the second semiconductor layer and the active layer of the epitaxial structure, and the projection of the groove on the surface of the first semiconductor layer is connected with the step bottom surface, so that the second semiconductor layer and the active layer are separated into two parts by the groove.
Because the two parts share the first semiconductor layer and the first electrode, compared with the two epitaxial structures which are respectively provided with steps and the first electrode, the effective light-emitting area is larger, and therefore the brightness of the light-emitting diode is improved. And the first electrode is a common electrode with 2 epitaxy, so that the process is simpler than that of respectively arranging the electrodes, and the manufacturing cost is reduced.
Fig. 5 is a flowchart of another method for manufacturing a light emitting diode according to an embodiment of the present disclosure. Referring to fig. 5, the method steps include:
S21, sequentially forming a first semiconductor layer, an active layer and a second semiconductor layer on the substrate, wherein the first semiconductor layer, the active layer and the second semiconductor layer form an epitaxial structure.
In one example, step S21 includes:
first, a first semiconductor layer is formed on a substrate.
In the embodiment of the present disclosure, the substrate may be any one of a sapphire substrate, a Si substrate, a SiC substrate, and the like, and the material of the substrate is not limited in the embodiment of the present disclosure.
Illustratively, the substrate is a sapphire substrate.
In an embodiment of the present disclosure, the first semiconductor layer is an N-type GaN layer.
And second, manufacturing an active layer on the first semiconductor layer.
In an embodiment of the present disclosure, the active layer is a multiple quantum well layer.
And thirdly, manufacturing a second semiconductor layer on the active layer.
In an embodiment of the disclosure, the second semiconductor layer is a P-type GaN layer.
In the embodiments of the present disclosure, the growth of the semiconductor layer may be achieved using VeecoK i or C4 or RB MOCVD (Metal Organic Chemical Vapor Deposition, metal Organic Chemical Vapor Deposition (MOCVD)) equipment or an AIXTRON metal organic chemical vapor deposition equipment. High-purity H 2 (hydrogen) or high-purity N 2 (nitrogen) or mixed gas of high-purity H 2 and high-purity N 2 is adopted as carrier gas, high-purity NH 3 is adopted as an N source, trimethylgallium (TMGa) and triethylgallium (TEGa) are adopted as gallium sources, trimethylindium (TMIn) is adopted as an indium source, silane (SiH 4) is adopted as an N-type dopant, trimethylaluminum (TMAL) is adopted as an aluminum source, and magnesium cyclopentadienyl (CP 2 Mg) is adopted as a P-type dopant.
It should be noted that other devices may be used to fabricate the semiconductor layer, which is not limited by the disclosure.
And S22, carrying out graphical processing on the epitaxial structure to form a step structure, a groove and an isolation groove.
Step S22 may include the following steps:
And under the shielding of the mask layer, etching the epitaxial structure to form a step structure extending to the first semiconductor layer, a groove and an isolation groove, wherein the projection of the groove on the surface of the first semiconductor layer is connected with the bottom surface of the step, and the isolation groove is positioned at two ends of the epitaxial structure.
In the embodiment of the disclosure, the step structure is in a semicircular shape, and a diameter side of the semicircle is located at an edge of the epitaxial structure.
In this implementation, the shape of the step structure is semi-circular to facilitate a two-sided epitaxial common electrode design.
In other embodiments, the shape of the step structure may also be rectangular or other shapes.
In the embodiment of the disclosure, the grooves are bar-shaped grooves, and the width of the grooves is equal everywhere, i.e. remains unchanged.
In the embodiment of the disclosure, the width of the groove may be 1-20 μm.
In this implementation manner, the above-mentioned width value is adopted, so that the light-emitting area of the epitaxial structure is not reduced too much due to the fact that the groove is too wide, the brightness of the light-emitting diode is reduced, and the manufacturing difficulty is not too high due to the fact that the groove is too narrow.
Illustratively, the width of the grooves is 10 μm.
In other embodiments, the grooves are bar grooves, and the width of the grooves may be graded throughout.
In the embodiment of the disclosure, the ratio of the surface areas of the second semiconductor layer on both sides of the groove may be 0.3:1 to 3:1.
In this implementation, the surface areas of the second semiconductor layers on both sides of the groove adopt the above ratio, so that the surface area difference of the second semiconductor layers on both sides of the groove is not too large, resulting in uneven light emission.
Illustratively, the ratio of the surface areas of the second semiconductor layer on both sides of the recess is 1:1, i.e. the areas are the same.
In the embodiment of the present disclosure, the two portions of the second semiconductor layer divided by the groove are rectangular.
In other embodiments, the two portions of the second semiconductor layer divided by the groove may have other shapes, such as a trapezoid or the like.
S23, manufacturing a current blocking layer on the epitaxial structure.
In the embodiment of the disclosure, the number of the current blocking layers is 2, and the current blocking layers are respectively positioned on the second semiconductor layers at two sides of the groove.
In the embodiments of the present disclosure, the current blocking layer may be an AlGaN or SiO 2 layer.
Illustratively, the current blocking layer is an AlGaN current blocking layer.
Illustratively, this step S23 may include:
and patterning the current blocking film layer to obtain the current blocking layer.
The patterning of the current blocking film layer can comprise spin coating photoresist, forming a mask pattern through exposure and development, and performing wet etching on the current blocking film layer under the shielding of the mask pattern.
S24, manufacturing a transparent conducting layer on the current blocking layer.
In the embodiment of the disclosure, the number of transparent conductive layers is 2, and the current blocking layers are respectively wrapped on the second semiconductor layers at two sides of the groove.
In the embodiments of the present disclosure, the transparent conductive layer may be an ITO layer, which has excellent transparency and conductivity, and allows light to pass through while conducting current to form an electrical connection.
Illustratively, this step S24 may include:
And patterning the ITO film to obtain the transparent conductive layer.
The ITO film can be formed by adopting an evaporation method. Patterning the ITO film may include spin-coating a photoresist, forming a mask pattern by exposing and developing, and wet etching the ITO film under the shielding of the mask pattern.
S25, manufacturing a first electrode, a second electrode and a third electrode.
Illustratively, this step S25 may include:
and manufacturing a first electrode on the bottom surface of the step, and manufacturing a second electrode and a third electrode on the transparent conductive layer.
The first electrode, the second electrode and the third electrode can be manufactured by adopting a deposition process.
In the embodiment of the disclosure, the first electrode, the second electrode and the third electrode may be AuGe/Au electrodes or AuBe/Au electrodes.
Illustratively, the first electrode is an AuBe/Au electrode, and the second and third electrodes are AuGe/Au electrodes.
In an embodiment of the disclosure, the second electrode and the third electrode are symmetrically disposed on both sides of the groove.
In this implementation, the second electrode and the third electrode are symmetrically disposed at both sides of the groove, which can improve the uniformity of the electric field.
In other embodiments, the second electrode and the third electrode may also be asymmetrically disposed on both sides of the groove.
In an embodiment of the present disclosure, the first electrode is rectangular.
In other embodiments, the first electrode may also be circular or other shapes.
In the embodiment of the disclosure, the second electrode and the third electrode may be formed by combining 2 parts, wherein one part is in a strip shape, the other part is in a circular shape, and the circular shape is connected with one end of the strip shape.
In other embodiments, the second and third electrodes are circular, rectangular, or other shapes.
S26, manufacturing a passivation layer, wherein the passivation layer covers the epitaxial structure, the step structure, the groove, the transparent conducting layer, the first electrode, the second electrode and the third electrode and is provided with through holes corresponding to the first electrode, the second electrode and the third electrode.
In the embodiment of the present disclosure, step S26 may include:
in the first step, the surfaces of the epitaxial structure, the step structure, the groove, the transparent conductive layer, the first electrode, the second electrode and the third electrode are coated with SOD.
The coating process is exemplified by spin coating of SOD glue (SiO 2) on the LED chip.
And secondly, baking the coated film at high temperature to form the SiO 2 passivation layer.
And thirdly, manufacturing a through hole on the passivation layer.
Experiments prove that the effective light emitting area of the light emitting diode manufactured by the embodiment of the disclosure is 5% -15% larger than that of the light emitting diode manufactured by the related technology, the process flow of the embodiment of the disclosure is simple, the scribing and cracking speed of the light emitting diode is improved, the yield is improved, and the sorting cost of the light emitting diode is reduced.
The foregoing description of the preferred embodiments of the present disclosure is provided for the purpose of illustration only, and is not intended to limit the disclosure to the particular embodiments disclosed, but on the contrary, the intention is to cover all modifications, equivalents, alternatives, and alternatives falling within the spirit and principles of the disclosure.