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CN120341215A - Test structure and test methods - Google Patents

Test structure and test methods

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Publication number
CN120341215A
CN120341215A CN202410077787.5A CN202410077787A CN120341215A CN 120341215 A CN120341215 A CN 120341215A CN 202410077787 A CN202410077787 A CN 202410077787A CN 120341215 A CN120341215 A CN 120341215A
Authority
CN
China
Prior art keywords
test
tested
interconnect layer
layer
interconnection layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202410077787.5A
Other languages
Chinese (zh)
Inventor
孙磊
林艺辉
王亮
王少波
翟光耀
马永放
黄自强
伍军
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Manufacturing International Shanghai Corp
Original Assignee
Semiconductor Manufacturing International Shanghai Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Manufacturing International Shanghai Corp filed Critical Semiconductor Manufacturing International Shanghai Corp
Priority to CN202410077787.5A priority Critical patent/CN120341215A/en
Publication of CN120341215A publication Critical patent/CN120341215A/en
Pending legal-status Critical Current

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Abstract

The test structure comprises a first test end, a second test end and a test unit, wherein the test unit comprises a substrate, a first interconnection layer, a second interconnection layer, a third interconnection layer, a second plug and a second plug, the first interconnection layer is arranged above the substrate, the second interconnection layer is arranged above the first interconnection layer and comprises a first interconnection layer to be tested, the first interconnection layer to be tested comprises a first surface and a second surface which are oppositely arranged, the third interconnection layer is arranged above the first interconnection layer to be tested and comprises a first sub-interconnection layer, the first plug is arranged between the first surface and the first interconnection layer, the second plug is arranged between the second surface and the first sub-interconnection layer, the second end of the first interconnection layer is used as a first interface of the test unit or is electrically connected with the first interface, the second end of the first sub-interconnection layer is used as a second interface of the test unit or is electrically connected with the second interface, and the first test end is electrically connected with the second interface. The embodiment of the invention increases the forming process window of the plug and improves the robustness of the test structure.

Description

Test structure and test method
Technical Field
The embodiment of the invention relates to the field of semiconductor manufacturing, in particular to a test structure and a test method.
Background
With the rapid development of the semiconductor integrated circuit (INTEGRATED CIRCUIT, IC) industry, semiconductor technology is continually driven by moore's law toward smaller process nodes, resulting in the development of integrated circuits with smaller volumes, higher circuit accuracy, and higher circuit complexity.
In the development of integrated circuits, the functional density (i.e., the number of interconnect structures per chip) has generally been increasing while the geometry (i.e., the minimum device size that can be created using process steps) has been decreasing.
At present, under the condition that technology nodes are continuously reduced, a test structure and a test method thereof in the prior art still need to be improved.
Disclosure of Invention
The embodiment of the invention provides a test structure and a test method for improving the performance of the test structure.
In order to solve the above problems, an embodiment of the present invention provides a test structure, including a first test end, a second test end, and a test unit, where the test unit includes a substrate; the first interconnection layer is arranged above the substrate, extends along a second direction, is arranged above the first interconnection layer, extends along a first direction, and is electrically connected with first ends of the first interconnection layer and the first interconnection layer respectively, the second interconnection layer comprises a first interconnection layer to be tested, the first interconnection layer to be tested is provided with a first surface and a second surface which are oppositely arranged along the thickness direction, the third interconnection layer is arranged above the first interconnection layer to be tested and extends along the second direction, the third interconnection layer comprises a first sub interconnection layer, and a first plug is arranged between the first surface of the first interconnection layer to be tested and the first interconnection layer and is electrically connected with first ends of the first interconnection layer to be tested respectively, and a second plug is arranged between the second surface of the first interconnection layer to be tested and the first sub interconnection layer and is electrically connected with first ends of the first interconnection layer to be tested respectively, wherein the first connection unit to be tested is electrically connected with the first connection unit to be tested, the first connection unit to be tested is used as the first connection terminal to the first connection unit to be tested, and the first connection unit to be tested is electrically connected with the first connection unit to be tested to the first connection terminal to the first connection unit to be tested.
Optionally, the to-be-tested interconnection layer further comprises a second to-be-tested interconnection layer which is mutually separated from the first to-be-tested interconnection layer and is distributed at intervals along the second direction, the test unit further comprises a third plug which is arranged between the second to-be-tested interconnection layer and the first sub-interconnection layer and is respectively and electrically connected with the first end of the second to-be-tested interconnection layer and the second end of the first sub-interconnection layer, and the second end of the second to-be-tested interconnection layer is used as a second interface of the test unit or is electrically connected with the second interface of the test unit.
Optionally, the third interconnection layer further comprises a second sub interconnection layer which is mutually separated from the first sub interconnection layer and is arranged at intervals along the first direction, the second sub interconnection layer is located above the second interconnection layer to be tested, the test unit further comprises a fourth plug which is arranged between the second interconnection layer to be tested and the second sub interconnection layer and is electrically connected with the second end of the second interconnection layer to be tested and the first end of the second sub interconnection layer respectively, and the second end of the second sub interconnection layer is used as a second interface of the test unit or is electrically connected with a second interface of the test unit.
Optionally, the length of the second interconnect layer to be tested is greater than the length of the first interconnect layer to be tested.
Optionally, the test unit further comprises an eighth plug, which is located on the second sub-interconnection layer and is electrically connected to the second end of the second sub-interconnection layer, wherein the eighth plug is used as a second interface of the test unit.
Optionally, the second interconnection layer further comprises a connection interconnection layer which is mutually separated from the interconnection layer to be tested and is distributed at intervals along the second direction, the connection interconnection layer and the interconnection layer to be tested are not adjacent, the third interconnection layer further comprises a third sub-interconnection layer which is mutually separated from the first sub-interconnection layer and is distributed at intervals along the first direction, the test unit further comprises a fifth plug which is arranged between the first interconnection layer and the connection interconnection layer and is electrically connected with the second end of the first interconnection layer and the first end of the connection interconnection layer respectively, and a sixth plug which is arranged between the connection interconnection layer and the third sub-interconnection layer and is electrically connected with the second end of the connection interconnection layer and the first end of the third sub-interconnection layer respectively, and the second end of the third sub-interconnection layer is used as a first interface of the test unit or is electrically connected with a first interface of the test unit.
Optionally, the test unit further comprises a seventh plug, which is located on the third sub-interconnection layer and is electrically connected to the second end of the third sub-interconnection layer, wherein the seventh plug is used as a first interface of the test unit.
Optionally, the test unit further comprises an eighth plug, which is located on the first sub-interconnection layer and is electrically connected with the second end of the first sub-interconnection layer, wherein the eighth plug is used as a second interface of the test unit.
Optionally, the number of the test units is a plurality, and adjacent test units are connected in series.
Optionally, the second interface and the first interface of each test unit are sequentially connected, so that a plurality of test units are connected in series between the first test end and the second test end to form a chain structure.
Optionally, the test structure further comprises a fourth interconnection layer, wherein the fourth interconnection layer is arranged above the third interconnection layer and extends along the first direction, the fourth interconnection layer comprises a first connecting wire, a second connecting wire and a third connecting wire which are arranged separately, the first connecting wire is connected with a second interface and a first interface of different test units so as to enable the test units to be connected in series to form a chain structure, the second connecting wire is connected with a first interface of the test unit located at the head end in the chain structure, and the third connecting wire is connected with a second interface of the test unit located at the tail end in the chain structure.
Optionally, the first direction is perpendicular to the second direction.
Optionally, the test unit further comprises a partition structure, along the first direction, disposed at an end of the first interconnect layer to be tested.
Optionally, the material of the second interconnect layer includes one or both of copper and aluminum.
Optionally, along the first direction, a length of the first interconnect layer to be tested is greater than or equal to 0.082 micrometers.
Optionally, the first interconnect layer to be tested has a width in the second direction in the range of 0.014 micrometers to 0.016 micrometers.
Correspondingly, the embodiment of the invention also provides a testing method which is suitable for testing by adopting the testing structure provided by the embodiment of the invention, and the testing method comprises the steps of loading a first testing signal on a first testing end, loading a second testing signal on a second testing end so as to form a testing passage between the first testing end and the second testing end, and detecting an electrical parameter value output by the testing passage, wherein the electrical parameter value is used for judging whether the interconnection layer to be tested meets the quality requirement.
Optionally, in the step of loading the first test end with the first test signal and the second test end with the second test signal, the first test signal is at a high potential, the second test signal is at a ground potential, or the first test signal is at a ground potential, the second test signal is at a high potential, and the electrical parameter value is a resistance value.
Optionally, the method for judging whether the interconnection layer to be tested meets the quality requirement through the electrical parameter comprises judging whether the electrical parameter value is larger than a preset value, if so, judging that the interconnection layer to be tested does not meet the quality requirement, otherwise, judging that the interconnection layer to be tested meets the quality requirement.
Compared with the prior art, the technical scheme of the embodiment of the invention has the following advantages:
The test structure provided by the embodiment of the invention comprises the second interconnection layer arranged above the first interconnection layer, the second interconnection layer comprises the interconnection layer to be tested, the interconnection layer to be tested comprises the first interconnection layer to be tested with a first surface and a second surface which are oppositely arranged, the first plug is arranged between the first surface of the first interconnection layer to be tested and the first interconnection layer, two ends of the first plug are respectively and electrically connected with the first surface of the first interconnection layer to be tested and the first end of the first interconnection layer, the second plug is arranged between the second surface of the first interconnection layer to be tested and the first sub-interconnection layer, and two ends of the second plug are respectively and electrically connected with the second surface of the first interconnection layer to be tested and the first sub-interconnection layer.
The test method provided by the embodiment of the invention is suitable for testing by adopting the test structure provided by the embodiment of the invention, and comprises loading a first test signal on a first test end and loading a second test signal on a second test end, so that a test path is formed between the first test end and the second test end, and the electrical parameter value output by the test path is detected, only one plug is arranged on any side of the first interconnection layer to be tested, so that the influence of the length of the first interconnection layer to be tested on the plug is reduced, a test structure can be formed under the condition that the length of the first interconnection layer to be tested is smaller, the process monitoring window of the first interconnection layer to be tested is increased, the robustness of the test structure is improved, the test structure can be used for detecting the first interconnection layer to be tested with the smaller length, and the reliability of a test method and the reliability of a test result are improved.
Drawings
FIG. 1 is a schematic illustration of a test structure;
FIG. 2 is a schematic diagram of one embodiment of a test structure according to the present invention;
FIG. 3 is a schematic cross-sectional view of FIG. 2 taken along line AA 1;
FIG. 4 is a flow chart corresponding to the test method of the present invention.
Detailed Description
Currently, the performance of test structures is still to be improved. Now, in combination with a test structure, the reasons for the performance of the test structure to be improved are analyzed. Fig. 1 is a schematic structural view of a test structure.
Referring to fig. 1, the test structure comprises a first test terminal s1, a second test terminal s2 and a test unit 1, wherein the test unit 1 comprises a substrate 10, a first interconnection layer 11 arranged above the substrate 10, the first interconnection layer 11 extending along a first direction x, the first interconnection layer 11 comprising an interconnection layer to be tested 12, and the interconnection layer to be tested 12 comprising a first interconnection layer to be tested 13, a second interconnection layer 14 arranged above the first interconnection layer to be tested 13 and extending along a second direction y, the first direction x intersecting the second direction y, the second interconnection layer 14 comprising a first sub-interconnection layer 15 and a second sub-interconnection layer 16 which are separated from each other and are arranged at intervals along the first direction x, a first plug 17 arranged between the first interconnection layer to be tested 13 and the first sub-interconnection layer 15, and both ends of the first plug 17 are respectively connected with a first end of the first interconnection layer to be tested 13 and a first terminal interconnection layer to be tested 13, a second terminal 18 arranged between the first terminal to be tested and a first terminal of the first sub-interconnection layer to be tested 13, a second terminal 21 electrically connected with the first terminal to be tested 1 and a first terminal to be tested 1 as an interface, and a first terminal to be tested 1, and a second terminal to be tested 21 electrically connected with the first terminal to be tested 1, and a first terminal to be tested 1 are electrically connected with the first terminal to be tested 1, respectively, and the first terminal to be tested 1 are electrically connected to the first terminal to be tested 1.
It has been found that, with the technology node shrinking continuously, it is difficult to provide two plugs on the same side of the first interconnect layer 13 to be tested, due to the smaller length of the first interconnect layer 13 to be tested.
In order to solve the technical problems, the embodiment of the invention provides a test structure, which comprises a first test end, a second test end and a test unit, wherein the test unit comprises a substrate; the first interconnection layer is arranged above the substrate, extends along a second direction, is arranged above the first interconnection layer, extends along a first direction, and is electrically connected with first ends of the first interconnection layer and the first interconnection layer respectively, the second interconnection layer comprises a first interconnection layer to be tested, the first interconnection layer to be tested is provided with a first surface and a second surface which are oppositely arranged along the thickness direction, the third interconnection layer is arranged above the first interconnection layer to be tested and extends along the second direction, the third interconnection layer comprises a first sub interconnection layer, and a first plug is arranged between the first surface of the first interconnection layer to be tested and the first interconnection layer and is electrically connected with first ends of the first interconnection layer to be tested respectively, and a second plug is arranged between the second surface of the first interconnection layer to be tested and the first sub interconnection layer and is electrically connected with first ends of the first interconnection layer to be tested respectively, wherein the first connection unit to be tested is electrically connected with the first connection unit to be tested, the first connection unit to be tested is used as the first connection terminal to the first connection unit to be tested, and the first connection unit to be tested is electrically connected with the first connection unit to be tested to the first connection terminal to the first connection unit to be tested.
The test structure provided by the embodiment of the invention comprises the second interconnection layer arranged above the first interconnection layer, the second interconnection layer comprises the interconnection layer to be tested, the interconnection layer to be tested comprises the first interconnection layer to be tested with a first surface and a second surface which are oppositely arranged, the first plug is arranged between the first surface of the first interconnection layer to be tested and the first interconnection layer, two ends of the first plug are respectively and electrically connected with the first surface of the first interconnection layer to be tested and the first end of the first interconnection layer, the second plug is arranged between the second surface of the first interconnection layer to be tested and the first sub-interconnection layer, and two ends of the second plug are respectively and electrically connected with the second surface of the first interconnection layer to be tested and the first sub-interconnection layer.
In order that the above objects, features and advantages of embodiments of the invention may be readily understood, a more particular description of embodiments of the invention will be rendered by reference to the appended drawings.
FIG. 2 is a schematic diagram of an embodiment of the test structure of the present invention, and FIG. 3 is a schematic diagram of the cross-sectional structure of FIG. 2 along AA 1.
Referring to fig. 2 to 3, in the present embodiment, the test structure includes a first test terminal S1, a second test terminal S2, and a test unit 50, the test unit 50 includes a substrate 100; the first interconnect layer 110 disposed over the substrate 100, the first interconnect layer 110 extending along the second direction Y, the second interconnect layer 120 disposed over the first interconnect layer 110, the second interconnect layer 120 extending along the first direction X, the first direction X intersecting the second direction Y, the second interconnect layer 120 including the interconnect layer 125 to be tested, and the interconnect layer 125 to be tested including the first interconnect layer 126 to be tested, the first interconnect layer 126 having first sides 1261 and second sides 1262 disposed opposite to each other along a thickness direction thereof, the third interconnect layer 130 disposed over the first interconnect layer 126 and extending along the second direction Y, the third interconnect layer 130 including a first sub-interconnect layer 131, the first plug 210 disposed between the first side 1261 of the first interconnect layer 126 and the first interconnect layer 110, and both ends of the first plug 210 being electrically connected to the first side 1261 of the first interconnect layer 126 and the first end of the first interconnect layer 110, the second plug 220 disposed between the second side 1262 of the first interconnect layer 126 and the first side 1262 of the first interconnect layer to be tested, and the first end of the first interconnect layer 110 being electrically connected to the first sub-interconnect layer 131, or the first end of the first interconnect layer 50 being electrically connected to the first interconnect layer 310 and the first end of the first interconnect layer to be tested, the first interconnect layer 310 being the first end of the first interconnect layer to be tested, the first interconnect layer being the first electrical interface unit 50 being the first electrical interface unit 310 being the first electrical interface between the first end of the first interconnect layer to be tested and the first end of the first interconnect layer 110 and the first interface unit to be tested respectively, the second test terminal S2 is electrically connected to the second interface 320.
Wherein the dielectric layer is omitted in fig. 2 and 3 for clarity of illustration of the test structure.
The test structure is used to detect whether the interconnect layer 125 under test meets quality requirements.
The first test terminal S1 is used for loading a first test signal, and the second test terminal S2 is used for loading a second test signal.
The test unit 50 is configured to form a test path with the first test terminal S1 and the second test terminal S2.
The substrate 100 is used to provide a process platform for the formation of the test cells 50.
In this embodiment, the substrate 100 is used to form a field effect transistor.
The base 100 includes a substrate (not shown) that may be silicon, germanium, silicon carbide, gallium arsenide, indium gallium arsenide, or other materials, or may be a silicon-on-insulator substrate or a germanium-on-insulator substrate, or other types of substrates.
The substrate may be a planar substrate or a substrate having a channel projection.
In this embodiment, a functional structure may be formed in the substrate 100 according to actual process conditions, for example, a semiconductor device such as a MOS field effect transistor may be formed in the substrate 100, and a resistor structure may be formed. In other embodiments, at least one layer of interlayer metal structure (i.e., mxlayer) may also be formed within the substrate, which may be the same structure as the first interconnect layer 110.
The first interconnect layer 110 is configured to electrically connect to the first side 1261 of the first interconnect layer to be tested 126, such that the first test signal is loaded on the first side 1261 of the first interconnect layer to be tested 126 through the first interconnect layer 110.
In this embodiment, the material of the first interconnect layer 110 includes one or more of copper, aluminum, and cobalt. As an example, the material of the first interconnect layer 110 is cobalt.
Cobalt is a conductive material, has the characteristics of low resistivity and corrosion resistance, is beneficial to reducing the resistance of the test structure, and is also beneficial to reducing the probability of damage to the first interconnection layer 110 in the process of forming the test structure. In other embodiments, the material of the first interconnect layer may also be other suitable conductive materials.
The second interconnect layer 120 is for electrical connection with the first interconnect layer 110.
In this embodiment, the material of the second interconnect layer 120 includes one or both of copper and aluminum. As an example, the material of the second interconnect layer 120 is copper.
Copper is a conductive material, has higher conductivity and lower resistivity, and is favorable for reducing the resistance of the test structure, so that in the process of electrically testing the test structure, a more accurate test result is favorable for obtaining. In other embodiments, the material of the second interconnect layer may also be other suitable conductive materials.
In this embodiment, the second interconnect layer 120 is a metal line of a certain layer, i.e., mn, the first interconnect layer 110 is a metal line of a layer next to the metal line, i.e., mn-1, and the third interconnect layer 130 is a metal line of a layer above the metal line, i.e., mn+1.
As an example, the second interconnect layer 120 is M1 (first metal layer), and correspondingly, the first interconnect layer 110 is M0 (zeroth metal layer), and the third interconnect layer 130 is M2 (second metal layer).
The interconnect layer under test 125 is used as a target for electrical performance testing.
Specifically, the first side 1261 of the first interconnect layer to be tested 126 is electrically connected to the first interconnect layer 110, and the second side 1262 of the first interconnect layer to be tested 126 is electrically connected to the first sub-interconnect layer 131, so that the first interconnect layer 110 to the first sub-interconnect layer 131 are connected in series to form a test path.
Here, the first face 1261 refers to a face facing the substrate 100, and the corresponding second face 1262 refers to a face facing away from the substrate 100.
It should be noted that, in order to make the length L1 of the first interconnect layer 126 conform to the design rule, the length L1 of the first interconnect layer 126 along the first direction X should not be too small. In the present embodiment, the length L1 of the first interconnect layer 126 is greater than or equal to 0.082 μm along the first direction X.
It should be further noted that, in order to make the width W1 of the first interconnect layer 126 conform to the design rule, the width W1 of the first interconnect layer 126 should not be too small or too large along the second direction Y. In the present embodiment, the width W1 of the first interconnect layer 126 to be tested along the second direction Y is in the range of 0.014 μm to 0.016 μm.
In this embodiment, the interconnect layer to be tested 125 further includes a second interconnect layer to be tested 127 that is separated from the first interconnect layer to be tested 126 and is arranged at intervals along the second direction.
The interconnect layer to be tested 125 further includes a second interconnect layer to be tested 127 that is separated from the first interconnect layer to be tested 126 and is arranged at intervals along the second direction, so that the first interconnect layer to be tested 126 and the second interconnect layer to be tested 127 can be tested simultaneously, that is, the interconnect layers to be tested 125 at different positions can be tested simultaneously, thereby being beneficial to reducing the area of the test structure and improving the test efficiency.
Specifically, the length of the second interconnect layer to be tested 127 is greater than the length of the first interconnect layer to be tested 126.
The length of the second interconnect layer to be tested 127 is greater than the length of the first interconnect layer to be tested 126, so that the third plug and the fourth plug are both located on the same surface of the second interconnect layer to be tested 127.
In this embodiment, the second interconnect layer 120 further includes a connection interconnect layer 128 that is separated from the interconnect layer to be tested 125 and is arranged at intervals along the second direction Y, and the connection interconnect layer 128 and the interconnect layer to be tested 125 are not adjacent.
The second interconnect layer 120 further includes a connection interconnect layer 128 spaced apart from the interconnect layer under test 125 and spaced apart in the second direction Y, the connection interconnect layer 128 for electrically connecting the third sub-interconnect layer and the first interconnect layer 110.
Moreover, the connection interconnection layer 128 and the interconnection layer 125 to be tested are not adjacent, which is beneficial to increasing the distance between the connection interconnection layer 128 and the interconnection layer 125 to be tested, thereby being beneficial to reducing the influence of the connection interconnection layer 128 on the interconnection layer 125 to be tested, further improving the reliability of the test structure and correspondingly further improving the reliability of the test result.
The third interconnect layer 130 is for electrical connection with the second interconnect layer 120.
In this embodiment, the material of the third interconnect layer 130 includes one or both of copper and aluminum. As an example, the material of the third interconnect layer 130 is copper. In other embodiments, the material of the third interconnect layer may also be other suitable conductive materials.
The reason why the material of the third interconnect layer 130 includes one or both of copper and aluminum is similar to the reason why the material of the second interconnect layer 120 includes one or both of copper and aluminum, and thus will not be described in detail herein.
The first sub-interconnect layer 131 is configured to electrically connect with the second side 1262 of the first interconnect under test layer 126, and the first sub-interconnect layer 131 is also configured to electrically connect the first interconnect under test layer 126 and the second interconnect under test layer 127.
In this embodiment, the third interconnect layer 130 further includes a second sub-interconnect layer 132 separated from the first sub-interconnect layer 131 and arranged at intervals along the first direction X, and the second sub-interconnect layer 132 is located above the second interconnect layer 127 to be tested.
The second sub-interconnect layer 132 is configured to be electrically connected to the second end of the second interconnect layer to be tested 127, so that the first interconnect layer 110, the first interconnect layer to be tested 126, the first sub-interconnect layer 131, and the second sub-interconnect layer 132, which are sequentially connected, are connected in series to form a test path.
In this embodiment, the third interconnect layer 130 further includes third sub-interconnect layers 133 that are separated from the first sub-interconnect layers 131 and are arranged at intervals along the first direction X.
The third sub-interconnect layer 133 is electrically connected to the connection interconnect layer 128, so that the third sub-interconnect layer 133, the connection interconnect layer 128, the first interconnect layer 110, the first interconnect layer to be tested 126, the first sub-interconnect layer 131, the second interconnect layer to be tested 127, and the second sub-interconnect layer 132, which are sequentially connected, are connected in series to form a test path.
In this embodiment, the first direction X is perpendicular to the second direction Y.
The first direction X is perpendicular to the second direction Y, which is advantageous in reducing difficulty in forming the first, second, and third interconnect layers 110, 120, and 130.
The two ends of the first plug 210 are respectively and electrically connected with the first face 1261 of the first interconnect layer 126 and the first end of the first interconnect layer 110, the second plug 220 is respectively and electrically connected with the second face 1262 of the first interconnect layer 126 and the first sub-interconnect layer 131, and the two ends of the second plug 220 are respectively and electrically connected with the second face 1262 of the first interconnect layer 126 and the first sub-interconnect layer 131, and since the first plug 210 and the second plug 220 are respectively arranged on different faces of the first interconnect layer 126, only one plug is arranged on any face of the first interconnect layer 126, the influence of the length of the first interconnect layer 126 on the plug is reduced, a test structure can be still formed under the condition that the length of the first interconnect layer 126 is smaller, the reliability of the test structure of the first interconnect layer 126 can be increased, the reliability of the test structure can be improved, and the reliability of the test structure can be further tested by the test the window length of the first interconnect layer 126 is improved.
In this embodiment, the material of the first plug 210 includes one or both of copper and tungsten.
As an example, the first plug 210 is V0, and V0 refers to a conductive plug for electrically connecting M0 and M1. The material of the first plug 210 is tungsten. In other embodiments, the material of the first plug may be other suitable conductive materials.
In this embodiment, the material of the second plug 220 includes one or both of copper and tungsten.
As an example, the second plug 220 is V1, and V1 refers to a conductive plug for electrically connecting M1 and M2. The material of the second plug 220 is copper.
Correspondingly, in the embodiment, the test unit 50 further includes a third plug 230 disposed between the second interconnect layer 127 to be tested and the first sub-interconnect layer 131, and two ends of the third plug 230 are electrically connected to the first end of the second interconnect layer 127 to be tested and the second end of the first sub-interconnect layer 131, respectively.
The first sub-interconnect layer 131 and the second interconnect layer 127 under test are electrically connected by a third plug 230.
Specifically, the material of the third plug 230 is similar to that of the second plug 220, and will not be described herein.
Correspondingly, in the embodiment, the test unit 50 further includes a fourth plug 240 disposed between the second interconnect layer 127 to be tested and the second sub-interconnect layer 132, and two ends of the fourth plug 240 are electrically connected to the second end of the second interconnect layer 127 to be tested and the first end of the second sub-interconnect layer 132, respectively.
The second interconnect layer under test 127 is electrically connected to the second sub-interconnect layer 132 through the fourth plug 240.
Specifically, the material of the fourth plug 240 is similar to that of the second plug 220, and will not be described herein.
Correspondingly, in the present embodiment, the test unit 50 further includes a fifth plug 250 disposed between the first interconnection layer 110 and the connection interconnection layer 128, wherein two ends of the fifth plug 250 are electrically connected to the second end of the first interconnection layer 110 and the first end of the connection interconnection layer 128, respectively, and a sixth plug 260 disposed between the connection interconnection layer 128 and the third sub-interconnection layer 133, and two ends of the sixth plug 260 are electrically connected to the second end of the connection interconnection layer 128 and the first end of the third sub-interconnection layer 133, respectively.
The first interconnect layer 110 and the connection interconnect layer 128 are electrically connected by a fifth plug 250, and the connection interconnect layer 128 and the third sub-interconnect layer 133 are electrically connected by a sixth plug 260.
Specifically, the materials of the fifth plug 250 and the sixth plug 260 are similar to those of the second plug 220, and will not be described again.
In this embodiment, the test unit 50 further includes a seventh plug 270 disposed on the third sub-interconnect layer 133 and electrically connected to the second end of the third sub-interconnect layer 133, the seventh plug 270 serving as the first interface 310 of the test unit 50.
The seventh plug 270 is for electrically connecting with the second terminal of the third sub-interconnect layer 133 and for electrically connecting with the first test terminal S1.
Specifically, the material of the seventh plug 270 is similar to that of the second plug 220, and will not be described herein.
In this embodiment, the test unit 50 further includes an eighth plug 280 disposed on the first sub-interconnect layer 131 and electrically connected to the second end of the first sub-interconnect layer 131, the eighth plug 280 serving as the second interface 320 of the test unit 50.
The eighth plug 280 is for electrically connecting with the second end of the first sub-interconnect layer 131 and for functioning as the second interface 320 of the test unit 50.
Specifically, the material of the eighth plug 280 is similar to that of the second plug 220, and will not be described herein.
In a specific embodiment, the interconnect layer under test 125 further comprises a second interconnect layer under test 127 which is separated from the first interconnect layer under test 126 and is arranged at intervals along the second direction Y, the third interconnect layer 130 further comprises a second sub interconnect layer 132 which is separated from the first sub interconnect layer under test 131 and is arranged at intervals along the first direction X, the second sub interconnect layer 132 is located above the second interconnect layer under test 127, the test unit 50 further comprises a third plug 230 which is arranged between the second interconnect layer under test 127 and the first sub interconnect layer 131, two ends of the third plug 230 are respectively electrically connected with a first end of the second interconnect layer under test 127 and a second end of the first sub interconnect layer 131, a fourth plug 240 which is arranged between the second interconnect layer under test 127 and the second sub interconnect layer 132, two ends of the fourth plug 240 are respectively electrically connected with a second end of the second interconnect layer under test 127 and a first end of the second sub interconnect layer 132, and the corresponding test unit 50 further comprises an eighth plug 280 which is located on the second sub interconnect layer 132 and is electrically connected with a second end of the second sub interconnect layer 132 as an interface 50.
The eighth plug 280 is for electrically connecting with the second end of the second sub-interconnect layer 132.
The first interface 310 is used for electrically connecting with the first test terminal S1, and the second interface 320 is used for electrically connecting with the second test terminal S2.
As an example, the first interface 310 is used for electrical connection with the first test terminal S1 and the third sub-interconnect layer 133, and the second interface 320 is used for electrical connection with the second test terminal S2 and the second sub-interconnect layer 132, so that the first test terminal S1, the third sub-interconnect layer 133, the connection interconnect layer 128, the first interconnect layer 110, the first interconnect layer to be tested 126, the first sub-interconnect layer 131, the second interconnect layer to be tested 127, and the second sub-interconnect layer 132, which are sequentially connected, are connected in series to form a test path (as indicated by arrow directions in fig. 2).
In the embodiment, the second interconnection layer 120 further includes a connection interconnection layer 128 which is separated from the interconnection layer 125 to be tested and is arranged at intervals along the second direction Y, the connection interconnection layer 128 and the interconnection layer 125 to be tested are not adjacent, the third interconnection layer 130 further includes a third sub-interconnection layer 133 which is separated from the first sub-interconnection layer 131 and is arranged at intervals along the first direction X, the test unit 50 further includes a fifth plug 250 which is disposed between the first interconnection layer 110 and the connection interconnection layer 128 and has both ends electrically connected with the second end of the first interconnection layer 110 and the first end of the connection interconnection layer 128, respectively, and a sixth plug 260 which is disposed between the connection interconnection layer 128 and the third sub-interconnection layer 133 and has both ends electrically connected with the second end of the connection interconnection layer 128 and the first end of the third sub-interconnection layer 133, respectively, and the second end of the third sub-interconnection layer 133 is correspondingly electrically connected with the first interface 310 of the test unit 50 or the first interface 310 of the test unit 50.
In this embodiment, the interconnect layer to be tested 125 further includes a second interconnect layer to be tested 127 that is separated from the first interconnect layer to be tested 126 and is arranged at intervals along the second direction Y, the test unit 50 further includes a third plug 230 disposed between the second interconnect layer to be tested 127 and the first sub-interconnect layer 131, two ends of the third plug 230 are respectively electrically connected to a first end of the second interconnect layer to be tested 127 and a second end of the first sub-interconnect layer 131, and correspondingly, the second end of the second interconnect layer to be tested 127 is used as the second interface 320 of the test unit 50 or is electrically connected to the second interface 320 of the test unit 50.
Specifically, the third interconnection layer 130 further includes a second sub-interconnection layer 132 separated from the first sub-interconnection layer 131 and arranged at intervals along the first direction X, the second sub-interconnection layer 132 is located above the second interconnect layer 127 to be tested, the test unit 50 further includes a fourth plug 240 disposed between the second interconnect layer 127 to be tested and the second sub-interconnection layer 132, and two ends of the fourth plug 240 are electrically connected to the second end of the second interconnect layer 127 to be tested and the first end of the second sub-interconnection layer 132, respectively. Accordingly, the second end of the second sub-interconnect layer 132 is electrically connected as the second interface 320 of the test unit 50 or with the second interface 320 of the test unit 50.
In this embodiment, the test unit 50 further includes a partition structure 330 disposed at an end of the first interconnect layer 126 along the first direction X.
The partition structure 330 serves to partition the second interconnect layer 120 located at both sides thereof in the first direction X so as to insulate the first interconnect layer 126 to be tested from the second interconnect layer 120 located in the extending direction thereof.
Specifically, the material of the isolation structure 330 is an insulating material, including one or more of silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbonitride, and silicon oxycarbonitride.
In this embodiment, the number of the test units 50 is plural, and adjacent test units 50 are connected in series.
When the number of the test units 50 is plural, the adjacent test units 50 are connected in series, that is, the plural interconnect layers 125 to be tested are connected in series in the test path between the first test end S1 and the second test end S2, so that any interconnect layer 125 to be tested does not meet the quality requirement, can be reacted by the electrical parameter value output by the test path, thereby further improving the reliability of the test structure and correspondingly further improving the reliability of the test result.
Specifically, the second interface 320 and the first interface 310 of each test unit 50 are sequentially connected such that the plurality of test units 50 are connected in series between the first test terminal S1 and the second test terminal S2, forming a chain structure.
The second interface 320 and the first interface 310 of each test unit 50 are sequentially connected such that the plurality of test units 50 are connected in series between the first test terminal S1 and the second test terminal S2 to form a chain structure, which is advantageous for simplifying the test structure.
In this embodiment, the test structure further includes a fourth interconnect layer 140 disposed above the third interconnect layer 130 and extending along the first direction X, the fourth interconnect layer 140 including a first connection line 141, a second connection line 142, and a third connection line 143 which are disposed separately, the first connection line 141 connecting the second interface 320 and the first interface 310 of different test units 50 so as to connect the test units 50 in series to form a chain structure, the second connection line 142 connecting the first interface 310 of the test unit 50 located at the head end in the chain structure, and the third connection line 143 connecting the second interface 320 of the test unit 50 located at the tail end in the chain structure.
The first connection line 141 of the fourth interconnect layer 140 connects the second interface 320 and the first interface 310 of the different test unit 50, the second connection line 142 of the fourth interconnect layer 140 connects the first interface 310 of the test unit 50 located at the head end in the chain structure, and the third connection line 143 of the fourth interconnect layer 140 connects the second interface 320 of the test unit 50 located at the tail end in the chain structure, which is advantageous in that the connection of the first interface 310 of the test unit 50 located at the head end to the first test end S1, the connection of the second interface 320 of the test unit 50 located at the tail end to the second test end S2, and the connection between the second interface 320 and the first interface 310 of the different test unit 50 have less influence on the first interconnect layer 110, the second interconnect layer 120, and the third interconnect layer 130.
As an example, the fourth interconnect layer 140 is M3.
In this embodiment, the test structure further includes a dielectric layer (not shown) between the first interconnect layer 110 and the fourth interconnect layer 140.
The dielectric layers include an interlayer dielectric layer (INTER LAYER DIELECTRIC, ILD) and an intermetallic dielectric layer (INTER METAL DIELECTRIC LAYER, IMD).
The dielectric layer is used to achieve electrical isolation between adjacent interconnect layers.
Specifically, the material of the dielectric layer is a dielectric material, such as silicon oxide.
Correspondingly, the invention also provides a testing method which is suitable for testing by adopting the testing structure of the embodiment of the invention. FIG. 4 is a flow chart corresponding to an embodiment of the testing method of the present invention.
Referring to fig. 4 in combination with fig. 2 to 3, step S1 is performed by loading a first test signal on the first test terminal S1 and loading a second test signal on the second test terminal S2 so that a test path is formed between the first test terminal S1 and the second test terminal S2.
Since the first plug 210 and the second plug 220 are respectively disposed on different surfaces of the first interconnect layer to be tested 126, only one plug is disposed on any surface of the first interconnect layer to be tested 126, so that the influence of the length of the first interconnect layer to be tested 126 on the plug is reduced, a test structure can be still formed under the condition that the length of the first interconnect layer to be tested 126 is smaller, and the process monitoring window of the first interconnect layer to be tested 126 is increased, so that the robustness of the test structure is improved, the test structure can be used for detecting the first interconnect layer to be tested 126 with smaller length, and the reliability of the test method and the reliability of the test result are improved.
In this embodiment, in the step of loading the first test terminal S1 with the first test signal and loading the second test terminal S2 with the second test signal, the first test signal is at a high potential, the second test signal is at a ground potential, or the first test signal is at a ground potential, the second test signal is at a high potential, and the electrical parameter value is a resistance value.
The first test signal is at a high potential, the second test signal is at a ground potential, or the first test signal is at a ground potential, and the second test signal is at a high potential, so that a potential difference exists between the first test terminal S1 and the second test terminal S2, thereby facilitating the output electrical parameter value to be a resistance value.
Referring to fig. 4 in combination with fig. 2 to 3, step S2 is performed to detect an electrical parameter value output by the test path, where the electrical parameter value is used to determine whether the interconnect layer 125 to be tested meets a quality requirement.
Since the interconnect layer 125 to be tested meets the quality requirement, the value of the electrical parameter is different from the value of the electrical parameter when the interconnect layer 125 to be tested does not meet the quality requirement. Therefore, the electrical parameter value output by the test path can be used to determine whether the interconnect layer under test 125 meets the quality requirement.
Specifically, the method for determining whether the interconnect layer 125 to be tested meets the quality requirement according to the electrical parameter includes:
And S3, judging whether the electrical parameter value is larger than a preset value.
And S4, if yes, judging that the interconnection layer 125 to be tested does not meet the quality requirement.
Step S5 is executed, otherwise, it is determined that the interconnect layer 125 to be tested meets the quality requirement.
In this embodiment, the first test signal is a high potential, the second test signal is a ground potential, the electrical parameter value is a resistance value, and the corresponding preset value may be a preset resistance value.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.

Claims (19)

1.一种测试结构,其特征在于,包括第一测试端、第二测试端和测试单元,所述测试单元包括:1. A test structure, characterized in that it comprises a first test terminal, a second test terminal and a test unit, wherein the test unit comprises: 基底;substrate; 第一互连层,设置于所述基底的上方,所述第一互连层沿第二方向延伸;A first interconnection layer is disposed above the substrate, and the first interconnection layer extends along a second direction; 第二互连层,设置于所述第一互连层的上方,所述第二互连层沿第一方向延伸,所述第一方向与第二方向相交,所述第二互连层包括待测互连层,且所述待测互连层包括第一待测互连层,所述第一待测互连层沿其厚度方向具有相对设置的第一面和第二面;a second interconnection layer, arranged above the first interconnection layer, the second interconnection layer extending along a first direction, the first direction intersecting with a second direction, the second interconnection layer comprising an interconnection layer to be tested, and the interconnection layer to be tested comprising a first interconnection layer to be tested, the first interconnection layer to be tested having a first surface and a second surface arranged opposite to each other along a thickness direction thereof; 第三互连层,设置于所述第一待测互连层的上方且沿所述第二方向延伸,所述第三互连层包括第一子互连层;A third interconnection layer, disposed above the first interconnection layer to be tested and extending along the second direction, the third interconnection layer comprising a first sub-interconnection layer; 第一插塞,设置于所述第一待测互连层的第一面与所述第一互连层之间,且分别与所述第一待测互连层和所述第一互连层的第一端电连接;A first plug is disposed between a first surface of the first interconnect layer to be tested and the first interconnect layer, and is electrically connected to the first interconnect layer to be tested and a first end of the first interconnect layer respectively; 第二插塞,设置于所述第一待测互连层的第二面与所述第一子互连层之间,且分别与所述第一待测互连层和所述第一子互连层的第一端电连接;a second plug, disposed between the second surface of the first interconnect layer to be tested and the first sub-interconnect layer, and electrically connected to the first ends of the first interconnect layer to be tested and the first sub-interconnect layer respectively; 其中,所述第一互连层的第二端作为所述测试单元的第一接口或者与所述测试单元的第一接口电连接,所述第一子互连层的第二端作为所述测试单元的第二接口或者与所述测试单元的第二接口电连接,所述第一测试端与所述第一接口电连接,所述第二测试端与所述第二接口电连接。Among them, the second end of the first interconnection layer serves as the first interface of the test unit or is electrically connected to the first interface of the test unit, the second end of the first sub-interconnection layer serves as the second interface of the test unit or is electrically connected to the second interface of the test unit, the first test end is electrically connected to the first interface, and the second test end is electrically connected to the second interface. 2.如权利要求1所述的测试结构,其特征在于,所述待测互连层还包括与所述第一待测互连层相互分立且沿所述第二方向间隔排布的第二待测互连层;2. The test structure according to claim 1, wherein the interconnect layer to be tested further comprises a second interconnect layer to be tested which is separate from the first interconnect layer to be tested and arranged at intervals along the second direction; 所述测试单元还包括:第三插塞,设置于所述第二待测互连层与第一子互连层之间,分别与所述第二待测互连层的第一端、以及所述第一子互连层的第二端电连接;The test unit further includes: a third plug, disposed between the second interconnect layer to be tested and the first sub-interconnect layer, and electrically connected to the first end of the second interconnect layer to be tested and the second end of the first sub-interconnect layer respectively; 所述第二待测互连层的第二端作为所述测试单元的第二接口或者与所述测试单元的第二接口电连接。The second end of the second interconnect layer to be tested serves as the second interface of the test unit or is electrically connected to the second interface of the test unit. 3.如权利要求2所述的测试结构,其特征在于,所述第三互连层还包括与所述第一子互连层相互分立且沿所述第一方向间隔排布的第二子互连层,所述第二子互连层位于所述第二待测互连层上方;3. The test structure according to claim 2, wherein the third interconnection layer further comprises a second sub-interconnection layer which is separate from the first sub-interconnection layer and arranged at intervals along the first direction, and the second sub-interconnection layer is located above the second interconnection layer to be tested; 所述测试单元还包括:第四插塞,设置于所述第二待测互连层与第二子互连层之间,分别与所述第二待测互连层的第二端、以及所述第二子互连层的第一端电连接;The test unit further includes: a fourth plug, disposed between the second interconnect layer to be tested and the second sub-interconnect layer, and electrically connected to the second end of the second interconnect layer to be tested and the first end of the second sub-interconnect layer respectively; 所述第二子互连层的第二端作为所述测试单元的第二接口或者与所述测试单元的第二接口电连接。The second end of the second sub-interconnection layer serves as the second interface of the test unit or is electrically connected to the second interface of the test unit. 4.如权利要求3所述的测试结构,其特征在于,所述第二待测互连层的长度大于所述第一待测互连层的长度。4 . The test structure according to claim 3 , wherein a length of the second interconnect layer to be tested is greater than a length of the first interconnect layer to be tested. 5.如权利要求3所述的测试结构,其特征在于,所述测试单元还包括:第八插塞,位于所述第二子互连层上且与所述第二子互连层的第二端电连接,所述第八插塞作为所述测试单元的第二接口。5. The test structure according to claim 3, wherein the test unit further comprises: an eighth plug located on the second sub-interconnect layer and electrically connected to the second end of the second sub-interconnect layer, the eighth plug serving as a second interface of the test unit. 6.如权利要求1所述的测试结构,其特征在于,所述第二互连层还包括与所述待测互连层相互分立且沿所述第二方向间隔排布的连接互连层,所述连接互连层和待测互连层不相邻;6. The test structure according to claim 1, wherein the second interconnection layer further comprises a connection interconnection layer which is separate from the interconnection layer to be tested and arranged at intervals along the second direction, and the connection interconnection layer and the interconnection layer to be tested are not adjacent; 所述第三互连层还包括与所述第一子互连层相互分立且沿所述第一方向间隔排布的第三子互连层;The third interconnect layer further includes a third sub-interconnect layer which is separate from the first sub-interconnect layer and arranged at intervals along the first direction; 所述测试单元还包括:第五插塞,设置于所述第一互连层和连接互连层之间,且分别与所述第一互连层的第二端、以及所述连接互连层的第一端电连接;The test unit further includes: a fifth plug, which is disposed between the first interconnect layer and the connection interconnect layer and is electrically connected to the second end of the first interconnect layer and the first end of the connection interconnect layer respectively; 第六插塞,设置于所述连接互连层和第三子互连层之间,且分别与所述连接互连层的第二端、以及所述第三子互连层的第一端电连接;a sixth plug, disposed between the connection interconnect layer and the third sub-interconnect layer, and electrically connected to the second end of the connection interconnect layer and the first end of the third sub-interconnect layer respectively; 所述第三子互连层的第二端作为所述测试单元的第一接口或者与所述测试单元的第一接口电连接。The second end of the third sub-interconnection layer serves as the first interface of the test unit or is electrically connected to the first interface of the test unit. 7.如权利要求6所述的测试结构,其特征在于,所述测试单元还包括:第七插塞,位于所述第三子互连层上且电连接所述第三子互连层的第二端,所述第七插塞作为所述测试单元的第一接口。7. The test structure according to claim 6, wherein the test unit further comprises: a seventh plug located on the third sub-interconnect layer and electrically connected to the second end of the third sub-interconnect layer, the seventh plug serving as a first interface of the test unit. 8.如权利要求1所述的测试结构,其特征在于,所述测试单元还包括:第八插塞,位于所述第一子互连层上且与所述第一子互连层的第二端电连接,所述第八插塞作为所述测试单元的第二接口。8. The test structure according to claim 1, wherein the test unit further comprises: an eighth plug located on the first sub-interconnect layer and electrically connected to the second end of the first sub-interconnect layer, the eighth plug serving as a second interface of the test unit. 9.如权利要求1~8中任一项所述的测试结构,其特征在于,所述测试单元的数量为多个,相邻的所述测试单元之间串联连接。9 . The test structure according to claim 1 , wherein there are a plurality of test units, and adjacent test units are connected in series. 10.如权利要求9所述的测试结构,其特征在于,各个所述测试单元的第二接口和第一接口顺次连接,以使多个所述测试单元在所述第一测试端和第二测试端之间串联连接,形成链式结构。10. The test structure according to claim 9, wherein the second interface and the first interface of each of the test units are connected in sequence, so that a plurality of the test units are connected in series between the first test end and the second test end to form a chain structure. 11.如权利要求10所述的测试结构,其特征在于,所述测试结构还包括:第四互连层,设置于所述第三互连层的上方且沿所述第一方向延伸,所述第四互连层包括分立设置的第一连接线、第二连接线、以及第三连接线;11. The test structure according to claim 10, characterized in that the test structure further comprises: a fourth interconnection layer, disposed above the third interconnection layer and extending along the first direction, the fourth interconnection layer comprising a first connection line, a second connection line, and a third connection line that are separately disposed; 所述第一连接线连接不同测试单元的第二接口和第一接口,以使所述测试单元之间串联连接,形成链式结构;The first connecting line connects the second interfaces and the first interfaces of different test units, so that the test units are connected in series to form a chain structure; 所述第二连接线连接所述链式结构中位于首端的测试单元的第一接口;The second connecting line is connected to the first interface of the test unit located at the head end of the chain structure; 所述第三连接线连接所述链式结构中位于末端的测试单元的第二接口。The third connection line is connected to the second interface of the test unit located at the end of the chain structure. 12.如权利要求1~8中任一项所述的测试结构,其特征在于,所述第一方向与第二方向相垂直。12 . The test structure according to claim 1 , wherein the first direction is perpendicular to the second direction. 13.如权利要求1~8中任一项所述的测试结构,其特征在于,所述测试单元还包括:隔断结构,沿所述第一方向,设置于所述第一待测互连层的端部。13 . The test structure according to claim 1 , wherein the test unit further comprises: a partition structure, arranged along the first direction at an end of the first interconnection layer to be tested. 14.如权利要求1~8中任一项所述的测试结构,其特征在于,所述第二互连层的材料包括铜和铝中的一种或两种。14 . The test structure according to claim 1 , wherein a material of the second interconnect layer comprises one or both of copper and aluminum. 15.如权利要求1~8中任一项所述的测试结构,其特征在于,沿所述第一方向,所述第一待测层互连层的长度大于或者等于0.082微米。15 . The test structure according to claim 1 , wherein along the first direction, the length of the first interconnection layer to be tested is greater than or equal to 0.082 μm. 16.如权利要求1~8中任一项所述的测试结构,其特征在于,沿所述第二方向,所述第一待测互连层的宽度范围为0.014微米至0.016微米。16 . The test structure according to claim 1 , wherein along the second direction, a width of the first interconnection layer to be tested ranges from 0.014 microns to 0.016 microns. 17.一种测试方法,其特征在于,适于采用如权利要求1~16中任一项所述的测试结构进行测试,所述测试方法包括:17. A test method, characterized in that it is suitable for testing using the test structure according to any one of claims 1 to 16, and the test method comprises: 对第一测试端加载第一测试信号,对第二测试端加载第二测试信号,以使第一测试端和第二测试端之间形成测试通路;Loading a first test signal to the first test end and loading a second test signal to the second test end, so as to form a test path between the first test end and the second test end; 检测所述测试通路输出的电性参数值,所述电性参数值用于判断所述待测互连层是否符合质量要求。The electrical parameter value output by the test path is detected, and the electrical parameter value is used to determine whether the interconnect layer to be tested meets the quality requirements. 18.如权利要求17所述的测试方法,其特征在于,在对所述第一测试端加载第一测试信号,对所述第二测试端加载第二测试信号的步骤中,所述第一测试信号为高电位,所述第二测试信号为接地电位,或者,所述第一测试信号为接地电位,所述第二测试信号为高电位,且所述电性参数值为电阻值。18. The test method as described in claim 17 is characterized in that, in the step of loading a first test signal on the first test end and loading a second test signal on the second test end, the first test signal is a high potential and the second test signal is a ground potential, or the first test signal is a ground potential and the second test signal is a high potential, and the electrical parameter value is a resistance value. 19.如权利要求17所述的测试方法,其特征在于,通过所述电性参数判断所述待测互连层是否符合质量要求的方式包括:判断所述电性参数值是否大于预设值,若是,则判定所述待测层互连层不符合质量要求,否则,判定所述待测层互连层符合质量要求。19. The testing method according to claim 17 is characterized in that the method of judging whether the interconnection layer to be tested meets the quality requirements by the electrical parameter comprises: judging whether the electrical parameter value is greater than a preset value, if so, judging that the interconnection layer to be tested does not meet the quality requirements, otherwise, judging that the interconnection layer to be tested meets the quality requirements.
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