CN120353532B - Display control method, apparatus, medium, and program product - Google Patents

Abstract

The present application provides a display control method that can be applied to the field of display technology. The display control method includes: in response to detecting that a server has been booted up, controlling the display to display first information; the first information is used to indicate the first interface content of the processor responding to the boot operation; after the processor is booted up, in response to detecting that the first controller and/or the second controller has performed an initialization operation, using second information to update the first information, and controlling the display to display second information; wherein the second information is used to indicate the second interface content of the initialization state of the first controller and/or the second controller. The present application also provides a display control device, medium, and program product.

Description

Display control method, apparatus, medium, and program product

Technical Field

The present application relates to the field of display technologies, and in particular, to the field of server display control technologies, and more particularly, to a display control method, apparatus, medium, and program product.

Background

In the current data center operation scenario, a server serves as a core computing resource and takes over multiple tasks such as data processing, storage, network service and the like. Therefore, ensuring that the server can quickly, efficiently and reliably complete the startup process is extremely important in data center operations and system management.

After the server completes self-checking and initializes hardware configuration, the video graphic array interface outputs prompt information. However, when the controller switches, the hardware registers of the video graphics array need to be reinitialized, which results in a black screen period of the display, thereby affecting the user experience and the failure diagnosis efficiency.

Disclosure of Invention

In view of the foregoing, the present application provides a display control method, apparatus, medium, and program product that improve user experience and failure diagnosis efficiency.

According to a first aspect of the present application, there is provided a display control method including controlling the display to display first information in response to detection of the server being subjected to a startup operation, the first information being for indicating first interface contents to which the processor has been subjected in response to the startup operation, updating the first information with second information in response to detection of the first controller and/or the second controller being subjected to an initialization operation after the startup of the processor is completed, and controlling the display to display second information, wherein the second information is for indicating second interface contents of an initialization state of the first controller and/or the second controller.

The second aspect of the present application provides a display control device including a first controller, a second controller, a processor and a display disposed in a server, the processor being communicatively connected to the first controller, the second controller and the display, respectively, the processor being configured to control the display to display first information in response to detection of a start-up operation performed by the server, the first information being configured to instruct the processor that the first interface content of the start-up operation has been responded, the first controller being configured to perform a first initialization operation after the start-up of the processor is completed and to transmit a first detection signal to the processor, the second controller being configured to perform a second initialization operation after the start-up of the processor is completed and to transmit a second detection signal to the processor, the processor being further configured to receive the first detection signal and/or the second detection signal from the first controller and/or the second controller after the start-up of the processor is completed, the first controller being configured to perform a second initialization operation using the first information and/or the second information, the second controller being configured to perform a second initialization operation when the first controller and/or the second controller is started up, and the second information is configured to perform the second initialization operation.

A third aspect of the application provides an electronic device comprising one or more processors and a memory for storing one or more computer programs, wherein the one or more processors execute the one or more computer programs to implement the steps of the method.

A fourth aspect of the application also provides a computer readable storage medium having stored thereon a computer program or instructions which when executed by a processor performs the steps of the above method.

The fifth aspect of the application also provides a computer program product comprising a computer program or instructions which, when executed by a processor, carries out the steps of the method described above.

Drawings

The foregoing and other objects, features and advantages of the application will be apparent from the following description of embodiments of the application with reference to the accompanying drawings, in which:

Fig. 1 shows a hardware architecture diagram of a server display control system in a related example.

Fig. 2 shows a hardware architecture diagram of a server display control system according to an embodiment of the present application.

Fig. 3 shows a flowchart of a display control method according to an embodiment of the present application.

Fig. 4 is a schematic diagram showing a display control method according to an embodiment of the present application.

Fig. 5 shows a schematic structural view of a display control apparatus according to an embodiment of the present application.

Fig. 6 is a schematic diagram showing the structure of a display control apparatus according to an embodiment of the present application.

Fig. 7 is a schematic diagram showing a communication structure of a display control apparatus according to an embodiment of the present application.

Fig. 8 shows a block diagram of an electronic device adapted to implement a display control method according to an embodiment of the application.

Detailed Description

Hereinafter, embodiments of the present application will be described with reference to the accompanying drawings. It should be understood that the description is only illustrative and is not intended to limit the scope of the application. In the following detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the embodiments of the application. It may be evident, however, that one or more embodiments may be practiced without these specific details. In addition, in the following description, descriptions of well-known structures and techniques are omitted so as not to unnecessarily obscure the present application.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The terms "comprises," "comprising," and/or the like, as used herein, specify the presence of stated features, steps, operations, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, or components.

All terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art unless otherwise defined. It should be noted that the terms used herein should be construed to have meanings consistent with the context of the present specification and should not be construed in an idealized or overly formal manner.

Where a convention analogous to "at least one of A, B and C, etc." is used, in general such a convention should be interpreted in accordance with the meaning of one of skill in the art having generally understood the convention (e.g., "a system having at least one of A, B and C" would include, but not be limited to, systems having a alone, B alone, C alone, a and B together, a and C together, B and C together, and/or A, B, C together, etc.).

In the operation of modern enterprises and data centers, servers serve as core computing resources and take on multiple tasks such as data processing, storage, and network services. Therefore, ensuring that the server can quickly, efficiently and reliably complete the startup process is extremely important in data center operations and system management.

When the server is connected to the stable power supply unit (Power Supply Unit, PSU), the system enters a standby state. The user or management system initiates the boot sequence of the server by pressing a front panel power button to trigger or by the remote management interface sending a start command. The initial stage of this process is known as Power-On Self-Test (POST). At this stage, the server's motherboard firmware, such as a basic input output system (Basic Input Output System, BIOS) or unified extensible firmware interface (Unified Extensible FIRMWARE INTERFACE, UEFI), initializes, detects, and validates hardware components, such as memory, hard disk, graphics card, and other critical components.

After the server completes self-checking and initializes the hardware configuration, the Video graphics array (Video GRAPHICS ARRAY, VGA) interface outputs a prompt message. Such information typically includes the basic configuration of the device, the BIOS version, the amount of available memory, and the state of the connected hard disk, etc. If a hardware fault is found in the self-checking process, the server can also display a corresponding error code or warning message through the VGA.

In existing server VGA display control architectures, the control body types include a Host operating system (Host Operating System, host OS) control mode, a Basic Input Output System (BIOS) control mode, and a baseboard management controller (Baseboard Management Controller, BMC) control mode.

The VGA control right is directly managed by a central processing unit (Central Processing Unit, CPU) of the server Host and an operating system in a Host OS control mode, and display output is realized by depending on kernel driving of the operating system. The method has the technical advantages of supporting diversified display requirements, ensuring mature and stable driving technology, however, when an operating system crashes or is not started completely, debugging can not be performed through a local display, and uniform compatible management is difficult to realize because the driving interfaces of different operating systems have larger difference.

In the BIOS control mode, the BIOS is involved in VGA control before the host operating system is initialized, and is mainly responsible for outputting key self-checking information at the early stage of system starting, including hardware parameters such as CPU model, memory capacity, hard disk configuration and the like. The technical value of the mode is that the hardware state visualization before the starting of the operating system is realized, support is provided for early fault diagnosis, but the mode is limited by BIOS starting flow, the display function only covers the system initialization early stage, and the time sequence dependence problem exists in cooperation with the follow-up control main body.

In the BMC control mode, the BMC is used as a management unit independent of a host system, and can directly control the VGA display in the whole period of starting the server. The BMC can take over display output in advance when the BIOS has not completed initialization, supports out-of-band display control in a remote management scene, and can realize interaction with other control subjects through management protocols such as an intelligent platform management interface (INTELLIGENT PLATFORM MANAGEMENT INTERFACE, IPMI).

FIG. 1 illustrates a related example server display control system hardware architecture diagram.

As shown in fig. 1, the core components of the hardware architecture of the conventional server display control system include a power management module 101, a baseboard management controller 102 (BMC), a basic input output system 103 (BIOS), a VGA controller 104, and a display 105, where each component forms a hierarchical interaction relationship with a data bus through control signals.

The data sources comprise a BMC and a BIOS/Host, when the BMC drives the display screen, the BMC is a complete controller of the VGA controller, and similarly, when the BIOS is driven, the BIOS is the complete controller.

In the framework, a startup and shutdown signal of the power management module triggers the BMC/BIOS to initialize, and the control main body acquires VGA control rights to drive the VGA controller to output to the display.

Based on the hardware architecture of the server display control system, the prior art provides two VGA control right transfer strategies of an automatic switching mechanism and a manual switching mechanism to form a switching system combining the automatic operation and the manual operation.

Under the automatic switching mechanism, a 'BMC priority' strategy is adopted, the BMC defaults to control VGA output when the server is started, after the BIOS finishes initialization and has display capability, the BMC actively releases control right to transfer the BIOS, and after the host operating system is started, the control right is further automatically transferred to a host display card driver, and the display output is managed by the operating system independently. However, when the operating system is in an abnormal state such as a stuck state or a drive crash, the BMC cannot automatically take over control right through the existing logic, and the state recovery is realized by relying on manual intervention.

Under the manual switching mechanism, the control right can be forcedly transferred through a BMC management interface or an IPMI command, the current control main body is forcedly released from VGA controller resources, such as clearing register configuration, closing a display output channel, and the target main body is reinitialized and exclusively controlled. However, although the mechanism provides a flexible management means, the hardware state of the VGA controller needs to be completely reset for each switching, and the operation process depends on manual intervention, so that the real-time response requirement in an automatic operation and maintenance scene cannot be met.

However, when the BMC transfers control to the BIOS, the VGA controller hardware registers, such as the video memory base address, the display timing parameters, the color space configuration, etc., need to be reinitialized due to the logic difference between the two drivers. This process results in a blackout period of the display, thereby affecting user experience and failure diagnosis efficiency.

In view of this, the embodiment of the application provides a display control method, in which a processor is used as a central coordination unit, and the first information is responded and displayed immediately when the server is started, so as to fill in the display blank before the first controller and/or the second controller are started, and realize the instant visual feedback at the initial stage of starting. After the starting of the processor is completed, the initialization states of the first controller and the second controller are detected, the multisource data are dynamically fused to generate second information, and display content is updated, so that a black screen period caused by the reset of a hardware register when the control right is switched is eliminated, and seamless updating of the display content is realized.

The embodiment of the application provides a display control method, wherein a first controller, a second controller, a processor and a display are arranged in a server, the processor is respectively in communication connection with the first controller, the second controller and the display, and the display control method is characterized in that the method is applied to the processor, the method comprises the steps of responding to the fact that the server is detected to be executed with a starting operation, controlling the display to display first information, the first information is used for indicating first interface content of the processor in response to the starting operation, responding to the fact that the first controller and/or the second controller are/is detected to execute an initializing operation after the starting of the processor is completed, updating the first information by using the second information, and controlling the display to display the second information, wherein the second information is used for indicating second interface content of the initializing state of the first controller and/or the second controller.

Fig. 2 shows a hardware architecture diagram of a server display control system according to an embodiment of the present application.

As shown in fig. 2, the server display control system hardware architecture diagram 200 may include a power management module 101, a baseboard management controller 102 (BMC), a basic input output system 103 (BIOS), a VGA controller 104, a processor 210, and a display 105.

In architecture, the VGA controller 104 is controlled by the processor 210 throughout the server startup.

Therefore, during the startup process of the server, the processor 210 enjoys control over the VGA controller 104 all the way through as long as the initialization of the processor 210 is completed. And, the processor 210 may control the VGA controller 104 to drive the display 105 to display the initialization state information of the baseboard management controller 102 or the bios 103 by detecting the initialization states of the baseboard management controller 102 and the bios 103.

Fig. 3 shows a flowchart of a display control method according to an embodiment of the present application.

As shown in fig. 3, the display control method of this embodiment includes operations S310 to S320.

In operation S310, the display is controlled to display first information in response to detecting that the server is performed with a startup operation.

In operation S320, after the processor startup is completed, in response to detecting that the first controller and/or the second controller performs an initialization operation, the first information is updated with the second information, and the display is controlled to display the second information.

In this embodiment, the server may represent a server hardware system in which the first controller, the second controller, the processor, and the display are disposed, supporting unified management of display output by the processor.

The first controller may represent an independent control unit in the server, such as a Baseboard Management Controller (BMC), responsible for out-of-band management, for implementing functions such as hardware monitoring, remote management, and interaction with the processor.

The second controller may represent a control unit in the server responsible for system start-up and hardware initialization, such as a Basic Input Output System (BIOS), for implementing functions such as system start-up, hardware configuration, and interaction with the processor.

The processor may include a microcontroller (Microcontroller Unit, MCU) to control the display output as an intermediate coordination unit between the BMC, BIOS, and display.

In this embodiment, the start-up operation may represent a triggering action of the server entering the power-on procedure from the power-off state, such as pressing a server power button, sending a power-on command through IPMI, automatically triggering power-on according to a preset time, and so on.

In this embodiment, the processor detects that the server is performing a startup operation through a hardware signal such as a General Purpose Input Output (GPIO) level change of a power switch or a management protocol such as an IPMI command, immediately responds to the display request and controls the display to display the first information.

The first information may indicate that the processor controls the first interface content output by the display after detecting the start operation, for indicating a state in which the processor has responded to the start operation.

The first interface content is not limited to text information, such as "in system startup, please refer to the following. Graphical information such as manufacturer logo, start animation, etc., and status prompt information such as power on flag, initialization progress bar, etc.

In this embodiment, after the start-up is completed, the processor generates second information according to the initialization state of the first controller and/or the second controller, dynamically updates the first information by using the second information, and controls the display to display the second information.

The second information may represent second interface content generated by the processor according to the initialization state of the first controller and/or the second controller after the start-up is completed.

The second interface content is not limited to hardware monitoring data such as ' CPU temperature: 45 ℃, memory voltage and the like, self-checking progress such as ' memory detection completion ', hardware configuration information such as ' CPU model: ABC ' and the like. The second interface content may also include the temperature alarm of the BMC and the start progress of the BIOS at the same time.

Based on the above, the embodiment of the application takes the processor as the central coordination unit, and immediately responds and displays the first information when the server is started, so as to fill the display blank of the first controller and/or the second controller before the starting, and realize the instant visual feedback at the initial stage of the starting. After the starting of the processor is completed, the initialization states of the first controller and the second controller are detected, the multisource data are dynamically fused to generate second information, and display content is updated, so that a black screen period caused by the reset of a hardware register when the control right is switched is eliminated, and seamless updating of the display content is realized.

In addition, the display output is uniformly managed by the processor, and the control right of the VGA by the first controller is not required to be switched to the second controller after the initialization of the second controller is completed, so that the management efficiency and the user experience are remarkably improved, and a low-delay and high-reliability solution is provided for the display control of the server.

According to the embodiment of the application, after the processor is started, the first information is updated by the second information and the display is controlled to display the second information in response to the fact that the first controller and/or the second controller are/is detected to execute initialization operation, and the method comprises the steps of updating the first information by the third information in response to the fact that the first detection signal from the first controller is received and the second detection signal from the second controller is not received, and controlling the display to display the third information.

The first detection signal may represent a signal sent to the processor by the first controller, such as the BMC, and may be used to indicate that the first controller has completed the initialization operation and has data output capability. In the event that the processor detects the first detection signal, it may be confirmed that the first controller is ready to output second information, such as hardware monitoring data or remote management interface content, to trigger display update logic.

The second detection signal may represent a signal sent by a second controller, such as a BIOS, to the processor, and may be used to indicate that the second controller has completed an initialization operation and is data-outputting capable. When the processor detects the second detection signal, it can be confirmed that the second controller has completed the hardware self-test such as the memory detection, the CPU initialization, etc., and the disease is ready to output the second information such as the self-test information.

In this embodiment, the second information includes third information.

The third information may represent display content generated by the processor according to the initialization state data of the first controller, for describing the operation state of the first controller and the output information. The third information is not limited to hardware monitoring data, status identification, etc., such as sensor readings transmitted by the first controller through the shared memory, firmware version number of the first controller, network connection status, etc.

In this embodiment, when the processor receives only the first detection signal, such as the initialization completion signal of the first controller, and does not detect the second detection signal, the running state and the output information read by the processor from the first controller are preferentially displayed, and the first information displayed in the display interface is updated based on the third information, so as to realize real-time visualization of the out-of-band management information.

Based on the above, in the embodiment of the application, the processor can accurately sense the initialization state of the first controller through the cooperative mechanism of the first detection signal, the second detection signal and the third information, and preferentially display the management information of the first controller when the second controller is not yet started, so as to avoid the display delay caused by the first controller waiting for the second controller to start, and simultaneously eliminate the black screen problem caused by control right switching, thereby realizing real-time and efficient display of the state information of the server.

According to the embodiment of the application, the first information is updated by the third information, and the method further comprises the steps of obtaining a first initialization progress mark for describing the first controller to execute the initialization operation, determining the executed state of the first initialization operation corresponding to the first initialization progress mark, and generating the third information according to the executed state of the first initialization operation.

In this embodiment, the first initialization progress flag may represent a status flag generated by the first controller, such as the BMC, and sent to the processor for describing a specific stage or degree of completion of the first controller initialization operation. The first initialization progress flag may be presented in a number, an enumerated value, or a status code. For example, the flag 0x01 indicates "sensor initialization complete", and the flag 0x02 indicates "network module initialization complete".

The executed state of the first initialization operation may represent a specific execution condition of the first controller initialization operation obtained by analyzing the processor according to the first initialization progress identifier, for example, may include a state of whether to start, in progress, complete or fail to execute.

In this embodiment, after completing a certain initialization operation, the first controller writes a corresponding first initialization progress identifier into the shared memory or the status register, and the processor may acquire and parse the identifier through an interrupt trigger or a polling manner to determine the executed state of the corresponding first initialization operation. In connection with a state description of the executed state, such as a "sensor initialization complete" message, a corresponding display text or graphical progress bar is generated, such as a display "sensor system is ready".

Based on the above, according to the embodiment of the application, the processor can acquire the initialization state of the first controller initialization operation in real time by acquiring and analyzing the first initialization progress mark and the executed state, so that the progress mark is converted into the natural language information which can be used for display, the dynamic visualization of the first controller initialization process is realized, the observability of server management is improved, and the fault link can be rapidly positioned when the first controller initialization is abnormal.

According to the embodiment of the application, the third information is generated according to the executed state of the first initialization operation, and the method comprises the steps of determining first operation information for describing the first initialization operation and generating the third information according to the executed state of the first initialization operation and the first operation information.

In this embodiment, the first operation information may represent information describing an initialization state of the first controller, and may include, for example, an operation name, a related component, a parameter configuration, real-time data, and the like.

In this embodiment, the processor reads the operation information from the shared memory of the first controller or through the IPMI command, for example, obtains information such as "sensor type", "network IP address", "error code", and the like, and obtains the third information after integrating the operation information of the first controller with the natural language description of the executed state obtained by parsing. In a specific embodiment, the third information may be obtained by stitching the natural language description of the executed state obtained by the parsing with the obtained first operation information by using a preset template.

Based on the above, the embodiment of the application combines the first operation information of the first controller with the executed state, so that the third information generated by the processor is updated from the single state notification to the complete description containing the operation details, and the bottom operation state is converted into the visual information in the form of natural language, thereby improving the observability of server management.

According to the embodiment of the application, after the processor is started, the first information is updated by the second information and the display is controlled to display the second information in response to the fact that the first controller and/or the second controller are/is detected to execute initialization operation, and the method comprises the steps of updating the first information by the fourth information in response to the fact that the first detection signal from the second controller is received and the second detection signal from the first controller is not received, and controlling the display to display the fourth information.

In this embodiment, the second information includes fourth information.

The fourth information may represent display content generated by the processor according to the initialization state of the second controller, so as to describe the operation state and output information of the second controller. The fourth information is not limited to include self-checking results such as memory capacity, hard disk model, CPU parameters and the like, error information such as hardware fault codes and the like, and guiding information such as loading progress of an operating system, a starting option menu and the like.

In this embodiment, when the processor receives only the first detection signal sent by the second controller and does not receive the second detection signal sent by the first controller, the running state and the output information read by the processor from the second controller are preferentially displayed, and the first information displayed in the display interface is updated based on the fourth information.

Based on the above, the embodiment of the application supports independent display of the initialization state of the second controller, and even if the first controller fails, the processor can directly respond to the initialization completion signal of the second controller to display self-checking information, thereby realizing the flexibility and reliability of multi-controller display in the starting process of the server and providing continuous and complete system state feedback for users.

According to the embodiment of the application, the first information is updated by the fourth information, and the method further comprises the steps of obtaining a second initialization progress mark for describing the second controller to execute the initialization operation, determining the executed state of the second initialization operation corresponding to the second initialization progress mark, and generating the fourth information according to the executed state of the second initialization operation.

In this embodiment, the second initialization progress flag may represent a status flag generated by the second controller, such as the BIOS, and sent to the processor for describing a specific stage or degree of completion of the initialization operation of the second controller. The second initialization progress mark may also be presented in a number, an enumerated value, or a status code. For example, the identifier 0x01 represents a "hardware self-test phase", and 0x02 represents a "driver loading phase".

The executed state of the second initialization operation may represent a specific execution condition of the second controller initialization operation obtained by the processor according to the second initialization progress identification. For example, states may be included that are not executing, completed, or failed to execute.

In this embodiment, after the processor is started, the processor continuously detects the initialized operating states of the first controller and the second controller. If it is detected that only the second controller sends the first detection signal and the first controller does not send the second detection signal, the second initialization progress identifier can be acquired and analyzed in an interrupt triggering or polling mode to determine the executed state of the corresponding second initialization operation. In connection with the state description of the executed state, information describing the initialization state of the second controller, such as text, icons, etc., is generated for updating the display content.

Based on the above, the embodiment of the application can acquire the initialization state of the initialization operation of the second controller in real time by acquiring and analyzing the second initialization progress mark and the executed state, so that the progress mark is converted into the natural language information which can be used for display, the dynamic visualization of the initialization process of the second controller is realized, the observability of server management is improved, and the fault link can be rapidly positioned when the initialization of the second controller is abnormal.

According to an embodiment of the application, generating fourth information according to the executed state of the second initialization operation includes determining second operation information describing the second initialization operation and generating fourth information according to the executed state of the second initialization operation and the second operation information.

In this embodiment, the second operation information may represent information for describing an initialization state of the second controller, and may include, for example, operation names such as "BIOS load", "peripheral interface scan", operation types such as "hardware detection", "drive installation", parameter configuration, operation order, and the like.

In this embodiment, the processor reads the operation information from the shared memory of the second controller or through the IPMI command, obtains information describing the initialization operation of the second controller, such as "memory controller initialization", "interface detection", and the like, and integrates the execution status of the initialization operation of the second controller, such as "completion", with the operation information to form the display content in natural language or graphics. In one embodiment, if the operation information is "hard disk initialization" and the status is "completed", the fourth information may be displayed as "hard disk initialization complete".

Based on the above, the embodiment of the application combines the second operation information of the second controller with the executed state, so that the fourth information generated by the processor is updated from the single state notification to the complete description containing the operation details, and the bottom operation state is converted into the visual information in the form of natural language, thereby improving the observability of server management.

According to an embodiment of the application, controlling the display to display the second information includes writing the second information into a frame buffer area of the display in case it is determined that the second information is in an image format, so that the display obtains the second information from the frame buffer area of the display and displays the second information.

In this embodiment, the frame buffer area is used to store pixel data with a display, and the processor may write image data to the frame buffer area, which is read by the display hardware at a fixed frequency and rendered to the screen.

In a specific embodiment, after the processor receives the initialization state of the first controller or the second controller, the processor determines the information format of the second information by judging the data type, and if the second information is in the image format, the processor analyzes the second information, converts the pixels into the frame buffer supporting format, and writes the image data into the frame buffer area of the VGA display by calculating the start address of the image in the frame buffer area. The VGA display continuously scans the frame buffer area, and immediately renders the frame buffer area to a screen after detecting data update without additional control signals.

Based on the above, the embodiment of the application directly operates the frame buffer area through the processor, writes the second information to be displayed into the frame buffer area of the VGA, so as to realize the efficient display of the image format information, and provides an intuitive and real-time visual interface for the management of the server.

According to the embodiment of the application, the second information comprises at least one of information for indicating the initialization progress of the first controller or the second controller, hardware running state result information for indicating hardware running state detected during the initialization operation executed by the first controller or the second controller, and remote management interface information for indicating the operation interface layout and the interface loading progress of the remote maintenance server.

In this embodiment, the second information includes at least initialization progress information of the first controller, such as a BMC, and/or the second controller, such as a BIOS, a hardware detection result during the initialization, and remote management interface information.

The initialization progress information may represent a status code generated by the first controller, such as a BMC, and/or the second controller, such as a BIOS, during the initialization process. The initialization progress information type may include, for example, text progress, a graphical progress bar, etc., such as "in CPU initialization (95%)", converting a progress percentage into a rectangular filled area in a frame buffer.

The hardware detection result during the initialization may include sensor data of the first controller, such as a BMC, a hardware fault log, and the like, and may further include a hardware self-checking result of the second controller, such as a BIOS, and the like. Such as "CPU temperature: 45 ℃ and" hard disk warning ".

The remote management interface information may be derived from page or image data of the operation interface layout and the interface loading progress of the remote maintenance server. The remote management interface information types may include, for example, operator interface layout, loading progress, etc., such as remote console login page, system configuration menu, interface element loading percentages.

In one embodiment, the initial start-up period may display the initialization status progress bar and the memory detection result of the second controller, such as the BIOS. And after the first controller such as the BMC is ready, the CPU temperature monitoring chart is displayed in a superposition mode, and the loading progress can be displayed when the remote management interface is loaded.

Based on this, in the embodiment of the present application, the second information at least includes the initialization progress information of the first controller, such as the BMC, and/or the second controller, such as the BIOS, the hardware detection result during the initialization, and the remote management interface information, so that the multi-source information of the server in the starting process is integrated into a unified visual interface, which significantly improves the observability and the operation and maintenance efficiency of the system.

According to the embodiment of the application, after the processor is started, the first information is updated by the second information and the display is controlled to display the second information in response to the detection that the first controller and the second controller execute the initialization operation, and the method further comprises the steps of respectively acquiring third information for describing the initialization state of the first controller and fourth information for describing the initialization state of the second controller in response to the reception of a first detection signal from the first controller and a second detection signal from the second controller, and determining the second information from the third information and the fourth information.

In this embodiment, after the processor is started, when the first detection signal of the first controller, such as the BMC, and the second detection signal of the second controller, such as the BIOS, are received at the same time, and it is confirmed that both the first detection signal and the second detection signal have completed initialization, third information is obtained from the shared memory of the first controller, and fourth information is obtained from the shared memory of the second controller.

The processor can select the second information to be displayed from the third information and the fourth information or combine the second information to generate the second information, so that display conflict is avoided.

In a specific embodiment, the screen may be divided into two parts by using a partition display mode, and the third information is displayed on the left side and the fourth information is displayed on the right side.

In another embodiment, a dynamic scrolling mode can be used to display two pieces of information in a time slice polling mode.

According to an embodiment of the application, determining the second information from the third information and the fourth information comprises determining the second information from the third information and the fourth information according to a predetermined priority.

In yet another embodiment, a priority policy may also be used to select high priority information for display according to a priority preset rule. Specifically, after the processor obtains the third information and the fourth information, type analysis is performed respectively, a priority level is allocated to each piece of information according to the priority configuration table, and the display sequence of the third information and the fourth information is determined through the priority level.

In this embodiment, the third information of the first controller may be preferentially displayed when a hardware alarm such as a temperature exceeding a threshold is detected. When the second controller, such as the BIOS, performs a critical initialization, such as system boot, the fourth information of the second controller may be preferentially displayed.

In another embodiment, the hardware self-checking progress of the second controller, such as the BIOS, may be preferentially displayed at the initial stage of the start-up. After the system is stable, the real-time monitoring data of the first controller, such as the BMC, can be preferentially displayed.

Based on the above, the embodiment of the application solves the display decision problem when the information of the double controllers conflicts based on the preset priority, so as to ensure the priority display of the key information and improve the maintainability of the system.

According to the embodiment of the application, the second information is determined from the third information and the fourth information, and the method comprises the step of determining information corresponding to a target data source as the second information from the third information and the fourth information in response to receiving a selection operation for the target data source, wherein the target data source comprises any one of a first controller and a second controller.

In this embodiment, the target data source may represent an information source designated by a user or an operation object through a selection operation, for example, a first controller such as a BMC, a second controller such as a BIOS.

The selection operation may represent a data source switching instruction actively triggered by a user or an operation object, where the selection operation may be implemented through a hardware or software interaction manner. For example, the front end button of the server, the shortcut key of the external keyboard, the clicking of the web page management interface, and other interaction modes.

In this embodiment, the processor, upon receiving the selection operation, determines the target data source by parsing the operating parameters. If the target data source is the first controller, the processor may read the third information from the shared memory of the first controller, and determine the third information as the second information to be displayed. If the target data source is the second controller, the processor may read the fourth information from the shared memory of the second controller, and determine the fourth information as the second information to be displayed.

The processor can continuously control the screen to display the first information in the control right switching process of the first controller and the second controller. For example, during initial boot up, the processor may drive the display to display a vendor identifier (LOGO) and update and display the boot progress bar in real time as the boot flow advances.

In addition, the processor is used as a unified manager for switching the control rights of the first controller and the second controller, and when the first controller finishes initialization and prepares for transferring the control rights, the processor rechecks the initialization condition of the second controller. The processor allows the control right to be switched only when the second controller meets the preset initialization conditions such as normal hardware state and correct firmware configuration. In the switching process, the processor monitors the starting state of the second controller in real time, if the second controller has abnormal conditions such as initialization failure, configuration error and the like, which cause display interruption or content deletion, the processor immediately intervenes in processing, for example, the second controller initialization flow is triggered again or fault prompt information is displayed, so that smooth transition from the first controller management mode to the second controller starting flow of the equipment is realized, and user operation experience and system reliability are obviously improved.

Based on this, in the embodiment of the application, when the system defaults to display the alarm information with high priority, the user can manually switch the display source to quickly look up the hardware parameters or adjust the starting options, without waiting for the alarm to be released or restarting the system. In addition, operation and maintenance personnel can switch data sources in real time according to scene demands, or the processor dynamically adjusts display contents by continuously reading initialization state information of the first controller and the second controller in the shared memory, so that consistent and stable display of a screen is ensured all the time in a control right switching stage, the problem of black screen or display disorder in the switching stage is solved, and the brand recognition and user operation friendliness of equipment are effectively improved.

According to the embodiment of the application, the display control method further comprises the steps of detecting a signal abnormality reason in response to the fact that the second detection signal from the second controller is not received and the first detection signal from the first controller is not received within a first preset time period after the starting of the processor is completed, generating abnormality information according to the signal abnormality reason, and updating the first information by using the abnormality information and controlling the display to display the abnormality information.

In this embodiment, the first predetermined time period may represent a preset time threshold after the processor is started, at which the first controller and the second controller wait to transmit the initialization completion signal.

The signal anomaly cause may represent a type of failure that causes the signal to be received off-time, such as hardware corruption, firmware crashes, communication line breaks, etc.

In this embodiment, the processor starts timing after starting, and if the initialization completion signals of the first controller and the second controller are not received within a first predetermined period of time, at this time, the first controller and the second controller may have an initialization exception problem, and then an exception processing flow is triggered.

The processor can detect the reason of signal abnormality by reading the hardware state or executing the self-checking program, generate abnormality information such as "BMC firmware loading failure" according to the detection result, and write the abnormality information into the frame buffer area for display so as to cover the initial first information.

According to the embodiment of the application, the abnormal information is generated according to the reason of the detected signal abnormality, and the abnormal information comprises the steps of determining the target code and the prompt information associated with the reason of the signal abnormality and generating the abnormal information according to the target code and the prompt information.

In this embodiment, the object code associated with the cause of the signal exception may be, for example, an execution code, such as err_001 indicating "BMC firmware load failed". The hint information associated with the reason for the signal anomaly may be, for example, a pre-configured natural language description for guiding the investigation, such as "please attempt to reload BMC firmware".

In this embodiment, the execution code associated with the hardware and the preconfigured prompt information are combined into abnormal information to be displayed to the user, for example, in a red highlighting and full screen coverage mode, so that the operation and maintenance personnel can be ensured to quickly identify and timely maintain.

According to the embodiment of the application, the display control method further comprises the step of controlling the display to display fifth information in response to the fact that the first controller does not complete the initialization operation within the second preset time, wherein the fifth information indicates abnormal information of the first controller and first prompt information for checking the first controller.

The second predetermined time period may represent a time threshold for the processor to wait for the first controller, such as the BMC, to complete initialization. In a specific embodiment, the second predetermined time period may be configured to be greater than the first predetermined time period because the BMC is required to load firmware and initiate services.

The fifth information may represent prompt information for initializing an abnormality of the first controller, and the fifth information may include abnormality information of the first controller and first prompt information for checking for an abnormality of the first controller.

In this embodiment, after the processor is started, the processor starts to monitor the initialization state of the first controller, such as the BMC, and if the initialization completion signal of the first controller is not received yet for more than a second predetermined period of time, the process flow is triggered. The processor can determine specific faults by reading the BMC state register, generate abnormal information and first prompt information based on a preset template according to the fault type, and continuously display the abnormal information and the first prompt information so as to remind a user of carrying out abnormal investigation.

According to the embodiment of the application, the display control method further comprises the step of controlling the display to display sixth information in response to the fact that the initialization operation is not completed in the third preset time period by the second controller, wherein the sixth information indicates abnormal information of the second controller and second prompt information for checking the first controller.

Wherein the third predetermined length of time may represent a time threshold for the processor to wait for the second controller, such as the BIOS, to complete initialization. In a specific embodiment, since the BIOS needs to complete the hardware self-test and load the driver, the third predetermined time period may be configured to be greater than the first predetermined time period and greater than the second predetermined time period.

The sixth information may represent prompt information for initializing an abnormality of the second controller, and the fifth information may include abnormality information of the second controller and second prompt information for checking for an abnormality of the second controller.

In this embodiment, the processor monitors the initialization state of the second controller, such as the BIOS, and if the initialization completion signal of the second controller is not received for more than a third predetermined period of time, triggers the process flow. The processor can determine specific faults by reading POST codes left by the BIOS, generates abnormal information and second prompt information based on a preset template according to the fault type, and continuously displays the abnormal information and the second prompt information so as to remind a user of carrying out abnormal investigation.

Based on this, in the embodiment of the present application, when the initialization signals of the BMC and the BIOS are not received within the first predetermined time after the processor is started, the abnormal cause detection is automatically triggered, and the fault type is mapped into the standardized object code and the related fault description, so that the user does not need to rely on the conventional "black screen" phenomenon to determine the fault, and the problem in the starting process can be intuitively known, thereby shortening the fault checking time. In addition, aiming at overtime scenes of the BMC and the BIOS, fifth information and sixth information are respectively generated and continuously displayed, so that operation and maintenance personnel can be helped to quickly locate hardware faults, the fault detection time is obviously shortened, and maintainability and reliability of the server in an unattended or remote operation and maintenance scene are improved.

According to the embodiment of the application, the display control method further comprises the steps of dividing the storage areas of the first controller and the second controller respectively in response to the fact that the server is powered on, and configuring the detection interfaces of the general input and output detection signals of the first controller and the second controller respectively so as to detect the initialization states of the first controller and the second controller.

The first controller and the second controller can be used for storing respective initialization state data and display information in the independent storage areas, and data collision is avoided.

The detection interfaces of the general input and output detection signals of the first controller and the second controller can be used for receiving the initialization state signals of the first controller and the second controller, so that the real-time monitoring of the initialization state is realized.

In this embodiment, the processor may detect that the server is powered on through a hardware circuit or a software protocol, and divide two independent storage areas in the system memory for the first controller and the second controller, respectively, where the storage area of the first controller may be used to store the initialization state of the first controller, such as the BMC, sensor data, and so on. The storage area of the second controller may be used to store initialization status of the second controller such as BIOS, POST code, hardware configuration information, etc.

In this embodiment, the processor further includes setting access rights and data storage formats, so as to avoid conflicts generated when different components read and write simultaneously, and ensure the integrity and accuracy of the display data.

In this embodiment, the processor may further configure the detection interfaces of the respective general input/output detection signals for the first controller and the second controller, respectively, so that the first controller and the second controller may send the detection signals to the processor through the respective corresponding interfaces, and the processor determines whether the first controller and the second controller complete initialization by reading the first detection signals and the second detection signals.

For example, in the process of starting the server, after the second controller completes the hardware enumeration and basic configuration, a signal is sent to the processor through a detection interface of the general purpose input/output detection signal, such as GPIO interrupt, and after the first controller completes the initialization of the network connection and management module, the processor is notified in a similar manner. The processor accurately senses the running state of each component according to the interrupt signals, so as to determine the subsequent display logic and operation.

In this embodiment, the processor may also initialize the server display output signal to temporarily shut down the display output during the initial power up of the system. Since the server may generate transient unstable electric signals when started, if the signals are directly output to the display, abnormal display such as flickering and screen display may be caused. The abnormal display probability is reduced by temporarily closing the display output, so that a foundation is laid for the subsequent stable display output.

Meanwhile, the processor can also check and configure the initial state of the VGA controller to ensure that the VGA controller is in a normal work preparation state.

Fig. 4 is a schematic diagram showing a display control method according to an embodiment of the present application.

As shown in FIG. 4, in one embodiment, the display control method includes operations S401 to S410.

In operation S401, the server is performed a power-on operation.

In operation S402, the processor starts an initialization procedure.

Specifically, the processor may perform shared memory initialization to ensure the efficiency and stability of data transfer between multiple components. For example, separate storage areas are divided for the first controller and the second controller. The processor may also perform a detection interface configuration, such as configuring a detection interface for the first controller and the second controller with respective general input/output detection signals, for receiving initialization signals of the first controller and the second controller, respectively. In addition, the processor may also perform initialization operations on the VGA controller, such as setting frame buffer addresses, pixel formats, and turning off initial display outputs.

In operation S403, it is determined whether the server has been powered on. If yes, operation S404 is executed to drive the display to display the first information. If not, operation S402 is re-executed.

In operation S405, it is determined whether the second controller completes the initialization operation and there is a content to be displayed. If yes, operation S406 is performed to display fourth information. If not, operation S407 is performed.

Specifically, the processor may check whether the second controller completes the initialization operation and has contents to be displayed according to the interrupt information received before. During the start-up of the server, the initialization of the second controller includes a plurality of key steps, such as CPU self-checking, memory detection, hardware device enumeration, etc. The display condition is satisfied only when these steps are all completed and the second controller is ready to display the relevant information such as the system start-up progress, the hardware configuration list.

If the second controller meets the display condition, the processor can read the display data related to the second controller. Such data is typically stored in a specific graphical or textual format in a shared memory or dedicated storage area of the second controller. The processor converts the data into a format recognizable by the VGA controller and drives the screen to display the host content. For example, when the second controller detects a memory error, a corresponding error code and prompt message are generated, and the processor displays the content through VGA control, so that operation and maintenance personnel can know the hardware failure of the server in time, and a direct clue is provided for failure detection.

In operation S407, it is determined whether the first controller completes the initialization operation and there is a content to be displayed. If yes, operation S408 is performed to display third information. If not, operation S409 is performed.

Specifically, in the case where the second controller does not satisfy the display condition, the processor may check whether the first controller completes the initialization operation and has content to be displayed, based on the interrupt information received before. Because the first controller server plays an important role in remote management and hardware monitoring, the initialization of the first controller server comprises network interface configuration, sensor data acquisition module starting and the like. And when the first controller finishes initialization and has display requirements such as remote management interface loading and hardware state alarming, displaying third information.

The processor invokes a frame buffer (framebuffer) region content of the first controller. The frame buffer area is a memory area for storing display images by the first controller, and comprises a plurality of management interface elements and monitoring data graphs. The processor outputs the data in the frame buffer area to the screen through the VGA controller to display the first controller-related information.

For example, in a server remote management scenario, an administrator connects a first controller through a network, the first controller writes data to be displayed on a desktop interface into a frame buffer area, and the processor drives VGA display after sensing, so that the administrator can perform server management like local operation, and efficient remote operation and maintenance are realized.

In operation S409, the processor drives the display to display the first information, and reenters operation S405.

Specifically, if neither the first controller nor the second controller satisfies the display condition, the processor drives the screen to display the customized content. The processor custom content may include manufacturer LOGO, default prompt interface, or concise state prompt information.

For example, the processor may read vendor LOGO image data from the internal memory area, convert and process the format, and output the converted vendor LOGO image data to the display through the VGA controller. Not only is screen blank avoided, user experience is improved, but also brand recognition is enhanced to a certain extent. In the server maintenance scene, if the initialization of the second controller fails, the processor displays prompt information such as 'the initialization of the second controller is abnormal, please check hardware or firmware version', and the like, and provides preliminary fault direction guidance for maintenance personnel.

In operation S410, the display is completed.

In another embodiment, after the server is powered on, the processor starts to monitor the initialization process of the first controller in real time. If the initialization timeout of the first controller is not completed, and the second controller does not start outputting the display data, the processor immediately prompts a user to 'the initialization completion signal of the first controller can not be detected currently' through a screen. After detecting the start-up signal, the processor continues to monitor the initialization state of the second controller. If the initialization timeout of the second controller is not completed, or the second controller does not send display data to the processor after the timeout, the processor displays the' startup timeout, fails to display the data, checks whether the CPU or the memory bank and important components such as the fan have problems or not, and combines the component information recorded in the monitoring management of the first controller to provide detailed diagnosis information and solution proposal for the user, thereby helping the user to quickly locate and solve the equipment startup problem.

Based on the above, the embodiment of the application avoids memory access conflict between the first controller and the second controller by configuring the independent storage areas for the first controller and the second controller, improves the system stability, and prevents abnormal display or system breakdown caused by data competition. In addition, by configuring the detection interfaces of the respective general input and output detection signals for the first controller and the second controller, the processor can respond and update the display content in time, and the black screen waiting in the starting process is avoided.

Based on the display control method, the application further provides a display control device, which comprises a first controller, a second controller, a processor and a display, wherein the first controller, the second controller, the processor and the display are arranged in the server, the processor is respectively in communication connection with the first controller, the second controller and the display, the processor is used for responding to the starting operation of the server, controlling the display to display first information, the first information is used for indicating the first interface content of the processor in response to the starting operation, the first controller is used for executing the first initializing operation after the starting of the processor is completed and sending a first detection signal to the processor, the second controller is used for executing the second initializing operation after the starting of the processor is completed and sending a second detection signal to the processor, the processor is also used for receiving the first detection signal and/or the second detection signal from the first controller and/or the second controller after the starting of the processor is completed, replacing the first information with the second information and controlling the display to display the second information, wherein the second information is used for indicating the first interface content of the first controller and/or the second controller is/are/is in the state of the first controller and the second controller is/is in the state of being started when the first controller and is started or the second controller is in the state.

The device will be described in detail below in connection with fig. 5.

Fig. 5 shows a schematic structural view of a display control apparatus according to an embodiment of the present application.

As shown in fig. 5, the display control device includes a first controller 510, a second controller 520, a processor 210, and a display 105, wherein the processor 210 is communicatively connected to the first controller 510, the second controller 520, and the display 105, respectively. The display 105 may include a VGA controller and a display panel.

The first controller 510 may include an out-of-band management chip independent of the host system, such as a baseboard management controller BMC. The first controller 510 may interact with the processor 210 through a two-wire serial Bus (Inter-INTEGRATED CIRCUIT, I2C) or a system management Bus (SYSTEM MANAGEMENT Bus, SMBus).

Second controller 520 may include Basic Input Output System (BIOS) or UEFI firmware, and second controller 520 may interact with processor 210 via a Low Pin Count (LPC) bus.

The processor 210 may represent a system main controller, such as an MCU, into which a VGA controller or a High-definition multimedia interface (HDMI) controller may be integrated to directly drive the display 105 for content display.

The display 105 may include a physical display device such as a Liquid crystal display (Liquid CRYSTAL DISPLAY, LCD), and the display 105 may be connected to the processor 210 through a VGA/HDMI interface.

In accordance with an embodiment of the present application, during the startup phase, the processor 210 may detect that a startup operation performed by the server, such as a power button press, through the general purpose input output interface, and control the display 105 to display a first interface content, such as vendor LOGO, "system on startup," and so on. After the start-up of the processor 210 is completed, the first controller 510 performs a first initialization operation and may send a first detection signal to the processor 210 through the I2C bus. The second controller 520 performs a second initialization operation and may send a second detection signal to the processor 210 via the LPC bus. After receiving any detection signal, the processor 210 reads the initialization status data from the shared memory of the corresponding controller to generate second information to cover the first information, and controls the display 105 to display the second interface content.

Fig. 6 is a schematic diagram showing the structure of a display control apparatus according to an embodiment of the present application.

As shown in fig. 6, the display control device is disposed inside the server, and the on-off state of the server can be simultaneously input to the first controller 510, the second controller 520 and the processor 210 through the GPIO bus. Wherein the processor 210 may capture the on-off state of the server in real time through the GPIO interrupt.

When the power-on signal is detected, the processor 210 initializes the VGA controller 104 to drive the display 105, and if the power-off signal is detected, all display outputs are cut off.

The processor 210 establishes a shared memory area with the first controller 510 and the second controller 520, respectively, for storing initialization status data of the controllers. The first controller 510 and the second controller 520 may send an initialization completion signal to the processor 210 through a detection interface such as a GPIO pin that commonly outputs a detection signal.

Fig. 7 is a schematic diagram showing a communication structure of a display control apparatus according to an embodiment of the present application.

As shown in fig. 7, the processor 210 divides the respective independent storage areas for the first controller 510 and the second controller 520 as a shared memory area. The shared memory with the first controller 510 may be used to store hardware monitoring data, and the shared memory with the second controller 520 may be used to store hardware configuration information.

The processor 210 may also set read-write permission for each storage area through the memory management unit, so as to avoid data collision.

As shown in fig. 7, the processor 210 is further built with interrupt processing middleware, and monitors the initialization signals of the first controller 510 and the second controller 520 through GPIO pins, respectively, and when the interrupt is triggered, the processor 210 can read data from the corresponding shared memory and update the display according to the signal type and the priority.

For example, if the processor 210 monitors the power-on operation of the server, it immediately lights up the screen, and if the first controller 510 and the second controller 520 are not initialized, it outputs a character "power-on, please wait slightly" or the like, which allows the client to have a better experience.

If the processor 210 receives the interrupt signal sent by the first controller 510, pixel display is performed according to the data in the shared memory of the first controller 510, and if the processor receives the interrupt signal sent by the second controller 520, pixel display is performed according to the data in the shared memory of the second controller 520. At this time, the interrupt signal sent from the first controller 510 is masked, the data of the first controller 510 is not displayed, and the second controller 520 is considered to be initialized, and display output can be performed, so that self-test information of the second controller 520 can be displayed.

If the processor 210 monitors the shutdown operation of the server, all display outputs may be turned off after the screen display is "already shutdown".

As shown in fig. 7, the processor 210 is further configured with a frame buffer area with the VGA controller, and the processor 210 writes the second information of the first controller 510 and the second controller 520 into the frame buffer area after converting the second information into pixel data, and drives the display 105 to display the corresponding content through the horizontal/vertical synchronization signal of the VGA controller.

Based on the above, the embodiment of the application solves the problem of display blank in the initial stage of starting by taking the processor as the central coordination unit and immediately responding and controlling the display to display the first information when the server is started. When the first controller and the second controller finish initialization, the processor receives the detection signal in real time and dynamically generates second information to update and display so as to eliminate black screen delay caused by controller switching, thereby realizing seamless connection of display contents. In addition, the processor is used for uniformly managing multi-source data, so that the cooperative display of the first controller and the second controller is supported, the integrity and observability of the state of the server are improved, meanwhile, the direct dependence of the controller and the display is decoupled, and the system compatibility is enhanced.

According to an embodiment of the application, the display control device further comprises a first controller for transmitting a first detection signal to the processor during the execution of the first initialization operation, a processor for updating the first information with third information describing the initialization state of the first controller in case the first detection signal is received and the second detection signal is not received, a control display for displaying the third information, and a display for displaying the third information.

In this embodiment, the first controller 510 sends the first detection signal to the processor 210 during the initialization operation such as sensor calibration and firmware loading, and the processor 210 triggers the display update of the state information of the first controller only when receiving the detection signal of the first controller 510 and not receiving the detection signal of the second controller 520, and controls the display 105 to display the third information of the first controller 510 such as the initialization progress or the state data in real time and to cover the first information of the start-up phase.

Based on the above, the embodiment of the application realizes the real-time monitoring and dynamic display of the working state of the first controller by sending the detection signal during the initialization period. When the processor receives the detection signal of the first controller and the second controller is not ready, the initialization progress of the first controller is converted into third information and display is updated, and black screen waiting in the starting process is avoided. Meanwhile, when the second controller is not ready, the first controller information is preferentially displayed, the display resources are fully utilized, so that the method is suitable for a scene with long time consumption for initializing the second controller, and dynamic optimization allocation of the display resources and visualization of the system state are realized.

According to an embodiment of the application, the display control device further comprises a second controller for transmitting a second detection signal to the processor during execution of the second initialization operation, the processor for updating the first information with fourth information describing an initialization state of the second controller in a case where the second detection signal is received and the first detection signal is not received, the display for displaying the fourth information, and the display for displaying the fourth information.

In this embodiment, the second controller 520 sends the second detection signal to the processor 210 during the process of performing the initialization operation, such as POST self-test and hardware driver loading, and the processor 210 triggers the display update of the state information of the second controller only when receiving the detection signal of the second controller 520 and not receiving the detection signal of the first controller 510, and controls the display 105 to display the fourth information, such as the initialization progress or the self-test result, of the second controller 520 in real time and to cover the first information of the start-up phase.

Based on the method, the embodiment of the application realizes the real-time visualization of the system self-checking process through the detection signal sent by the second controller during the initialization period, and solves the problems of the second controller self-checking stage of screen blacking or only displaying static LOGO when the traditional server is started. When the processor receives the detection signal of the second controller and the first controller is not ready, the self-checking progress of the second controller is converted into fourth information and updated and displayed, so that a user can intuitively know the starting state. In addition, when the first controller is not ready, the second controller information is preferentially displayed, so that the efficient utilization of display resources is ensured, the method is suitable for a server with long time consumption for initializing the first controller, and the dynamic optimization of display content and the visualization of system state in a starting stage are realized.

According to the embodiment of the application, the processor is further used for detecting signal abnormality reasons in response to the fact that the second detection signal from the second controller is not received and the first detection signal from the first controller is not received within a first preset time period after the starting of the processor is completed, generating abnormality information according to the signal abnormality reasons, updating the first information by using the abnormality information and controlling the display to display the abnormality information, and the display is used for displaying the abnormality information.

In this embodiment, after the start of the processor 210 is completed, the processor 210 starts timing, does not receive the second detection signal from the second controller 520 and does not receive the first detection signal from the first controller 510 within the first predetermined period of time, triggers the exception handling, and detects the reasons of the signal exceptions of the first controller 510 and the second controller 520 through the communication link, for example, may detect the hardware connection, the power state, the firmware loading state, and the like. And determining the target code and the prompt information associated with the signal abnormality reason based on the signal abnormality reason, and generating the abnormality information according to the target code and the prompt information. The processor 210 controls the display 105 to display the anomaly information in real time and to override the first information of the start-up phase.

Based on this, in the embodiment of the present application, when the processor does not receive the initialization signals of the first controller and the second controller within the first predetermined period of time, the abnormality detection flow is immediately triggered. Abnormal information is generated according to the detection result and displayed on a screen, so that the original underlying hardware fault is converted into a visual problem which can be solved by operation and maintenance personnel, and maintainability and usability of the server are remarkably improved.

According to the embodiment of the application, the processor is further used for controlling the display to display fifth information in response to the fact that the first controller does not complete the initialization operation within the second preset time, wherein the fifth information indicates abnormal information of the first controller and first prompt information for checking the first controller to be abnormal, and the display is used for displaying the fifth information.

In this embodiment, after the start of the processor 210 is completed, the processor 210 starts timing, if the first detection signal from the first controller 510 is not received within the second predetermined time period, it is determined that the first controller 510 does not complete the initialization operation within the second predetermined time period, the reason for the signal abnormality of the first controller 510 is detected, the abnormality information of the first controller 510 and the first prompt information for checking the abnormality of the first controller 510 are determined, and the display 105 is controlled to display the abnormality information of the first controller 510 and the first prompt information for checking the abnormality of the first controller 510 in real time.

Based on this, in the embodiment of the present application, when the processor detects that the first controller has not completed initialization within the second predetermined period of time, the abnormality detection flow is immediately triggered. Abnormal information is generated according to the detection result and displayed on a screen, so that the original underlying hardware fault is converted into a visual problem which can be solved by operation and maintenance personnel, and maintainability and usability of the server are remarkably improved.

According to the embodiment of the application, the processor is further used for controlling the display to display sixth information in response to the fact that the initialization operation is not completed in the third preset time period of the second controller, wherein the sixth information indicates abnormal information of the second controller and second prompt information for checking abnormality of the first controller, and the display is used for displaying the sixth information.

In this embodiment, after the start of the processor 210 is completed, the processor 210 starts timing, if the second detection signal from the second controller 520 is not received within the third predetermined period of time, it is determined that the initialization operation is not completed by the second controller 520 within the third predetermined period of time, the reason for the signal abnormality of the second controller 520 is detected, the abnormality information of the second controller 520 and the second prompt information for checking the abnormality of the second controller 520 are determined, and the display 105 is controlled to display the abnormality information of the second controller 520 and the second prompt information for checking the abnormality of the second controller 520 in real time.

Based on this, in the embodiment of the present application, when the processor monitors that the second controller does not complete the self-test within the third predetermined period of time, the abnormality detection flow is immediately triggered. And generating abnormal information according to the detection result and displaying the abnormal information on a screen, so that operation and maintenance personnel can quickly position and solve the problem without complex tools, and the downtime of the server caused by the abnormality of the second controller is effectively reduced.

Fig. 8 shows a block diagram of an electronic device adapted to implement a display control method according to an embodiment of the application.

As shown in fig. 8, an electronic device 800 according to an embodiment of the present application includes a processor 801 that can perform various appropriate actions and processes according to a program stored in a read-only memory ROM 802 or a program loaded from a storage section 808 into a random access memory RAM 803. The processor 801 may include, for example, a general purpose microprocessor (e.g., a CPU), an instruction set processor and/or an associated chipset and/or a special purpose microprocessor (e.g., an Application Specific Integrated Circuit (ASIC)), or the like. The processor 801 may also include on-board memory for caching purposes. The processor 801 may comprise a single processing unit or multiple processing units for performing the different actions of the method flows according to embodiments of the application.

In the RAM 803, various programs and data required for the operation of the electronic device 800 are stored. The processor 801, the ROM 802, and the RAM 803 are connected to each other by a bus 804. The processor 801 performs various operations of the method flow according to the embodiment of the present application by executing programs in the ROM 802 and/or the RAM 803. Note that the program may be stored in one or more memories other than the ROM 802 and the RAM 803. The processor 801 may also perform various operations of the method flow according to embodiments of the present application by executing programs stored in the one or more memories.

According to an embodiment of the application, the electronic device 800 may further comprise an input/output (I/O) interface 805, the input/output (I/O) interface 805 also being connected to the bus 804. The electronic device 800 may also include one or more of an input portion 806 including a keyboard, a mouse, etc., an output portion 807 including a display such as a Cathode Ray Tube (CRT), a Liquid Crystal Display (LCD), etc., and a speaker, etc., a storage portion 808 including a hard disk, etc., and a communication portion 809 including a network interface card such as a LAN card, a modem, etc., connected to an input/output (I/O) interface 805. The communication section 809 performs communication processing via a network such as the internet. The drive 810 is also connected to an input/output (I/O) interface 805 as needed. A removable medium 811 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, or the like is mounted on the drive 810 as needed so that a computer program read out therefrom is mounted into the storage section 808 as needed.

The present application also provides a computer-readable storage medium that may be included in the apparatus/device/system described in the above embodiments, or may exist alone without being assembled into the apparatus/device/system. The computer-readable storage medium carries one or more programs which, when executed, implement methods in accordance with embodiments of the present application.

According to embodiments of the application, the computer-readable storage medium may be a non-volatile computer-readable storage medium, which may include, for example, but is not limited to, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. For example, according to embodiments of the application, the computer-readable storage medium may include ROM 802 and/or RAM 803 and/or one or more memories other than ROM 802 and RAM 803 described above.

Embodiments of the present application also include a computer program product comprising a computer program containing program code for performing the method shown in the flowcharts. The program code means for causing a computer system to carry out the display control method provided by the embodiment of the present application when the computer program product is run in the computer system.

The above-described functions defined in the system/apparatus of the embodiment of the present application are performed when the computer program is executed by the processor 801. The systems, apparatus, modules, units, etc. described above may be implemented by computer program modules according to embodiments of the application.

In one embodiment, the computer program may be based on a tangible storage medium such as an optical storage device, a magnetic storage device, or the like. In another embodiment, the computer program may also be transmitted, distributed, and downloaded and installed in the form of a signal on a network medium, and/or from a removable medium 811 via a communication portion 809. The computer program may comprise program code that is transmitted using any appropriate network medium, including but not limited to wireless, wireline, etc., or any suitable combination of the preceding.

In such an embodiment, the computer program may be downloaded and installed from a network via the communication section 809, and/or installed from the removable media 811. The above-described functions defined in the system of the embodiment of the present application are performed when the computer program is executed by the processor 801. The systems, devices, apparatus, modules, units, etc. described above may be implemented by computer program modules according to embodiments of the application.

According to embodiments of the present application, program code for carrying out computer programs provided by embodiments of the present application may be written in any combination of one or more programming languages, and in particular, such computer programs may be implemented in high-level procedural and/or object-oriented programming languages, and/or in assembly/machine languages. Programming languages include, but are not limited to, such as Java, c++, python, "C" or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, partly on a remote computing device, or entirely on the remote computing device or server. In the case of remote computing devices, the remote computing device may be connected to the user computing device through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computing device (e.g., connected via the Internet using an Internet service provider).

The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams or flowchart illustration, and combinations of blocks in the block diagrams or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

Those skilled in the art will appreciate that the features recited in the various embodiments of the application can be combined and/or combined in a variety of ways, even if such combinations or combinations are not explicitly recited in the present application. In particular, the features recited in the various embodiments of the application can be combined and/or combined in various ways without departing from the spirit and teachings of the application. All such combinations and/or combinations fall within the scope of the application.

The embodiments of the present application are described above. These examples are for illustrative purposes only and are not intended to limit the scope of the present application. Although the embodiments are described above separately, this does not mean that the measures in the embodiments cannot be used advantageously in combination. Various alternatives and modifications can be made by those skilled in the art without departing from the scope of the application, and such alternatives and modifications are intended to fall within the scope of the application.

Claims (25)

1. A display control method, characterized in that the method is applied to a processor, and the method comprises: In response to detecting that a startup operation has been executed on the server, controlling the display to display first information; the first information is used to indicate that the processor has responded to the first interface content of the startup operation; After the processor is started up, in response to detecting that the first controller and/or the second controller performs an initialization operation, the first information is updated using the second information, and the display is controlled to display the second information; wherein the second information is used to indicate the second interface content of the initialization state of the first controller and/or the second controller; the processor continues to control the display output without switching the control of the display by the first controller to the second controller after the initialization of the second controller is completed. 2. The method according to claim 1, wherein the second information includes third information for describing an initialization state of the first controller; After the processor is started up, in response to detecting that the first controller and/or the second controller performs an initialization operation, updating the first information using second information, and controlling the display to display the second information, includes: in response to receiving a first detection signal from the first controller and not receiving a second detection signal from the second controller, updating the first information with the third information; The display is controlled to display the third information. 3. The method according to claim 2, wherein the updating of the first information by using the third information further comprises: Acquire a first initialization progress identifier for describing an initialization operation performed by the first controller; determining an execution status of a first initialization operation corresponding to the first initialization progress indicator; and The third information is generated according to an execution state of the first initialization operation. 4. The method according to claim 3, wherein generating the third information according to the execution status of the first initialization operation comprises: determining first operation information for describing the first initialization operation; and The third information is generated according to an execution state of the first initialization operation and the first operation information. 5. The method according to claim 1, wherein the second information includes fourth information for describing an initialization state of the second controller; After the processor is started up, in response to detecting that the first controller and/or the second controller performs an initialization operation, updating the first information using second information, and controlling the display to display the second information, includes: in response to receiving a first detection signal from the first controller and not receiving a second detection signal from the second controller, updating the first information using the fourth information; The display is controlled to display the fourth information. 6. The method according to claim 5, wherein updating the first information by using the fourth information further comprises: Acquire a second initialization progress identifier for describing the execution of an initialization operation by the second controller; determining an execution status of a second initialization operation corresponding to the second initialization progress indicator; and The fourth information is generated according to an execution state of the second initialization operation. 7. The method according to claim 6, wherein generating the fourth information according to the execution status of the second initialization operation comprises: determining second operation information for describing the second initialization operation; and The fourth information is generated according to the execution state of the second initialization operation and the second operation information. 8. The method according to any one of claims 1 to 7, wherein controlling the display to display the second information comprises: When it is determined that the second information is in an image format, the second information is written into a frame buffer area of the display, so that the display obtains the second information from the frame buffer area of the display and displays the second information. 9. The method according to claim 8, wherein the second information includes at least one of the following: information indicating the initialization progress of the first controller or the second controller; Used to indicate hardware operating status result information detected during the execution of the initialization operation by the first controller or the second controller; Remote management interface information for indicating the operation interface layout and interface loading progress of remotely maintaining the server. 10. The method according to claim 1, wherein after the processor is started, in response to detecting that the first controller and the second controller perform an initialization operation, the first information is updated using second information, and the display is controlled to display the second information, further comprising: In response to receiving a first detection signal from a first controller and a second detection signal from a second controller, respectively acquiring third information describing an initialization state of the first controller and fourth information describing an initialization state of the second controller; The second information is determined from the third information and the fourth information. 11. The method according to claim 10, wherein determining the second information from the third information and the fourth information comprises: The second information is determined from the third information and the fourth information according to a predetermined priority. 12. The method according to claim 11, wherein determining the second information from the third information and the fourth information comprises: In response to receiving a selection operation for a target data source, determining information corresponding to the target data source from the third information and the fourth information as the second information; The target data source includes any one of the following: the first controller and the second controller. 13. The method according to claim 1, further comprising: After the processor is started, in response to not receiving a second detection signal from the second controller and not receiving a first detection signal from the first controller within a first predetermined time period, detecting a cause of signal abnormality; generating abnormality information according to the cause of the abnormal signal; and The first information is updated using the abnormal information, and the display is controlled to display the abnormal information. 14. The method according to claim 13, wherein generating abnormality information according to the abnormality cause of the detection signal comprises: Determining a target code and prompt information associated with the cause of the signal abnormality; and The exception information is generated according to the target code and the prompt information. 15. The method according to claim 14, further comprising: In response to determining that the first controller has not completed the initialization operation within the second predetermined time period, the display is controlled to display fifth information; wherein, the fifth information indicates abnormal information of the first controller and first prompt information for troubleshooting the abnormality of the first controller. 16. The method according to claim 15, further comprising: In response to determining that the second controller has not completed the initialization operation within the third predetermined time period, the display is controlled to display sixth information; wherein, the sixth information indicates abnormal information of the second controller and second prompt information for troubleshooting abnormalities of the first controller. 17. The method according to claim 1, further comprising: In response to detecting that the server is powered on, dividing the first controller and the second controller into independent storage areas; and The first controller and the second controller are respectively configured with respective universal input and output detection signal detection interfaces so as to detect the initialization status of the first controller and the second controller. 18. A display control device, comprising: a first controller, a second controller, a processor, and a display deployed in a server; the processor is communicatively connected to the first controller, the second controller, and the display respectively; The processor is configured to control the display to display first information in response to detecting a startup operation executed on the server; the first information is configured to indicate that the processor has responded to first interface content of the startup operation; The first controller is configured to perform a first initialization operation and send a first detection signal to the processor after the processor is started; The second controller is configured to perform a second initialization operation and send a second detection signal to the processor after the processor is started; The processor is further configured to, after the processor is started up, receive a first detection signal and/or a second detection signal from the first controller and/or the second controller, replace the first information with second information, and control the display to display the second information; wherein the second information is used to indicate a second interface content of an initialization state of the first controller and/or the second controller; and the processor is configured to continuously control the display output without switching control of the display from the first controller to the second controller after the second controller is initialized. The display displays the first information when the server is started; and displays the second information when the first controller and/or the second controller performs an initialization operation. 19. The display control device according to claim 18, comprising: The first controller is configured to send a first detection signal to the processor during execution of the first initialization operation; The processor is configured to, when receiving the first detection signal and not receiving the second detection signal, update the first information using third information describing an initialization state of the first controller; and control the display to display the third information; The display is used to display the third information. 20. The display control device according to claim 18, comprising: The second controller is configured to send a second detection signal to the processor during execution of the second initialization operation; The processor is configured to, when receiving the second detection signal and not receiving the first detection signal, update the first information using fourth information describing an initialization state of the second controller; and control the display to display the fourth information; The display is used to display the fourth information. 21. The display control device according to claim 18, wherein the processor is further configured to: After the processor is started, in response to not receiving a second detection signal from the second controller and not receiving a first detection signal from the first controller within a first predetermined time period, detecting a cause of signal abnormality; generating abnormality information according to the cause of the abnormal signal; and updating the first information using the abnormal information, and controlling the display to display the abnormal information; The display is used to display the abnormal information. 22. The display control device according to claim 18, wherein the processor is further configured to: In response to determining that the first controller has not completed the initialization operation within the second predetermined time period, controlling the display to display fifth information; wherein the fifth information indicates abnormal information of the first controller and first prompt information for troubleshooting the abnormality of the first controller; The display is used to display the fifth information. 23. The display control device according to claim 18, wherein the processor is further configured to: In response to determining that the second controller has not completed the initialization operation within the third predetermined time period, controlling the display to display sixth information; wherein the sixth information indicates abnormal information of the second controller and second prompt information for troubleshooting abnormalities of the first controller; The display is used to display the sixth information. 24. A computer-readable storage medium having a computer program or instruction stored thereon, wherein when the computer program or instruction is executed by a processor, the steps of the method according to any one of claims 1 to 17 are implemented. 25. A computer program product comprising a computer program, which, when executed by a processor, implements the method according to any one of claims 1 to 17.