CN120751743A

CN120751743A - Gallium nitride power transistor device with vertical superjunction structure and preparation method thereof

Info

Publication number: CN120751743A
Application number: CN202410356530.3A
Authority: CN
Inventors: 尚恒宇; 康玄武; 吴昊; 郑英奎; 刘新宇
Original assignee: Institute of Microelectronics of CAS
Current assignee: Institute of Microelectronics of CAS
Priority date: 2024-03-27
Filing date: 2024-03-27
Publication date: 2025-10-03

Abstract

The invention relates to a gallium nitride power transistor device with a vertical superjunction structure and a preparation method thereof, belongs to the technical field of microelectronics, and solves the problems that the current superjunction device has limited increase of on-current density and reduction of on-resistance, and restricts the use of the superjunction device under higher power density. The drift region of the transistor device comprises an AlGaN column at the middle position, two n-GaN columns with the same width at two sides of the AlGaN column and two p-GaN columns with the same width at the outermost sides, wherein the AlGaN column, the n-GaN column and the p-GaN column have the same thickness. The invention realizes the combination of the polarized superjunction and the p-n junction intrinsic superjunction, so that the transistor device obtains lower on-resistance and higher breakdown voltage.

Description

Gallium nitride power transistor device with vertical superjunction structure and preparation method thereof

Technical Field

The invention relates to the technical field of microelectronics, in particular to a gallium nitride power transistor device with a vertical superjunction structure and a preparation method thereof.

Background

Power electronics have found widespread use in power electronics systems. Since the first silicon-based rectifier in 1957, the output power density of power devices has increased, placing higher demands on the devices. With the continuous improvement of semiconductor process technology, the performance of the Si device has tended to the theoretical limit of the material itself, so that the power density has increased to be saturated, and the development speed cannot meet the high performance requirement of the market. While third generation wide bandgap semiconductors typified by GaN can continue to maintain this growing trend.

GaN has the advantages of large forbidden bandwidth, high critical breakdown electric field, high baliga quality factor and the like, so that the GaN is expected to be used for preparing a power device with smaller volume, higher efficiency and higher power density. Because the on-resistance and the breakdown voltage of the traditional power device have a constraint relation that the on-resistance increases with the increase of the breakdown voltage of the device and the relation increases to the power of 2.5, the relation greatly limits the development of the power device pursuing better performance. The super junction device breaks through the limitation, so that the on-resistance of the power device is reduced to a certain extent under the condition of the same breakdown voltage, but the current super junction device is mainly electrified by means of carriers through an intrinsic super junction, the bulk mobility of the gallium nitride material is very low, the increase of the on-current density and the reduction of the on-resistance are limited, and the use of the super junction device under higher power density is restricted.

Disclosure of Invention

In view of the above analysis, the embodiments of the present invention aim to provide a gallium nitride power transistor device with a vertical superjunction structure and a method for manufacturing the same, so as to solve the problems that the current superjunction device has limited increase of on-current density and reduction of on-resistance, and restrict the use of the superjunction device under higher power density.

On one hand, the embodiment of the invention provides a gallium nitride power transistor device with a vertical super-junction structure, which comprises a substrate (1), a drift layer (2), a drain region (3), a grid electrode (4), a source region (5), a grid medium (6), a source electrode (7), a grid electrode metal (8) and a drain electrode metal (9), and is characterized in that:

The drift region (2) comprises an AlGaN column (2-1) at the middle position, two n-GaN columns (2-2) with the same width at two sides of the AlGaN column (2-1) and two p-GaN columns (2-3) with the same width at the outermost sides;

Wherein the AlGaN column (2-1), the n-GaN column (2-2) and the p-GaN column (2-3) have the same thickness.

Further, the width and doping concentration of each column of the drift region satisfy the relationship shown in the formula (1):

x_a*N_d1+2x_n*N_d2＝2x_p*N_a (1),

Wherein x _a、x_n、x_p is the width of AlGaN column (2-1), N-GaN column (2-2) and p-GaN column (2-3), respectively, and N _a、N_d1、N_d2 is the doping concentration of AlGaN column (2-1), N-GaN column (2-2) and p-GaN column (2-3), respectively. Further, the x _a is 3-10nm.

Further, the x _n is 1-2 μm, and the x _p is 1-2 μm.

Further, the N _a is 1×10 ¹⁸-1×10¹⁹cm^-3,N_d1, 2×10 ¹⁷-8×10¹⁷cm^-3,N_d2, and 2×10 ¹⁷-8×10¹⁷cm^-3.

Further, the thickness of the AlGaN column (2-1) is 6-10 μm.

Further, the substrate (1) is made of an n-type GaN material with a doping concentration of 1×10 ¹⁹-2×10¹⁹cm^-3.

Further, the doping concentration is sequentially increased in the order of the drain region (3), the gate electrode (4) and the source region (5).

Further, the doping concentration of the drain region (3) is 1 multiplied by 10 ¹⁸-2×10¹⁸cm^-3, and the thickness is 0.8-1 mu m;

The doping concentration of the grid electrode (4) is 5 multiplied by 10 ¹⁸-6×10¹⁸cm^-3, and the thickness is 300-500nm;

the doping concentration of the source region (5) is 1 multiplied by 10 ¹⁹-2×10¹⁹cm^-3, and the thickness is 50-200nm.

In another aspect, an embodiment of the present invention provides a method for manufacturing a gallium nitride power transistor device with a vertical superjunction structure, where the method includes:

Providing an n-type GaN material as a substrate;

growing a doped n-GaN column precursor material on the upper surface of the substrate;

performing through etching on the middle position of the n-GaN column precursor material to form a deep groove, and epitaxially growing a doped AlGaN column (2-1) in the deep groove;

Etching two sides of the n-GaN column precursor material to form two gaps, and epitaxially growing doped p-type GaN inside and outside the two gaps to obtain two p-GaN columns (2-3), wherein the two n-GaN columns (2-2) formed by the two etching processes, one AlGaN column (2-1) and the two p-GaN columns (2-3) form a drift region (2);

Epitaxially growing n-type GaN above the drift region (2) to form a doped drain region (3);

epitaxially growing p-type GaN above the drain region (3) to form a doped grid electrode (4);

Injecting n-type GaN at two sides of the grid electrode (4) to manufacture a doped source region (5);

growing oxide above the grid electrode (4) and the source region (5) to form a grid medium (6);

forming gate metal (8) above the gate dielectric (6), wherein the gate dielectric (6) and the gate metal (8) are overlapped with the source region (5) in the horizontal direction respectively;

Forming a source electrode (7) in the exposed source region (5), wherein the sum of the widths of the source electrode (7) and the gate dielectric (6) is equal to the width of the gate electrode (4), and the sum of the thicknesses of the gate metal (8) and the gate dielectric (6) is equal to the thickness of the source electrode (4), and a gap is reserved between the gate metal (8) and the source electrode (4);

a drain metal (9) is formed on the lower surface of a gallium nitride substrate (1).

Compared with the prior art, the invention has at least one of the following beneficial effects:

1. The GaN-based superjunction device combines the polarized superjunction and the pn junction intrinsic superjunction, and utilizes high mobility two-dimensional electron gas and two-dimensional hole gas generated by the polarized superjunction, compared with electrons and holes of GaN bulk materials, the GaN-based superjunction device has higher mobility, the on-state current density can be further increased, and meanwhile, the on-state resistance of the device is further reduced;

Under the condition that other conditions are the same, the external voltage is in the range of 0-9V, and compared with a super junction device without the AlGaN heterojunction layer, under the same external voltage, the on current density of the super junction device with the AlGaN heterojunction layer is improved by 80.3%, and the super junction device with the AlGaN heterojunction layer obtains higher on current density.

As shown in fig. 3, the output current of the super junction device with AlGaN heterojunction layer and the super junction device without AlGaN heterojunction layer is changed along with the applied voltage, and it can be seen that when the applied voltage is 6V, the two super junction devices reach the maximum current density, the maximum current density of the super junction device with AlGaN heterojunction layer is 285.6mA/mm, and the maximum current density of the super junction device without AlGaN heterojunction layer is 158.4mA/mm.

2. Under the condition of reverse bias, an intrinsic pn junction super junction structure is used for realizing charge balance of a P region and an N region/AlGaN region, and higher breakdown voltage is obtained.

In the invention, the technical schemes can be mutually combined to realize more preferable combination schemes. Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and drawings.

Drawings

The drawings are only for purposes of illustrating particular embodiments and are not to be construed as limiting the invention, like reference numerals being used to refer to like parts throughout the several views.

FIG. 1 is a process flow diagram of a device structure for fabricating a GaN power transistor with a vertical superjunction structure according to the present invention;

fig. 2 is a schematic diagram of a gan power transistor device structure with a vertical superjunction structure according to the present invention

Fig. 3 is a graph showing the variation of the output current of the superjunction device having the AlGaN heterojunction layer and the superjunction device not having the AlGaN heterojunction layer according to the applied voltage in the range of 0 to 9V under the same other conditions.

Reference numerals:

1-substrate, 2-drift layer, 3-drain region, 4-gate, 5-source region, 6-gate dielectric, 7-source, 8-gate metal, 9-drain metal.

Detailed Description

The following detailed description of preferred embodiments of the invention is made in connection with the accompanying drawings, which form a part hereof, and together with the description of the embodiments of the invention, are used to explain the principles of the invention and are not intended to limit the scope of the invention.

The invention discloses a gallium nitride power transistor device with a vertical super junction structure, which is shown in fig. 2, and comprises a substrate (1), a drift layer (2), a drain region (3), a grid electrode (4), a source region (5), a grid medium (6), a source electrode (7), grid electrode metal (8) and drain electrode metal (9), wherein the drift region (2) comprises an AlGaN column (2-1) at the middle position, two n-GaN columns (2-2) with the same width at two sides of the AlGaN column (2-1) and two p-GaN columns (2-3) with the same width at the outermost side;

The GaN-based superjunction device combines the polarized superjunction and the pn junction intrinsic superjunction, utilizes high mobility two-dimensional electron gas and two-dimensional hole gas generated by the polarized superjunction, has higher mobility compared with electrons and holes of GaN bulk materials in the prior art, can further increase the on-current density, and further reduces the on-resistance of the device.

In order to make the lateral electric field of the drift region more balanced and the overall electric field distribution more uniform, it is necessary to make the widths of the two n-GaN columns (2-2) identical and the widths of the two p-GaN columns (2-3) identical.

In order to allow all the drift regions to exhibit the voltage-withstanding and conduction functions, the thicknesses of the AlGaN columns (2-1), the n-GaN columns (2-2), and the p-GaN columns (2-3) are set to be the same.

In order to form the superjunction structure in the drift region and fully exert the effect of the superjunction structure, it is necessary to control charge balance in the drift region of the GaN-based superjunction device, otherwise, the electric field distribution of the drift region is affected, and the withstand voltage of the drift region is rapidly reduced.

Specifically, the width and doping concentration of each column of the drift region should satisfy the relationship shown in formula (1):

x_a*N_d1+2x_n*N_d2＝2x_p*N_a (1),

Wherein x _a、x_n、x_p is the width of AlGaN column (2-1), N-GaN column (2-2) and p-GaN column (2-3), respectively, and N _d1、N_d2、N_a is the doping concentration of AlGaN column (2-1), N-GaN column (2-2) and p-GaN column (2-3), respectively.

In order to induce a two-dimensional electron gas and a two-dimensional hole gas with higher mobility in the AlGaN heterojunction layer in the middle of the drift region, the on-state current density of the device is effectively improved, and meanwhile, the on-state resistance of the device is reduced, and the width of the AlGaN column needs to be limited and cannot be too large or too small.

Specifically, the width x _a of the AlGaN column is limited within the range of 3-10nm, when the width of the AlGaN column is overlarge and is larger than 10nm, the heterojunction cannot induce two-dimensional electron gas and two-dimensional hole gas, and when the width of the AlGaN column is too small and smaller than 3nm, the material reliability of AlGaN is affected, and finally the reliability of a device is reduced.

In the case of obtaining a larger breakdown voltage of the superjunction device of the present invention, the device area is reduced as much as possible, and the widths of the n-GaN columns (2-2) and the p-GaN columns (2-3) need to be limited.

Specifically, the width x _n of the n-GaN column is limited within the range of 1-2 mu m, when the width of the n-GaN column is too large and is larger than 2 mu m, the whole area of the device is larger, the integration is not facilitated, and when the width of the n-GaN column is too small and is smaller than 1 mu m, the transverse voltage drop of the device is too large, and the transverse breakdown of the device is caused.

Specifically, the width x _p of the p-GaN column is limited within the range of 1-2 mu m, when the width of the p-GaN column is too large and is larger than 2 mu m, the whole area of the device is larger, the integration is not facilitated, and when the width of the p-GaN column is too small and is smaller than 1 mu m, the transverse voltage drop of the device is too large, and the transverse breakdown of the device is caused.

In order to achieve charge balance, the doping concentrations of the AlGaN column, the n-GaN column, and the p-GaN column need to be defined.

Specifically, the doping concentration x _a of the AlGaN column is limited within the range of 1X 10 ¹⁸-1×10¹⁹cm^-3, when the doping concentration of the AlGaN column is too large, the AlGaN heterojunction layer is alloyed without scattering, on-resistance is increased, and when the doping concentration of the AlGaN column is too small, a quantum well cannot be formed, and then two-dimensional electron gas and two-dimensional hole gas cannot be generated.

Specifically, the invention limits the doping concentration x _d1 of the n-GaN column to be in the range of 2X 10 ¹⁷-8×10¹⁷cm^-3, when the doping concentration of the n-GaN column is too large, charge balance is difficult to form, and when the doping concentration of the n-GaN column is too small, the on-resistance of the drift region is too large.

Specifically, the invention limits the doping concentration x _d2 of the p-GaN column to be in the range of 2X 10 ¹⁷-8×10¹⁷cm^-3, when the doping concentration of the p-GaN column is too large, charge balance is difficult to form, and when the doping concentration of the n-GaN column is too small, the on-resistance of the drift region is too large.

In order to allow the depletion layer to spread horizontally and merge rapidly when a voltage is applied to the superjunction device, the thickness of the drift layer needs to be limited to improve the voltage resistance of the device itself.

From the above discussion, it is clear that the thicknesses of the AlGaN column (2-1), the n-GaN column (2-2), and the p-GaN column (2-3) are set to be the same so that all the drift regions can exhibit the voltage-withstanding and conduction functions. Therefore, according to the manufacturing process of the GaN-based superjunction device of the invention, the thickness of the n-GaN column (2-2), i.e., the thickness of the drift layer, is defined to be 6-10 μm. If the thickness of the drift layer is too small and smaller than 6 mu m, the superjunction device cannot show the advantages of the superjunction drift layer compared with a single drift layer, meanwhile, the pressure resistance of the device is reduced, and if the thickness of the drift layer is too large and larger than 10 mu m, the process difficulty is greatly increased, and the manufacturing cost is greatly increased.

In order to form a good ohmic contact between the substrate and the drain electrode, the doping concentration of the n-type material used for the substrate needs to be limited.

Specifically, the invention limits the doping concentration of the n-type GaN material adopted by the substrate to 1X 10 ¹⁹-2×10¹⁹cm^-3. If the doping concentration of the n-type GaN material adopted by the substrate (1) is too large, the defect and stress increase of the substrate can be influenced, the reliability of the device is influenced, and if the doping concentration of the n-type GaN material adopted by the substrate (1) is too small, the formation of bottom ohmic contact is not facilitated.

In order to reduce the whole area of the device and facilitate the integration of the superjunction device, the width of the substrate is limited to 4-8 mu m.

On the other hand, the doping concentration of the source region is improved so as to be beneficial to forming ohmic contact between the source region and the source region, the doping concentration in GaN-based materials forming the drain region, the grid electrode and the source region is required to be sequentially increased according to the sequence of the drain region (3), the grid electrode (4) and the source region (5), and the doping concentration of the GaN-based material of the drain region is larger than that of the GaN-based material of the drift region, so that the electric field distribution in the drain region under the reverse pressure-resistant condition is reduced, and the reliability of the drain region is enhanced.

Specifically, the invention limits the doping concentration of the n-type GaN material adopted by the drain region to 1×10 ¹⁸-2×10¹⁸cm^-3. The high doping concentration of the drain region is beneficial to reducing the electric field distribution in the drain region under the condition of reverse voltage resistance and enhancing the reliability of the drain region, and the lower doping concentration can lead to the increase of the resistance of the drain region and the electric field distribution, so that the reliability can be reduced while the on-resistance of the whole device is increased.

Specifically, the thickness of the drain region is limited to 0.8-1 mu m, if the thickness of the drain region is too large, the recombination of carriers in the process of transporting the drain region is increased, the density of the carriers is reduced, and if the thickness of the drain region is too small, the reliability of the device is lowered.

Specifically, the invention limits the doping concentration of the p-type GaN material adopted by the grid electrode to 5×10 ¹⁸-6×10¹⁸cm^-3. If the doping concentration of the p-type GaN material used for the grid electrode is too large, the technological difficulty is caused, the doping atoms cannot be effectively activated, and if the doping concentration of the p-type GaN material used for the grid electrode is too small, the grid region resistance is increased.

Specifically, the thickness of the grid electrode is limited to 300-500nm, if the thickness of the grid electrode is too large, the recombination of carriers in the conveying process is increased, so that the density of the carriers is reduced, and if the thickness of the grid electrode is too small, the reliability of the device is reduced.

Specifically, the invention limits the doping concentration of the n-type GaN material adopted by the source region to 1×10 ¹⁹-2×10¹⁹cm^-3. If the doping concentration of the n-type GaN material used in the source region is too large, the defect density of the material is increased, and the reliability of the material is affected, and if the doping concentration of the n-type GaN material used in the source region is too small, the formation of source ohmic contact is affected.

Specifically, the thickness of the source region is limited to 50-200nm, if the thickness of the source region is too large, the implantation is difficult in the preparation of the source region, and if the thickness of the source region is too small, the original function of the source region cannot be used.

In one embodiment of the present invention, a method for manufacturing a gallium nitride power transistor device with a vertical super junction structure is disclosed, and specific process steps refer to fig. 1, and the method includes:

Providing an n-type GaN material as a substrate;

The invention adopts an n-type GaN material with the width of 4-8 mu m and the doping concentration of 1 multiplied by 10 ¹⁹-2×10¹⁹cm^-3 as the substrate (1).

The method for growing an n-type GaN material on a substrate in the step (1) is not particularly limited, and the n-type GaN material is grown on the substrate by using a Metal Organic Chemical Vapor Deposition (MOCVD) technique or the substrate (1) having the n-GaN column precursor material grown on the upper surface is obtained by direct purchase.

Specifically, an n-GaN column precursor material with a thickness of 6-10 μm and a doping concentration of 2×10 ¹⁷-8×10¹⁷cm^-3 is grown on the upper surface of the substrate (1).

The etching method is not particularly limited as long as the deep groove required by the invention can be obtained and the chemical composition and physical and chemical properties of the etched object are not affected, and according to one specific embodiment of the invention, the n-type GaN material is etched by using BCl ₃/Cl₂ etching gas by adopting an Inductively Coupled Plasma (ICP) technology.

Specifically, the intermediate position of the n-GaN column precursor material is subjected to penetration etching to form a deep groove with the width of 3-10nm, damage on the etched surface is repaired, and AlGaN with the doping concentration of 1X 10 ¹⁸-1×10¹⁹cm^-3 is epitaxially grown in the deep groove to obtain an AlGaN column (2-1).

Specifically, etching two sides of the n-GaN column precursor material to form two cuboid gaps with the width of 1-2 mu m, repairing the damage of the etched surface, and epitaxially growing p-type GaN with the doping concentration of 2X 10 ¹⁷-8×10¹⁷cm^-3 in the two cuboid gaps to obtain two p-GaN columns (2-3).

The method for repairing the etched surface damage is not particularly limited, and a sample can be treated for 30min-1h by adopting a 25% TMAH solution at 65-85 ℃ or can be treated for 30s-1min by adopting a 2.38% KOH solution at normal temperature.

The invention adopts MOCVD method to carry out the epitaxial growth of AlGaN column.

The invention adopts MOCVD method to carry out the epitaxial growth of p-GaN column.

And (2) epitaxially growing n-type GaN above the drift region (2) by adopting an MOCVD method to form a drain region (3) with the thickness of 0.8-1 mu m and the doping concentration of 1 multiplied by 10 ¹⁸-2×10¹⁸cm^-3.

And (2) epitaxially growing p-type GaN above the drain region (3) by adopting an MOCVD method to form a grid electrode (4) with the thickness of 300-500nm and the doping concentration of 5 multiplied by 10 ¹⁸-6×10¹⁸cm^-3.

The method is characterized in that an ion implantation method is adopted to implant n-type GaN at the two sides of the grid electrode (4) so as to manufacture a source region (5) with the thickness of 50-200nm and the doping concentration of 1X 10 ¹⁹-2×10¹⁹cm^-3;

The invention adopts Plasma Enhanced Chemical Vapor Deposition (PECVD), low Pressure Chemical Vapor Deposition (LPCVD) and Atomic Layer Deposition (ALD) to grow oxide to form the gate dielectric, wherein the substances forming the gate dielectric can be aluminum oxide, silicon oxide, hafnium oxide, silicon nitride or tantalum oxide.

The invention adopts electron beam evaporation or magnetron sputtering method to carry out the lamination growth of metal titanium/gold above the gate dielectric (6) to form the gate metal.

Specifically, the gate dielectric (6) and the gate metal (8) are overlapped with the source region (5) in the horizontal direction respectively, and the overlapping length is more than 0 mu m.

The invention adopts an electron beam evaporation or magnetron sputtering method to grow metal above the exposed source region (5) to form a source electrode (7), wherein the metal is Ni/Au, ti/Al/Ni/Au, ti/Ni/Ti/Au, ti/Al/Pt/Au, ti/Al/Mo/Au or Ti/Al/Ti.

Specifically, the sum of the widths of the source electrode (7) and the gate dielectric (6) is equal to the width of the gate electrode (4), the sum of the thicknesses of the gate metal (8) and the gate dielectric (6) is equal to the thickness of the source electrode (4), and a gap is reserved between the gate metal (8) and the source electrode (4).

The invention adopts an electron beam evaporation or magnetron sputtering method to grow metal on the lower surface of the gallium nitride substrate (1) to form drain metal (9), wherein the metal is Ni/Au, ti/Al/Ni/Au, ti/Ni/Ti/Au, ti/Al/Pt/Au, ti/Al/Mo/Au or Ti/Al/Ti.

The gallium nitride power transistor device with the vertical super-junction structure and the preparation method thereof are also suitable for the situation that two p-GaN columns (2-3) are replaced by two p-NiO columns.

The present invention is not limited to the above-mentioned embodiments, and any changes or substitutions that can be easily understood by those skilled in the art within the technical scope of the present invention are intended to be included in the scope of the present invention.

Claims

1. A vertical superjunction gallium nitride power transistor device, comprising: a substrate (1), a drift layer (2), a drain region (3), a gate (4), a source region (5), a gate dielectric (6), a source electrode (7), a gate metal (8) and a drain metal (9), characterized in that:

The drift region (2) comprises an AlGaN column (2-1) in the middle, two n-GaN columns (2-2) with the same width on both sides of the AlGaN column (2-1), and two p-GaN columns (2-3) with the same width on the outermost sides;

The thicknesses of the AlGaN column (2-1), the n-GaN column (2-2), and the p-GaN column (2-3) are the same.

2. The device according to claim 1, wherein the width and doping concentration of each column in the drift region satisfy the relationship shown in formula (1):

x _a *N _d1 +2x _n *N _d2 =2x _p *N _a (1),

Wherein, _xa , _xn , _xp are the widths of the AlGaN column (2-1), n-GaN column (2-2), and p-GaN column (2-3), respectively; _Na , _Nd1 , _Nd2 are the doping concentrations of the AlGaN column (2-1), n-GaN column (2-2), and p-GaN column (2-3), respectively.

The device according to claim 2 , wherein the x _a is 3-10 nm.

The device according to claim 2 or 3, characterized in that _xn is 1-2 μm and _xp is 1-2 μm.

The device according to claim 2, wherein _Na is 1× ^1018-1 × ¹⁰¹⁹ cm ^-3 , _Nd1 is 2× ^1017-8 × ¹⁰¹⁷ cm ^- 3, and _Nd2 is 2× ^1017-8 × ¹⁰¹⁷ cm ^-3 .

6 . The device according to claim 1 , wherein the thickness of the AlGaN column ( 2 - 1 ) is 6-10 μm.

7. The device according to claim 1, characterized in that the substrate (1) is made of n-type GaN material with a doping concentration of 1× ^1019-2 × ¹⁰¹⁹ cm ^-3 .

8. The device according to claim 1, characterized in that the doping concentration increases in the order of the drain region (3), the gate region (4) and the source region (5).

9. The device according to claim 8, characterized in that the drain region (3) has a doping concentration of 1×10 ¹⁸ -2×10 ¹⁸ cm ^-3 and a thickness of 0.8-1 μm;

The gate (4) has a doping concentration of 5×10 ¹⁸ -6×10 ¹⁸ cm ^-3 and a thickness of 300-500 nm;

The doping concentration of the source region (5) is 1×10 ¹⁹ -2×10 ¹⁹ cm ^-3 and the thickness is 50-200 nm.

10. A method for manufacturing the vertical superjunction gallium nitride power transistor device according to any one of claims 1 to 9, characterized in that the method comprises:

Providing n-type GaN material as a substrate;

growing a doped n-GaN pillar precursor material on the upper surface of the substrate;

Etching both sides of the n-GaN column precursor material to form two gaps, epitaxially growing doped p-type GaN in the two gaps to obtain two p-GaN columns (2-3); the two n-GaN columns (2-2) formed by the two etchings, one AlGaN column (2-1), and the two p-GaN columns (2-3) form a drift region (2);

Epitaxially growing p-type GaN above the drain region (3) to form a doped gate (4);

Implanting n-type GaN at both sides of the gate (4) to form a doped source region (5);

Growing an oxide above the gate (4) and the source region (5) to form a gate dielectric (6);

A gate metal (8) is formed above the gate dielectric (6), and the gate dielectric (6), the gate metal (8) and the source region (5) overlap in a horizontal direction;

A source electrode (7) is formed in the exposed source region (5), wherein the sum of the widths of the source electrode (7) and the gate dielectric (6) is equal to the width of the gate electrode (4), and the sum of the thicknesses of the gate metal (8) and the gate dielectric (6) is equal to the thickness of the source electrode (4); and a gap is left between the gate metal (8) and the source electrode (4);

A drain metal (9) is formed on the lower surface of the gallium nitride substrate (1).