CN120785304A - Compact filter device and electronic device - Google Patents
Compact filter device and electronic deviceInfo
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- CN120785304A CN120785304A CN202410390500.4A CN202410390500A CN120785304A CN 120785304 A CN120785304 A CN 120785304A CN 202410390500 A CN202410390500 A CN 202410390500A CN 120785304 A CN120785304 A CN 120785304A
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- capacitive
- capacitive structure
- inductive
- common terminal
- filtering device
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Abstract
The invention discloses a compact filter device and an electronic device, comprising first to eighth capacitive structures, first to third inductive structures, first to sixth public terminals, first and second potential terminals, and first and second signal ports, wherein the first capacitive structure is coupled with the second capacitive structure through the first public terminal, the second capacitive structure is coupled with the third capacitive structure and the first inductive structure through the third public terminal, the third capacitive structure is coupled with the first capacitive structure through the second public terminal, the fourth public terminal is coupled with the second public terminal, the fifth capacitive structure is coupled with the fourth capacitive structure through the fourth public terminal, the fifth capacitive structure is coupled with the sixth capacitive structure, the eighth capacitive structure and the second inductive structure through the sixth public terminal, and the sixth capacitive structure is coupled with the seventh capacitive structure and the third inductive structure through the fifth public terminal. The invention realizes the frequency response performance of four out-of-band transmission zeros by using only three inductive structures, and has the advantages of miniaturization and high frequency selection characteristic.
Description
Technical Field
The embodiment of the invention relates to the technical field of radio frequency filters, in particular to a compact filter device and an electronic device.
Background
With the development of modern communications, there is an increasing need for a communication terminal supporting multiple modes, covering multiple frequency bands. In these communication terminals, a key component is a radio frequency filter for allowing a desired frequency signal to pass therethrough and filtering out an undesired signal. Due to the evolution of the communication system, the frequency bands allocated to the respective communication channels show an increasingly close trend, so that a band-pass filter with steeper out-of-band rejection performance is urgently needed. In the development process of the band-pass filter, the design of a circuit topology architecture is particularly critical, and the miniaturization capability, the integration capability and the frequency selection capability of the filter are directly related. In order to obtain better frequency selection performance, the filter order is often increased, but this way greatly increases the number of elements for filtering and the complexity of the overall structure, especially in the design of a filter based on lumped parameters, the increase of the filter order directly leads to the surge of the number of inductance elements, which brings great challenges to the miniaturization and high integration design of the filter in the high-density radio frequency integrated circuit system, so how to use the smaller inductance number and smaller inductance value to realize steep frequency response in the design of the filter is a pain point and difficulty of the design research of the filter.
Disclosure of Invention
In view of the above, an object of the present invention is to provide a compact filter device and an electronic device with outstanding miniaturization. The compact filter device provided by the invention has the advantages that the frequency response performance of four out-of-band transmission zeros is realized by reasonably configuring the capacitive structure and only using three inductive structures, the frequency response characteristic of multiple transmission zeros is realized without configuring an additional resonator structure, the out-of-band rejection performance of the filter device is improved, and the compact filter device has the advantages of miniaturization and high frequency selection characteristic. And secondly, the required equivalent inductance value of the inductive structure in the circuit is smaller than that of the conventional elliptic function topology, so that the occupied area of a physical structure corresponding to the equivalent inductance value required by the resonant unit is reduced, and the miniaturization of the filter is further realized.
According to an aspect of the present invention, there is provided a compact filter device comprising:
The capacitive touch screen comprises a first pixel body, a first capacitive structure, a second capacitive structure, a third capacitive structure, a fourth capacitive structure, a fifth capacitive structure, a sixth capacitive structure, a seventh capacitive structure, an eighth capacitive structure, a first inductive structure, a second inductive structure, a third inductive structure coupled in parallel with the seventh capacitive structure, a first common terminal, a second common terminal, a third common terminal, a fourth common terminal, a fifth common terminal, a sixth common terminal, a first potential terminal, a second potential terminal, a first signal port and a second signal port, wherein the first capacitive structure is arranged on a coupling path between the first common terminal and the second common terminal, the second capacitive structure is arranged on a coupling path between the first common terminal and the third common terminal, the third capacitive structure is arranged on a coupling path between the second common terminal and the third common terminal, the fourth capacitive structure is arranged on a coupling path between the fourth common terminal and the sixth common terminal, the sixth capacitive structure is arranged on a coupling path between the sixth common terminal and the sixth common terminal, the sixth capacitive structure is arranged on a coupling path between the first common terminal and the sixth common terminal, the sixth capacitive structure is arranged on a coupling path between the fifth capacitive structure and the fifth common terminal, the fifth capacitive structure is arranged on a coupling path between the fifth common terminal and the fifth common terminal, the fifth capacitive structure is arranged on a coupling path between the fifth capacitive structure and the fifth capacitive structure is arranged between the fifth common terminal and the fifth common terminal;
The first capacitive structure is coupled with the second capacitive structure through a first common end, the second capacitive structure is coupled with the third capacitive structure and the first inductive structure through a third common end, the third capacitive structure is coupled with the first capacitive structure through a second common end, the fourth common end is coupled with the second common end, the fifth capacitive structure is coupled with the fourth capacitive structure through a fourth common end, the fifth capacitive structure is coupled with the sixth capacitive structure, the eighth capacitive structure and the second inductive structure through a sixth common end, and the sixth capacitive structure is coupled with the seventh capacitive structure and the third inductive structure through a fifth common end; the first body comprises one or more dielectric layers arranged along the stacking direction, and the first to eighth capacitive structures and/or the first to third inductive structures are at least partially formed in or on the first body, and the first to eighth capacitive structures are formed by metallized electrode coupling.
Optionally, the circuit further comprises a ninth capacitive structure, the ninth capacitive structure is configured on a coupling path between the first signal port and the first common terminal, and the ninth capacitive structure is coupled with the first capacitive structure and the second capacitive structure through the first common terminal. In this case, it is advantageous to adjust the impedance matching between the filter means and the outside.
Optionally, the compact filter device further comprises a fourth inductive structure arranged on the coupling path between the first signal port and the first common terminal, the fourth inductive structure being coupled in parallel with the ninth capacitive structure. In this case, it is advantageous to further increase the out-of-band rejection performance of the filtering means.
Optionally, the compact filter device further includes a tenth capacitive structure and a third potential end, the tenth capacitive structure is configured on a coupling path between the first common end and the third potential end, the tenth capacitive structure is coupled with the ninth capacitive structure and the first capacitive structure through the first common end, and the tenth capacitive structure is at least partially formed in the first element body or on the surface. In this case, the standing wave is optimized by adjusting the tenth capacitive structure, which is advantageous in improving flexibility of circuit impedance matching.
Optionally, the compact filter device further comprises a fifth inductive structure, the fifth inductive structure being arranged on a coupling path between the first common terminal and the third potential terminal, the fifth inductive structure being capacitively coupled to the tenth terminal. In this case, the out-of-band rejection performance of the filter device is advantageously improved.
Optionally, the compact filter device further includes an eleventh capacitive structure and a fourth potential end, the eleventh capacitive structure is disposed on a coupling path between the first signal port and the fourth potential end, and the eleventh capacitive structure is at least partially formed in or on the surface of the first element body. Under the condition, the external impedance of the first signal port is conveniently adjusted, the flexibility of circuit impedance matching is improved, and the out-of-band rejection performance of the filter device is improved.
Optionally, the compact filter device further includes a sixth inductive structure, the sixth inductive structure being disposed on a coupling path between the first signal port and the fourth potential end, the tenth capacitive structure being coupled to the sixth inductive structure. In this case, the out-of-band rejection performance of the filter device is advantageously improved.
Optionally, the compact filter device further includes a twelfth capacitive structure disposed on a coupling path between the third common terminal and the first potential terminal, the twelfth capacitive structure being coupled to the first inductive structure, the twelfth capacitive structure being at least partially formed inside or on the surface of the first element body. In this case, it is advantageous to further increase the out-of-band rejection degree of the filter means
Optionally, the compact filter device further includes a seventh inductive structure disposed on the coupling path between the third common terminal and the first potential terminal, the seventh inductive structure being coupled in series with a twelfth capacitive structure, the twelfth capacitive structure being coupled in parallel with the first inductive structure. In this case, it is advantageous to further increase the out-of-band rejection degree of the filter means
Optionally, the compact filter device further comprises an eighth inductive structure, the eighth inductive structure being arranged on a coupling path between the sixth common terminal and the second potential terminal, the eighth inductive structure being coupled in series with the eighth capacitive structure. In this case it is advantageous to further increase the out-of-band rejection degree of the filtering means.
Optionally, the compact filter device further comprises a thirteenth capacitive structure disposed on the coupling path between the second common terminal and the fourth potential terminal, the thirteenth capacitive structure being at least partially formed inside or on the surface of the first element body. In this case, it is advantageous to improve flexibility in circuit impedance matching.
Optionally, the compact filter device further includes a fourteenth capacitive structure, a fifth potential end, and a ninth inductive structure, the fourteenth capacitive structure is configured on a coupling path between the first signal port and the first common end, the fourteenth capacitive structure is coupled in series with the ninth capacitive structure, the ninth inductive structure is configured on a common coupling path from the ninth capacitive structure to the fifth potential end, and from the fourteenth capacitive structure to the fifth potential end, and the fourteenth capacitive structure is at least partially formed inside or on a surface of the first element body. Under the condition, the external impedance of the first signal port can be conveniently adjusted, the flexibility of circuit impedance matching is improved, and the out-of-band selection performance of the filter device is improved.
Optionally, the first element of the compact filter device is formed of any one or more of silicon, gallium arsenide, silicon carbide, gallium nitride, gallium oxide, diamond, indium phosphide, glass, sapphire, aluminum oxide, aluminum nitride, silicon oxide, and polyimide.
Optionally, the compact filter device further comprises a second element body formed by stacking one or more dielectric layers along a stacking direction, the first element body and the second element body are sequentially arranged along the stacking direction, the first element body is fixed on the second element body, the capacitive structure and/or the inductive structure is at least partially formed inside or on the surface of the second element body, the first element body and the second element body are electromagnetically coupled through one or more connecting pieces between the first element body and the second element body, and the connecting pieces comprise at least one of metal bumps, copper columns, tin balls, gold wires and solder bumps. Under the condition, the three-dimensional layout space of the structure is expanded, and the reduction of the plane size required by the filtering device is facilitated.
Alternatively, the inductive structure of the compact filter device is formed by metal traces that are formed into shapes that extend in the form of meanders, arcs, spirals, or combinations thereof.
Optionally, the inductive structure of the compact filter device comprises a plurality of metal traces formed in different dielectric layers and a plurality of metallized via posts interconnecting them, the via posts extending in the stacking direction. In this case, it is advantageous to reduce the planar size of the inductive structure and improve the miniaturization performance of the filter device.
Alternatively, the projection of the metal trace on the plane perpendicular to the lamination direction is formed centering on a point around which the metal trace is circumferentially arranged.
Optionally, the metal traces are formed on different dielectric layers and substantially aligned along the stacking direction, and projection of the inductive structure on a plane perpendicular to the stacking direction forms a closed pattern. In this case, it is advantageous to reduce the planar size occupied by the metal trace and improve the miniaturization performance of the filter device.
Optionally, each metal trace has no more than one turn.
Optionally, the first potential end and the second potential end of the compact filter device are equipotential.
Optionally, the first to eighth capacitive structures of the compact filter device are configured to be aligned along a first direction.
Optionally, the projection of the first to eighth capacitive structures of the compact filter device onto a plane perpendicular to the stacking direction extends along the first direction.
Optionally, the projection of the first to eighth capacitive structures of the compact filter device on the surface perpendicular to the stacking direction includes a first projection section, a second projection section and a third projection section connected end to end in sequence, the first projection section and the third projection section extending along a first direction, the second projection section extending along a second direction, and the first direction being perpendicular to the second direction. In this case, it is advantageous to increase flexibility of layout.
Optionally, the projection of the second capacitive structure of the compact filter device onto a plane perpendicular to the stacking direction is distant from the projection of the eighth capacitive structure onto a plane perpendicular to the stacking direction along the second direction. In this case, the distance between the second and eighth capacitive structures is made as large as possible to reduce their undesired coupling or crosstalk with each other, which is advantageous for achieving excellent out-of-band noise suppression.
Optionally, the projection of the first to eighth capacitive structures of the compact filter device on a plane perpendicular to the stacking direction includes a fourth projection section extending in the first direction, and a fifth projection section extending in the second direction from a middle of the fourth projection section, the first direction being perpendicular to the second direction. In this case, it is advantageous to increase flexibility of layout.
Optionally, the projection of the first to eighth capacitive structures of the compact filter device on the surface perpendicular to the stacking direction includes a sixth projection section and a seventh projection section connected end to end in sequence, the sixth projection section extending along the second direction, the seventh projection section extending along the first direction, and the first direction being perpendicular to the second direction. In this case, it is advantageous to increase flexibility of layout.
Optionally, the first inductive structure, the second inductive structure and the third inductive structure of the compact filter device are arranged in sequence along the first direction. In this case, the space utilization of the layout is advantageously improved.
Optionally, the projection of the first perceptual structure of the compact filter device onto a plane perpendicular to the first direction, the projection of the second perceptual structure onto a plane perpendicular to the first direction, and the projection of the third perceptual structure onto a plane perpendicular to the first direction at least partially coincide. In this case, the space utilization of the layout is advantageously improved.
Optionally, the second inductive structure and the third inductive structure of the compact filter device are sequentially arranged along the second direction, and the second inductive structure and the third inductive structure are configured on the same side of the first inductive structure.
Optionally, the projection of the first perceptual structure on the plane perpendicular to the first direction and the projection of the second perceptual structure on the plane perpendicular to the first direction of the compact filter device coincide, the projection of the first perceptual structure on the plane perpendicular to the first direction coincides with the projection of the third perceptual structure on the plane perpendicular to the first direction, and the projection of the second perceptual structure on the plane perpendicular to the second direction coincides with the projection of the third perceptual structure on the plane perpendicular to the second direction.
Optionally, at least part of the first to third inductive structures of the compact filter device are formed on or in the surface of the first pixel body.
Optionally, at least part of the first to third inductive structures of the compact filter device are formed on the surface or inside of the first and second pixel bodies at the same time.
According to another aspect of the present invention, there is provided an electronic device comprising the compact filter device of any of the embodiments of the present invention.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments or the conventional techniques of the present invention, the drawings required for the descriptions of the embodiments or the conventional techniques will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to the drawings without inventive effort for those skilled in the art. Note that the relative dimensions of the following figures may not be drawn to scale.
Fig. 1 is an equivalent circuit schematic diagram of a compact filter device according to an embodiment of the present invention;
Fig. 2 is an equivalent circuit schematic diagram of a compact filtering device according to another embodiment of the present invention;
Fig. 3 is an equivalent circuit schematic diagram of a compact filtering device according to another embodiment of the present invention;
fig. 4 is an equivalent circuit schematic diagram of a compact filtering device according to another embodiment of the present invention;
Fig. 5 is an equivalent circuit schematic diagram of a compact filtering device according to another embodiment of the present invention;
Fig. 6 is an equivalent circuit schematic diagram of a compact filtering device according to another embodiment of the present invention;
fig. 7 is an equivalent circuit schematic diagram of a compact filtering device according to another embodiment of the present invention;
Fig. 8 is a schematic structural diagram of a capacitive structure included in the compact filter device 100;
FIG. 9 is a top view of the structure shown in FIG. 8;
fig. 10 shows a schematic projection of a capacitive structure of a variant;
FIG. 11 shows a schematic projection of a capacitive structure of another variant;
Fig. 12 shows a schematic projection of a capacitive structure of another variant;
fig. 13 is a schematic structural diagram of the inductive structure included in the compact filter apparatus 100;
FIG. 14 is a top view of the structure shown in FIG. 13;
FIG. 15 is a top view of another embodiment of an inductive structure;
Fig. 16 is a schematic diagram showing the overall structure of a compact filter device 100 according to an embodiment of the present invention;
Fig. 17 is a graph showing characteristics of insertion loss and return loss of a compact filter apparatus 100 according to an embodiment of the present invention;
fig. 18 is a side view of a compact filter apparatus 100 provided in an embodiment of the present invention;
Fig. 19 shows a schematic structural view of various electronic devices that can be integrated with the compact filter device of any of the foregoing embodiments and modifications thereof;
Detailed Description
In order that the invention may be readily understood, a more complete description of the invention will be rendered by reference to the appended drawings. Preferred embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
It will be understood that when an element or layer is referred to as being "on," "connected to," or "connected to" another element or layer, it can be directly on or connected to the other element or layer or intervening elements or layers may be present. It will be understood that, although the terms first, second, etc. may be used to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first module, component, region, layer or section discussed below could be termed a second module, component, region, layer or section, for example, a first direction could be termed a second direction, and, similarly, a second direction could be termed a first direction, with the first direction being a different direction than the second direction, without departing from the teachings of the present invention.
Spatially relative terms, such as "disposed on," "above," and the like, may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements or features described as "disposed on," "above," and "located above" would then be oriented "under" the other elements or features. Thus, the exemplary terms "disposed on" and "above" can include both an upper and a lower orientation. Furthermore, the device may also include an additional orientation (e.g., rotated 90 degrees or other orientations) and the spatial descriptors used herein interpreted accordingly.
As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. Also, as used herein, the term "and/or" includes any and all combinations of the associated listed items.
Embodiments of the invention are described herein with reference to schematic illustrations that are idealized embodiments (and intermediate structures) of the invention, such that variations of the illustrated shapes due to, for example, manufacturing techniques and/or tolerances are to be expected. Thus, embodiments of the present invention should not be limited to the particular shapes of the regions illustrated herein, but rather include deviations in shapes that result, for example, from manufacturing techniques. The regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the invention.
An embodiment of the present invention provides a compact filter device, and fig. 1 is an equivalent circuit schematic diagram of a compact filter device according to an embodiment of the present invention, and referring to fig. 1, the compact filter device 99 includes a first capacitive structure C1, a second capacitive structure C2, a third capacitive structure C3, a fourth capacitive structure C4, a fifth capacitive structure C5, a sixth capacitive structure C6, a seventh capacitive structure C7, an eighth capacitive structure C8, a first inductive structure L1, a second inductive structure L2, a third inductive structure L3, a first common terminal P1, a second common terminal P2, a third common terminal P3, a fourth common terminal P4, a fifth common terminal P5, a sixth common terminal P6, a first potential terminal D1, a second potential terminal D2, a first signal port S1, and a second signal port S2. The first capacitive structure C1 is disposed on a coupling path between the first common terminal P1 and the second common terminal P2, the second capacitive structure C2 is disposed on a coupling path between the first common terminal P1 and the third common terminal P3, the third capacitive structure C3 is disposed on a coupling path between the second common terminal P2 and the third common terminal P3, the fourth capacitive structure C4 is disposed on a coupling path between the fourth common terminal P4 and the fifth common terminal P5, the fifth capacitive structure C5 is disposed on a coupling path between the fourth common terminal P4 and the sixth common terminal P6, the sixth capacitive structure C6 is disposed on a coupling path between the sixth common terminal P6 and the fifth common terminal P5, the seventh capacitive structure C7 is disposed on a coupling path between the fifth common terminal P5 and the second signal terminal S2, the eighth capacitive structure C8 is disposed on a coupling potential path between the sixth common terminal P6 and the second terminal D2, the first inductive structure L1 is disposed on a coupling potential path between the third common terminal P3 and the fifth common terminal P2, the seventh capacitive structure C7 is disposed on a coupling potential path between the seventh capacitive structure C7 and the third common terminal P2, the seventh capacitive structure C7 is disposed on a coupling potential path between the fifth capacitive structure C7 and the third capacitive structure C2 and the fifth capacitive structure C2.
The second capacitive structure C2 is coupled to the third capacitive structure C3 and the first inductive structure L1 through the third common terminal P3, the third capacitive structure C3 is coupled to the first capacitive structure C1 through the second common terminal P2, the fourth common terminal P4 is coupled to the second common terminal P2, the fifth capacitive structure C5 is coupled to the fourth capacitive structure C4 through the fourth common terminal P4, the fifth capacitive structure C5 is coupled to the sixth capacitive structure C6, the eighth capacitive structure C8 and the second inductive structure L2 through the sixth common terminal P6, the sixth capacitive structure C6 is coupled to the seventh capacitive structure C7 and the third inductive structure L8 through the fifth common terminal P5, the first pixel body 10 comprises one or more dielectric layers arranged along the stacking direction, the first to eighth capacitive structures C1 to C8 and the first to third inductive structures L1 to L3 are at least partially formed inside or on the surface of the first pixel body 10, and the first to eighth capacitive structures C1 to C8 are formed by metallized electrodes. The first, second, third, fourth, fifth, sixth, seventh, eighth and eighth capacitive structures C1, C2, C3, C4, C5, C6, C7, C8 exhibit reactance-capacitance in the operating frequency band of the compact filter device 99. The first inductive structure L1, the second inductive structure L2, the third inductive structure L3 exhibit reactive inductance in the operating frequency band of the compact filter device 99. The first potential end D1 and the second potential end D2 are equipotential and are equipotential with the reference ground. In the design of the filter, the space occupied by the physical structure of the capacitor is limited, and most of the size of the chip is occupied by the inductor, so that the space occupied by the physical implementation of the inductive structure can be effectively reduced by reducing the number of the inductors in the circuit and reducing the equivalent inductance value through the design, and the miniaturization of the filter is facilitated. According to the invention, by performing topological configuration on the first to eighth capacitive structures C1-C8, the compact filter device 99 realizes the frequency response performance of four out-of-band transmission zeros only by using three inductive structures, realizes the frequency response multi-transmission zero characteristic of the filter device without configuring an additional resonator structure, and improves the out-of-band rejection performance of the filter device. Therefore, the compact filter device disclosed by the invention has the advantages of miniaturization and high frequency selection characteristic. Secondly, the required equivalent inductance values of the first inductive structure L1, the second inductive structure L2 and the third inductive structure L3 are smaller than the conventional elliptic function topology, so that the occupied area of a physical structure corresponding to the equivalent inductance value required by the resonance unit is reduced, and the miniaturization of the filter is further realized. Therefore, the compact filter device disclosed by the invention has outstanding miniaturization capability.
Further, the compact filter device 100 of the other embodiment further includes a ninth capacitive structure C9, and referring to fig. 2, the ninth capacitive structure C9 is disposed on the coupling path between the first signal port S1 and the first common terminal P1. In this case, it is advantageous to adjust the impedance matching between the filter means and the outside. In addition, a fourth inductive structure L4 coupled in parallel with the ninth capacitive structure C9 may be disposed on the coupling path between the first signal port S1 and the first common terminal P1 of the compact filter apparatus 100. In this case, it is advantageous to further increase the out-of-band rejection performance of the filtering means.
Further, the compact filter device 100A of the other embodiment further includes a tenth capacitive structure C10 and a third potential end D3, referring to fig. 3, the tenth capacitive structure C10 is disposed on a coupling path between the first common end P1 and the third potential end D3, the tenth capacitive structure C10 is coupled to the ninth capacitive structure C9 and the first capacitive structure C1 through the first common end P1, and the tenth capacitive structure C10 is at least partially formed in or on the surface of the first element body 10. The third potential end D3 is equipotential with the reference ground. In this case, standing waves can be optimized by adjusting the tenth capacitive structure C10, which is advantageous in improving flexibility of circuit impedance matching.
In addition, the fifth inductive structure L5 may be disposed on the coupling path between the first common terminal P1 and the third potential terminal D3 of the compact filter device 100A, where the fifth inductive structure L5 and the tenth capacitive structure C10 are coupled in series or in parallel, which is advantageous for improving the out-of-band rejection performance of the filter device.
Further, the compact filter device 100B includes an eleventh capacitive structure C11 and a fourth potential end D4, and the eleventh capacitive structure C11 is disposed on the coupling path between the first signal port S1 and the fourth potential end D4. Referring to fig. 4, in this case, the eleven capacitive structures C11, the fourth potential end D4, the ninth capacitive structure C9, the tenth capacitive structure C10, and the third potential end D3 form pi-like matching structures, so as to facilitate adjusting the external impedance of the first signal port S1, improve the flexibility of circuit impedance matching, and improve the out-of-band rejection performance of the filtering device.
In addition, a sixth inductive structure L6 may be disposed on the coupling path between the first signal port S1 and the fourth potential end D4 of the compact filter device 100B, where the sixth inductive structure L6 and the eleventh capacitive structure C11 are coupled in series or in parallel, so as to facilitate improving the out-of-band rejection performance of the filter device.
In another modification, referring to fig. 5, an equivalent circuit schematic diagram of the provided compact filter apparatus 100C is shown. In addition to the compact filter device 100, the twelfth capacitive structure C12 is disposed on the coupling path between the third common terminal P3 and the first potential terminal D1, and the twelfth capacitive structure C12 is coupled in series with the first inductive structure L1. In practice, the twelfth capacitive structure C12 may also be coupled in parallel with the first inductive structure L1. In this case it is advantageous to further increase the out-of-band rejection degree of the filtering means. When the twelfth capacitive structure C12 is coupled in parallel with the first inductive structure L1, a seventh inductive structure L7 may be added to the circuit and configured on the coupling path between the third common terminal P3 and the first potential terminal D1, where the seventh inductive structure L7 and the twelfth capacitive structure C12 are coupled in series, as shown in fig. 6, which is beneficial to further improving the out-of-band selection performance of the filtering device.
Similarly, an eighth inductive structure L8 may be disposed on the coupling path between the sixth common terminal P6 and the second potential terminal D2, and the eighth inductive structure L8 and the eighth capacitive structure C8 may be coupled in series. In this case it is advantageous to further increase the out-of-band rejection degree of the filtering means.
In addition, a thirteenth capacitive structure C13 may be added to the compact filter device 100 and disposed between the second common terminal P2 and the fourth potential terminal P4. In this case, the flexibility of circuit impedance matching is advantageously improved by changing the internal impedance of the device by adjusting the specifications of the thirteenth capacitive structure C13.
In another embodiment of the present invention, referring to fig. 7, the compact filtering apparatus 101 includes a ninth capacitive structure C9, a first capacitive structure C1, a second capacitive structure C2, a third capacitive structure C3, a fourth capacitive structure C4, a fifth capacitive structure C5, a sixth capacitive structure C6, a seventh capacitive structure C7, an eighth capacitive structure C8, a fourteenth capacitive structure C14, a first inductive structure L1, a second inductive structure L2, a third inductive structure L3, a ninth inductive structure L9, a first common terminal P1, a second common terminal P2, a third common terminal P3, a fourth common terminal P4, a fifth common terminal P5, a sixth common terminal P6, a first potential terminal D1, a second potential terminal D2, a fifth potential terminal D5, a first signal port S1 and a second signal port S2, the ninth capacitive structure C9 is disposed on a coupling path between the first signal port S1 and the first common terminal P1, the first capacitive structure C1 is arranged on a coupling path between the first common terminal P1 and the second common terminal P2, the second capacitive structure C2 is arranged on a coupling path between the first common terminal P1 and the third common terminal P3, the third capacitive structure C3 is arranged on a coupling path between the second common terminal P2 and the third common terminal P3, the fourth capacitive structure C4 is arranged on a coupling path between the fourth common terminal P4 and the fifth common terminal P5, the fifth capacitive structure C5 is arranged on a coupling path between the fourth common terminal P4 and the sixth common terminal P6, the sixth capacitive structure C6 is arranged on a coupling path between the sixth common terminal P6 and the fifth common terminal P5, the seventh capacitive structure C7 is arranged on a coupling path between the fifth common terminal P5 and the second signal port S2, the eighth capacitive structure C8 is arranged on a coupling path between the sixth common terminal P6 and the second potential terminal D2, the first inductive structure L1 is disposed on a coupling path between the third common terminal P3 and the first potential terminal D1, the second inductive structure L2 is coupled in parallel with the eighth capacitive structure C8, the third inductive structure L3 is coupled in parallel with the seventh capacitive structure C7, the fourteenth capacitive structure C14 is disposed on a coupling path between the fifth common terminal P5 and the second signal terminal S2, the fourteenth capacitive structure C14 is coupled in series with the ninth capacitive structure C9, and the ninth inductive structure L9 is disposed on a common coupling path between the ninth capacitive structure C9 to the fifth potential terminal D5 and the fourteenth capacitive structure C14 to the fifth potential terminal D5. In this case, the ninth capacitive structure C9, the fourteenth capacitive structure C14, the ninth inductive structure L9 and the fifth potential end D5 form a T-like matching structure, so that the external impedance of the first signal port S1 is conveniently adjusted, the flexibility of circuit impedance matching is improved, and the out-of-band selection performance of the filtering device is also improved.
Fig. 8 is a schematic structural diagram of a capacitive structure included in the compact filter device 100. Referring to fig. 8, the first direction x, the second direction y, and the lamination direction z are perpendicular to each other. The first element body 10 is formed by stacking dielectric layers in the stacking direction z, wherein the dielectric layers may be formed of any one or more of silicon, gallium arsenide, silicon carbide, gallium nitride, gallium oxide, diamond, indium phosphide, glass, sapphire, aluminum oxide, aluminum nitride, silicon oxide, polyimide, or a combination thereof. The first to ninth capacitive structures C1-C9 are formed by metallized electrode coupling, partially formed inside or on the surface of the first body 10. The ninth capacitive structure C9 includes an electrode E1, an electrode E2, the electrode E1 being formed above the electrode E2, the electrode E1 and the electrode E2 facing each other and overlapping in projection portions on a plane perpendicular to the stacking direction z, the electrode E1 and the electrode E2 forming the ninth capacitive structure C9 by dielectric layer coupling therebetween, the electrode E2 being for coupling with the first signal terminal S1. The first capacitive structure C1 includes an electrode E3 and an electrode E4, the electrode E3 being formed above the electrode E4, the electrode E3 and the electrode E4 facing each other and overlapping in projection portions on a plane perpendicular to the stacking direction z, the electrode E3 and the electrode E4 forming the first capacitive structure C1 by dielectric layer coupling therebetween, the electrode E3 being connected to the electrode E1 of the ninth capacitive structure C9. The second capacitive structure C2 includes an electrode E12, an electrode E13, the electrode E12 being formed above the electrode E13, the electrode E12 and the electrode E13 facing each other and overlapping in projection portions on a plane perpendicular to the lamination direction z, the electrode E12 and the electrode E13 forming the second capacitive structure C2 by dielectric layer coupling therebetween, the electrode E12 being connected to the electrode E1 of the ninth capacitive structure C9 by an electrode E3. The third capacitive structure C3 includes an electrode E14, an electrode E15, the electrode E14 being formed above the electrode E15, the electrode E14 and the electrode E15 facing each other and overlapping in projection portions on a plane perpendicular to the lamination direction z, the electrode E14 and the electrode E15 forming the third capacitive structure C3 by dielectric layer coupling therebetween, the electrode E14 being connected to the electrode E12 of the second capacitive structure C2, the electrode E15 being connected to the electrode E17 of the third capacitive structure C3 by a conductor. The third capacitive structure C3 includes an electrode E17 and an electrode E16, the electrode E17 being formed above the electrode E16, the electrode E16 and the electrode E17 facing each other and overlapping in projection portions on a plane perpendicular to the lamination direction z, the electrode E16 and the electrode E17 being coupled by a dielectric layer therebetween to form the third capacitive structure C3, the electrode E16 being connected to the electrode E13 of the first capacitive structure C1. The fourth capacitive structure C4 includes an electrode E16 and an electrode E17, the electrode E17 being formed above the electrode E16, the electrode E17 and the electrode E16 facing each other and overlapping in projection portions on a plane perpendicular to the stacking direction z, the electrode E16 and the electrode E17 forming the fourth capacitive structure C4 by dielectric layer coupling therebetween, the electrode E16 being interconnected with the electrode E10 of the fifth capacitive structure C5. The seventh capacitive structure C7 is formed by coupling an electrode E9 and an electrode E11 through a dielectric layer therebetween, the electrode E9 and the electrode E11 facing each other and overlapping in projection portions on a plane perpendicular to the lamination direction z, the electrode E11 being formed below the electrode E9, the electrode E9 being connected to an electrode E17, the electrode E11 being for coupling with the second signal terminal S2. The fifth capacitive structure C5 is formed by coupling the electrode E10 and the electrode E18 through a dielectric layer therebetween, the electrode E18 being formed above the electrode E10, the electrode E10 and the electrode E18 facing each other and overlapping projected portions on a plane perpendicular to the lamination direction z. The sixth capacitive structure C6 includes an electrode E7 and an electrode E8, the electrode E7 being formed above the electrode E8, the electrode E7 and the electrode E8 facing each other and overlapping in projection portions on a plane perpendicular to the lamination direction z, the electrode E7 and the electrode E8 forming the sixth capacitive structure C6 by dielectric layer coupling therebetween, the electrode E7 being interconnected with an electrode E17 of the fourth capacitive structure C4, the electrode E8 being interconnected with an electrode E18 of the fifth capacitive structure C5 by a conductor. The eighth capacitive structure C8 includes an electrode E5 and an electrode E6, the electrode E5 being formed above the electrode E6, the electrode E5 and the electrode E6 facing each other and overlapping in projection on a plane perpendicular to the stacking direction z, the electrode E5 and the electrode E6 forming the eighth capacitive structure C8 by dielectric layer coupling therebetween, the electrode E6 being interconnected with an electrode E18 of the fifth capacitive structure C5, the electrode E5 being adapted to be connected with the second inductive structure L2. The electrodes E1-E18 may be formed of one or more metallized materials of Ag, au, cu, or the like.
Fig. 9 is a top view of the structure shown in fig. 8, and referring to fig. 9 in combination with fig. 8, the projection of the first to ninth capacitive structures C1 to C9 on a plane perpendicular to the stacking direction z includes a first projection section Y1, a second projection section Y2, and a third projection section Y3, the first projection section Y1 and the third projection section Y2 extending in the first direction x, and the second projection section Y3 extending in the second direction Y. The first projection subsection Y1, the second projection subsection Y2 and the third projection subsection Y3 are sequentially connected end to end and are integrally similar to a Z shape. In this case, the ninth capacitive structure C9 coupled to the first signal terminal S1 and the seventh capacitive structure C7 coupled to the second signal terminal S2 are diagonally divided, so that the first signal terminal S1 and the second signal terminal S2 can be spaced apart from each other in the second direction y by a certain distance, which is beneficial to increasing the diversity of the layout. Wherein the second capacitive structure C2 is distant from the eighth capacitive structure C8 in the second direction y, the projection of the second capacitive structure C2 on a plane perpendicular to the lamination direction z is distant from the projection of the eighth capacitive structure C8 on a plane perpendicular to the lamination direction z in the second direction y, in this case, the distance between the second capacitive structure C2 and the eighth capacitive structure C8 is made as large as possible, so that the undesired coupling between them can be reduced, which is advantageous for achieving excellent out-of-band noise suppression.
Fig. 10 shows a schematic projection view of a capacitive structure of a modification, wherein the projections of the first to eighth capacitive structures C1-C8 on a plane perpendicular to the stacking direction z include a fourth projection section Y4, a fifth projection section Y5, the fourth projection section Y4 extending in the first direction x, the fifth projection section Y5 extending from a middle of the fourth projection section Y4 in the second direction Y, and being entirely similar to a "T" shape. In this case, the first capacitive structure C1 coupled to the first signal terminal S1 and the seventh capacitive structure C7 coupled to the second signal terminal S2 may be arranged on the same line in the first direction x.
Referring to fig. 11, further first to eighth capacitive structures C1 to C8 may be arranged to be aligned along the first direction x, and projections Y6 of the faces of the first to eighth capacitive structures C1 to C8 perpendicular to the stacking direction extend along the first direction x, and are generally similar to a "straight" shape, in which case it is advantageous to reduce the size of the physical structure in the second direction Y and to improve miniaturization performance.
In addition, referring to fig. 12, the first to eighth capacitive structures C1 to C8 may also be arranged like an "L", in which case the projection of the first to eighth capacitive structures C1 to C8 on a plane perpendicular to the stacking direction z includes a sixth projection section Y7 and a seventh projection section Y8 connected end to end, the sixth projection section Y7 extending in the second direction Y, the seventh projection section Y8 extending in the first direction x. In this case, the first signal terminal S1 and the second signal terminal S2 may be spaced apart by a certain distance in the second direction y, which is advantageous for increasing the diversity of the layout.
Fig. 13 is a schematic structural diagram of the inductive structure included in the compact filter apparatus 100. Referring to fig. 13, the first direction x, the second direction y, and the stacking direction z are perpendicular to each other. The first inductive structure L1 includes a metal trace G1, a metal trace G2, a metal trace G3, a via V1, and a via V2, where the metal trace G1, the metal trace G2, and the metal trace G3 are formed on different dielectric layers of the first element body 10 and are formed in a shape extending around a point in a spiral form. Metallized via posts V1 and V2 extend in the first body 10 along the stacking direction z, with metal traces G1 and G2 conductively interconnected by via posts V2. The number of winding turns of the metal trace G1, the metal trace G2 and the metal trace G3 is not more than one turn. The third inductive structure L3 includes a metal trace G4, a metal trace G5, a via V3, and a via V4, where the metal trace G4 and the metal trace G5 are formed on different dielectric layers of the first element body 10 and are formed in a shape extending around a point in a spiral form. Metallized via posts V3 and V4 extend in the first body 10 along the stacking direction z, with metal traces G3 and G4 conductively interconnected by via posts V3. The number of winding turns of the metal trace G4 and the metal trace G5 is not more than one turn. The second inductive structure L2 includes a metal trace G7, a metal trace G8, a via V5, and a via V6, where the metal trace G7 and the metal trace G8 are formed on different dielectric layers of the first element body 10 and are formed in a shape extending around a point in a spiral form. Metallized via posts V5 and V6 extend in the first body 10 along the stacking direction z, with metal traces G7 and G8 conductively interconnected by via posts V6. The number of winding turns of the metal trace G7 and the metal trace G8 is not more than one turn. With the Port1 and the Port2 as ports formed on the first inductive structure L1 or the second inductive structure L2 or the third inductive structure L3, the relationship between the voltage and the current between the Port1 and the Port2 can be represented by an admittance matrix [ Y ]' in which the imaginary part of Y11 is smaller than zero, and the first inductive structure L1, the second inductive structure L2 and the third inductive structure L3 represent reactance inductances in the operating frequency band. In other embodiments or variations, the metal traces G1-G8 may also be formed to extend from a point by a straight line, a broken line, an arc, a spiral, or a combination thereof. In other embodiments or variations, the metal traces G1-G8 may also be formed on the surface of the first pixel body.
The first inductive structure L1, the second inductive structure L2 and the third inductive structure L3 are arranged along the first direction x, and the projection of the first inductive structure L1 on the plane perpendicular to the first direction x, the projection of the second inductive structure L2 on the plane perpendicular to the first direction x and the projection of the third inductive structure L3 on the plane perpendicular to the first direction x are at least partially overlapped.
The second inductive structure L2 and the third inductive structure L3 are formed on the same side of the first inductive structure L1, and the second inductive structure L2 and the third inductive structure L3 are respectively disposed along the first direction x with the first inductive structure L1. The second inductive structure L2 and the third inductive structure L3 are arranged along the second direction y. The projection of the first inductive structure L1 on the plane perpendicular to the first direction x coincides with the projection of the second inductive structure L2 on the plane perpendicular to the first direction x, the projection of the first inductive structure L1 on the plane perpendicular to the first direction x coincides with the projection of the third inductive structure L3 on the plane perpendicular to the first direction x, and the projection of the second inductive structure L2 on the plane perpendicular to the second direction y coincides with the projection of the third inductive structure L3 on the plane perpendicular to the second direction y.
Fig. 14 is a top view of the structure shown in fig. 13, and in combination with fig. 13, metal traces G1, G2, G3 formed in different dielectric layers are aligned substantially vertically, and the inductive structure L1 encloses a closed pattern in projection on a plane perpendicular to the stacking direction z. The metal traces G4 and G5 are aligned substantially vertically, and the inductive structure L2 encloses a closed pattern in a projection of a plane perpendicular to the stacking direction z. The metal traces G7 and G8 are aligned substantially vertically, and the inductive structure L3 encloses a closed pattern in a projection of a plane perpendicular to the stacking direction z.
Fig. 15 is a top view of a first embodiment of the inductive structure, where a second inductive structure L2 and a third inductive structure L3 are formed on the same side of the first inductive structure L1, and the second inductive structure L2 and the third inductive structure L3 are respectively disposed along a first direction x with the first inductive structure L1. The second inductive structure L2 and the third inductive structure L3 are arranged along the second direction y. The projection of the first inductive structure L1 on the plane perpendicular to the first direction x coincides with the projection of the second inductive structure L2 on the plane perpendicular to the first direction x, the projection of the first inductive structure L1 on the plane perpendicular to the first direction x coincides with the projection of the third inductive structure L3 on the plane perpendicular to the first direction x, and the projection of the second inductive structure L2 on the plane perpendicular to the second direction y coincides with the projection of the third inductive structure L3 on the plane perpendicular to the second direction y.
Fig. 16 shows a schematic overall structure of a compact filter device 100 according to an embodiment of the present invention. Fig. 17 is a graph showing the insertion loss and return loss characteristics of the compact filter apparatus 100 according to the embodiment of the present invention. The compact filter device 100 produces 4 different transmission zeros outside the passband, with three transmission zeros on the left side of the passband and one transmission zero on the right side of the passband, exhibiting high out-of-band noise rejection characteristics and excellent frequency selective performance.
On the basis of the above embodiments, the second element 11 is further included in still another embodiment of the present invention. With reference to figure 18 of the drawings,
The compact filter device 100C includes a first element 10 and a second element 11. The second element body 11 is formed by stacking dielectric layers in the stacking direction z, wherein the dielectric layers may be formed of any one or more of silicon, gallium arsenide, silicon carbide, gallium nitride, gallium oxide, diamond, indium phosphide, glass, sapphire, aluminum oxide, aluminum nitride, silicon oxide, polyimide, or a combination thereof. The first element 10 and the second element 11 are sequentially arranged in the stacking direction z, the first element 10 is fixed to the second element 11, and a plurality of copper pillars are used as connectors, so that the first element 10 and the second element 11 are electromagnetically coupled. The first inductive structure L1 includes a metal trace G9, a metal trace G10, a metal trace G11, a conductive pillar V7, and a conductive pillar V8, wherein the metal trace G9 and the metal trace G11 are formed on the surface of the first element body 10, the metal trace G10 is formed inside the first element body 10, and the metal trace G12 is formed on the surface of the second element body 11. The metal trace G12 and the metal trace G11 are electrically interconnected by a copper pillar. In addition, the first body 10 and the second body 11 may be interconnected by metal bumps, solder balls, gold wires, or solder bumps.
The embodiment of the invention also provides an electronic device, which comprises the compact filtering device in any embodiment.
Fig. 19 shows a schematic structural diagram of various electronic devices that can be integrated with the compact filter device of any of the foregoing embodiments and modifications thereof. For example, the mobile phone 20, the laptop computer 21, and the fixed location terminal 22 may include a compact filtering device as described herein. The apparatus of fig. 19 is merely exemplary, and other electronic apparatuses may also include any of the compact filtering apparatuses described herein, including but not limited to a music player, a video player, an entertainment unit, a global positioning system-enabled device, a navigation device, a communications device, a mobile phone, a smart phone, a personal digital assistant, a fixed location terminal, a tablet computer, a wearable device, a server, a router, an internet of things device, a laptop computer, or any combination thereof.
The technical features of the above embodiments may be arbitrarily combined, and for brevity, all of the possible combinations of the technical features of the above embodiments are not described, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the invention, which are described in detail and are not to be construed as limiting the scope of the claims. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (33)
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN120785304A true CN120785304A (en) | 2025-10-14 |
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