CN1792126A - Double-sided wiring board and manufacturing method of double-sided wiring board - Google Patents

Abstract

Only one wiring layer (191, 192) is provided on the roughened substrate surfaces (110S) on both surfaces of the core substrate (110) by a semi-additive method. The wirings of the wiring layers on both sides of the core base material are electrically connected through via holes (180) provided on the core base material. The through hole is formed by a through hole formed on the core base material by laser, and the through hole is filled with a conductive part (193) formed by plating. In a state where predetermined terminal portions (170) are exposed, both surfaces of the core base material are covered with solder resist (160). The outer surface of the via hole and the outer surface side of the wiring portion of the wiring layer are planarized by mechanical polishing, chemical mechanical polishing, or the like.

Description

Double-sided wiring board, method of manufacturing double-sided wiring board, and multilayer wiring board

technical field

The present invention relates to providing wiring layers on both surfaces of a core substrate, electrically connecting the wiring layers on both surfaces through through holes provided on the core substrate, and arranging resistors covering the two surfaces in a state where predetermined terminals are exposed. Solder double-sided wiring substrate and its manufacturing method.

Background technique

In recent years, in order to cope with the increasing miniaturization and weight reduction of electronic equipment, multilayer printed circuit boards (hereinafter also referred to as multilayer wiring boards) can accommodate fine Printed substrates with wiring patterns have been developed, and various core substrates using wiring layers on both sides of the core base material have been developed. On both sides of the core base material, a combination layer composed of an insulating layer and a wiring layer in sequence is further processed. There are also various methods for manufacturing a build-up type multilayer wiring board (hereinafter also referred to as a build-up board) formed by lamination.

In addition, in order to cope with the miniaturization of electronic equipment, high-density packaging of semiconductor components mounted in electronic equipment is required. As the performance of semiconductor devices is required, semiconductor chips are mounted in a flip-chip structure on wiring circuit boards such as motherboards. The flip-chip method on the chip is receiving attention.

Among them, a build-up type multilayer wiring board (build-up board) is also used as an interposer, and a semiconductor chip is mounted on the double-sided wiring board by flip-chip or wire bonding.

For example, as shown in FIG. 9 , the semiconductor chip 20 is flip-chip bonded and mounted on the solder resist 12 of the multilayer wiring board 10 by using solder bumps 21 in a flip-chip manner, and the underfill 30 is filled into the semiconductor chip 20 and the plurality of solder resists. The semiconductor chip 20 , the solder bump 21 , and the wiring member 11 are sealed with the sealing resin 40 in the spaces between the solder resists 12 of the multilayer wiring substrate 10 .

In addition, the so-called flip chip is formed by installing Au or connection bumps called solder bumps on the bare chip. According to the requirements of multi-pin, high-frequency characteristics and miniaturization, the terminals are usually arranged in a plane, and the mountability is also low. For narrow spacing.

The flip-chip method was implemented by IBM in 1963. It is connected to the wiring electrodes of the circuit substrate through the bumps of the flip-chip. Since it is electrically connected to the chip holder at one time, even if the tube of the chip The increase in the number of pins will not increase the time required for assembly, and it can be said to be a good connection method for multi-pins.

Here, as an example, a method of manufacturing a core substrate in a conventional build-up substrate will be briefly described with reference to the drawings.

First, through-holes 715 are mechanically formed using a drill in copper sheet laminate 710 in which copper foil 712 is disposed on both surfaces of core base material 711 . (Figure 7(a))

Next, clean the inside of the through hole 715, form a copper plating layer 720 with a predetermined thickness on the entire surface by electroless plating, make the inside of the through hole 715 (FIG. 7(a)) conductive, and then coat the entire surface with electrolytic copper plating. A copper plating layer 730 is formed with a predetermined thickness to electrically connect the inside of the through hole 715 . (Figure 7(b))

Next, a filling material 740 made of a conductive metal material or a non-conductive paste is filled in the through hole 715, and a surface smoothing treatment by physical polishing is performed. (Figure 7(c))

Then, a film-forming process is performed with a dry film resist or a liquid resist, and predetermined pattern exposure and development are performed to form a resist pattern. Next, the copper plating layer 730, the electroless copper 720, and the copper foil 712 are pattern-etched using the resist pattern as a mask to form a plating through-hole portion 750 and desired wiring (not shown), thereby forming a core substrate 760. . (Figure 7(d))

Then, on both surfaces of the core substrate 760 (FIG. 7(d)) manufactured in this way, high-density wiring is formed by a build-up method to form a build-up multilayer wiring board. This built-up multilayer wiring board is used as an interposer for semiconductor assembly, for example, as shown in FIG. 8 .

Multilayer wiring substrate 810 shown in FIG. 8 can be manufactured as follows.

That is, glass epoxy resin (Prepreg, prepreg material) and resin insulating layers 851, 851a are formed on both sides of the core substrate 760 (FIG. 7(d)), and a carbon dioxide gas laser or a UV-YAG laser is used. Small-diameter holes are formed at predetermined positions of the insulating layers 851 and 851a to expose desired portions of the plated through holes 750 ( FIG. 7( d )) and wiring on the core substrate 760 .

Next, after cleaning, a conductive layer is formed in the hole by electroless plating, and vias 871 are formed on the exposed portion including the hole by electrolytic plating to form a first-layer composite layer.

This operation is repeated to form a plurality of built-up layers (two layers on both sides in the illustrated example), and a multilayer wiring board 810 is manufactured.

Next, on the buildup layer on the semiconductor chip mounting side, required wiring and a connection liner 865 for semiconductor chip mounting are formed.

Next, the connection liners 865 and 855 are opened, and a solder resist 885 is disposed.

In such a multilayer wiring board 810 , a semiconductor chip 890 can be mounted on a connection liner 865 for mounting the semiconductor chip via metal bumps 891 such as solder.

In addition, the external connection terminals 880 on the rear side of the multilayer wiring board 810 may be mounted on a printed wiring board (motherboard or the like).

In addition, FIG. 8 is a diagram schematically showing a part of the multilayer wiring board.

Of course, a semiconductor chip may be connected to the built-up multilayer wiring board shown in FIG. 8 by wire bonding, and the multilayer wiring board may be used as an interposer for semiconductor assembly.

In the core substrate 760 formed by the conventional method shown in FIG. 7 , through-holes are formed by a mechanical drill and wiring is formed by a metal surface etching method, so it is difficult to make a ratio of 150 μm/300 μm in the diameter of the through-hole/diameter of the drill edge. Furthermore, since the lines are formed by the metal surface etching method, it is difficult to manufacture lines/spaces of 50 μm/50 μm or less.

Since only such a core substrate 760 cannot increase the density of wiring, in reality, by providing two layers or one layer of composite layers as shown in FIG. Draw around boundaries. However, the number of steps in the manufacture of such a built-up multilayer wiring board is large, which directly leads to an increase in cost.

Furthermore, in a wiring board as shown in FIG. 8 , power loss is large in the through hole, and it is not suitable for applications requiring high frequencies.

Refer to Japanese Patent Application No. 2002-299665 (JP 0000-0000).

As described above, using the core substrate formed by the conventional metal surface etching method as it is as a wiring substrate for semiconductor assembly has problems in wiring routing and is not practical. At present, although a built-up multilayer wiring board having built-up layers formed on both sides of a core substrate is used as a wiring board for assembly, such a built-up multilayer wiring board requires many and complicated manufacturing steps, and the cost is also high. Power loss is large in the through hole, and it is not suitable for applications requiring high-frequency input and output, and a corresponding solution is required.

Contents of the invention

The present invention is to deal with this problem, and its object is to provide a wiring for assembly that can cope with high-density mounting, has better productivity than conventional multilayer wiring boards, and can solve the power loss problem of high-frequency input and output. substrate.

In particular, the object is to be able to reliably provide a configuration in which lateral slip is less likely to occur during wire bonding or flip-chip bonding in semiconductor chip assembly, without a recess (also called a groove) on a filled-type through-hole, and to enable A wiring board for assembly with uniform variation in wiring layer thickness.

Also, an object is to provide a wiring substrate manufacturing method for manufacturing such a wiring substrate.

The double-sided wiring substrate of the present invention is characterized in that it has: a core base material with roughened base material surfaces on both sides; wiring layers provided on each base material surface of the core base material; The through-holes on the substrate conduct conduction.

The double-sided wiring board of the present invention is characterized in that the through-holes are filled with vias.

The double-sided wiring board of the present invention is characterized in that a solder resist is provided on each wiring layer provided on both surfaces of the core base material so that the terminal portion is exposed.

The double-sided wiring board of the present invention is characterized in that the outer surfaces of the wiring layers provided on both sides of the core base material are planarized together with the outer surfaces of the conduction portions of the through-holes.

The double-sided wiring board of the present invention is characterized in that the surface roughness of the base material surfaces on both sides of the core base material is in the range of 2 μm to 10 μm in each 10-point average roughness RzJIS.

The double-sided wiring board of the present invention is characterized in that the double-sided wiring board is a double-sided wiring board for semiconductor packaging.

The double-sided wiring board of the present invention is characterized in that the terminal portion on one side of the core substrate is a connection liner for connection to a semiconductor chip, and the terminal portion on the other side is an external connection terminal for connection to an external circuit.

The double-sided wiring board of the present invention is characterized in that the terminal portions provided on both surfaces of the core base material have Ni plating and Au plating arranged in this order from the inner side to the outer side.

In addition, the planarization process here is to make the outer surfaces of the wiring portions of the wiring layers including the outer surfaces of the through-holes all on the same plane and become a plane. This planarization treatment is performed by mechanical polishing or chemical mechanical polishing. In the case of a wiring board for packaging, the position of each surface within the board is limited within a range of deviation within ±5 μm from the same plane.

In addition, the 10-point average roughness RzJIS here is defined and expressed according to JIS B0601-2001.

Thus, only the reference length is extracted from the roughness curve in the direction of its mean line. The average value of the absolute values of the elevations of the peaks from the highest peak to the fifth highest peak measured from the mean line of the extracted part in the direction of longitudinal magnification, and from the lowest valley bottom to the fifth lowest The average value of the absolute value of the elevation of the valley bottom is summed, and the summed value expressed in micrometers (μm) is called 10-point average roughness RzJIS, and here, the reference length is 0.25 mm.

Furthermore, in the above-mentioned aspect, by providing the solder resist on both surfaces of the core substrate with the terminal portions exposed, openings can be provided in the solder resist to expose only predetermined terminal portion regions. Furthermore, the solder resist may be provided so as to expose a predetermined terminal portion region and provide an opening over the entire semiconductor chip mounting region of the wiring board.

The double-sided wiring board of the present invention is characterized in that a conductive plated layer is provided on the inner surface of the through hole, and a resist is filled in the through hole.

The double-sided wiring board of the present invention is characterized in that a solder resist is provided on each wiring layer provided on both surfaces of the core base material so that the terminal portion is exposed.

The double-sided wiring board of the present invention is characterized in that the surface roughness of the base material surfaces on both sides of the core base material is in the range of 2 μm to 10 μm in each 10-point average roughness RzJIS.

The double-sided wiring board of the present invention is characterized in that the double-sided wiring board is a double-sided wiring board for semiconductor packaging.

The double-sided wiring board of the present invention is characterized in that the terminal portion on one side of the core substrate is a connection liner for connection to a semiconductor chip, and the terminal portion on the other side is an external connection terminal for connection to an external circuit.

The double-sided wiring board of the present invention is characterized in that the terminal portions provided on both surfaces of the core base material have Ni plating and Au plating arranged in this order from the inner side to the outer side.

In addition, the 10-point average roughness RzJIS here is defined and expressed according to JIS B0601-2001.

Thus, only the reference length is extracted from the roughness curve in the direction of its mean line. The average value of the absolute values of the elevations of the peaks from the highest peak to the fifth highest peak measured from the mean line of the extracted part in the direction of longitudinal magnification, and from the lowest valley bottom to the fifth lowest The average value of the absolute value of the elevation of the valley bottom is summed, and the summed value expressed in micrometers (μm) is called 10-point average roughness RzJIS, and here, the reference length is 0.25 mm.

The double-sided wiring board of the present invention is characterized in that the cross-section of the through-hole of the core base material has a substantially trapezoidal shape.

The double-sided wiring board of the present invention is characterized in that the through-hole of the core base material has a diameter of the through-hole that decreases from one end to the inside, has a first trapezoidal shape in cross section, and has a second trapezoidal shape that increases in diameter from the inside to the other end. .

The double-sided wiring board of the present invention is characterized in that the first trapezoidal shape of the through hole is larger than the second trapezoidal shape.

The method for manufacturing a double-sided wiring substrate of the present invention is used to manufacture a core base material having roughened base material surfaces on both sides, and wiring layers provided on each base material surface of the core base material, and each wiring layer is connected to each other via A double-sided wiring substrate provided on a core base material for conduction through holes, characterized in that Cu foil having a rough surface is pressure-bonded and laminated on the core base material so that the rough surface faces the insulating resin film side. The process of both sides of the insulating resin film; the process of etching and removing the Cu foil on the insulating resin film, copying the rough surface of the Cu foil on both sides of the insulating resin film to manufacture the core base material; The process of forming through-holes on the base material; the process of applying electroless plating to both sides of the core base material and the inner surface of the through-hole to form an electroless plating layer; forming a resist pattern on both sides of the core base material and using the electroless plating layer as The electrolytic Cu plating is performed on the conductive layer to form an electrolytic Cu plating layer; after the resist is removed, the unnecessary electroless plating layer exposed to the outside is removed by flash etching.

The method of manufacturing a double-sided wiring board according to the present invention is characterized in that, when forming the electrolytic Cu plating layer, the via portion filled in the through hole is formed by the electrolytic Cu plating layer.

The method of manufacturing a double-sided wiring board according to the present invention is characterized in that the inner surface of the through hole is desmeared before forming the electroless plating layer.

The method of manufacturing a double-sided wiring board according to the present invention is characterized in that the electrolytic Cu plating is subjected to mechanical polishing or chemical mechanical polishing to planarize the electrolytic Cu plating.

The method for manufacturing a double-sided wiring board according to the present invention is characterized in that it further comprises: after removing the electroless plating layer by flash etching, applying a photosensitive solder resist to the electrolytic Cu plating layer on both sides of the core base material to form a solder resist layer. The process of mask exposure and development of the solder resist layer to expose a part of the electrolytic Cu plating layer to form a terminal portion.

The method of manufacturing a double-sided wiring board according to the present invention is characterized in that the rough surface of the Cu foil crimped to the insulating resin film has a surface roughness of 2 μm to 10 μm in 10-point average roughness RzJIS.

The manufacturing method of the double-sided wiring substrate of the present invention is characterized in that a baffle that does not reflect laser light excessively is arranged on one surface of the core substrate, and laser irradiation is performed from the other surface of the core substrate to form a through hole on the core substrate. hole.

The method of manufacturing a double-sided wiring board according to the present invention is characterized in that Ni plating and Cu plating are sequentially performed on the surface of the terminal portion.

The manufacturing method of the double-sided wiring board of the present invention is characterized in that, when forming the electrolytic Cu plating layer, a dry film resist is provided on both surfaces of the core substrate, and mask exposure and development are performed to form a resist pattern.

The method for manufacturing a double-sided wiring board according to the present invention is characterized in that it further comprises: after removing the electroless plating layer by flash etching, applying a photosensitive solder resist to the electrolytic Cu plating layer on both sides of the core base material to form a solder resist layer. , and the process of filling the through hole with the insulating resin part; mask exposure and development of the solder resist layer to expose a part of the electrolytic Cu plating layer, and the process of forming the terminal part.

The method of manufacturing a double-sided wiring board according to the present invention is characterized in that the rough surface of the Cu foil crimped to the insulating resin film has a surface roughness of 2 μm to 10 μm in 10-point average roughness RzJIS.

The manufacturing method of the double-sided wiring substrate of the present invention is characterized in that a baffle that does not reflect laser light excessively is arranged on one surface of the core substrate, and laser irradiation is performed from the other surface of the core substrate to form a through hole on the core substrate. hole.

The method of manufacturing a double-sided wiring board according to the present invention is characterized in that Ni plating and Cu plating are sequentially performed on the surface of the terminal portion.

The manufacturing method of the double-sided wiring board of the present invention is characterized in that, when forming the electrolytic Cu plating layer, a dry film resist is provided on both surfaces of the core substrate, and mask exposure and development are performed to form a resist pattern.

Here, the terminal portion, the land portion, the wiring for connection, and the like are collectively referred to as a wiring portion. The term "wiring" may include terminal parts and land parts in addition to wiring for connection.

By flattening the electrolytic Cu plating layer, the surface sides of the electrolytic Cu plating layer are all on the same plane and are flat. This flattening is performed by mechanical polishing or chemical mechanical polishing, and in the case of a wiring substrate for assembly, the position of each surface within the substrate is limited within ±5 μm from the same plane.

By having such a structure, the double-sided wiring board of the present invention can provide a package for high-density mounting, which is superior in productivity and high-frequency input/output power loss compared with conventional multilayer wiring boards. Wiring substrate.

Specifically, the through hole has a through hole formed in the core base material by laser, and the diameter of the through hole is 150 μm or less.

Of course, through-holes larger than 150 μm may also be formed.

In addition, when the through-hole is formed in the core base material by laser, the cross-sectional trapezoidal shape can be formed in which the diameter of the hole on the side irradiated by the laser is larger and the diameter of the hole on the side opposite to the side irradiated by the laser is smaller. When filling the through-hole of the core base material by plating, the filling becomes easy, and the through-hole area is also flattened by plating, so the through-hole area can also be made flat, and the solder resist can be arranged on both sides. superior. As a result, by forming the through-holes in the core base material by laser, the workability in the production is improved, and the quality is also good.

In addition, since the through hole of the through hole is filled with the conducting portion formed by plating, and the through hole region is also flat, the terminal portion (also referred to as a liner) can be provided in the through hole region.

That is, the design of the liner on the via hole can be performed, the degree of freedom of design can be increased, and the wiring density can be increased.

In conventional core substrates, a mechanical drill is used to produce through-holes, and the diameter cannot be reduced to 150 μm or less.

In addition, both surfaces of the core base material can be roughened, and wiring can be formed by a semi-additive method. By forming wiring by a semi-additive method, fine, high-density wiring can be produced.

Furthermore, when the through-hole region is also flattened and the wiring layer is multilayered without applying a solder resist, it is possible to reliably arrange vias (offset holes) on flat through-holes by the combination method. In addition, it is possible to reliably perform a multilayering method in which copper foil is laminated on the wiring layer side of the core base material via an insulating layer, the copper foil is processed by photolithography to form a wiring layer, and bumps are used as gaps between wiring layers. connection mechanism.

Accordingly, when used as a double-sided wiring board for semiconductor packaging, routing of wiring that cannot be performed when the core board shown in FIG. 7( d ) is used as an interposer for semiconductor packaging can be performed. The double-sided wiring board of the present invention can be used instead of a wiring board for assembly of a built-up multilayer wiring board in which one or more buildup layers are arranged.

In particular, the outer surface side of the wiring portion of each wiring layer including the outer surface of the via hole is planarized by mechanical polishing or chemical mechanical polishing. In this way, lateral slip is less likely to occur during wire bonding or flip-chip bonding in semiconductor chip assembly, and a structure in which there is no depression (groove) in the filled through hole can be made, and the variation in wiring thickness can be reduced. uniform.

In addition, as the 10-point average thickness RzJIS of the roughened core base material surface on both sides of the core base material, it is preferable because the range of 2 μm to 10 μm is a practical level.

When the RzJIS is smaller than 2 μm, the adhesion strength with the wiring is insufficient. If the RzJIS is larger than 10 μm, the unevenness of the surface of the core base material will affect the shape of the wiring, which will become an important factor hindering the miniaturization of the wiring. And in the manufacture of electrolytic Cu foil The load also increases.

The double-sided wiring board of the present invention is better in terms of productivity than a built-up multilayer wiring board.

As the double-sided wiring board of the present invention, one surface has a connection liner for mounting a semiconductor chip by flip-chip or wire bonding, and the other surface has an external connection for connecting to an external circuit. way of the terminal.

In this case, an opening is provided so that only a predetermined terminal portion is exposed, and a predetermined terminal portion region is exposed and an opening is provided over the entire semiconductor chip mounting region of the wiring board.

In particular, the through-hole region is flat, and direct chip mounting can be performed without providing a solder resist.

When loading direct chips, since there is no restriction of chip side bumps, it is beneficial to flip-chip connection. During die attach, air bubbles will not be trapped on the side of the through hole.

Usually, Ni plating and Au plating are sequentially applied to the terminal portion.

In addition, in the double-sided wiring board of the present invention, a build-up layer may be formed on both sides of the double-sided wiring board in which no solder resist is provided. In this way, the wiring on the core substrate becomes high-density, and wiring can also be made on the via holes, so that a high-density wiring substrate can be configured with a smaller number of layers than conventionally.

In the present invention, via holes are formed in the core substrate by laser. Since the positional accuracy of the laser processing machine is very good, it is possible to reduce the edge of the pad diameter to accommodate the positional deviation between the pad and the through hole, and to cooperate with the reduction in the diameter of the through hole, the diameter of the pad can be reduced to 250 μm or less.

In addition, since a specific method for ensuring the adhesive strength between the resin layer and the wiring is known, it is possible to adopt a semi-additive process.

A desired rough surface can be formed by duplicating the shape of the rough surface of the electrolytic Cu foil formed on both surfaces of the insulating resin layer for a core base material.

Thus, it was confirmed that 20 μm/20 μm can be formed as the minimum line/space in the double-sided wiring board of the present invention.

The manufacturing method of the double-sided wiring board of the present invention is by making such a structure, specifically, wiring is provided on both sides of the core substrate, and the core Wiring electrical connections on both sides of the substrate. In addition, a solder resist covering both surfaces of the core base material is disposed in a state where predetermined terminal portions are exposed. The through hole has a through hole formed in the core base material by laser, through hole plating is applied to the through hole, and the through hole is filled with the plating. Wiring is formed on the core substrate by a semi-additive method.

Accordingly, it is possible to provide a method of manufacturing a wiring board for assembly that can support high-density packaging and is superior in productivity and quality compared to conventional built-up multilayer wiring boards.

Specifically, the desired rough surface can be formed by duplicating and forming the rough surface shape of the electrolytic Cu foil on both surfaces of the insulating resin layer for the core base material. Wiring is formed by ensuring sufficient adhesion strength with the core base material by a semi-additive method.

In addition, the above-mentioned rough surface forming method of the core base material has fewer restrictions on materials applicable to it, and the selection range of the resin used as the insulating resin layer for the core base material can be expanded.

In addition, through-holes for through-holes are formed in the core base material by laser. The trapezoidal cross-sectional shape of the through-hole facilitates filling when the through-hole is filled with a plating layer. Also, the surface of the through-hole region can be formed sufficiently flat.

In particular, planarization is performed by mechanical polishing or chemical mechanical polishing after the selective plating step and before removing the resist, or after removing the resist but before quickly etching away unnecessary electroless plating. Through this flattening process, the cross-sectional shape of the wiring portion, liner portion, and via portion formed by plating in the selective plating step is flattened. Specifically, with respect to the outer surfaces of the wiring portion, the liner portion, and the via portion, deviation from the same plane can be suppressed within ±5 μm.

The wiring portion and the liner portion formed by plating in the selective plating process have a semi-cylindrical cross-sectional shape on the outside, but they may be substantially rectangular. In addition, the cross-sectional shape of the filled through-hole portion formed by plating in the selective plating step is such that the central portion is recessed toward the substrate side, but it may be flat.

As described above, by performing mechanical polishing or chemical mechanical polishing, lateral slip is less likely to occur during wire bonding or flip chip bonding in semiconductor chip assembly, and it is possible to eliminate depressions (grooves) in filled via holes. Also, the variation in wiring thickness can be made uniform.

When mechanical polishing or chemical mechanical polishing is not performed, as shown in FIG. 10(a), FIG. 10(b), and FIG. The cross-sectional shape is a semi-cylindrical shape on the outer surface side. At this time, the cross-sectional shape of the through hole portion 930 including the pad portion is such that the central portion is recessed toward the substrate side, and these surface portions are mechanically polished or chemically mechanically polished, as shown in FIGS. 10( a1 ) and 10 ( b1 ), respectively. As shown in FIG. 10( c1 ), the outer surface sides of the connection wiring 910 , the terminal portion (also referred to as a liner) 920 , and the through hole portion 930 are flat.

In addition, here, a terminal part, a pad part, wiring for connection, etc. are collectively called a wiring part, and when called a wiring part, a terminal part and a pad part are also included besides a wiring for connection.

In addition, in the manufacturing method of the double-sided wiring board of the present invention, there are few depressions on the through-hole region, especially in the case of performing mechanical polishing or chemical mechanical polishing, no depression in the through-hole region will occur, and the The solder resist is arranged on both surfaces flatly. Using the double-sided wiring board manufactured by this manufacturing method, when a semiconductor chip is mounted thereon, there is no problem that air bubbles enter between it and the chip to impair the reliability of the semiconductor device. Therefore, the load in the production process can be reduced.

By having such a structure, the double-sided wiring board of the present invention can provide a wiring board for assembly that can support high-density mounting and is better in productivity than conventional built-up multilayer wiring boards.

Specifically, the via hole has a through hole formed in the core base material by laser, and has a diameter of 150 μm or less.

Of course, through-holes larger than 150 μm may also be formed.

In addition, when the through-hole is formed in the core base material by laser, the cross-sectional shape of the through-hole can be formed into a trapezoidal shape with a larger diameter on the side irradiated with the laser and a smaller diameter on the side opposite to the side irradiated by the laser. Therefore, when filling the solder resist into the through-holes of the core base material, filling is relatively easy. In addition, the solder resist can be arranged on both surfaces of the wiring board in a very flat manner with less depression in the through-hole region. As a result, by forming the through-holes in the core base material by laser, the workability in the production is good, and a high-quality surface can also be obtained.

In conventional core substrates, a mechanical drill was used to manufacture via holes, and the diameter could not be reduced to 150 μm or less.

In addition, both sides of the core base material can be roughened, and wiring can be formed by a semi-additive method. In addition, by forming wirings by the semi-additive method, it is possible to manufacture fine and high-density wirings.

Accordingly, when used as a double-sided wiring board for semiconductor packaging, it is possible to route wiring that cannot be performed when the core board is used as an interposer for semiconductor packaging as shown in FIG. 7( d ). In addition, the double-sided wiring board of the present invention can be used instead of a wiring board for packaging of a built-up multilayer wiring board provided with one or more built-up layers.

The 10-point average thickness RzJIS of the surface of the roughened core base material on both sides of the core base material is preferably in the range of 2 μm to 10 μm, which is a practical level.

When the RzJIS is smaller than 2 μm, the adhesion strength with the wiring is insufficient. If the RzJIS is larger than 10 μm, the unevenness of the surface of the core base material will affect the shape of the wiring, which will become an important factor hindering the miniaturization of the wiring. And in the manufacture of electrolytic Cu foil The load also increases.

Of course, the double-sided wiring board of the present invention is better in terms of productivity than the built-up multilayer wiring board.

As the double-sided wiring board of the present invention, one surface has a connection liner for mounting a semiconductor chip by flip-chip or wire bonding, and the other surface has an external connection for connecting to an external circuit. way of the terminal.

Usually, Ni plating and Au plating are sequentially applied to the terminal portion.

In the present invention, the through hole is formed on the core base material by laser. Since the position accuracy of the laser processing machine is very good, it is possible to reduce the edge of the pad diameter used to accommodate the positional deviation between the pad and the through hole, and match the through hole. The downsizing of the pad diameter can make the pad diameter less than 250μm.

In addition, since a specific method for ensuring the adhesive strength between the resin layer and the wiring is known, it is possible to adopt a semi-additive process.

A desired rough surface can be formed by duplicating the shape of the rough surface of the electrolytic Cu foil formed on both surfaces of the insulating resin layer for a core base material.

Thus, it was confirmed that 20 μm/20 μm can be formed as the minimum line/space in the double-sided wiring board of the present invention.

The method for manufacturing a double-sided wiring board according to the present invention can manufacture a double-sided wiring board in which wiring is provided on both sides of a core base material, and the wiring on both sides of the core base material is electrically connected via a through hole provided on the core base material. , and a solder resist covering both surfaces of the core base material is disposed in a state in which predetermined terminal portions are exposed. The through hole has a through hole formed in the core base material by laser, through hole plating is applied to the through hole, and the through hole is filled with the above-mentioned insulating resin portion. Wiring is formed on the core substrate by a semi-additive method.

Specifically, by copying and forming the shape of the rough surface of the electrolytic Cu foil on both surfaces of the insulating resin layer for the core base material, a desired rough surface can be formed. Wiring is formed by a semi-additive method.

In addition, through-holes for through-holes are formed in the core base material by laser. The trapezoidal cross-sectional shape of the through-hole facilitates filling of the through-hole with solder resist. Also, the surface of the through-hole region can be formed sufficiently flat.

In addition, the selection range of the resin used as the insulating resin layer for the core base material has been expanded.

Accordingly, it is possible to provide a method of manufacturing a wiring board for assembly that can support high-density packaging and is superior in productivity and quality compared to conventional built-up multilayer wiring boards.

The multilayer wiring board of the present invention is characterized in that it has: a double-sided wiring board, a core base material having roughened base material surfaces on both sides, and a wiring layer provided on each base material surface of the core base material, each wiring The layers are connected to each other through a through hole provided on the core substrate; an additional wiring substrate is provided on one side of the double-sided wiring substrate through an insulating resin portion; the additional wiring substrate has an additional core substrate having substrate surfaces on both sides, and The additional wiring layers provided on the surface of each base material of the additional core base material are electrically connected to each other through the additional through-holes provided on the additional core base material.

The multilayer wiring board of the present invention is characterized in that the double-sided wiring board and the additional wiring board are connected via bumps.

The multilayer wiring board of the present invention is characterized in that the bumps are provided at positions corresponding to the through holes of the double-sided wiring board.

The multilayer wiring board of the present invention is characterized in that the through holes of the double-sided wiring board are filled with vias.

The multilayer wiring board of the present invention is characterized in that it has: a double-sided wiring board, a core base material having roughened base material surfaces on both sides, and a wiring layer provided on each base material surface of the core base material, each wiring The layers are connected to each other through the through-hole provided in the core base material, and the additional wiring board is provided on both sides of the double-sided wiring board through the insulating resin part.

The multilayer wiring board of the present invention is characterized in that an additional insulating resin portion is provided on each additional wiring layer in a state in which the additional terminal portion is exposed.

Description of drawings

Fig. 1(a) is a partial cross-sectional view showing a first embodiment of a double-sided wiring board of the present invention.

FIG. 1( b ) is a diagram showing a modified example of the first embodiment shown in FIG. 1( a ).

2( a ) to 2( g ) are process sectional views showing a part of the manufacturing process of the first embodiment shown in FIG. 1( a ).

3( a ) to 3( d ) are process cross-sectional views showing steps subsequent to FIGS. 2( a ) to 2( g ).

4(a) to 4(f) are process cross-sectional views showing a part of the manufacturing process of the comparative example.

5( a ) to 5( g ) are process cross-sectional views showing steps subsequent to FIGS. 4( a ) to 4( f ).

6( a ) to 6( d ) are process cross-sectional views showing steps following FIGS. 5( a ) to 5( g ).

7( a ) to 7 ( d ) are process cross-sectional views of a conventional method of manufacturing a core substrate.

8 is a schematic cross-sectional view of a conventional multilayer wiring board.

9 is a schematic cross-sectional view showing a semiconductor package using a multilayer wiring board.

10(a) to 10(c) are diagrams showing cross-sectional shapes before mechanical polishing.

Fig. 10(a1) to Fig. 10(c1) are diagrams showing respective cross-sectional shapes after corresponding mechanical polishing.

Fig. 11(a) is a partial cross-sectional view showing a second embodiment of the double-sided wiring board of the present invention.

Fig. 11(b) is a diagram showing a modified example of the second embodiment shown in Fig. 11(a).

12( a ) to 12( g ) are process cross-sectional views showing a part of the manufacturing process of the embodiment example shown in FIG. 11( a ).

13( a ) to 13( d ) are process sectional views showing the steps following FIGS. 12( a ) to 12( g ).

14(a) to 14(f) are process cross-sectional views showing a part of the manufacturing process of the comparative example.

15( a ) to 15( d ) are process sectional views showing the steps following FIGS. 14( a ) to 14( f ).

Fig. 16 is a diagram showing a modified example of a through-hole provided in a core base material.

Fig. 17 is a diagram showing a multilayer wiring board of the present invention.

Fig. 18 is a diagram showing another multilayer wiring board.

Detailed ways

A first embodiment of the present invention will be described with reference to the drawings.

Fig. 1 (a) is a partial sectional view showing the first embodiment of the double-sided wiring board of the present invention; Fig. 1 (b) is a diagram showing a modified example of the first embodiment shown in Fig. 1 (a); Fig. 2 It is a process sectional view showing a part of the manufacturing process of the first embodiment shown in FIG. 1( a); FIG. 3 is a process sectional view showing a process following the figure; FIG. 4 is a process sectional view showing a part of the manufacturing process of a comparative example; Fig. 5 is a process sectional view showing the process of following Fig. 4 (; and Fig. 6 is a process sectional view showing the process of following Fig. 5; Fig. 10 is a figure for explaining the cross-sectional shape of each part of the mechanical grinding process; Fig. 10 (a ), FIG. 10(b), and FIG. 10(c) represent the cross-sectional shape before mechanical grinding; FIG. 10(a1), FIG. 10(b1), and FIG. 10(c1) represent the corresponding cross-sectional shape after mechanical grinding, respectively.

In Fig. 1 to Fig. 6 and Fig. 10, the symbol 110 is the core substrate, the symbol 110H is the through hole of the through hole, the symbol 110S is the surface of the substrate, the symbol 115 is the electrolytic Cu foil, the symbol 120 is the laser, and the symbol 130 is the non- Electrolytic plating, reference numeral 140 is resist, reference numeral 145 is opening, reference numeral 150 is electrolytic Cu plating, reference numeral 160 is solder resist, reference numeral 165 is opening, and reference numeral 170 is lining for connection (also referred to simply as "terminal part") , the symbol 170a is the external connection liner (also referred to simply as "terminal part"), the symbol 171 is Ni plating, the symbol 172 is Au plating, the symbols 175 and 175a are terminal parts, the symbol 180 is a through hole, and the symbols 191 and 192 are Wiring, reference numeral 193 is a conducting portion (of a through hole), reference numeral 210 is a core base material, reference numeral 211H is a through hole (of a through hole), reference numeral 215a is an electrolytic Cu foil, and reference numeral 215 is an electrolytic Cu foil thinned by etching. Foil, reference numerals 230 and 235 are electroless plating layers, reference numerals 240 and 245 are electrolytic Cu plating layers, reference numeral 250 is insulating ink cured product (resin ink cured product), reference numeral 260 is resist, reference numeral 265 is opening, and reference numeral 270 is Solder resist, number 275 is opening, number 280 is through hole, number 291, 292 is wiring, number 293 is conduction part of through hole, number 295, 295a is terminal part, number 296 is Ni plating, and number 297 is gold plating , the reference numerals 910 and 910a are wiring for connection, the reference numerals 920 and 920a are terminal parts (also known as lining layers), the reference numerals 930 and 930a are through-hole parts, and the reference numerals 931 are depressions (also called grooves), and the reference numerals 932 and 932a is a shoulder, reference numeral 935 is a conduction portion (of a through hole), and reference numeral 950 is an insulating base portion.

First, an example of the first embodiment of the double-sided wiring board of the present invention will be described with reference to FIG. 1( a ).

The double-sided wiring board of the present invention includes: a core substrate 110 having substrate surfaces 110S roughened on both sides; That is, the double-sided wiring board is manufactured by the steps shown in FIGS. The wiring layers 191 and 192 formed by the method are electrically connected to the wiring layers 191 and 192 on both sides of the core base material 110 through the through hole 180 formed by the through hole 110H provided on the core base material 110, that is, the wiring lines 191 and 192. . Furthermore, predetermined terminal portions 170 , 170 a are connected to wiring layers 191 , 192 , and solder resist 160 is provided in a state where terminal portions 170 , 170 a are exposed on both surfaces of core base material 110 . Such a double-sided wiring board is a double-sided wiring board for a semiconductor package, and is used instead of the multilayer wiring board 10 as an interposer in a semiconductor package as shown in FIG. 9 .

The through hole 180 is formed by a through hole 110H of the core base material 110 formed by laser, and through hole plating is performed in the through hole 110H, and the through hole 110H is filled by the through hole plating to provide the conduction portion 193 . In addition, an opening 165 of the solder resist 160 is formed corresponding to the conduction portion 193 .

As described above, on one surface of the core substrate 110 (the surface on the wiring 191 side), the connection liner (terminal portion) 170 is provided for mounting the semiconductor via the solder bumps 21 by the flip chip method or the wire bonding method. The chip 20 is provided with an external connection terminal (terminal portion) 170a on the other surface (the surface on the wiring 192 side) for connection to an external circuit.

Of course, which side of the core base material 110 the connection liner 170 and the external connection terminal 170a are provided on can be freely selected.

Both the connection liner (terminal part) 170 and the external connection terminal (terminal part) 170a have an electrolytic Cu plating layer 150 formed on the electroless plating layer 130, and an opening provided on the electrolytic copper plating layer 150 to cover the solder resist 160. The Ni plating layer 171 and the Cu plating layer 172 are sequentially formed.

In addition, the 10-point average roughness RzJIS of the base material surface 110S of the core base material 110 is in the range of 2 μm to 10 μm. By setting the RzJIS of the base material surface 110S in this range, the adhesion strength of the wirings 191 and 192 to the base material surface 110S can be improved, and miniaturization of the wiring can be achieved. Therefore, it can also be said to be a practical level in terms of its manufacture.

As the core base material 110, a heat-resistant thermosetting insulating resin layer is appropriately mixed with glass fiber cloth, aramid nonwoven fabric, liquid crystal polymer nonwoven fabric, porous polytetrafluoroethylene cloth ( For example, a base material such as a mesh plastic film) is available under the trade name Coadex.

Examples of the resin layer include cyanate resin, BT resin (resin composed of bismaleimide and triazine), epoxy resin, PPE (polyphenylene ether), and the like.

According to the test, when Hitachi 679F series (cyanate resin) is used as the resin layer, the Rz of the base material surface 110S of the core base material 110 is 5 μm, and the peel strength is 800 g/cm (JISC5012-1987 8.1) .

As will be described later, the surface 110S of the resin layer of the core base material 110 is formed by thermocompression bonding the plated surface side of the electrolytic Cu foil 115 ( FIG. 2 ) to the core base material 110 and curing it. The rough shape of the plated surface of the electrolytic Cu foil 115 is transferred to the base material surface 110S of the core base material 110 (refer to the steps in FIGS. , The adhesion of 192 becomes better.

The through hole 180 is formed by a through hole 110H formed on the core base material 110 by a laser. Usually, the through hole 110H for forming a through hole is formed on the core base material 110 by a _CO2 laser or a UV laser. The diameter of the through hole 110H is 150 nm. the following.

The electrolytic Cu plating layer 150 forming the wirings 191, 192, the conductive portion 193 of the via hole, and the like is formed by a known plating method for filling the blind via hole.

The wiring portions 191 and 192 preferably have a thickness of about 5 μm to 30 μm in terms of conductivity, but in order to reliably perform plating and filling during manufacture, for example, the thickness of the core base material 110 is 100 μm, and the laser irradiation side of the through hole 110H When the diameter of the hole on the opposite side is 100 μm and the diameter of the hole on the opposite side is 70 μm, the thickness of the wirings 191 and 192 is usually about 10 μm to 30 μm.

The electroless plated layer 130 is formed by known methods such as electroless Ni plating and electroless Cu plating, and is used as a conductive layer when electrolytic Cu plating 150 is performed to form the conduction portion 193 of the via hole. The electroless plating layer 130 has a predetermined thickness as long as it can be easily removed by rapid etching without damaging other parts.

The double-sided wiring substrate shown in FIG. 1( b) is in the double-sided wiring substrate shown in FIG. shipped from the factory.

Each component is the same as that of the double-sided wiring board shown in FIG. 1( a ), and description thereof will be omitted.

Next, a method for manufacturing the double-sided wiring board of the first example shown in FIG. 1( a ) will be described with reference to FIGS. 2 and 3 .

In addition, this replaces description of embodiment of the manufacturing method of a double-sided wiring board in this invention.

First, on both surfaces of the insulating resin layer (insulating resin film) 110 for the core base material, electrolytic Cu foil 115 with a rough surface formed by electrolytic plating is crimped with the rough surface facing the resin layer 110 side. These are stacked to manufacture a three-layer structure processing blank 110a for use. (Figure 2(a))

Here, a thermosetting resin layer is used as the insulating resin film 110 , and electrolytic Cu foil 115 is bonded to both surfaces of the resin film 110 by thermocompression.

As the material of the core base material 110, glass fiber cloth, aramid non-woven fabric, liquid crystal polymer non-woven fabric, porous polytetrafluoroethylene cloth (for example, trade name KOA) are used which are appropriately mixed with insulating resin. Dex has materials such as mesh plastic film).

As the insulating resin, cyanate resin, BT resin (resin composed of bismaleimide and triazine), epoxy resin, PPE (polyphenylene ether) and the like are used.

Next, the electrolytic Cu foil 115 on both surfaces of the insulating resin film 110 is etched away to form a core substrate 110 having a substrate surface 110S in which the surface state of the electrolytic Cu foil 115 is replicated. (Figure 2(b))

The etching of the electrolytic Cu foil 115 is carried out with a ferric chloride solution, a copper chloride solution, or an alkaline etching solution.

After cleaning, laser light 120 is selectively irradiated to form through-holes 110H for through-hole formation in core base material 110 . (Figure 2(c))

As the laser 120, a CO ₂ laser or a UV laser is used in accordance with the material of the core substrate 110 .

On one surface of the core base material 110, a black baffle plate 120a, which does not excessively reflect the laser beam 120, is disposed, and the laser beam 102 is irradiated from the other surface. Thus, the through-holes 110H are formed in the core base material 110 by the laser. In this case, the diameter of the through hole 110H on the side irradiated by the laser beam 120 is made larger, and the diameter of the hole opposite to the side irradiated by the laser beam 120 is made smaller, so that the cross section of the through hole 110H can be formed in a trapezoidal shape.

For example, in the case of using a _CO2 laser, on the core substrate 110 using a cyanate-based resin with a thickness of 100 μm, the aperture on the irradiation side may be 100 μm, and the aperture on the side opposite to the irradiation side of the laser 120 may be provided. The through hole 110H is 70 μm.

Thereby, when filling the through-hole 110H of the core base material 110 with the electrolytic plating 150 performed thereafter, the filling of the electrolytic plating 150 becomes easy. Furthermore, when the solder resist 160 is provided on both surfaces of the base material 110 , the solder resist 160 is provided so that the region of the through hole 110H is flat.

In addition, in the conventional core substrate, a mechanical drill is used to manufacture the through hole, and the diameter cannot be reduced to 150 μm or less. However, according to the present invention, since the through hole 110H is formed in the core substrate 110 by laser, it can be formed to a diameter of 150 μm. The through hole 110H of the following hole diameter.

The minimum diameter of the through hole 110H can be as high as about 80 μm in the case of the carbon dioxide laser, and can be as high as about 25 μm in the case of the UV-YAG laser.

Next, desmear treatment is performed to remove processing residues in the through-holes 110H of the core base material 110, and then electroless plating is performed on the entire surface of the core base material 110 including the surface of the through-holes 110H to form a conductive layer. Electroless plating 130 . (Figure 2(d))

As the electroless plating, known electroless Cu plating and electroless Ni plating can be applied.

Next, openings 145 are provided on both surfaces of the core base material 110 to expose predetermined regions for forming the wirings 191 and 192 or the conductive portions 193 of the via holes 180 to form a resist 140 . (Figure 2(e))

Next, electrolytic Cu plating is performed using the electroless plated layer 130 as a conductive layer, and the wirings 191 and 192 and the conduction portion 193 filling the through hole 110H are selectively formed by the electrolytic Cu plating 150 . (Figure 2(f))

The electroless plating layer 130 is formed by known methods such as electroless Ni plating, electroless Cu plating, etc., and has the thickness as a conductive layer when forming the electrolytic Cu plating layer 150 for forming wirings 191, 192, as long as it passes through The thickness that can be easily removed without damaging other parts by performing rapid etching may be sufficient.

The resist 140 is not particularly limited as long as it has desired resolution, plating resistance, and good handleability.

A dry film resist is generally used as the resist 140 because it is easy to handle.

Next, the resist 140 is removed (FIG. 2(g)), and then the exposed unnecessary electroless plating layer 130 is removed by flash etching (FIG. 3(a)).

Examples of the etching solution for removing the electroless plating layer 130 include perhydrosulfuric acid, persulfuric acid, hydrochloric acid, nitric acid, cyanogenic, and organic etching solutions.

Next, a photosensitive solder resist is applied to both surfaces of the core base material 110 to form solder resist layers 160 on both surfaces of the core base material 110 . (Figure 3(b))

Next, mask exposure and development are performed on the solder resist layer 160 using a predetermined photomask etc., and terminal part 170,170a is exposed. (Figure 3(c))

Next, a Ni plating layer 171 and an Au plating layer 172 are sequentially formed on the surfaces of the terminal portions 170 and 170a. (Fig. 3(d)). Thus, the double-sided wiring board of this example was formed.

In addition, as a comparative example of the double-sided wiring board shown in FIG. Only one layer of wiring is arranged on both sides of the substrate, and a through-hole is provided in the base material by a mechanical drill, and through-hole plating is performed to electrically connect the wiring on both sides. In this case, insulating ink (resin ink) is filled in the through hole for forming the through hole of the core base material, and the wiring on both surfaces of the core base material is covered with a solder resist. A double-sided wiring board for assembly as such a comparative example will be briefly described with reference to FIGS. 4 to 6 .

First, a processing material 210a similar to that shown in FIG. 2(a) is prepared by thermocompression-bonding and laminating electrolytic Cu foil 215a on both surfaces of a core base material 210 to obtain a three-layer structure (FIG. 4(a)). . The electrolytic Cu foil 215a provided on both surfaces of the core base material 210 is etched to a predetermined thickness ( FIG. 4( b )). Next, use a mechanical drill to open a through hole 211H for a through hole on the blank material 210a for processing (Fig. Plating layer 230 (Fig. 4(d)). Then, the electroless plating layer is used as the conductive layer 230, and electrolytic Cu plating is carried out, and the electrolytic Cu plating layer 240 is provided on both sides of the core base material 210, and a conduction portion is formed in the through hole 211H. 293. (Figure 4(e))

Next, from both sides or one side of the core base material 210, the through-holes 211H for through-holes are buried with thermosetting insulating ink (resin ink), heated and cured, and the through-holes 211H are filled with the cured insulating ink 250. Through-hole filling for hole formation. (Figure 4(f))

Next, after the insulating ink cured product 250 is ground ( FIG. 5( a )), half etching is carried out from both sides of the core base material 210 to remove the electrolytic plating layer 240 and the electroless plating layer 230 on the surface portion of the core base material 210 ( 5(b)), the cured insulating ink 250 protruding from the surface of the thinned electrolytic Cu foil 215 is polished to be flat. (Figure 5(c))

Then, implement electroless plating on the both sides entire surfaces of core base material 210, to arrange electroless plating layer 235 (Fig. It becomes a predetermined thickness for forming wiring. (Figure 5(e))

Next, openings 265 are provided in predetermined regions on both surfaces of the core base material 210 to form etching resists 260 ( FIG. 5( f )). Next, the electrolytic Cu plating layer 245, the electroless plating layer 235, and the thinned electrolytic Cu foil 215 exposed from the opening 265 of the resist 260 are removed by etching with an etchant such as ferric chloride solution (FIG. 5(g)). Then, the resist 260 is removed ( FIG. 6( a )), and a photosensitive solder resist 270 is applied from both surfaces of the core substrate 210 . (Figure 6(b)

Then, an opening is opened on the terminal formation region 275 of the solder resist 270 by photolithography (FIG. 6(c)), and a Ni plating layer 296 and an Au plating layer 297 are sequentially provided on the exposed electrolytic Cu plating layer 245. In this way, the comparative example can be obtained. double-sided wiring substrate. (Figure 6(d))

However, in the wiring formation of this manufacturing method, the electrolytic Cu foil 215, the electroless plating layer 235, and the electrolytic Cu plating layer 245 prepared in advance and thinned are etched and the wiring formation is performed. Therefore, this manufacturing method is basically based on a metal surface etching method in which wiring portions are etched to form wirings similar to the method shown in FIG.

Therefore, it is difficult to manufacture lines/spaces below 50 μm/50 μm level as lines/spaces on a double-sided wiring board.

In addition, since the through-hole 211H for through-hole formation is formed in the core base material 210 by a mechanical drill, its diameter becomes large. Therefore, similar to the conventional core substrate shown in FIG. 7( d ), the via hole diameter/drill diameter cannot be made smaller than the level of 150 μm/350 μm.

In addition, the manufacturing process of the built-up multilayer wiring board is long and cumbersome, and the cost is also high, and the power loss in the through hole is large, so it is not suitable for applications requiring high-frequency input and output.

That is, the double-sided wiring board of the comparative example has the above-mentioned various problems, and cannot be used as an assembly board for high-density mounting.

Next, modified examples of the embodiment of the double-sided wiring board of the present invention will be described.

In the double-sided wiring substrate of the modified example, in FIGS. 1 to 3 , the outer surface of the through hole 110H in the core base material 110 and the outer surfaces of the wiring layers 191 and 192 are flattened by mechanical polishing or chemical mechanical polishing. processing.

The surface of the via hole 110H and the outer surface side of each wiring layer 191 , 192 are planarized by mechanical polishing or chemical mechanical polishing. With such a structure, the double-sided wiring board is less likely to slide laterally during wire bonding or flip-chip bonding in semiconductor chip assembly, and can have a structure without depressions (grooves) in filled through holes, and Variations in wiring thickness can be made uniform.

In particular, it is effective when used as an assembly substrate.

As a modified example of the manufacturing method of the double-sided wiring board, the following method is enumerated: for example, in the manufacturing method of the double-sided wiring board shown in FIGS. 2 and 3 , before the resist pattern is removed after the selective plating step ( Corresponding to the state of Figure 2(f)), or after removing the resist pattern but before removing the unnecessary electroless plating layer by rapid etching (corresponding to Figure 2(g)), or after removing the unnecessary electrolytic plating After the rapid etching and removal of the plating layer (corresponding to FIG. 3( a)), in order to planarize the electrolytic Cu plating layer 150 selectively formed by the selective plating process, mechanical polishing or chemical mechanical polishing is carried out; The same, and its description is omitted here.

As mechanical polishing, buff polishing is used, and recently chemical mechanical polishing (also referred to as CMP) is used in each process.

By flattening the electrolytic Cu plating layer 150, the flatness of the electrolytic Cu plating layer 150 can be limited within a deviation range of ±(0.05˜0.5 μm).

In addition, as an end point detection method of polishing, there are a method of judging by rotational torque, a method of judging by electrostatic capacitance, and the like.

As a modified example, Ni plating and Au plating may be provided on the terminal portion as in the double-sided wiring board shown in FIG. 1( b ). Depending on the situation, the double-sided wiring board is shipped in this state.

This manufacturing method is a method in which the terminal portions 170 and 170a are not plated in the manufacturing method of the double-sided wiring board shown in FIG. 1( a ).

As described above, the present invention can provide a wiring board for assembly that can support high-density packaging, has better productivity than conventional multilayer wiring boards, and can solve the problem of power loss in high-frequency input and output.

In particular, it is possible to reliably provide a structure that does not easily cause lateral slippage during wire bonding or flip-chip bonding in semiconductor chip assembly, does not have a recess (groove) on a filled via hole, and can uniformize the variation in wiring thickness. Wiring boards for assembly.

At the same time, it is possible to provide a wiring substrate manufacturing method for manufacturing such a wiring substrate.

Through the miniaturization of pads and the miniaturization of lines, conventionally, a wiring layer formed by metal surface etching is provided on both sides of the core base material, and then a wiring layer is formed by plating on each wiring layer. Additive method Set 1-layer wiring layer. With such a structure, it is used for CSP and stacked packages. A conventional double-sided wiring board having a four-layer wiring structure can be replaced by the double-sided wiring board of the present invention having a two-layer wiring structure in which one wiring layer is disposed on both sides of a core base material.

Compared with the conventional 4-layer wiring structure, the double-sided wiring board of the present invention has a simpler structure and fewer manufacturing steps, and is superior in productivity and high-frequency input/output power loss.

2nd embodiment

A second embodiment of the present invention will be described with reference to the drawings.

Fig. 11(a) is a partial sectional view showing a second embodiment of a double-sided wiring board of the present invention, Fig. 11(b) is a modified example of the embodiment shown in Fig. 11(a), and Fig. 12 is a diagram showing Figure 13 is a process sectional view showing a part of the manufacturing process of the embodiment shown in Figure 11(a), Figure 14 is a process sectional view showing a part of the manufacturing process of the comparative example, Figure 15 is a process sectional view showing A cross-sectional view of the process following the process of FIG. 14 .

In FIGS. 11 to 15 , the reference numeral 110 is the core base material, the reference numeral 110H is the through hole of the through hole, the reference numeral 110S is the surface of the substrate, the reference numeral 115 is the electrolytic Cu foil, the reference numeral 120 is the laser, and the reference numeral 130 is the electroless plating layer. The reference numeral 140 is a resist, the reference numeral 145 is an opening, the reference numeral 150 is an electrolytic Cu plating layer, the reference numeral 160 is a solder resist, the reference numeral 165 is an opening, the reference numeral 170 is a connection liner (also referred to simply as "terminal part"), and the reference numeral 170a is the external connection liner (also referred to simply as "terminal part"), the reference numeral 171 is the Ni plating layer, the reference numeral 172 is the Au plating layer, the reference numerals 175 and 175a are the terminal parts, the reference numeral 180 is the through hole, and the reference numeral 180a is the through hole forming area, The reference numerals 191 and 192 are wiring, the reference numeral 193a is the conduction part of the through hole, the reference numeral 210 is the core base material, the reference numeral 211H is the through hole of the through hole, the reference numeral 215a is the electrolytic Cu foil, and the reference numeral 215 is the electrolytic Cu foil thinned by etching. Cu foil, the number 230 is an electroless coating, the number 240 is an electrolytic Cu coating, the number 250 is a resist, the number 255 is an opening, the number 260 is a solder resist, the number 261 is a depression, the number 265 is an opening, and the numbers 270 and 270a are In the terminal portion, numeral 271 is Ni plating, numeral 272 is gold plating, numeral 280 is a via hole, numeral 280a is a via forming area, numerals 291 and 292 are wiring, and numeral 293a is a conduction portion of the via hole.

First, a second embodiment of the wiring board of the present invention will be described with reference to FIG. 11( a ).

The double-sided wiring board of the present invention includes: a core substrate 110 having substrate surfaces 110S roughened on both sides; That is, the double-sided wiring board is manufactured by the steps shown in FIGS. The wiring layers 191, 192 formed by the method are electrically connected to the wiring layers 191, 192 on both sides of the core base material 110 through the through hole 180 formed by the through hole 110H provided on the core base material 110, that is, the wiring lines 191 and 192. . In addition, solder resist 160 is provided in a state where predetermined terminal portions 170 , 170 a are connected to wiring layers 191 , 192 , and predetermined terminal portions 170 , 170 a are exposed on both surfaces of core base material 110 . Such a double-sided wiring board is a double-sided wiring board for semiconductor packaging, and is used instead of the multilayer wiring board 10 as an interposer in a semiconductor package as shown in FIG. 9 .

The through hole 180 is formed by a through hole 110H of the core base material 110 opened by a laser. Through hole plating is performed in the through hole 110H to form a conductive portion 193a, and the through hole 110H is filled with the solder resist 160 .

As described above, on one surface of the core substrate 110 (the surface on the wiring 191 side), there is provided a connection liner (terminal portion) 170 for connecting to a semiconductor chip by flip-chip or wire bonding. One surface (the surface on the wiring 192 side) is provided with an external connection terminal (terminal portion) 170a for connection to an external circuit.

Of course, which side of the core base material 110 the connection liner 170 and the external connection terminal 170a are provided on can be freely selected.

Both the connection liner (terminal part) 170 and the external connection terminal (terminal part) 170a have the electrolytic copper plating layer 150 formed on the electroless plating layer 130, and the openings provided on the electrolytic copper plating layer 150 to cover the solder resist 160. The Ni plating layer 171 and the Cu plating layer 172 are sequentially formed.

In addition, the 10-point average roughness RzJIS of the base material surface 110S of the core base material 110 is in the range of 2 μm to 10 μm. By setting the RzJIS of the base material surface 110S in this range, the adhesion strength of the wirings 191 and 192 to the base material surface 110S can be improved, and miniaturization of the wiring can be achieved. Therefore, it can also be said to be a practical level in terms of its manufacture.

As the core base material 110, a heat-resistant thermosetting insulating resin layer is appropriately mixed with glass fiber cloth, aramid non-woven fabric, liquid crystal polymer non-woven fabric, Coadex mesh plastic Substrates such as films.

Examples of the resin layer include cyanate-based resins, BT resins, epoxy resins, PPE (polyphenylene ether), and the like.

According to the test, when Hitachi 679F series (cyanate resin) is used as the resin layer, the RzJIS of the base material surface 110S of the core base material 110 is 5 μm, and the peeling strength is 800 g/cm (JIS C5012-19878.1).

As will be described later, the surface 110S of the resin layer of the core base material 110 is formed by thermocompression bonding the plated side of the electrolytic Cu foil 115 ( FIG. 12 ) to the core base material 110 and hardening it. The rough shape of the plated surface of the electrolytic Cu foil 115 ( FIG. 12 ) is copied onto the base material surface 110S of the core base material 110 (refer to the steps of FIGS. 12 to 13 described later), and the base material of the core base material 110 The adhesion between the surface 110S and the wirings 191 and 192 is improved.

The through hole 180 is formed by a through hole 110H formed on the core base material 110 by a laser. Usually, a through hole 110H for forming a through hole is formed on the core base material 110 by a _CO2 laser or a UV laser. The diameter of the through hole 110H is 150 nm. the following.

The electrolytic Cu plating layer 150 forming the wirings 191, 192, the conductive portion 193 of the through hole, etc. is formed by a known electrolytic Cu plating method, and has a thickness of about 5 μm to 30 μm in terms of conductivity.

The electroless plated layer 130 is formed by known methods such as electroless Ni plating and electroless Cu plating, and is used as a conductive layer when electrolytic Cu plating is performed to form the conduction portion 193a of the via hole. The electroless plating layer 130 has a predetermined thickness as long as it can be easily removed by rapid etching without damaging other parts.

The double-sided wiring board shown in FIG. 11( b) is in the double-sided wiring board shown in FIG. 11( a), without the Ni plating layer 171 and the Au plating layer 172 of the terminals 170, 170a. shipped from the factory.

Each part is the same as that of the double-sided wiring board shown in FIG. 11( a ), and description thereof will be omitted.

Next, a method of manufacturing the double-sided wiring board shown in FIG. 11( a ) will be described with reference to FIGS. 12 and 13 .

In addition, this replaces description of embodiment of the manufacturing method of a double-sided wiring board in this invention.

First, on both surfaces of the insulating resin layer (insulating resin film) 110 for the core base material, electrolytic Cu foils with rough surfaces formed by electrolytic plating are pressure-bonded and laminated so that the rough surfaces face the resin layer side, The blank material 110a for processing to manufacture the three-layer structure is ready for use. (Figure 12(a))

Here, a thermosetting resin layer was used as the insulating resin film 110 , and electrolytic Cu foil was bonded to both surfaces of the resin film 110 by thermocompression.

As the material of the core base material 110, a material obtained by appropriately mixing glass fiber cloth, aramid nonwoven fabric, liquid crystal polymer nonwoven fabric, Coadex meshed plastic film, etc. with an insulating resin is used.

As the insulating resin, cyanate resin, BT resin, epoxy resin, PPE (polyphenylene ether) and the like are used.

Next, the electrolytic Cu foil 115 on both surfaces of the insulating resin film 110 is etched away to form a core substrate 110 having a substrate surface 110S in which the surface state of the electrolytic Cu foil 115 is replicated. (Figure 12(b))

The etching of the electrolytic Cu foil 115 is carried out with a ferric chloride solution, a copper chloride solution, or an alkaline etching solution.

After cleaning, laser light 120 is selectively irradiated to form through-holes 110H for through-hole formation in core base material 110 . (Figure 12(c))

As the laser 120, a CO ₂ laser or a UV laser is used in accordance with the material of the core substrate 110 .

On one surface of the core substrate 110, a black dam 120a that does not excessively reflect the laser beam 120 is disposed, and the laser beam 102 is irradiated from the other surface, thereby forming a through-hole 110H in the core substrate 110 by the laser. . In this case, the cross section of the through hole 110H may be formed into a trapezoidal shape in which the diameter of the through hole 110H on the side irradiated with the laser light 120 is large and the diameter on the side opposite to the side irradiated by the laser 120 is small.

For example, in the case of using a _CO2 laser, on the core substrate 110 using a cyanate-based resin with a thickness of 100 μm, the aperture on the irradiation side may be 100 μm, and the aperture on the side opposite to the irradiation side of the laser 120 may be provided. The through hole 110H is 70 μm.

Thereby, when filling the through-hole 110H of the core base material 110 with the solder resist 160 performed later, filling of the solder resist 160 becomes easy. In addition, the region of the through hole 110H is flattened, and the solder resist 160 is disposed on both surfaces of the core base material 110 .

In addition, in the conventional core substrate, a mechanical drill is used to manufacture the through hole, and the diameter cannot be reduced to 150 μm or less. However, according to the present invention, since the through hole 110H is formed in the core substrate 110 by laser, it can be formed to a diameter of 150 μm. The through hole 110H of the following hole diameter.

The minimum diameter of the through hole 110H can be as high as about 80 μm in the case of the carbon dioxide laser, and can be as high as about 25 μm in the case of the UV-YAG laser.

Next, desmear treatment is performed to remove processing residues in the through-holes 110H of the core base material 110, and then electroless plating is performed on the entire surface of the core base material 110 including the surface of the through-holes 110H to form a conductive layer. Electroless plating 130 . (Figure 12(d))

As the electroless plating, known electroless Cu plating and electroless Ni plating can be applied.

Next, openings 145 are formed on both surfaces of core substrate 110 to expose predetermined regions for forming wirings 191, 192 and via 193a of via hole 180 to form resist 140 ( FIG. 12( e )). Next, electrolytic Cu plating is performed using the electroless plating layer 130 as a conductive layer, and the wirings 191 and 192 and the conduction portion 193 a on the inner surface of the through hole 110H are selectively formed by the electrolytic Cu plating layer 150 . (Figure 12(f))

The electroless plating layer 130 is formed by known methods such as electroless Ni plating, electroless Cu plating, etc., and has the thickness as a conductive layer when forming the electrolytic Cu plating layer 150 for forming wirings 191, 192, as long as it passes through The thickness that can be easily removed without damaging other parts by performing rapid etching may be sufficient.

The resist 140 is not particularly limited as long as it has desired resolution, plating resistance, and good handleability.

A dry film resist is generally used as the resist 140 because it is easy to handle.

Next, the resist 140 is removed (FIG. 12(g)), and then the exposed unnecessary electroless plating layer 130 is removed by flash etching (FIG. 13(a)).

Examples of the etching solution for removing the electroless plating layer 130 include perhydrosulfuric acid, persulfuric acid, hydrochloric acid, nitric acid, cyanogenic, and organic etching solutions.

Next, a photosensitive solder resist is applied to both surfaces of the core base material 110 to form solder resist layers 160 on both surfaces of the core base material 110 . (Figure 13(b))

When a photosensitive solder resist is applied to the core base material 110 from the side of the wiring 191 with a larger diameter of the through hole 110H, the solder resist does not easily pass to the side of the wiring 192 with a smaller diameter of the through hole 110H. The solder resist can be filled and flatly provided on both surfaces of the core base material 110 including the formation region of the via hole 180 .

Next, mask exposure and development are performed on the solder resist 160 using a predetermined photomask etc., and the terminal part 170,170a is exposed. (Figure 13(c))

Next, a Ni plating layer 171 and an Au plating layer 172 are sequentially formed on the surfaces of the terminal portions 170 and 170a. (Fig. 13(d)).

Thus, the double-sided wiring board of this example was formed.

In addition, as a comparative example of the double-sided wiring board shown in FIG. Only one layer of wiring is arranged on both sides of the substrate, and a through-hole is provided in the base material by a mechanical drill, and through-hole plating is performed to electrically connect the wiring on both sides. In this case, solder resist is filled in the through hole for forming the through hole of the core base material, and the wiring on both surfaces of the core base material is covered with the solder resist. A double-sided wiring board for assembly as such a comparative example will be briefly described with reference to FIGS. 14 and 15 .

First, a processing material having a three-layer structure is prepared by thermocompression-bonding and laminating electrolytic Cu foil 215 a on both surfaces of core base material 210 ( FIG. 14( a )). The electrolytic Cu foil 215a provided on both surfaces of the core base material 210 is etched to a predetermined thickness ( FIG. 14( b )). Next, use a mechanical drill to open a through hole 211H for a through hole on the blank material 210a for processing (Fig. Plating layer 230 (Fig. 14(d)). Then, using the electroless plating layer 230 as a conductive layer, electrolytic Cu plating is carried out, and the electrolytic Cu plating layer 240 is provided on both sides of the core base material 210, and a conduction portion is formed in the through hole 211H. 293a. (Fig. 14(e))

Next, on both surfaces of the core base material 210, predetermined regions 255 are respectively opened to form etching resists 250 (FIG. 14(f)). Then, the electrolytic plated layer 240, the electroless plated layer 230, and the thinned electrolytic Cu foil 215 exposed from the opening 255 of the resist 250 are etched away with an etchant such as a ferric chloride solution (FIG. 15(a)). Next, a photosensitive solder resist 260 is applied from both surfaces of the core base material 210 , and at this time, the through-holes 211H of the core base material 210 are filled with the solder resist 260 at the same time. (Figure 15(b))

Then, the terminal formation region 265 of the solder resist 260 is opened by photolithography (FIG. 15(c)), and the Ni plating layer 271 and the Au plating layer 272 are sequentially provided on the exposed electrolytic Cu plating layer 240. In this way, the comparative example can be obtained. double-sided wiring substrate. (Figure 15(d))

However, in the wiring formation in this manufacturing method, the electrolytic Cu foil 215 , the electroless plating layer 230 , and the electrolytic Cu plating layer 240 prepared and thinned in advance are etched to form the wiring. Therefore, this manufacturing method is basically based on the metal surface etching method in which wiring portions are etched to form the same wiring as the method shown in FIG. 7, and cannot cope with miniaturization and high density of wiring.

Therefore, it is difficult to manufacture lines/spaces below 50 μm/50 μm level as lines/spaces on a double-sided wiring board. In addition, since the through-hole 211H for through-hole formation is formed in the core base material 210 by a mechanical drill, its diameter becomes large. Therefore, similar to the conventional core substrate shown in FIG. 7( d ), the via hole diameter/drill diameter cannot be made smaller than the level of 150 μm/350 μm.

In addition, since the through hole for forming the through hole is formed by a mechanical drill, its diameter becomes large. Therefore, even if solder resist is filled into this through-hole 211H, a depression 261 is generated on the solder resist 260 . When such a double-sided wiring board is used, there will be a problem that air bubbles enter between the recess 261 and the mounted chip to damage the reliability of the semiconductor device, or a problem that a large load is required in the preferred field, that is, the semiconductor chip assembly process. .

That is, the double-sided wiring board of the comparative example has the above-mentioned problems as an assembly board for high-density mounting, and cannot cope with it.

As described above, the present invention can provide a wiring board for assembly that can cope with high-density mounting and has better productivity than conventional built-up multilayer wiring boards.

At the same time, it is possible to provide a wiring substrate manufacturing method for manufacturing such a wiring substrate.

In particular, due to the miniaturization of pads and the miniaturization of lines, conventionally, one wiring layer formed by metal surface etching method is provided on each of the two sides of the core base material, and the wiring layer is formed on each wiring layer by plating. The additive method sets up a layer 1 wiring layer. With such a structure, it is used for CSP and stacked packages. A conventional double-sided wiring board having a four-layer wiring structure can be replaced by the double-sided wiring board of the present invention having a two-layer wiring structure in which one wiring layer is disposed on both sides of a core base material.

Compared with the conventional 4-layer wiring structure, the double-sided wiring board of the present invention has a simpler structure and fewer manufacturing steps, and is excellent in productivity.

In addition, in the double-sided wiring board of the present invention, since the sinking of the solder resist, which has been a problem in the past, is eliminated, it is possible to reduce additional processing in the preferred field.

Variation of the present invention

Next, a modified example of the present invention will be described with reference to FIGS. 16 to 18 .

The modified example shown in FIG. 16 differs only in the cross-sectional shape of the through-hole 110H provided in the core base material 110 , and is substantially the same as the first and second embodiments described above.

The core base material 110 has insulating resin and glass fiber cloth, aramid nonwoven fabric, liquid crystal polymer nonwoven fabric, porous polytetrafluoroethylene cloth, etc. mixed with the insulating resin. And through-holes 110H are obtained by irradiating laser light 120 on the core substrate 110 . At this time, by adjusting the energy of the laser light 120 , the through-hole 110H has a cross-sectional shape as shown in FIG. 16 .

That is, in FIG. 16, the cross-sectional shape 305 of the through-hole 110H has: a first trapezoidal shape 305a, which decreases in diameter from one end 301 of the through-hole 110H toward the inside; One end 302, the aperture of which increases. At this time, the first trapezoidal shape 305a and the second trapezoidal shape 305b are divided into the one end 301 side and the other end 302 side with the inner point 307 of the through hole 110H as a boundary.

Thus, since the cross-sectional shape 305 of the through-hole 110H is composed of the first trapezoidal shape 305a on the one end 301 side and the second trapezoidal shape 305b on the other end 302 side, when the electrolytic plating is filled from the one end 301 side to form the conductive portion 193 ( Referring to FIG. 2(f)), since the electrolytic plating is supplied while converging toward the inner point 307 of the first trapezoidal shape 305a, it can be reliably filled into the first trapezoidal shape 305a. Then, the electrolytic plating is smoothly supplied while expanding from the internal point 307 to the second trapezoidal shape 305b side, so that the electrolytic plating can be reliably filled into the second trapezoidal shape 305b.

Next, the composite multilayer wiring board 310 will be described with reference to FIG. 17 . As shown in FIG. 17 , multilayer wiring board 310 includes double-sided wiring board 300 described above, and additional wiring layers 311 and 312 provided on double-sided wiring board 300 via insulating resin portion 160 .

Among them, the double-sided wiring board 300 includes: a core base material 110 having a base material surface 110S roughened on both sides; In addition, a through-hole 110H constituting the through-hole 180 is formed in the core base material 110 , and the wiring layers 191 and 192 are electrically connected to each other through the conduction portion 193 filled in the through-hole 110H. In addition, an electroless plating layer 130 is provided on the base material surface 110S of the core base material 110 and in the through holes 110H.

Furthermore, wiring layers 191 and 192 are covered with insulating resin portion 160 having opening 165 , and additional wiring layers 311 and 312 are connected to wiring layers 191 and 192 via opening 165 of insulating resin portion 160 . Furthermore, an additional insulating resin portion 313 having an opening 313 a is provided on the additional wiring layers 311 and 312 . A portion of the additional wiring layers 311 and 312 corresponding to the opening 313a is an additional terminal portion 313a.

In the multilayer wiring board 310 shown in FIG. 17 , four wiring layers 311 , 191 , 192 , and 312 are provided.

Next, the bump-up type multilayer wiring board 320 will be described with reference to FIG. 18 . As shown in FIG. 18 , multilayer wiring board 320 includes double-sided wiring board 300 described above, and additional wiring board 321 provided on the upper side of double-sided wiring board 300 via insulating resin portion 160 .

Among them, the double-sided wiring board 300 includes: a core base material 110 having a base material surface 110S roughened on both sides; In addition, a through-hole 110H constituting the through-hole 180 is formed in the core base material 110 , and the wiring layers 191 and 192 are electrically connected to each other through the conduction portion 193 filled in the through-hole 110H. In addition, an electroless plating layer 130 is provided on the base material surface 110S of the core base material 110 and in the through holes 110H.

Furthermore, the wiring layers 191 and 192 are covered with the insulating resin portion 160 having the opening 165 , and the protrusion 328 communicating with the conduction portion 193 is provided in the opening 165 of the insulating resin portion 160 .

On the other hand, the additional wiring substrate 321 includes: an additional core base material 322 having base surfaces 322S on both sides; Further, the additional through-hole 323 is provided in the additional core base material 322 , the conductive layer 323 a is formed on the inner surface of the additional through-hole 323 , and the inside of the additional through-hole 323 is filled with a resist 325 .

Furthermore, the wiring layer 324 of the additional wiring board 321 is covered with the additional insulating resin portion 330 having the opening 330a.

In addition, the bump 328 is disposed on the conductive portion 193 filled in the through-hole 110H of the double-sided wiring board 300 , and communicates with the conductive portion 193 . In addition, the additional through-hole 323 of the additional wiring board 321 is also provided at the position corresponding to the protrusion 328 .

Furthermore, the wiring layer 191 and the conductive portion 193 of the double-sided wiring board 300 are connected to the wiring layer 326 of the additional wiring board 321 via the bump 328 . Furthermore, an additional insulating resin portion 331 covering the wiring 326 and the bump 328 is provided between the double-sided wiring board 300 and the additional wiring board 321 .

In the multilayer wiring board 320 shown in FIG. 18 , four wiring layers 324 , 320 , 191 , and 192 are provided.

Claims (37)

1. A double-sided wiring substrate, characterized in that it has: a core substrate having roughened substrate surfaces on both sides; a wiring layer disposed on each substrate surface of the core substrate; The respective wiring layers are electrically connected to each other through the through-holes provided in the core base material. 2. The double-sided wiring board according to claim 1, wherein the through holes are filled with vias. 3. The double-sided wiring board according to claim 2, wherein a solder resist is provided on each wiring layer provided on both sides of the core base material so that the terminal portion is exposed. 4. The double-sided wiring substrate according to claim 2, wherein the outer surfaces of the wiring layers provided on both sides of the core substrate are planarized together with the outer surfaces of the conduction portions of the through holes. . 5. The double-sided wiring board according to claim 2, wherein the surface roughness of the base material surfaces on both sides of the core base material is in the range of 2 μm to 10 μm for each 10-point average roughness RzJIS. 6. The double-sided wiring board according to claim 2, wherein the double-sided wiring board is a double-sided wiring board for semiconductor packaging. 7. The double-sided wiring board according to claim 3, wherein: The terminal portion on one side of the core substrate is a connection liner for connecting to a semiconductor chip, The terminal portion on the other side is an external connection terminal for connecting to an external circuit. 8. The double-sided wiring board according to claim 3, wherein the terminal portions provided on both sides of the core base material have Ni plating and Au plating arranged in this order from inside to outside. 9. The double-sided wiring board according to claim 1, wherein a conductive plating layer is provided on an inner surface of the through hole, and a resist is filled in the through hole. 10. The double-sided wiring board according to claim 9, wherein a solder resist is provided on each wiring layer provided on both sides of the core base material so that the terminal portion is exposed. 11. The double-sided wiring board according to claim 9, wherein the surface roughness of the base material surfaces on both sides of the core base material is in the range of 2 μm to 10 μm for each 10-point average roughness RzJIS. 12. The double-sided wiring board according to claim 9, wherein the double-sided wiring board is a double-sided wiring board for semiconductor packaging. 13. The double-sided wiring substrate according to claim 10, wherein The terminal portion on one side of the core substrate is a connection liner for connecting to a semiconductor chip, The terminal portion on the other side is an external connection terminal for connecting to an external circuit. 14. The double-sided wiring board according to claim 10, wherein the terminal portions provided on both sides of the core base material have Ni plating and Au plating arranged in this order from inside to outside. 15. The double-sided wiring board according to claim 1, wherein the cross-section of the through hole of the core base material has a substantially trapezoidal shape. 16. The double-sided wiring substrate according to claim 1, wherein the through hole of the core base material has a diameter that decreases from one end to the inside, has a first trapezoidal cross-section, and increases from the inside to the other end. , the cross-section has a second trapezoidal shape. 17. The double-sided wiring board according to claim 16, wherein the first trapezoidal shape of the through hole is larger than the second trapezoidal shape. 18. A method for manufacturing a double-sided wiring substrate, for manufacturing a core base material having roughened base material surfaces on both sides, and wiring layers provided on each base material surface of the core base material, and each wiring layer A double-sided wiring substrate electrically connected to each other via a through-hole provided on a core base material, characterized in that it has: A step of crimping and laminating a Cu foil having a rough surface on both sides of the insulating resin film for the core base material so that the rough surface faces the insulating resin film side; Etching and removing the Cu foil on the insulating resin film, replicating the rough surface of the Cu foil on both sides of the insulating resin film to manufacture the core substrate; A process of forming through holes in the core substrate by laser; The process of performing electroless plating on both sides of the core base material and the inner surface of the through hole to form an electroless plating layer; Forming a resist pattern on both sides of the core base material, using the electroless plating layer as a conductive layer, performing electrolytic Cu plating, and forming an electrolytic Cu plating layer; After the resist is removed, the unnecessary electroless plating exposed to the outside is removed by flash etching. 19. The method of manufacturing a double-sided wiring board according to claim 18, wherein when the electrolytic Cu plating is formed, the vias filled in the through holes are formed by the electrolytic Cu plating. 20. The method of manufacturing a double-sided wiring board according to claim 19, wherein before forming the electroless plating layer, desmearing treatment is performed on the inner surface of the through hole. 21. The method of manufacturing a double-sided wiring board according to claim 19, wherein the electrolytic Cu plating is subjected to mechanical polishing or chemical mechanical polishing to flatten the electrolytic Cu plating. 22. The method for manufacturing a double-sided wiring board as claimed in claim 19, further comprising: After the electroless plating layer is removed by rapid etching, a photosensitive solder resist is applied to the electrolytic Cu plating layer on both sides of the core substrate to form a solder resist layer; Mask exposure and development are performed on the solder resist layer to expose a part of the electrolytic Cu plating layer to form a terminal part. 23. The method of manufacturing a double-sided wiring board according to claim 19, wherein the rough surface of the Cu foil crimped on the insulating resin film has a surface roughness of 2 μm to 10 μm in 10-point average roughness RzJIS . 24. The manufacturing method of double-sided wiring board as claimed in claim 19, it is characterized in that, on one face of core base material, dispose the baffle plate that does not reflect laser light excessively, carry out laser irradiation from another face of core base material, Through-holes are formed on the core substrate. 25. The method of manufacturing a double-sided wiring board according to claim 22, wherein Ni plating and Cu plating are sequentially applied to the surface of the terminal portion. 26. The manufacturing method of a double-sided wiring substrate as claimed in claim 19, wherein, when forming an electrolytic Cu plating layer, a dry film resist is provided on both sides of the core base material, and mask exposure and development are performed to form resist pattern. 27. The method for manufacturing a double-sided wiring board as claimed in claim 18, further comprising: After removing the electroless plating layer by rapid etching, apply a photosensitive solder resist on the electrolytic Cu plating layer on both sides of the core base material to form a solder resist layer, and fill the through hole with the insulating resin part; Mask exposure and development are performed on the solder resist layer to expose a part of the electrolytic Cu plating layer to form a terminal portion. 28. The method of manufacturing a double-sided wiring board according to claim 27, wherein the rough surface of the Cu foil crimped on the insulating resin film has a surface roughness of 2 μm to 10 μm in 10-point average roughness RzJIS . 29. The manufacturing method of a double-sided wiring substrate as claimed in claim 27, wherein a baffle plate that does not reflect laser light is disposed on one side of the core base material, and laser irradiation is performed from the other side of the core base material, Through-holes are formed on the core substrate. 30. The method of manufacturing a double-sided wiring board according to claim 27, wherein Ni plating and Cu plating are sequentially applied to the surface of the terminal portion. 31. The method for manufacturing a double-sided wiring substrate as claimed in claim 27, wherein, when forming an electrolytic Cu plating layer, a dry film resist is provided on both sides of the core base material, and mask exposure and development are performed to form resist pattern. 32. A multilayer wiring substrate, comprising: A double-sided wiring substrate has a core base material with roughened base material surfaces on both sides and wiring layers provided on each base material surface of the core base material, and each wiring layer is connected to each other through a through hole provided on the core base material. Pass; An additional wiring substrate is provided on one side of the double-sided wiring substrate via an insulating resin portion; The additional wiring board has an additional core base material having base material surfaces on both sides, and additional wiring layers provided on the respective base material surfaces of the additional core base material, and the additional wiring layers pass through the additional through-holes provided on the additional core base material. conduction. 33. The multilayer wiring board according to claim 32, wherein the double-sided wiring board and the additional wiring board are connected via bumps. 34. The multilayer wiring board according to claim 33, wherein the protrusion is provided at a position corresponding to the through hole of the double-sided wiring board. 35. The multilayer wiring board according to claim 34, wherein the through holes of the double-sided wiring board are filled with vias. 36. A multilayer wiring substrate, comprising: A double-sided wiring substrate has a core base material with roughened base material surfaces on both sides and wiring layers provided on each base material surface of the core base material, and each wiring layer is connected to each other through a through hole provided on the core base material. Pass; The additional wiring board is provided on both sides of the double-sided wiring board via the insulating resin portion. 37. The multilayer wiring board according to claim 36, wherein an additional insulating resin portion is provided on each additional wiring layer in a state where the additional terminal portion is exposed.

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