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CN204013456U - Switching circuit - Google Patents

Switching circuit Download PDF

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Publication number
CN204013456U
CN204013456U CN201420447399.3U CN201420447399U CN204013456U CN 204013456 U CN204013456 U CN 204013456U CN 201420447399 U CN201420447399 U CN 201420447399U CN 204013456 U CN204013456 U CN 204013456U
Authority
CN
China
Prior art keywords
mosfet
resistor
capacitor
switching circuit
drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CN201420447399.3U
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Chinese (zh)
Inventor
王成云
张昱
谢永斌
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Delta Electronics Dongguan Co Ltd
Original Assignee
Taida Electronic And Power Source (dongguang) Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taida Electronic And Power Source (dongguang) Co Ltd filed Critical Taida Electronic And Power Source (dongguang) Co Ltd
Priority to CN201420447399.3U priority Critical patent/CN204013456U/en
Application granted granted Critical
Publication of CN204013456U publication Critical patent/CN204013456U/en
Priority to TW103222603U priority patent/TWM501051U/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

The utility model relates to a kind of switching circuit, comprises a MOSFET and for controlling the control circuit of a MOSFET conducting and cut-off.The one MOSFET is P channel-type MOSFET; Control circuit comprises the first control loop and the second control loop; The first control loop is connected with the grid of a MOSFET, for controlling the grid level of a MOSFET; The second control loop is connected between the grid and source electrode of a MOSFET, for regulating rise time and fall time of drain voltage of a MOSFET.Switching circuit of the present utility model need to be from the secondary reference voltage of drawing of winding, and therefore circuit volume is little, applied widely.

Description

Switching circuit
Technical Field
The present application relates to analog electronic circuits, and more particularly to switching circuits.
Background
With the use of new switching power supply control ICs, to meet the Rise time (Rise time) requirement defined by the previous specification, it is common practice to generate an a potential (as shown in fig. 1) through the VCC winding of the transformer to control the switching N-MOSFET (Q156) between the input and output.
Referring to fig. 2 and 3, the charging and discharging of the capacitor C163 when the Q156 of the switching circuit of fig. 1 is turned on and off is illustrated.
Referring to fig. 2, when Q156 is required to conduct, the VCC winding of the transformer generates a stable potential at point a, which is higher than VOUT.
Now assume that both the A-point potential and the VIN potential are present. When the control signal CON is set high (high) from low (low), Q101 is turned on, Q161 is turned on again, the potential at point a charges the capacitors C163 and C153E through R166 until the potential at point B is equal to the potential at point a (assuming that the voltage drop at point a when Q161 is turned on is 0V), Q156 is turned on in saturation, and the length of the charging time can be changed by adjusting the resistance value of R166 and the capacitance value of C163, thereby realizing the adjustment of the rise time (Tr) of VOUT.
Referring to fig. 3, when Q156 is required to be turned off, the control signal CON is set from high (high) to low (low), Q101 is turned off, Q161 is turned off again, and the potential of C163 is discharged through D161 and R169 until Q156 is completely turned off, and the discharging speed of the potential at point B can be changed by adjusting the resistance of R169, so that the Fall time (Tf) of VOUT can be adjusted.
The timing diagrams of VIN, Vcon, B-point potential and A-point potential are shown in FIG. 4.
However, with the trend of miniaturization of the switching power supply, it is more and more important to reduce the size of the transformer and simplify the structure of the transformer while meeting the requirements of the switching power supply product characteristics. The switch circuits of fig. 1-3 need to extract the potential of point a from the secondary of the VCC winding, resulting in an oversized switch circuit, which is not in line with the current trend of circuit miniaturization.
SUMMERY OF THE UTILITY MODEL
A brief summary of the present invention is provided below in order to provide a basic understanding of some aspects of the present invention. It should be understood that this summary is not an exhaustive overview of the invention. It is not intended to identify key or critical elements of the invention or to delineate the scope of the invention. Its sole purpose is to present some concepts in a simplified form as a prelude to the more detailed description that is discussed later.
A primary object of the present invention is to provide a switching circuit, which can adjust the rise time and the fall time, and the circuit has a small size and a wide application range.
According to an aspect of the present invention, a switching circuit includes a first MOSFET and a control circuit for controlling the first MOSFET to be turned on and off; the first MOSFET is a P-channel MOSFET; the control circuit comprises a first control loop and a second control loop; the first control loop is connected with the grid electrode of the first MOSFET and used for controlling the grid electrode level of the first MOSFET; the second control loop is connected between the gate and the source of the first MOSFET and is used for adjusting the rising time and the falling time of the drain voltage of the first MOSFET.
The utility model discloses a switching circuit need not draw forth reference voltage from the winding secondary, therefore the circuit is small, application scope is wide.
Drawings
The above and other objects, features and advantages of the present invention will be more readily understood by reference to the following description of the embodiments of the present invention taken in conjunction with the accompanying drawings. The components in the figures are meant only to illustrate the principles of the present invention. In the drawings, the same or similar technical features or components will be denoted by the same or similar reference numerals.
Fig. 1 is a circuit diagram of a conventional switching circuit;
FIG. 2 is a schematic diagram of the switching circuit of FIG. 1 charging C163 while Q156 is on;
FIG. 3 is a schematic diagram of the switching circuit of FIG. 1 discharging C163 when Q156 is off;
FIG. 4 is a timing diagram of the potentials at various points of the switch circuit of FIG. 1;
fig. 5 is a circuit diagram of a switching circuit according to a first embodiment of the present invention;
FIG. 6 is a schematic diagram of the switch circuit of FIG. 5 charging C163 when Q156 is on;
FIG. 7 is a schematic diagram of the switching circuit of FIG. 5 discharging C163 when Q156 is off;
FIG. 8 is a timing diagram of the potentials at various points of the switch circuit of FIG. 5;
fig. 9 is a circuit diagram of a switching circuit according to a second embodiment of the present invention;
FIG. 10 is a schematic diagram of the switching circuit of FIG. 9 charging C163 while Q156 is on;
FIG. 11 is a schematic diagram of the switching circuit of FIG. 9 discharging C163 when Q156 is off;
fig. 12 is a timing chart of potentials at respective points of the switch circuit of fig. 9.
Detailed Description
Embodiments of the present invention will be described below with reference to the drawings. Elements and features described in one drawing or one embodiment of the invention may be combined with elements and features shown in one or more other drawings or embodiments. It should be noted that the figures and descriptions have omitted, for the sake of clarity, the representation and description of components and processes that are not relevant to the present invention and known to those of ordinary skill in the art.
Fig. 5 is a circuit diagram of a switching circuit according to a first embodiment of the present invention.
In this embodiment, the switching circuit includes a first MOSFET (Q156) and a control circuit for controlling the first MOSFET to be turned on and off.
Wherein, the first MOSFET is a P-channel MOSFET.
The control circuit comprises a first control loop 10 and a second control loop 20. The first control loop 10 is connected to the gate of the first MOSFET (Q156) for controlling the gate level of the first MOSFET (Q156).
The second control loop 20 is connected between the gate and source of the first MOSFET (Q156) for adjusting the rise time and fall time of the drain voltage of the first MOSFET (Q156).
As an embodiment, the first control loop 10 may include a first capacitor C162, a first resistor R165, a second resistor R169, a third resistor R167, and a second mosfet q 161.
A first end of the first capacitor C162, a first end of the first resistor R165, and a gate of the second mosfet q161 are connected to the control voltage terminal CON.
A second terminal of the first capacitor C162 and a second terminal of the first resistor R165 are coupled to a source of the second mosfet q 161.
The drain of the second mosfet q161 is connected to the gate of the first mosfet q156 via a second resistor R169 and a third resistor R167 in series.
The second control loop 20 may include a second capacitor C163 and a fourth resistor R166.
First ends of the second capacitor C163 and the fourth resistor R166 are connected to the external power source VIN. Second ends of the second capacitor C163 and the fourth resistor R166 are connected to the gate of the first mosfet q156 via a third resistor R167.
Preferably, the switch circuit of the present embodiment may further include a third capacitor C153E. A first terminal of the third capacitor C153E is connected to the drain of the first mosfet q156, and a second terminal of the third capacitor C153E is connected to ground.
As shown in fig. 6 and fig. 7, when the control voltage terminal CON is at low level (low), Q161 is turned off, and the potential at point B is equal to the potential of VIN.
When the voltage of the control voltage terminal CON is set from low (low) to high (high), Q161 is turned on, and the potential at the point B is discharged to ground through the resistor R169 until the potential at the point B is equal to the divided voltage of R166 and R169 (assuming that the voltage drop at the point B161 is 0V), Q156 is turned on, and the discharge time of the potential at the point B can be changed by adjusting the resistance of R166 and the capacitance of C163, thereby realizing the Tr adjustment of VOUT.
When the voltage of the control voltage terminal CON is changed from high (high) to low (low), Q161 is turned off, VIN charges the potential at the point B through R166 until the potential is equal to VIN, and Q156 is turned off at this time, and the discharging time of the potential at the point B can be changed by adjusting the resistance of R166, so that Tf adjustment of the potential VOUT can be realized.
As shown in fig. 8, a timing chart of potentials of nodes in the switching circuit of the present embodiment is shown. When the voltage of the control voltage terminal CON becomes high, the output voltage VOUT becomes high after Tr, and when the voltage of the control voltage terminal CON becomes low, the output voltage VOUT becomes low after Tf.
Fig. 9 shows a switching circuit according to a second embodiment of the present invention.
Compared to the switching circuit of the first embodiment, the switching circuit of the second embodiment further comprises an accelerated discharge loop 30.
The accelerated discharge circuit 30 is connected between the first end of the third resistor R167 and the drain of the first mosfet q156, for further shortening the rise time Tr and the fall time Tf of the drain voltage of the first mosfet q 156.
As an embodiment, the accelerated discharge circuit 30 may include a fifth resistor R171, a sixth resistor R173, a seventh resistor R172, a first diode D150, a fourth capacitor C156, and a third mosfet q 162;
the fifth resistor R171 is connected in parallel with the fourth capacitor C156, and first ends of the fifth resistor R171 and the fourth capacitor C156 are grounded to the source of the third MOSFET Q162.
The fifth resistor R171 and the second terminal of the fourth capacitor C156, and the gate of the third mosfet q162 are connected to the anode of the first diode D150.
The drain of the third mosfet q162 is connected between the second resistor and the third resistor.
The cathode of the first diode D150 is connected to the control voltage terminal CON1 through the sixth resistor R173.
A first terminal of the seventh resistor R172 is connected to the second terminal of the fourth capacitor C156, and a second terminal of the seventh resistor R172 is connected to the drain of the first mosfet q 156.
Preferably, the second control loop 20 further includes a second diode D161 and a fourth mosfet q 163.
The anode of the second diode D161 is grounded, and the cathode of the second diode D161 is connected to the drain of the fourth mosfet q 163. The drain of the fourth MOSFET Q163 is also connected to a first terminal of a fourth resistor R166.
A gate of the fourth MOSFET Q163 is connected to the control voltage terminal CON, and a source of the fourth MOSFET Q163 is connected to the external power source VIN.
As shown in fig. 10 and 11, when the control voltage terminal CON is at low level (low), Q161 is turned off, Q163 is turned on (assuming that the voltage drop of Q163 on is 0V), and the potential at point B is equal to the potential of VIN.
When the voltage of the control voltage terminal CON is set from low (low) to high (high), Q161 is turned on, Q163 is turned off, and the potential at the point B is discharged to ground through the resistor R169 until the potential at the point B is equal to the divided voltage of R166 and R169 (assuming that the voltage drop at the point B when Q161 is turned on is 0V), Q156 is turned on, and the length of discharge time of the potential at the point B can be changed by adjusting the resistance value of R166 and the capacitance value of C163, thereby realizing Tr adjustment of VOUT potential. The capacitor C156 is charged by R172 while VOUT rises, and when the potential at point C is greater than the threshold voltage VTH of Q162, Q162 is saturated and turned on (assuming that the voltage drop of Q162 on is 0V), and the potential at point B is discharged to 0V through Q162. Thus, the discharge at the point B can be accelerated, so that VOUT quickly reaches the target point.
When the voltage CON at the control voltage end is changed from high (high) to low (low), Q161 is turned off, Q163 is turned on (assuming that the turn-on voltage of Q161 is 0V), VIN charges the potential at point B through R166 until the potential is equal to VIN, the switch Q156 is turned off, and the discharge time of the potential at point B can be changed by adjusting the resistance of R166, so as to realize Tf adjustment of the potential VOUT.
Adopt the utility model discloses a switching circuit need not draw forth reference voltage from the winding secondary, therefore the circuit is small, application scope is wide.
Some embodiments of the invention have been described in detail above. As will be understood by those skilled in the art, all or any of the steps or components of the method and apparatus of the present invention may be implemented in any computing device (including processors, storage media, etc.) or network of computing devices, in hardware, firmware, software, or any combination thereof, which can be implemented by those skilled in the art using their basic programming skills with the understanding that the present invention is not required to be described in detail herein.
It should be emphasized that the term "comprises/comprising" when used herein, is taken to specify the presence of stated features, elements, steps or components, but does not preclude the presence or addition of one or more other features, elements, steps or components.
Although the present invention and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present invention, processes, machines, means, methods, or steps, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present invention. Accordingly, the appended claims are intended to include within their scope such processes, devices, means, methods, or steps.

Claims (8)

1. A switching circuit comprising a first MOSFET and a control circuit for controlling the first MOSFET to turn on and off,
the first MOSFET is a P-channel MOSFET;
the control circuit comprises a first control loop and a second control loop;
the first control loop is connected with the grid electrode of the first MOSFET and used for controlling the grid electrode level of the first MOSFET;
the second control loop is connected between the gate and the source of the first MOSFET and is used for adjusting the rising time and the falling time of the drain voltage of the first MOSFET.
2. The switching circuit of claim 1, wherein:
the first control loop comprises a first capacitor, a first resistor, a second resistor, a third resistor and a second MOSFET;
wherein,
the first end of the first capacitor, the first end of the first resistor and the grid electrode of the second MOSFET are connected to a control voltage end;
the second end of the first capacitor and the second end of the first resistor are connected with the source electrode of the second MOSFET;
the drain of the second MOSFET is connected to the gate of the first MOSFET via a second resistor and a third resistor in series.
3. The switching circuit of claim 2, wherein:
the second control loop comprises a second capacitor and a fourth resistor;
wherein,
first ends of the second capacitor and the fourth resistor are connected to an external power supply;
and the second ends of the second capacitor and the fourth resistor are connected to the grid electrode of the first MOSFET through the third resistor.
4. The switching circuit according to any one of claims 2 or 3, further comprising a third capacitor;
the first end of the third capacitor is connected to the drain of the first MOSFET, and the second end of the third capacitor is grounded.
5. The switching circuit of claim 4, further comprising an accelerated discharge circuit;
the accelerated discharge loop is connected between the first end of the third resistor and the drain of the first MOSFET and is used for further shortening the rising time and the falling time of the drain voltage of the first MOSFET.
6. The switching circuit of claim 5, wherein:
the accelerated discharge loop comprises a fifth resistor, a sixth resistor, a seventh resistor, a first diode, a fourth capacitor and a third MOSFET;
wherein,
the fifth resistor is connected with the fourth capacitor in parallel, and first ends of the fifth resistor and the fourth capacitor are grounded with a source electrode of the third MOSFET;
the second ends of the fifth resistor and the fourth capacitor and the grid electrode of the third MOSFET are connected with the anode of the first diode;
the drain electrode of the third MOSFET is connected between the second resistor and the third resistor;
the cathode of the first diode is connected to a control voltage end through the sixth resistor;
and a first end of the seventh resistor is connected with a second end of the fourth capacitor, and a second end of the seventh resistor is connected to the drain electrode of the first MOSFET.
7. The switching circuit of claim 6, wherein:
the second control loop further comprises a second diode and a fourth MOSFET;
the anode of the second diode is grounded, and the cathode of the second diode is connected to the drain of the fourth MOSFET;
the drain of the fourth MOSFET is also connected to the first end of the fourth resistor;
a gate of the fourth MOSFET is connected to the control voltage terminal;
the source of the fourth MOSFET is connected to the external power supply.
8. The switching circuit of claim 6, wherein:
the control voltage end and the control voltage end are the same control voltage end.
CN201420447399.3U 2014-08-08 2014-08-08 Switching circuit Expired - Lifetime CN204013456U (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201420447399.3U CN204013456U (en) 2014-08-08 2014-08-08 Switching circuit
TW103222603U TWM501051U (en) 2014-08-08 2014-12-19 Switch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201420447399.3U CN204013456U (en) 2014-08-08 2014-08-08 Switching circuit

Publications (1)

Publication Number Publication Date
CN204013456U true CN204013456U (en) 2014-12-10

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201420447399.3U Expired - Lifetime CN204013456U (en) 2014-08-08 2014-08-08 Switching circuit

Country Status (2)

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CN (1) CN204013456U (en)
TW (1) TWM501051U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107612534A (en) * 2017-09-18 2018-01-19 深圳市沃特沃德股份有限公司 On-off circuit and terminal device
CN110571917A (en) * 2019-09-30 2019-12-13 华勤通讯技术有限公司 Switching control circuit and electronic equipment

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107612534A (en) * 2017-09-18 2018-01-19 深圳市沃特沃德股份有限公司 On-off circuit and terminal device
CN110571917A (en) * 2019-09-30 2019-12-13 华勤通讯技术有限公司 Switching control circuit and electronic equipment

Also Published As

Publication number Publication date
TWM501051U (en) 2015-05-11

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20210120

Address after: 523290 Xincheng District, Shijie Town, Dongguan City, Guangdong province (Delta Industrial Zone)

Patentee after: DELTA ELECTRONICS (DONGGUAN) Co.,Ltd.

Address before: 523308 Xincheng District, Shijie Town, Dongguan City, Guangdong Province

Patentee before: DELTA ELECTRONICS POWER (DONG GUAN) Co.,Ltd.

CX01 Expiry of patent term
CX01 Expiry of patent term

Granted publication date: 20141210