CN204991747U - AlGaInP base LED of lateral wall alligatoring - Google Patents

Abstract

AlGaInP base LED of lateral wall alligatoring belongs to the semiconductor technology field. Metallic bonding layer, ODR speculum, epitaxial layer, n type extension electrode and central electrode has set gradually on having the permanent substrate of back electrode, the ODR speculum comprises metallic reflective layer and medium rete, and the medium rete is connected with the epitaxial layer, metallic reflective layer and metallic bonding layer are connected, N type extension electrode and central electrode electrical connection, characteristics are that epitaxial layer surface and lateral wall are the alligatoring form. The utility model discloses can improve electric light conversion efficiency, extension LED's life -span, to the LED display screen, can increase the visible angle, improve the display effect of LED screen.

Description

AlGaInP-based LEDs with roughened sidewalls

technical field

The utility model relates to a structure technology of an AlGaInP-based LED with a roughened side wall, which belongs to the technical field of semiconductors.

Background technique

The AlGaInP-based material that matches the GaAs substrate lattice is a direct bandgap semiconductor. By adjusting the ratio of Al and Ga, the forbidden band width can be changed between 1.9eV and 2.3eV, and the wavelength range of AlGaInP-based LEDs can cover 550nm -650nm. Therefore, AlGaInP-based materials have been widely used in the manufacture of red, orange, and yellow-green LEDs. Since the refractive index n of AlGaInP-based materials is as high as 3.0 to 3.5, it is much higher than conventional LED packaging materials such as epoxy resin and silica gel (n≈1.5). According to the law of total reflection of light, it can be seen that when light enters an optically thinner medium from an optically denser medium, total reflection will occur at the interface, and the greater the difference in refractive index on both sides of the interface, the smaller the critical angle of total reflection. This makes the light extraction efficiency of AlGaInP-based LEDs very low. In fact, this problem also exists in GaAs LED and GaN LED.

In this regard, I. Schnitzer et al. proposed a method of improving the external quantum efficiency of GaAs LED by roughening the surface [Appl.Phys.Lett., Vol.63, No.16, 2174-2176, (1993)]. S.Fan et al. proposed to use two-dimensional photonic crystals to couple the light emitted by the active region, thereby improving the light extraction efficiency [Phys.Rev.Lett., Vol.78, No.17, 3294-3297, (1997)]. M.R.Krames cut the AlGaInPLED chip into a truncated-inverted-pyramid (truncated-inverted-pyramid), so as to change the angle between the light incident on the side wall and the normal direction of the side wall, reduce the total reflection of the interface, and improve the light output efficiency [Appl . Phys. Lett., Vol.75, No.16, 2365-2367, (1999)]. C.S.Chang et al. used photolithography to prepare mask patterns, and then used ICP dry etching to form semicircular periodic patterns on the side walls of GaN LEDs to improve light extraction efficiency [IEEEPhotonic.Technol.Lett.,Vol.16,No.3,750-752 , (2004)].

Among the above methods, the method of improving the light extraction efficiency of LEDs through surface roughening has been widely adopted in the industry and has become a common technique in the LED industry. In AlGaInP-based LEDs, the existing technology is mainly to roughen the surface of the epitaxial layer, and there are only a few reports on the sidewall roughening method. Zuo Zhiyuan and others proposed a method of preparing mask patterns by photolithography, and then using wet etching to form periodic patterns on the side walls of AlGaInPLEDs, see Chinese Patent Application No. 201310108349.2.

But so far, non-periodic and random sub-micron-sized patterns cannot be realized by conventional photolithography methods for preparing mask patterns.

Utility model content

Aiming at the above-mentioned problem that the light extraction efficiency of AlGaInP-based LEDs is very low due to interface total reflection phenomenon, on the basis of the existing surface roughening technology, the utility model proposes an AlGaInP-based LED structure with roughened side walls.

The utility model is provided with a metal bonding layer, an ODR reflector, an epitaxial layer, an n-type extended electrode and a main electrode in sequence on a permanent substrate with a back electrode; the ODR reflector is composed of a metal reflective layer and a dielectric film layer, and the dielectric film The layer is connected with the epitaxial layer; the metal reflective layer is connected with the metal bonding layer; the n-type extended electrode is electrically connected with the main electrode; it is characterized in that the surface and side walls of the epitaxial layer are roughened.

The utility model has the beneficial effects: (1) the light extraction efficiency of the AlGaInP-based LED can be further improved, and the brightness of the LED chip can be increased by 10% to 30%, thereby improving the electro-optical conversion efficiency; (2) due to the improvement of the light output efficiency, the light absorbed by the LED material itself (3) Due to the roughening of the side wall, the light-emitting angle of the LED chip increases accordingly, which can increase the viewing angle and improve the viewing angle of the LED display screen. The display effect of the LED screen.

Furthermore, the appearance of the roughened shape in the present invention is a non-periodic random pattern, and the size of the pattern is submicron. Such submicron-scale patterns have dimensions comparable to those of visible light in the wavelength range of 380nm to 760nm. Non-periodic random patterns can have scattering and diffraction effects on light of different wavelengths. If it is a periodic regular pattern, it is only effective for light of a specific wavelength. Since the LED described in the utility model is a visible light LED, the submicron-level graphics can more effectively scatter and diffract light in this band.

The size of the pattern is 100nm-1μm.

The epitaxial layer described in the utility model can adopt a conventional epitaxial layer, including: p-GaP window layer, p-AlGaInP confinement layer, MQW multi-quantum well active layer, n-AlGaInP confinement layer, n-AlGaInP current spreading layer, n-type Roughened layer, n-GaAs ohmic contact layer.

In the utility model, along the thickness direction of the LED, the side wall of the p-GaP window layer of the epitaxial layer is not roughened, partially roughened, or completely roughened. If the scribe line etching depth just reaches the p-GaP surface during production processing, the p-GaP sidewall will be in an unroughened state; if the scribe line is etched to a certain depth inside the p-GaP, the p-GaP sidewall will be partially Coarsened state; if the kerf runs through p-GaP, the p-GaP sidewall will be in a fully roughened state, and all three states are normal.

The dielectric film layer of the ODR mirror is at least any one of SiO ₂ , Si ₃ N ₄ , MgF ₂ , and ITO, and the metal reflection layer is at least any one of Ag, Al, Au, AuZn alloy, and AuBe alloy. . The starting point of this design is to obtain an ODR mirror with high reflectivity, and the dielectric film layer and the metal reflective layer can be combined in different ways.

Description of drawings

FIG. 1 is a schematic diagram of the structure of an ODR mirror and a metal bonding layer fabricated on the surface of an epitaxial wafer during the fabrication process.

FIG. 2 is a schematic diagram of the structure after the metal bonding layer is fabricated on the permanent substrate during the fabrication process.

Fig. 3 is a schematic cross-sectional structure diagram of the utility model.

FIG. 4 is a top view of FIG. 3 .

FIG. 5 is another top view of FIG. 3 .

Fig. 6 is a typical surface morphology of the roughened epitaxial layer surface or sidewall of the present invention taken by a scanning electron microscope.

detailed description

One, as shown in Figure 1 and 2 is the structural representation of the preferred example of the present utility model in the manufacturing process, and the manufacturing steps are as follows:

1. As shown in FIG. 1, MOCVD equipment is used to grow an epitaxial layer on a GaAs temporary substrate 101. The epitaxial layer includes a buffer layer 102, a GaInP cut-off layer 103, an n-GaAs ohmic contact layer 104, an n-AlGaInP roughening layer 105, n-AlGaInP current spreading layer 106 , n-AlGaInP confinement layer 107 , MQW multi-quantum well active layer 108 , p-AlGaInP confinement layer 109 , p-GaP window layer 110 .

The n-GaAs ohmic contact layer 104 preferably has a thickness of 20nm to 100nm, a doping concentration above 1×10 ¹⁹ cm ⁻³ , and Si as the doping element, so as to form a good ohmic contact with the n-type extended electrode 204 . The preferred thickness of the p-GaP window layer 110 is 600nm to 8000nm, the doping concentration is above 1×10 ¹⁸ cm ^-3 , and the doping element is Mg, so as to ensure good ohmic contact and current spreading ability of the p-plane.

Use acetone, isopropanol, and deionized water to clean the p-GaP window layer 110 on the front side of the epitaxial wafer successively, blow dry with nitrogen, and deposit SiO _on the p-GaP window layer Dielectric film layer 111, by spin-coating positive photoresist , exposure, and development to make a mask pattern, use BOE solution to etch the SiO ₂ (or any one or combination of Si ₃ N ₄ , MgF ₂ , ITO) dielectric film layer 111 to form conductive holes, and on the surface of the dielectric film layer 111 AuZn with a thickness of 300 nm and Al with a thickness of 500 nm were evaporated as the metal reflective layer 112 . The metal reflective layer 112 may also use any one or combination of Ag, Al, Au, AuZn alloy, and AuBe alloy. The ODR mirror is composed of the SiO ₂ dielectric film layer 111 and the AuZn/Al metal reflection layer 112. At the same time, AuZn and the p-GaP window layer in the conductive hole of the SiO ₂ dielectric film are annealed at 440°C for 10 minutes to form good electrical contact.

Au with a thickness of 1000 nm was vapor-deposited on the prepared ODR mirror as the metal bonding layer 113 .

2. As shown in FIG. 2 , evaporate Au with a thickness of 1000 nm on the permanent substrate—Si substrate 201 as the metal bonding layer 202 .

The permanent substrate can also be any one of Mo substrate, Cu substrate, SiC substrate, Ge substrate, molybdenum-copper alloy substrate or tungsten-copper alloy substrate.

3. Immerse the product made in step 1 and the product made in step 2 into the acetone solution for ultrasonic cleaning for 10 minutes, then rinse with isopropanol and deionized water respectively, and blow dry with nitrogen. The metal bonding layers 113 and 202 are opposed to each other, and the two are bonded together at 300° C. under a pressure of 5000 kg for 20 minutes.

4. Use mechanical grinding to thin the GaAs substrate 101, the temporary substrate of the product produced in step 3, to the remaining 20 μm, and then etch it with a mixed solution of NH ₄ OH and H ₂ O ₂ with a volume ratio of 1:5 10min, remove the GaAs temporary substrate 101 and the buffer layer 102, stop the chemical etching on the GaInP cut-off layer 103, then immerse in the mixed solution of HCl and H3PO4 with a volume ratio of ₁ : ₂ and etch for 1min, remove the GaInP cut-off layer 103, The n-GaAs ohmic contact layer 104 is exposed.

5. Spin-coat positive photoresist on the n-GaAs ohmic contact layer 104, after soft baking, exposure, development, and hard baking, then immerse in H ₃ PO ₄ , H ₂ O with a volume ratio of 1:2:2 ₂ and H ₂ O to etch out the pattern of the n-GaAs ohmic contact layer 104, and then remove the glue and clean it.

6. Evaporate an AuGeNi alloy material with a thickness of 400nm by electron beam evaporation on the n-GaAs ohmic contact layer 104 that has been patterned, and then use a volume ratio of 1: after gluing, photolithography, and development. The n-type extended electrode 204 is etched by a 2:5 mixed solution of I ₂ , KI and H ₂ O. Annealing is performed in a nitrogen atmosphere annealing furnace at 350° C. for 10 minutes, so that the n-type extended electrode 204 and the n-GaAs ohmic contact layer 104 form a good electrical contact.

The GaAs can be etched out of the pattern first, and then the n-type extended electrode can be made, or the n-type extended electrode can be made on the surface of the n-GaAs ohmic contact layer, and then the n-GaAs can be etched out of the pattern.

7. Dip the manufactured n-type extended electrode 204 into an acetone solution and ultrasonically clean it for 10 minutes, then rinse it with isopropanol and deionized water in sequence, and dry it with nitrogen. Then carry out the photolithography process, spin-coat negative photoresist, soft bake, expose, develop, and spin-dry, and then perform plasma bonding, and evaporate 4 μm of Au to cover the n-AlGaInP roughening layer 105 and the n-type extended electrode 204 above, the main electrode 205 is formed after peeling off. The main electrode 205 may partially cover or completely cover the n-type extended electrode 204, as shown in FIG. 4 and FIG. 5 respectively.

In FIG. 4 , the main electrode 205 partially covers the extension electrode 204 , and in FIG. 5 the main electrode 205 completely covers the extension electrode 204 .

The pattern of the etched n-GaAs ohmic contact layer 104 and the pattern of the n-type extended electrode 204 can be the same or different.

8. Spin-coat positive photoresist on the surface with n-type extended electrode 204 and main electrode 205, soft bake, expose, develop, and hard bake to form a masking layer pattern when etching dicing lines, and then use ICP dry etching to epitaxy layer, the depth of which reaches the p-GaP window layer 110, forming dicing lines, and then removing the glue and cleaning.

Any one of wet etching, blade cutting, and laser cutting may be used for etching the dicing lines.

9. Immerse the product with the scribe line in the mixed solution of H ₃ PO ₄ , H ₂ SO ₄ , and CH ₃ COOH with a volume ratio of 1:1:7. The wall is roughened to form non-periodic and random sub-micron-sized topography. The typical topographic features are shown in Figure 6. The size of the pattern is sub-micron and has a size comparable to that of the visible light wavelength range of 380nm to 760nm.

Along the depth direction of the scribe line, the sidewall of the p-GaP window layer 110 of the epitaxial layer may be unroughened, partially roughened, or completely roughened.

10. Evaporate Ti and Au with a thickness of 20nm and 100nm respectively on the back of the permanent substrate——Si substrate 201 , by means of electron beam thermal evaporation to complete the fabrication of the back electrode of the device.

When the permanent substrate is any one of Si substrate, Ge substrate, and SiC substrate, step 10 needs to include three items: substrate thinning, back electrode evaporation, and back electrode alloy.

2. The structural characteristics of the finished product:

As shown in Figures 3, 4, and 5, metal bonding layers 202 and 113, ODR mirrors 112 and 111, epitaxial layers 104-110, and n-type extended electrodes 204 are sequentially arranged on a permanent substrate 201 with a back electrode 203 and main electrode 205 .

Wherein, the ODR mirror is composed of a metal reflection layer 112 and a dielectric film layer 111, and the dielectric film layer 111 is connected to the epitaxial layer; the metal reflection layer 112 is connected to the metal bonding layer 113; the n-type extended electrode 204 and the main electrode 205 are electrically connect.

The epitaxial layer includes: p-GaP window layer 110, p-AlGaInP confinement layer 109, MQW multi-quantum well active layer 108, n-AlGaInP confinement layer 107, n-AlGaInP current spreading layer 106, n-type roughening layer 105, n - GaAs ohmic contact layer 104 . The surface and sidewall of the epitaxial layer of the LED chip are roughened, and the morphology is aperiodic random pattern. The characteristic size of the pattern is 100nm to 1μm, which is a submicron level, and has a wavelength range of 380nm to 760nm compared with that of visible light. size.

Claims (5)

1. AlGaInP-based LEDs with roughened side walls are provided with a metal bonding layer, an ODR reflector, an epitaxial layer, an n-type extended electrode, and a main electrode in sequence on a permanent substrate with a back electrode; the ODR reflector is composed of a metal reflective layer Composed of a dielectric film layer, the dielectric film layer is connected to the epitaxial layer; the metal reflective layer is connected to the metal bonding layer; the n-type extended electrode is electrically connected to the main electrode; it is characterized in that the surface and sidewall of the epitaxial layer are roughened . 2 . The AlGaInP-based LED with roughened sidewalls according to claim 1 , wherein the roughened shape is a non-periodic random pattern, and the size of the pattern is submicron. 3. The AlGaInP-based LED with roughened side walls according to claim 2, characterized in that the size of the pattern is 100 nm-1 μm. 4. The AlGaInP-based LED with roughened side walls according to claim 1, 2 or 3, wherein the epitaxial layer comprises: a p-GaP window layer, a p-AlGaInP confinement layer, an MQW multi-quantum well active layer, n-AlGaInP confinement layer, n-AlGaInP current spreading layer, n-type roughening layer, n-GaAs ohmic contact layer. 5. The AlGaInP-based LED with roughened sidewalls according to claim 4, characterized in that along the thickness direction of the LED, the sidewalls of the p-GaP window layer of the epitaxial layer are not roughened, or partially roughened, or completely Any one of coarsening.