CN207992653U - Liquid crystal display device - Google Patents

Abstract

The utility model provides a liquid crystal display device, which can prevent water from invading into the liquid crystal display device and cause air bubbles to be generated. In this liquid crystal display device, a TFT substrate (100) having a display area and a peripheral area and an opposite substrate (200) are bonded together by a sealing material (150) in the peripheral area, and a liquid crystal (300) is sealed inside, which It is characterized in that the TFT substrate (100) has an organic passivation film (108) and an inorganic insulating film (110) formed thereon. The organic passivation film (108) has a groove portion (1081) formed parallel to the side of the TFT substrate (100) in the peripheral region and the organic passivation film (108) does not exist. The outside of the groove (1081) has a frame-shaped portion with a predetermined width, and the side wall of the organic passivation film (108) outside the frame-shaped portion is covered with the inorganic insulating film (110).

Description

Liquid crystal display device

technical field

The utility model relates to a display device, in particular to a liquid crystal display device capable of preventing air bubbles generated in a display area.

Background technique

The liquid crystal display device is configured by disposing a TFT substrate in which pixels having pixel electrodes, thin film transistors (TFTs), etc. Holds liquid crystals. And, an image is formed by controlling light transmittance of liquid crystal molecules for each pixel.

In a liquid crystal display device, dark spots may occur in a display region, particularly in a peripheral portion. This is considered to be the effect of moisture intrusion into the liquid crystal. There has been a method of absorbing moisture that has penetrated into a liquid crystal display device so that even if moisture penetrates into the liquid crystal display device, the influence on the liquid crystal can be suppressed to a small amount.

Patent Document 1 describes a structure in which black spots are prevented by providing grooves in the peripheral portion of an organic passivation film formed on a TFT substrate and forming a moisture absorbing layer in the grooves.

prior art literature

patent documents

Patent Document 1: Japanese Patent Laid-Open No. 2016-38434

Utility model content

Dark spots are often generated when the liquid crystal display device is operated for a long time. On the other hand, if much water enters into the liquid crystal display device, air bubbles 501 may be generated in the liquid crystal layer as shown in FIG. 1 due to vaporization of the water. Bubbles are observed with the naked eye as black spots, which seriously affect the display quality.

The structure described in Patent Document 1 is also provided with an adsorption layer for adsorbing moisture intruded into the liquid crystal display device, but a material not generally used in liquid crystal display devices is used as the adsorption layer. That is, materials other than those necessary for the operation of the liquid crystal display device are used as other components. This existing method has the following problems.

(1) Since separate components are disposed through separate processes, component costs and processes increase, resulting in increased manufacturing costs. (2) Since materials other than those necessary for the operation of the liquid crystal display device are used, it is necessary to check whether the display performance is affected when the liquid crystal display device is operated for a long time.

The technical problem of the present invention is to realize a structure that prevents moisture from intruding into the liquid crystal display device in order to prevent generation of black spots or air bubbles. Furthermore, such a configuration can be realized without increasing manufacturing costs or reducing reliability.

The utility model can solve the above problems, and the specific solutions are as follows.

(1) A liquid crystal display device in which a TFT substrate having a display area and a peripheral area and a counter substrate are bonded together with a sealing material in the peripheral area, and liquid crystal is sealed inside, wherein the liquid crystal display device is characterized in that The TFT substrate has an organic passivation film and an inorganic insulating film formed on the organic passivation film, the organic passivation film has a groove in the peripheral region, and the groove is formed parallel to the sides of the TFT substrate, In addition, the organic passivation film is not provided, and a frame-shaped portion with a predetermined width is provided outside the groove portion, and a side wall outside the frame-shaped portion of the organic passivation film is covered with the inorganic insulating film.

(2) The liquid crystal display device according to (1), wherein a side wall of the organic passivation film at the groove portion of the organic passivation film is covered with the inorganic insulating film.

(3) The liquid crystal display device according to (1), wherein the side wall outside the frame-shaped portion of the organic passivation film is covered with the inorganic insulating film over the entire circumference.

Description of drawings

FIG. 1 is a top view of a liquid crystal display device to which the present invention is applied.

2 is a cross-sectional view of a display region of a liquid crystal display device.

Fig. 3 is a sectional view along line A-A of Fig. 1 .

4 is a plan view showing the formation range of the organic passivation film and the inorganic insulating film on the TFT substrate in the present invention.

FIG. 5 is an enlarged plan view of a part of the TFT substrate corresponding to the region in FIG. 3 .

Fig. 6 is a B-B sectional view of Fig. 1 .

FIG. 7 is an enlarged plan view of a part of the TFT substrate corresponding to the region in FIG. 6 .

FIG. 8 is a plan view showing an example of a motherboard.

9 is a plan view of the TFT substrate showing the formation range of the organic passivation film and the inorganic insulating film at the boundary between cell A and cell B in FIG. 8 .

Explanation of reference signs

10...scanning line, 11...image signal line, 12...pixel, 20...exit line, 30...liquid crystal cell, 40...wiring for driving circuit, 100...TFT substrate, 101...underlayer, 102...semiconductor layer, 103...gate Electrode insulating film, 104...gate electrode, 105...interlayer insulating film, 106...drain electrode, 107...source electrode, 108...organic passivation film, 109...common electrode, 110...capacitor insulating film, 111...pixel Electrode, 112...Orientation film, 121...Through hole, 122...Through hole, 130...Through hole, 150...Sealing material, 160...IC driver, 170...Terminal part, 200...Counter substrate, 201...Color filter, 202...black matrix, 203...protective film, 204...alignment film, 210...main columnar spacer, 211...sub-columnar spacer, 220...wall spacer, 300...liquid crystal layer, 301...liquid crystal molecules, 500...display area , 501...bubble, 1000...mother substrate, 1021...drain region, 1022...source region, 1041...light-shielding film, 1081...groove of organic passivation film, 1082...organic passivation film removal part, 2011...light-shielding layer (Color filter layer laminated), 2021...Groove of black matrix (for water blocking), 2022...Groove of black matrix (for antistatic)

Detailed ways

Below use embodiment to illustrate content of the present utility model.

【Example 1】

FIG. 1 is a top view of a liquid crystal display device to which the present invention is applied. In FIG. 1 , a TFT substrate 100 and a counter substrate 200 are bonded together with a sealing material 150 , and a liquid crystal is sandwiched between the TFT substrate 100 and the counter substrate 200 . The TFT substrate 100 is formed larger than the counter substrate 200 , and a portion of the TFT substrate 100 that does not overlap the counter substrate serves as a terminal portion 170 . The IC driver 160 for driving the liquid crystal display panel is mounted on the terminal portion 170 , and terminals connected to the flexible wiring board for supplying power, video signals, scanning signals, and the like are formed on the liquid crystal display panel.

In FIG. 1 , scan lines 10 extend laterally in a display area 500 and are arranged vertically. In addition, the video signal lines 11 extend vertically and are arranged horizontally. Areas surrounded by the scanning lines 10 and the video signal lines 11 serve as pixels 12 . At the narrow frame, the distance w between the end of the display area 500 and the end of the liquid crystal display device is as small as 1 mm or less. Thus, the width of the sealing material is also reduced, but if the width of the sealing material is reduced, external moisture can easily reach the liquid crystal layer in the display region. When the width w of the frame in FIG. 1 is, for example, 600 nm, the width of the sealing material can only be, for example, about 400 nm.

On the TFT substrate 100 constituting the liquid crystal display device, an organic passivation film made of an organic material such as acrylic acid is formed in order to planarize the pixel region. The organic passivation film has a role as a planarizing film, so it is formed to be relatively thick at 2 μm to 4 μm. Since the organic passivation film is thick, if it is formed only in the display region 500, the thickness of the display region and the frame region will become uneven. Therefore, it is necessary to form an organic passivation film up to the edge part of a liquid crystal display device.

On the other hand, the organic material constituting the organic passivation film allows moisture to permeate easily. The inventors of the present invention found that if the organic passivation film extends to the end of the liquid crystal display device, moisture will pass through the organic passivation film and intrude into the inside. When moisture enters the liquid crystal display device, the moisture may be vaporized to generate air bubbles 501 shown in FIG. 1 in the liquid crystal layer 300 .

Such air bubbles 501 move in the display area 500 . In addition, such air bubbles 501 may be generated or lost due to temperature during operation or the like. In either case, display performance is remarkably degraded because the pixels in which the air bubbles 501 exist cannot achieve display with desired luminance. The utility model is especially used for preventing moisture from penetrating through the organic passivation film and invading the interior of the liquid crystal display device, and preventing bubbles from being generated in the liquid crystal display device.

The present invention is characterized by the structure of the sealing portion, but the sealing portion is formed by the same process as that of the display area, so first, the structure of the display area 500 will be described. FIG. 2 is a cross-sectional view of a pixel portion of the display area 500 . FIG. 2 is a diagram illustrating a cross-sectional structure of a liquid crystal display device of the IPS (In Plane Switching) method (or also referred to as the FFS (fringe field Switching: fringe field switching) method).

In FIG. 2 , a base film 101 is formed on a TFT substrate 100 made of, for example, glass. In order to make the liquid crystal display device bendable, the glass substrate can be formed as thin as 0.2 mm or less, or the TFT substrate 100 can be formed of resin such as polyimide.

The base film 101 has a function of preventing contamination of the semiconductor layer 102 formed later by impurities derived from glass. Base film 101 is generally formed of two layers of a silicon nitride film (hereinafter referred to as SiN film) and a silicon oxide film (hereinafter referred to as SiO film). A semiconductor layer 102 is formed on the base film 101 . The semiconductor layer 102 is first formed of a-Si by CVD, and then converted into Poly-Si by irradiation of an excimer laser. In addition, SiN and SiO constituting the base film 101, and a-Si as a semiconductor layer are continuously formed by CVD.

After the semiconductor layer 102 is patterned, the gate insulating film 103 is formed to cover the semiconductor layer 102 . The gate insulating film 103 is a SiO film made of TEOS (tetraethyl silicate). A gate electrode 104 is formed covering the gate insulating film 103 . The gate electrode 104 is, for example, a MoW alloy. The gate electrode 104 is formed by patterning after sputtering the alloy or the like.

After patterning the gate electrode 104 , P (phosphorus), B (boron) plasma implantation (ion implantation) is performed to impart conductivity to the semiconductor layer 102 except for the region covered by the gate electrode 104 . Thus, a drain region 1021 and a source region 1022 are formed in the semiconductor layer 102 .

Thereafter, an interlayer insulating film 105 is formed of SiN or SiO to cover the gate electrode. The interlayer insulating film 105 can be formed by CVD. Through holes 121 and 122 are formed on the interlayer insulating film 105 and the gate insulating film 103 to realize the connection between the drain region 1021 and the drain electrode 106 of the semiconductor layer 102 and the connection between the source region 1022 and the source electrode 102 of the semiconductor layer. connection between electrodes 107 . The drain electrode 106 is connected to the video signal line 11 , and the source electrode 107 is connected to the pixel electrode 111 through a via hole 130 formed later.

The organic passivation film 108 is formed by covering the drain electrode 106 and the source electrode 107 with acrylic resin or the like. The organic passivation film 108 has a role of a planarizing film, and thus is formed thicker by 2 μm to 4 μm. That is, it can be said that the greater the thickness of the film, the easier it is for water to permeate in the direction parallel to the main surface.

The organic passivation film 108 is formed of a photosensitive resin, so the formation of the via hole 130 does not require additional formation of a resist. The material of the organic passivation film is a positive photosensitive resin, and a through hole 130 is formed in the portion where the light is irradiated. In addition, the organic passivation film 108 can also be formed using silicone resin, polyimide, etc. other than acrylic.

The common electrode 109 is formed planarly on the organic passivation film 108 using an oxide transparent conductive film such as ITO (Indium Tin Oxide: indium tin oxide). The common electrode 109 is formed to be shared by each pixel, but is not formed in the through hole 130 . After the common electrode 109 is patterned, a capacitive insulating film 110 is formed of SiN to cover the common electrode 109 . Capacitive insulating film 110 is formed by CVD. The capacitive insulating film 110 is formed after the organic passivation film 108 is formed, so it cannot be formed at a high temperature, but is formed by low-temperature CVD at about 200°C.

On the capacitive insulating film 110, the pixel electrodes 111 are formed in a comb shape or a stripe shape by using an oxide transparent conductive film such as ITO. The insulating film 110 between the common electrode 109 and the pixel electrode 111 forms a holding capacitance between the pixel electrode and the common electrode, and thus is called a capacitive insulating film 110 .

On the capacitive insulating film 110 , a via hole is formed in the via hole 130 formed in the organic passivation film 108 to connect the pixel electrode 111 to the source electrode 107 .

An alignment film 112 is formed to cover the pixel electrode 111 and the capacitive insulating film 110 . The orientation film 112 determines the initial orientation of the liquid crystal, and the orientation treatment is realized by rubbing treatment or photo-alignment treatment. In the IPS method, an alignment process of photo-alignment is employed. When a video signal is applied to the pixel electrode 111 , lines of electric force shown by arrows are generated between the common electrode 109 and the liquid crystal molecules 301 to rotate, and the transmittance of the liquid crystal layer 300 is controlled for each pixel to form an image.

In FIG. 2 , a counter substrate 200 is arranged with a liquid crystal layer 300 interposed therebetween. When it is desired to provide a flexible display device, the counter substrate 200 can be formed of a resin such as polyimide. A color filter 201 and a black matrix 202 are formed inside the counter substrate 200 . A color filter 201 is arranged in a portion where it is desired to control light from a backlight to form an image, thereby realizing color display. On the other hand, the black matrix 202 is formed in the portion where it is difficult to control the light from the backlight, for example, where the through hole 130 is formed, so as to prevent light leakage.

A protective film 203 is formed of a transparent organic material such as acrylic to cover the color filter 201 and the black matrix 202 . In order to make the thickness of the liquid crystal layer 300 uniform, columnar spacers 210 are formed on the protective film 203 . The columnar spacers include main columnar spacers and sub columnar spacers. The main columnar spacer is a portion that defines the layer thickness of the liquid crystal layer 300 , and the columnar spacer 210 in FIG. 2 is the main columnar spacer.

Therefore, as shown in FIG. 2 , the tip of the main columnar spacer 210 is usually in contact with the TFT substrate 100 side. On the other hand, the sub-columnar spacers are configured to prevent the gap between the TFT substrate 100 and the opposing substrate 200 from being too small when the opposing substrate 200 is pressed. Therefore, the sub-columnar spacer does not normally contact the TFT substrate 100 side, but contacts the TFT substrate 100 side when the counter substrate 200 receives external pressure, preventing the liquid crystal layer 300 from becoming too thin.

Fig. 3 is a sectional view of A-A of Fig. 1, showing the features of the present invention. In FIG. 3 , the TFT substrate 100 and the counter substrate 200 are bonded together by a sealing material 150 , and a liquid crystal 300 is sealed inside the sealing material 150 . A base film 101 , a gate insulating film 103 , and an interlayer insulating film 105 are formed on the TFT substrate 100 . Wiring 40 for a gate line driver circuit and the like is formed on the interlayer insulating film 105, and an organic passivation film 108 is formed to cover these layers.

In liquid crystal display devices in recent years, frame narrowing is advancing, and the organic passivation film 108 is formed on the entire surface of the TFT substrate 100 . Therefore, as will be described in detail later, when the liquid crystal display device is separated from the mother substrate, the organic passivation film 108 is directly exposed as an end surface, especially on the side of the non-terminal portion, as also shown in Patent Document 1. Therefore, in the periphery of the TFT substrate 100 , grooves 1081 are formed in order to block the moisture intrusion path, and the organic passivation film 108 has a frame-shaped portion that is removed. Therefore, the groove portion 1081 can block the water penetrating through the organic passivation film 108 , but the water intrusion path is not limited to this. Moisture also intrudes from the interface between the organic passivation film 108 and the film above it. Therefore, in the present invention, in addition to the groove portion 1081 , the organic passivation film 108 is also removed at the end portion of the TFT substrate 100 . Further, the organic passivation film 108 is covered with a capacitive insulating film 110 made of SiN including its side surface.

Inorganic insulating films, especially SiN, have excellent water-locking properties. That is, by covering the organic passivation film 108 including its side surface with the inorganic insulating film 110 such as SiN, it is possible to prevent the intrusion of moisture from the end face of the organic passivation film 108 . Since the film thickness of the organic passivation film 108 is relatively thick, 2 μm to 4 μm, it is possible to securely prevent the intrusion of moisture into the side surface of the organic passivation film 108 with high reliability. In addition, since the interface between the organic passivation film 108 and the layer formed on the organic passivation film 108 is not exposed at the end, the intrusion of moisture transferred from the interface of the organic passivation film 108 can also be prevented.

4 is a plan view showing the structures of the organic passivation film 108 and the capacitive insulating film 110 formed of an inorganic insulating film in the TFT substrate 100 . In FIG. 4 , the periphery of the TFT substrate 100 is shown enlarged in order to facilitate understanding of the present invention. In FIG. 4 , an organic passivation film 108 is formed on the entire surface of a display region 500 . In the peripheral portion of the TFT substrate 100, the organic passivation film 108 is removed in a groove shape. Accordingly, the organic passivation film 108 is formed in a frame shape outside the groove.

In FIG. 4 , the outer end portion of the frame-shaped organic passivation film 108 and the end portion of the TFT substrate 100 are not in the same plane, and between the outer end portion of the organic passivation film 108 and the end portion of the TFT substrate 100 There is a defined distance dd. That is, there is a removed portion 1082 of the organic passivation film 108 . It is preferable to have the removed portion 1082 of the organic passivation film 108 over the entire circumference.

In FIG. 4 , the organic passivation film 108 is covered with a capacitive insulating film 110 which is an inorganic insulating film in a display region 500 and a frame-shaped portion around it. That is, the organic passivation film 108 is covered with the capacitive insulating film 110 including its side surface. This state is also shown in FIG. 3 . Accordingly, it is possible to reliably prevent moisture from entering the organic passivation film 108 .

Returning to FIG. 3 , in the sealing portion, ITO 111 is formed on the capacitive insulating film 110 , and an alignment film 112 for forming an initial alignment of the liquid crystal layer 300 is formed on the ITO 111 . The alignment film 112 is originally useless in the sealing portion, but since the width of the sealing portion becomes narrow in the case of a narrow frame, it is difficult to remove the alignment film from the sealing portion, so the alignment film also exists in the sealing portion. In the sealing portion, ITO 111 is formed between the capacitive insulating film 110 and the alignment film 112 . That is, this is because, compared with direct bonding between the alignment film 112 and the capacitive insulating film 110 , the adhesive force can be improved when the two are bonded via the ITO 111 .

In addition, although the ITO 111 is formed in the same layer as the pixel electrode 111 , the pixel potential is not applied, but a common voltage is usually applied. That is, at other locations, the common voltage is supplied to the ITO 111 at the sealing portion in FIG. 3 . As shown in FIG. 3 , the ITO 111 on the sealing portion is not electrically connected to the ITO 111 on the display region side.

In FIG. 3 , the counter substrate 200 is bonded to the TFT substrate 200 with the sealing material 150 . A black matrix 202 for shielding light is formed on the sealing portion of the counter substrate 200 and its vicinity. Groove portions 2021 are formed in the black matrix 202 . The groove portion 2021 is formed over the entire circumference along the side of the counter substrate. The black matrix 202 is also made of organic materials, so moisture will penetrate through the black matrix 202 and intrude, and the black matrix groove 2021 prevents moisture from intruding into the inside.

The groove portion 2021 of the black matrix 202 may leak light from the backlight. In order to prevent this, a light shielding film 1041 is formed on the corresponding TFT substrate 100 side. The light shielding film 1041 is formed in the same layer as the gate electrode or the scanning line. In this case, it is formed of MoW (molybdenum-tungsten).

Moreover, the groove part 2022 is formed also in the display area side of the black matrix 202. As shown in FIG. This is because the black matrix 202 has conductivity, so that charges generated in the sealing portion are prevented from moving toward the display region 500 and affecting the display. In addition, the groove portion 2022 of the black matrix is filled with a light-shielding layer 2011 formed by stacking a plurality of phosphors to prevent light leakage.

A protective film 203 is formed to cover the black matrix 202 . Between the black matrix 202 and the protective film 203 , the color filter 201 is formed at the portion of the main column spacer 210 and the wall spacer 220 . The color filter 201 serves as a base for the main columnar spacer 210 and the wall-shaped spacer 220 and is used to adjust the height of the spacer. In addition, wall-shaped spacers 220 are formed over the entire circumference along the sides of the opposite substrate 200 for preventing damage of the opposite substrate 200 when separating each liquid crystal cell from the mother substrate by scribing.

As shown in FIG. 3 , no color filter is formed between the black matrix 202 and the protective film 203 in the portion of the sub-columnar spacer 211 . Therefore, there is a space between the tip of the sub-columnar spacer 211 and the TFT substrate 100 according to the thickness of the color filter. When the opposing substrate 200 is under pressure, the sub-columnar spacer 211 is in contact with the TFT substrate side.

In addition, the diameters of the main columnar spacers 210 and the auxiliary columnar spacers 211 are both The diameter of the columnar spacer is measured at 95% of the height from the base. In FIG. 3 , the main column spacer 210 is formed in the sealing material 150 . On the other hand, the sub-columnar spacer 211 is formed at a portion not overlapping the sealing material 150 . Of course, the main columnar spacers 210 are also formed in the display area 500 .

In FIG. 3 , the end of the capacitive insulating film 110 covering the organic passivation film 108 is inside the distance de from the terminal of the TFT substrate 100 . This is to prevent the capacitive insulating film 110 from cracking when the liquid crystal cell is separated from the mother substrate by scribing so as to prevent the capacitive insulating film 110 from reducing the moisture barrier effect. However, depending on the scribing conditions, there may be cases where the capacitive insulating film 110 is not damaged. Therefore, in such a case, the capacitive insulating film 110 may be aligned with the end of the TFT substrate 100 .

In FIG. 3 , the capacitive insulating film 110 has a thickness of about 70 nm to 120 nm. If it is a high-definition picture, the area of the pixel electrode 111 is reduced. In this case, the thickness of the capacitive insulating film 110 is reduced to about 70 nm in order to secure the holding capacity. The width wd of the groove portion 1081 of the organic passivation film is, for example, 90 μm, the width wf of the frame-shaped organic passivation film 108 formed outside the groove portion 1081 of the organic passivation film is, for example, 40 μm, and the width ws of the sealing material is, for example, 400 μm.

FIG. 5 is an enlarged plan view of a portion corresponding to the TFT substrate 100 of FIG. 3 . As shown in FIG. 5 , the capacitive insulating film 110 is formed to cover the side wall of the organic passivation film 108 facing the groove portion 1081 and the outer side wall of the frame-shaped organic passivation film 108 .

The outer end of the frame-shaped organic passivation film 108 is formed on the inner side by a distance dd than the end of the TFT substrate 100 . Preferably, dd is 50 μm or more. This part becomes the removed part 1082 of the organic passivation film 108 . This is to prevent damage to the end of the organic passivation film 108 and the capacitive insulating film 110 covering the organic passivation film 108 due to scribing.

In addition, the outer end portion of the capacitive insulating film 110 is positioned on the inner side by a distance de from the end portion of the TFT substrate 100 . It is also preferable that de is 50 μm or more. This is to prevent damage to the capacitive insulating film end due to scratching. In addition, even if a crack occurs on the capacitive insulating film, it only needs to function as a barrier part to block moisture intrusion into the organic passivation film. Therefore, depending on the scribing conditions, the capacitive insulating film 110 can also be formed to the end of the TFT substrate 100. until.

In FIG. 5 , the corresponding positions of the main columnar spacers 210 and the secondary columnar spacers 211 are shown by dotted lines. The main columnar spacer 210 is formed overlapping the sealing material, and is also formed on the display region side.

Fig. 6 is a cross-sectional view corresponding to the B-B cross-section in Fig. 1 . That is, FIG. 6 is a cross-sectional view of the sealing portion adjacent to the terminal portion 170 . The configuration of FIG. 6 is basically the same as that of FIG. 3 . On the terminal portion 170 side, since the frame width can be made larger than the frame widths of the other three sides, the width of the sealing material 150 can also be increased, and there is a margin in terms of structure compared with the other three sides.

In the terminal portion 170 , cracks due to scribing are only on the counter substrate 200 side. Therefore, the TFT substrate 100 extends outward beyond the sealing portion. On the TFT substrate 100 side, the lead line 20 extends from the display region 500 side to the terminal portion 170 side between the gate insulating film 103 and the interlayer insulating film 105 . Therefore, the light shielding film 1041 in FIG. 3 is not particularly formed in FIG. 6 .

In addition, since the width of the frame can be increased in the sealing portion on the side of the terminal portion 170 , the alignment film 112 can be formed so as not to overlap the sealing material 150 . Therefore, the sealing material 150 can directly contact the capacitive insulating film 110 without interposing the alignment film 112 , so that the ITO 111 is no longer necessary. There are various methods for specifying the formation range of the alignment film 112, and this method is not particularly shown in FIG. 6 . Others are the same as those described using FIG. 3 .

FIG. 7 is a plan view of the TFT substrate 100 side of FIG. 6 . In FIG. 7 , the TFT substrate 100 extends to the left side of the drawing, that is, to the terminal portion side, beyond the sealing portion. Furthermore, the lead-out line 20 of the signal line extends from the display area 500 to the terminal portion 170 side. The lead line 20 is connected to the IC driver 160 and the like shown in FIG. 1 .

In FIG. 7 , a region enclosed by two-dot chain lines is a sealing portion, and a sealing material 150 is formed therein. The main columnar spacer 210 is formed to overlap the sealing material 150 . In addition, the point that the sub-columnar spacer 211 is formed at a location different from that of the sealing material 150 is the same as in FIG. 5 .

In FIG. 7 , the formation range of the organic passivation film 108 and the formation range of the capacitive insulating film 110 are the same as those described in FIG. 5 . That is to say, the organic passivation film 108 is covered by the capacitive insulating film 110 including its side. Therefore, the organic passivation film 108 is covered with the capacitive insulating film 110 on all sides including its side surfaces.

It is inefficient to manufacture liquid crystal display devices one by one, so a large number of liquid crystal cells are formed on a mother substrate, and after the mother substrate is completed, they are separated into individual liquid crystal cells, that is, liquid crystal display devices. FIG. 8 is an example of forming a plurality of liquid crystal cells 30 on a mother substrate 1000 . In FIG. 8 , forty liquid crystal cells 30 are formed on one mother substrate 1000 .

The organic passivation film 108 , the capacitor insulating film 110 , and the like are formed in the state of the mother substrate 1000 . That is, a mother substrate for a TFT substrate on which a plurality of TFT substrates 100 is formed and a mother substrate for an opposing substrate on which a plurality of opposing substrates 200 are formed are fabricated. Then, for example, liquid crystal is filled into each counter substrate 200 formed on the counter substrate mother substrate by a dropping method, and then the TFT substrate mother substrate and the counter substrate mother substrate are bonded together with a sealing material.

FIG. 9 is a plan view showing the formation range of the organic passivation film 108 and the capacitive insulating film 110 at a portion corresponding to the portion C in FIG. 8 in the mother substrate for a TFT substrate. In FIG. 9 , the left side of the dashed-two dotted line is unit A, and the right side is unit B. Unit A and unit B are separated by scoring at the separation line indicated by the two-dot chain line.

As explained based on FIG. 5 , the organic passivation film 108 is covered with the capacitive insulating film 110 including its side surfaces. Therefore, moisture from the outside does not penetrate into the organic passivation film 108 . The capacitive insulating film 110 covers the entire surface of each cell, but does not cover the scribe line portion which is the boundary between the liquid crystal cell 30 and the liquid crystal cell 30 . This is to prevent cracks or the like at the scribed portion from spreading to the capacitive insulating film 110 . However, depending on the scribing conditions, it may also be overlaid on the parting line shown by the dashed-two dotted line. In this case, the entire surface of the motherboard 1000 is covered with the capacitive insulating film 110 .

The present invention is characterized in that the outermost peripheral side wall of the organic passivation film 108 is covered with an inorganic insulating film 110 formed of, for example, SiN or the like. SiN can also be formed on the sidewall of the organic passivation film 108 by CVD, so that the process load is not increased compared to the conventional process. The configuration of the present invention can be obtained by changing the patterned mask of the organic passivation film 108 .

Claims (13)

1. a kind of liquid crystal display device, by the TFT substrate with display area and neighboring area with counter substrate in the week Border region is bonded using sealing material, and is sealed with liquid crystal between the TFT substrate and the counter substrate,

The liquid crystal display device is characterized in that,

The inorganic insulating membrane that the TFT substrate has organic passivation film and is formed on the organic passivation film,

In the neighboring area, the side of the organic passivation film formed along the side of the TFT substrate is by described inorganic exhausted Velum covers.

2. liquid crystal display device according to claim 1, which is characterized in that

The organic passivation film has the groove portion formed along the side of the TFT substrate, the organic passivation film in the groove portion Side covered by the inorganic insulating membrane.

3. liquid crystal display device according to claim 1, which is characterized in that

The side of the organic passivation film is covered within the scope of complete cycle by the inorganic insulating membrane.

4. liquid crystal display device according to claim 1, which is characterized in that

There are 50 μm or more of intervals between the side and the end of the TFT substrate of the organic passivation film.

5. liquid crystal display device according to claim 1, which is characterized in that

End in the end and the TFT substrate of the inorganic insulating membrane for covering the side of the organic passivation film Between there are defined intervals.

6. liquid crystal display device according to claim 1, which is characterized in that

The end for the inorganic insulating membrane that the side of the organic passivation film is covered and the end of the TFT substrate it Between there are 50 μm or more of intervals.

7. liquid crystal display device according to claim 1, which is characterized in that

The inorganic insulating membrane that the side of the organic passivation film covers is formed to the end of the TFT substrate and is Only.

8. liquid crystal display device according to claim 1, which is characterized in that

It is formed with portion of terminal in the TFT substrate of part not Chong Die with the counter substrate, in the counter substrate At the side of the portion of terminal side, the side of the organic passivation film is covered by the inorganic insulating membrane.

9. liquid crystal display device according to claim 8, which is characterized in that

There are 50 μm or more of intervals between the side and the end of the counter substrate of the organic passivation film.

10. liquid crystal display device according to claim 1, which is characterized in that

The thickness of the organic passivation film is 2 μm or more.

11. liquid crystal display device according to claim 1, which is characterized in that

The organic passivation film is formed by acrylic resin.

12. liquid crystal display device according to claim 1, which is characterized in that

The inorganic insulating membrane is formed by silicon nitride.

13. liquid crystal display device according to claim 1, which is characterized in that

The inorganic insulating membrane is formed in the insulating film between public electrode and pixel electrode.