CN200993746Y - Low dropout voltage stabilizer - Google Patents

Abstract

The utility model discloses a LDO regulator, which comprises a P type transmission transistor and an N type transmission transistor which are used to supply power to an output end. The P-typed transmission transistor and the N-typed transmission transistor are arranged in parallel, and two error amplifiers are applied to control the grids of the P type transmission transistor and the N type transmission transistor to generate the first output voltage and the second output voltage. Therefore, a first voltage is generated when the input voltage is higher than a threshold voltage, and a second voltage is generated when the input voltage is lower than the threshold voltage.

Description

Low dropout voltage regulator

Technical field

The utility model is a kind of mu balanced circuit, particularly a kind of low dropout voltage regulator with big input voltage range.

Background technology

Tool low pressure drop (low dropout; LDO) voltage stabilizer quite is widely used on the power-supply management system as computing machine, mobile phone, the vehicles or all the other electronic products.Power-supply management system uses low dropout voltage regulator as regional power supply unit.Low dropout voltage regulator must have pure output and fast transient response.Simultaneously, low dropout voltage regulator more makes power-supply management system that the extra voltage of supplying electric pressure less than general can effectively be provided.For instance, 5 volts or 12 volts voltage control system use low dropout voltage regulator can be supplied chipset or 2.5 volts pure and 3.3 volts voltage signal of internal memory partly.

Although low dropout voltage regulator is transfer power quite efficiently, he but has the characteristics that volume is little, cost is not high, and quite little frequency interferences (frequencyinterference) is also only arranged.It can provide area circuit pure voltage in addition, and can be not influenced because of other regional current fluctuation (current fluctuations) of power-supply system.Therefore, when the power consumption of area circuit was quite small with respect to the load of whole power system, low dropout voltage regulator was widely used the power supply supply in area circuit.

One desirable low dropout voltage regulator provides accurately direct current output, simultaneously in load variations and import and have quick response when instantaneous.And because low dropout voltage regulator is widely used in the product of volume production, as computing machine and mobile phone, so simplicity of design and low production cost also are necessary.

Traditional voltage stabilizer includes the feedback control loop that is coupled to transmitting assembly, but the grid voltage of its modulation transmitting assembly and can control its impedance (impedance).According to grid voltage, transmitting assembly can be supplied the output area of the electric current of different brackets to power supply unit.Therefore, no matter the transient response of the situation of load and input, because grid voltage is by modulation, the former capital can provide galvanic current to press output.As shown in Figure 1, be the circuit diagram of known source electrode with coupling voltage stabilizer (sourcefollow regulator), it includes N type transmission transistor 10, feedback control circuit 11 and voltage divider 12, and voltage divider 12 has dividing point FB and two resistance 121,122.Source electrode receives unadjusted DC input voitage V with the coupling voltage stabilizer _IN, and export adjusted VD V ₀The reference signal V that feedback control circuit 11 includes error amplifier 15 and transfers to the positive input terminal of error amplifier 15 _REFThe output terminal of error amplifier 15 is connected to the gate terminal G of N type transmission transistor 10, and DC input voitage V _INTransfer to the drain electrode end D of N type transmission transistor 10, source terminal S then can transmit VD V ₀VD V ₀System sees through voltage divider 12 by feedback control circuit 11 and transmits.Resistance 121,122 is connected in series with VD V ₀And with reference between the ground end, dividing point FB and connects back the negative input end of error amplifier 15 between two resistance 121,122.

This source electrode is good stable with the advantage of coupling voltage stabilizer, N type transmission transistor 10 provides and decays to backfeed loop, the gain (gain) in error amplifier 15 major control loops, and can reach enough gain margin (Gain Margin) and phase margins (PhaseMargin) easily.Another advantage is to have high power rejection than (Power SupplyRejection Ratio; PSRR), N type transmission transistor 10 receives DC input voitage V by drain electrode end D _IN, therefore can have high impedance and resist by DC input voitage V _INTo VD V ₀Noise.Yet source electrode is that this kind voltage stabilizer has high pressure drop voltage with coupling voltage stabilizer shortcoming, and grid is to source voltage Vgs ₁The critical voltage V that is higher than conducting N type transmission transistor 10 _TDC input voitage V _INWith VD V ₀Between voltage difference limited VD V ₀The upper limit.Drain to source voltage V _DS1Be when N type transmission transistor 10 during, be positioned at the voltage drop of drain electrode end D and source terminal S in cut-off state.

See also Fig. 2, be the basic structure of low dropout voltage regulator, low dropout voltage regulator includes P type transmission transistor 20, feedback control circuit 21 and voltage divider 22, voltage divider 22 includes two resistance 221,222, the reference signal V that feedback control circuit 21 includes error amplifier 211 and transfers to the negative input end of error amplifier 211 _REF, and the output terminal of error amplifier 211 is connected in the gate terminal G of P type transmission transistor 20.

Unadjusted DC input voitage V _INTransfer to the source terminal S of P type transmission transistor 20, P type transmission transistor 20 is exported adjusted VD V by drain electrode end D ₀, and VD V ₀, see through resistance 221,222, be sent to the positive input terminal of error amplifier 211.Reference signal V _REFBe passed to the negative input end of error amplifier 211.The advantage of this low dropout voltage regulator is low pressure drop voltage (LD0).P type transmission transistor 20 in grid to source voltage Vgs ₂Be higher than its critical voltage V _TThe time conducting, therefore the output terminal of error amplifier 211 can be connected to earth terminal, reaches one and has the quite low low dropout voltage regulator that inputs to output voltage.Drain to source voltage V _DS2Be when P type transmission transistor 20 is cut-off state, be positioned at the voltage drop of drain electrode end D and source terminal S.

The shortcoming of this low dropout voltage regulator is as DC input voitage V _INCan be tending towards unstable when big, P type transmission transistor 20 can provide significant the gain to backfeed loop.In addition because the Miller effect, stray capacitance (parasitic capacitor) 23 will be brought sizable capacitance at the output terminal of error amplifier 211, and can form limit in feedback cycle, and then influence the transfer function of voltage stabilizer, for the stability in loop, error amplifier 211 must possess has lower output impedance to make limit be moved to higher frequency.Yet, make error amplifier 211 have quite difficulty of lower output impedance, especially as input direct voltage V _INWhen higher.

The another one problem of low dropout voltage regulator is relatively poor power rejection ratio, DC input voitage V _INThe source terminal S that is passed to P type transmission transistor 20 is a Low ESR, DC input voitage V _INNoise (noise) disturb the grid of P type transmission transistor 20 to source voltage Vgs quite easily ₂Therefore, the high power rejection of development tool is an inexorable trend than the low dropout voltage regulator with big input voltage range.

The utility model content

At the problems referred to above, the purpose of this utility model provides a kind of low dropout voltage regulator, and it can be operated under big input voltage range, and has high power rejection ratio.

The technical solution of the utility model is such: low dropout voltage regulator includes N type transmission transistor, P type transmission transistor, control circuit, voltage divider, input end and output terminal; N type transmission transistor supplies power to output terminal, and the drain electrode end of N type transmission transistor is coupled to input end, and source terminal couples output terminal; And P type transmission transistor is connected with parallel way with N type transmission transistor, and the source terminal of P type transmission transistor is coupled to input end, and drain electrode end is coupled to output terminal.Reference signal inputs to control circuit, control circuit is coupled to output terminal and its output terminal is connected to the gate terminal of N type transmission transistor and the gate terminal of P type transmission transistor, and control N type transmission transistor and P type transmission transistor produce first output voltage and second output voltage according to reference signal, and wherein the design of first output voltage is higher than second output voltage; When input voltage is higher than critical voltage, can produces first output voltage, and when input voltage subcritical voltage, can produce second output voltage.

On the other hand, low dropout voltage regulator more can comprise circuit for detecting, can be when input voltage be higher than the input critical voltage, P type transmission transistor is ended, therefore, when inputing to output voltage when too high, low dropout voltage regulator can as have high power rejection than with the source electrode of loop stability with the general operation of coupling voltage stabilizer, and cross when low when inputing to output voltage, it can have low pressure drop voltage again.

Description of drawings

Fig. 1 is the circuit diagram of known source electrode with the coupling voltage stabilizer.

Fig. 2 is the circuit diagram of known low dropout voltage regulator.

Fig. 3 is the circuit diagram of the preferred embodiment of the utility model low dropout voltage regulator.

Fig. 4 is the circuit diagram of another preferred embodiment of the utility model low dropout voltage regulator.

Fig. 5 has the circuit diagram of the preferred embodiment of input voltage circuit for detecting for the utility model low dropout voltage regulator.

Embodiment

According to the disclosed low dropout voltage regulator of the utility model, as shown in Figure 3, be the preferred embodiment circuit diagram of the utility model low dropout voltage regulator, low dropout voltage regulator (LDOregulator) includes N type transmission transistor 31, P type transmission transistor 32, control circuit 30, voltage divider 35, input end 36 and output terminal 37.Low dropout voltage regulator receives unadjusted DC input voitage V by input end 36 _IN, and in adjusting the back by output terminal 37 output VD V ₀N type transmission transistor 31 supplies power to output terminal 37 by input end 36.N type transmission transistor 31 includes drain electrode end D, source terminal S and gate terminal G, and drain electrode end D is coupled to input end 36, and source terminal S is coupled to output terminal 37.P type transmission transistor 32 and N type transmission transistor 31 are connected with parallel way, and same, P type transmission transistor 32 also includes drain electrode end D, source terminal S and gate terminal G, and source terminal S is coupled to input end 36, and drain electrode end D is coupled to output terminal 37.

As shown in Figure 3, control circuit 30 includes two error amplifiers (erroramplifier) 33,34.Reference signal V _REFBe transmitted into control circuit 30, error amplifier 33 sees through voltage divider 35 and is coupled to output terminal 37.Voltage divider 35 includes the resistance 351,352,353 that is serially connected with successively between output terminal 37 and the earth terminal, and the two ends of resistance 352 are respectively the first feedback signal contact and the second feedback signal contact, and can produce the first feedback signal V _FB1With the second feedback signal V _FB2The first feedback signal V _FB1With the second feedback signal V _FB2Be sent to the inverting input of error amplifier 33 and the in-phase input end of error amplifier 34 respectively, wherein the second feedback signal V _FB2Be higher than the first feedback signal V _FB1Error amplifier 33 is according to reference signal V _REFControl N type transmission transistor 31 is to produce first output voltage V ₀₁Error amplifier 34 sees through voltage divider 35 and is coupled to output terminal 37 according to reference signal V _REFControl P type transmission transistor 32 produces second output voltage V ₀₂, first output voltage V wherein ₀₁With second output voltage V ₀₂System can be represented by equation (1), (2):

$V_{01}=V_{\mathrm{REF}}\&times;\frac{{\mathrm{<figure-callout\; id="351"\; label="R"\; filenames="Y20062017292000111.png,Y20062017292000131.png"\; state="\{\{state\}\}">R</figure-callout>}}_{351}+{\mathrm{<figure-callout\; id="352"\; label="R"\; filenames="Y20062017292000111.png,Y20062017292000131.png"\; state="\{\{state\}\}">R</figure-callout>}}_{352}+R_{353}}{R_{353}}---\left(1\right)$

$V_{02}=V_{\mathrm{REF}}\&times;\frac{{\mathrm{<figure-callout\; id="351"\; label="R"\; filenames="Y20062017292000111.png,Y20062017292000131.png"\; state="\{\{state\}\}">R</figure-callout>}}_{351}+{\mathrm{<figure-callout\; id="352"\; label="R"\; filenames="Y20062017292000111.png,Y20062017292000131.png"\; state="\{\{state\}\}">R</figure-callout>}}_{352}+R_{353}}{{\mathrm{<figure-callout\; id="352"\; label="R"\; filenames="Y20062017292000111.png,Y20062017292000131.png"\; state="\{\{state\}\}">R</figure-callout>}}_{352}+R_{353}}---\left(2\right)$

Wherein, R ₃₅₁Resistance value for resistance 351;

R ₃₅₂Resistance value for resistance 352;

R ₃₅₃Resistance value for resistance 353;

Therefore, first output voltage V ₀₁Can be a little more than second output voltage V ₀₂

N type transmission transistor 31 supplies first output voltage V ₀₁When its conducting and produce first output voltage V ₀₁During to output terminal 37.As input voltage V _INCross low and cause N type transmission transistor 31 by the time, P type transmission transistor 32 can conductings produce second output voltage V ₀₂Be sent to output terminal 37.N type transmission transistor 31 and P type transmission transistor 32 be for being connected in parallel in output terminal 37, therefore, and input voltage V _INBe higher than critical voltage V _THThe time will produce first output voltage V ₀₁, and input voltage V _INSubcritical voltage V _THThe time will produce second output voltage V ₀₂To output terminal 37, critical voltage V _THSystem can be illustrated by following equation (3):

V _TH＝Vo+Vgs (3)

Wherein, V _GsThe grid that is N type transmission transistor 31 is to source voltage, in order to conducting N type transmission transistor 31, and V ₀It is adjusted VD.

Because of the gain of error amplifier 33,34 is very big, when 31 conductings of N type transmission transistor, P type transmission transistor 32 can end.First output voltage V ₀₁With second output voltage V ₀₂Voltage difference delta V such as following equation (4), and can be ignored.

ΔV＝V _O1-V _O2 (4)

Fig. 4 is the circuit diagram of another preferred embodiment of the utility model, two reference signal, the first reference signal V _R1With the second reference signal V _R2Be sent to the in-phase input end of error amplifier 33 and the inverting input of error amplifier 34 respectively.In this embodiment, voltage divider 35 includes the resistance 41,42 that is serially connected with successively between output terminal 37 and the earth terminal, and error amplifier 33,34 sees through resistance 41,42 and is coupled to output terminal 37. Error amplifier 33,34 is respectively according to the first reference signal V _R1With the second reference signal V _R2Control N type transmission transistor 31 produces first output voltage V respectively with P type transmission transistor 32 ₀₃With second output voltage V ₀₄Wherein design first output voltage V ₀₃The time can be a little more than second output voltage V _O4, and satisfy following equation (5), (6):

$V_{03}=V_{R1}\&times;\frac{{\mathrm{<figure-callout\; id="41"\; label="R"\; filenames="Y20062017292000121.png"\; state="\{\{state\}\}">R</figure-callout>}}_{41}+R_{42}}{R_{42}}---\left(5\right)$

$V_{04}=V_{R2}\&times;\frac{{\mathrm{<figure-callout\; id="41"\; label="R"\; filenames="Y20062017292000121.png"\; state="\{\{state\}\}">R</figure-callout>}}_{41}+R_{42}}{R_{42}}---\left(6\right)$

R wherein ₄₁It is the resistance value of resistance 41; R ₄₂It is the resistance value of resistance 41.

Design the first reference signal V _R1Can be a little more than the second reference signal V _R2, so during 31 conductings of N type transmission transistor, produce first output voltage V ₀₃To output terminal 37, and as input voltage V _INCross low and can't conducting N type transmission transistor 31 time, 32 of P type transmission transistors can be switched on and produce second output voltage V ₀₄To output terminal 37.

Seeing also Fig. 5, is the circuit diagram that the utility model low dropout voltage regulator more includes the preferred embodiment of circuit for detecting 50.As input voltage V _INDuring for high levle, circuit for detecting 50 is used for need not seeing through backfeed loop by P type transmission transistor 32, has so improved input voltage V _INTransient response during for high levle (transient response).Circuit for detecting 50 includes comparer 51 and two resistance 52,53.The in-phase input end of comparer 51 (positive input terminal) is in order to receive input critical voltage V _TIN, inverting input (negative input terminal) then is coupled to input end 36 and detects input voltage V in order to see through resistance 52,53 _INAs input voltage V _INGreater than input critical voltage V _TINThe time, feedforward signal (feedforward signal) E that the output terminal of comparer 51 produces _NBBeing coupled to amplifier 34 ends P type transmission transistor 32.

The disclosed low dropout voltage regulator of the utility model inputing to output voltage when too high, is operated as the coupling voltage stabilizer as known source electrode, and have high power rejection than and loop stability, and cross when hanging down when inputing to output voltage, it can reach low pressure drop again.

Though the utility model discloses as above with aforesaid preferred embodiment; right its is not in order to limit the utility model; anyly have the knack of this skill person; in not breaking away from spirit and scope of the present utility model; when doing a little change and retouching, therefore protection domain of the present utility model is as the criterion when looking the accompanying Claim book scope person of defining.

Claims (7)

1. A low dropout voltage regulator, characterized in that it includes: an input terminal for receiving an input voltage; an output terminal for outputting an output voltage after adjusting the input voltage; An N-type pass transistor, used to supply power from the input terminal to the output terminal, the drain terminal of the N-type pass transistor is coupled to the input terminal, and the source terminal is coupled to the output terminal; a P-type pass transistor for supplying power from the input terminal to the output terminal, the source terminal of the P-type pass transistor is coupled to the input terminal, and the drain terminal is coupled to the output terminal; and A control circuit, the output terminals of the control circuit are respectively connected to the gate terminals of the N-type transfer transistor and the P-type transfer transistor, for controlling the gate terminals of the N-type transfer transistor and the P-type transfer transistor, so that the N-type transfer transistor One of the pass transistor and the P-type pass transistor is turned on to output the output voltage. 2. The low dropout voltage regulator according to claim 1, further comprising a voltage divider coupled to the output terminal, the voltage divider is provided with a first feedback signal output contact and a second feedback signal output contact an output contact for generating a first feedback signal and a second feedback signal according to the output voltage, wherein the control circuit can receive a reference signal and control the N-type transfer transistor according to the reference signal and the first feedback signal, The P-type transfer transistor is controlled according to the reference signal and the second feedback signal. 3. The low dropout voltage regulator as claimed in claim 2, wherein the second feedback signal is higher than the first feedback signal. 4. The low-dropout voltage regulator according to claim 1, further comprising a detection circuit, the detection circuit is coupled to the input terminal, and when the input voltage is greater than a threshold voltage, the The P-type pass transistor is off. 5. The low dropout voltage regulator as claimed in claim 4, wherein the detection circuit comprises at least two resistors. 6. The low-dropout regulator according to claim 1, wherein the control circuit includes two error amplifiers, the output terminals of the two error amplifiers are respectively connected to the gate terminal of the N-type pass transistor and The gate end of the P-type transfer transistor is used to control the N-type transfer transistor to generate a first output voltage to the output end, and to control the P-type transfer transistor to generate a second output voltage to the output end. 7. The low dropout voltage regulator according to claim 6, wherein the first output voltage is generated when the input voltage is higher than a threshold voltage, and the second output voltage is generated when the input voltage generated below the threshold voltage.

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