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CN217822841U - Light-emitting diode - Google Patents

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Publication number
CN217822841U
CN217822841U CN202221911645.7U CN202221911645U CN217822841U CN 217822841 U CN217822841 U CN 217822841U CN 202221911645 U CN202221911645 U CN 202221911645U CN 217822841 U CN217822841 U CN 217822841U
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layer
sublayer
type
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emitting diode
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肖崇武
张铭信
陈铭胜
金从龙
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Jiangxi Zhao Chi Semiconductor Co Ltd
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Jiangxi Zhao Chi Semiconductor Co Ltd
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Abstract

The utility model discloses a light emitting diode, relate to the semiconductor technology field, including compound ohmic contact layer, this compound ohmic contact layer includes first sublayer, second sublayer and third sublayer, wherein, first sublayer is P type InGaN layer, the second sublayer is non-doping InGaN layer, the third sublayer is N type GaN layer, the third sublayer is used for being connected with the electrode, through the setting of inserting non-doping InGaN's second sublayer between first sublayer and the third sublayer, the piezoelectricity polarized electric field that makes its produce, can strengthen the electric field intensity of junction region, thereby form the tunneling distance of less junction region and reduce the voltage of compound contact layer, compare traditional N type contact layer and can reduce holistic voltage, the P-GaN ohmic contact of low resistance has been realized.

Description

Light-emitting diode
Technical Field
The utility model relates to the field of semiconductor technology, specifically a light emitting diode.
Background
The Light-Emitting Diode (Light-Emitting-Diode) is a solid lighting electronic component, and is accepted by consumers due to the advantages of small volume, low power consumption, long service life, environmental friendliness and the like, and has a wide market prospect.
Group III nitrides, represented by GaN, of conventional light emitting diodes have a series of excellent properties, and thus, have been one of the hot spots of compound semiconductor research in recent years. The characteristics of large forbidden band width, high electron saturation drift velocity, good heat-conducting property and the like are utilized to be suitable for manufacturing high-frequency and high-power electronic devices; and blue, green and ultraviolet photoelectronic devices can be manufactured by utilizing the wide direct band gap.
Although GaN-based devices have made considerable progress in recent years, it is difficult to realize a low-resistance P-GaN ohmic contact, resulting in a limitation in the development of GaN-based high-temperature high-power devices.
SUMMERY OF THE UTILITY MODEL
Based on this, the utility model aims at providing a light emitting diode to it is difficult to realize the P-GaN ohmic contact of low resistance among the solution background art, leads to the research and development of GaN base high temperature high power device to receive the restriction always.
The utility model provides a light-emitting diode, which comprises a composite ohmic contact layer;
the composite ohmic contact layer comprises a first sublayer, a second sublayer and a third sublayer which are sequentially laminated;
wherein the first sub-layer is P-type In x Ga 1-x N layer, the second sublayer is undoped In y Ga 1-y And the third sublayer is an N-type GaN layer and is used for being connected with the electrode.
Further, the thickness of the first sub-layer is greater than or equal to the thickness of the third sub-layer, and the thickness of the third sub-layer is greater than or equal to the thickness of the second sub-layer.
Furthermore, the thickness of the first sub-layer is 2nm-15nm, the thickness of the second sub-layer is 2nm-8nm, and the thickness of the third sub-layer is 2-15nm.
Furthermore, the light emitting diode further comprises a substrate, a buffer layer, a non-doping layer, an N-type layer, a multi-quantum well layer and a P-type composite layer which are sequentially stacked, wherein the composite ohmic contact layer is stacked on the P-type composite layer.
Further, the P-type composite layer comprises a first P-type layer, an electron blocking layer and a second P-type layer which are sequentially stacked, the first P-type layer and the second P-type layer are P-type GaN layers, and the electron blocking layer is an AlInGaN layer.
Further, in the P-type composite layer, the thickness of the first P-type layer is 5nm-10nm, the thickness of the electron blocking layer is 10nm-40nm, and the thickness of the second P-type layer is 10nm-40nm.
Further, the multiple quantum well layer is an InGaN quantum well layer and an AlGaN quantum barrier layer which are stacked in N periods;
the InGaN quantum well layer is 2-3.5 nm thick, and the AlGaN quantum barrier layer is 9-12 nm thick.
Further, the undoped layer is an undoped GaN layer, and the N-type layer is an N-type GaN layer;
wherein, the thickness of non-doping layer is 1um-5um, the thickness of N type layer is 2um-3um.
Further, the buffer layer is an AlN buffer layer or a GaN buffer layer, and the thickness of the buffer layer is 10nm-30nm.
Further, the substrate comprises a sapphire substrate.
Compared with the prior art, the beneficial effects of the utility model are that:
in the light emitting diode, the composite ohmic contact layer is arranged, so that the problem that the development of a high-temperature and high-power GaN-based device is limited all the time due to the fact that low-resistance P-GaN ohmic contact is difficult to realize In the background technology is solved, specifically, the composite ohmic contact layer comprises a first sublayer, a second sublayer and a third sublayer, the first sublayer is a P-type InGaN layer, the second sublayer is an undoped InGaN layer, the third sublayer is an N-type GaN layer, the third sublayer is used for being connected with an electrode, the undoped InGaN layer is inserted between the first sublayer and the third sublayer, in components In the undoped InGaN layer are increased In a step-shaped mode In the second sublayer, higher components of the second sublayer are subjected to compressive stress from the first sublayer and the third sublayer due to the larger lattice constant, the electric field intensity of a piezoelectric polarization electric field can be enhanced, the tunneling distance of the GaN is smaller, the voltage of the composite ohmic contact layer is reduced, the overall voltage can be reduced compared with the traditional N-type contact layer, and the problem that low-resistance P-GaN-based device is difficult to realize In the background technology is solved.
Drawings
Fig. 1 is a schematic view of the overall structure of the light emitting diode of the present invention;
fig. 2 is a schematic structural view of the composite ohmic contact layer of the present invention.
In the figure: 10. a substrate; 20. a buffer layer; 30. a non-doped layer; 40. an N-type layer; 50. a multiple quantum well layer; 60. a P-type composite layer; 6001. a first P type layer; 6002. a second P type layer; 70. an electron blocking layer; 80. A composite ohmic contact layer; 8001. a first sublayer; 8002. a second sublayer; 8003. a third sublayer.
Detailed Description
In order to facilitate understanding of the present invention, the present invention will be described more fully hereinafter with reference to the accompanying drawings. Several embodiments of the invention are given in the accompanying drawings. The invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like as used herein are for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
Referring to fig. 1 to 2, a light emitting diode according to a first embodiment of the present invention includes a substrate 10, and a buffer layer 20, an undoped layer 30, an N-type layer 40, a multi-quantum well layer 50, a P-type recombination layer 60, and a composite ohmic contact layer 80 sequentially stacked on the substrate 10.
The P-type composite layer 60 includes a first P-type layer 6001, a multi-quantum well layer 50, and a second P-type layer 6002, which are sequentially stacked, and the composite ohmic contact layer 80 is stacked on the P-type composite layer 60, which is not limited by the example, the first P-type layer 6001 is a low temperature P-type GaN layer, and the second P-type layer 6002 is a high temperature P-type GaN layer.
In order to solve the problem that the development of a GaN-based high-temperature and high-power device is always limited due to the difficulty in realizing low-resistance P-GaN ohmic contact in the background art, the composite ohmic contact layer 80 in the present embodiment specifically includes a first sublayer 8001, a second sublayer 8002, and a third sublayer 8003, which are sequentially stacked, wherein the first sublayer 8001 is a P-type InGaN layer, the second sublayer 8002 is an undoped InGaN layer, the third sublayer 8003 is an N-type GaN layer, and the third sublayer 8003 is used for being connected to an electrode.
Specifically, the N-type GaN layer is firstly contacted with the metal electrode through the third sublayer 8003, in some embodiments, the metal electrode is a component in the light emitting diode, since the work function of N-type GaN is 4.2, only the metal with the work function smaller than that of N-type GaN needs to be selected, i.e. the anti-blocking layer is formed, i.e. the anti-blocking layer has no rectification function in the contact region, I-V characteristics of the anti-blocking layer are linear, i.e. ohmic contact with low resistance is generated, by this technical means, the problem that in the background art, it is difficult to realize low-resistance P-GaN ohmic contact, which leads to the research and development of GaN-based high-temperature and high-power devices being limited all the time is solved, secondly, ohmic contact between N-type GaN and the metal electrode is relatively easy to manufacture in practical situations, and several metals are combined, such as Ti/Al,Ti/Al/Ti/Au, etc., the contact resistivity can be usually up to 10 -5 -10 -6 Ω·cm 2
In addition, in some alternative embodiments, the first sublayer 8001 is a P-type InGaN layer In which the In composition gradually increases from one side close to the second P-type layer 6002 to the other side; the second sub-layer 8002 is an undoped InGaN layer with N different In compositions, wherein the In composition is greater than 5% < y is less than or equal to 25%, N is greater than or equal to 2 and less than or equal to 5, and the In composition of the second sub-layer 8002 is gradually increased from a second sub-layer 8002 close to the first sub-layer 8001 to the third sub-layer 8003.
By way of example and not limitation, a space charge depletion region may be formed among the first sublayer 8001, the second sublayer 8002 and the third sublayer 8003, and the larger the thickness of the space charge depletion region, the smaller the current, the larger the resistance, and in practical cases, since the first sublayer 8001 and the third sublayer 8003 are both heavily doped, the thickness of the space charge depletion region is reduced and a PN tunneling junction is formed, charges form a tunneling current by tunneling, and the larger the tunneling current, the smaller the voltage of the light emitting diode is.
Specifically, the thickness of the space charge depletion region and the tunneling current are affected by:
first, the thickness of the space charge depletion region is inversely related to the doping concentration of the first sublayer 8001 and the second sublayer 8002, and holes are generated by doping Mg in the first sublayer 8001, wherein the doping concentration of Mg is 3e 19 cm -3 -5e 21 cm -3 Due to the fact that the forbidden bandwidth is reduced due to the addition of the In component, the Mg doping activation energy is reduced, the hole concentration is improved, the Si doping activation energy of the third sub-layer 8003 obtains high electron concentration, and the Si doping concentration is 3e 19 cm -3 -3e 20 cm -3
Secondly, the thickness of the space charge depletion region is positively correlated with the electric field strength of the space charge depletion region, the second sublayer 8002 of undoped InGaN is inserted between the first sublayer 8001 and the third sublayer 8003, the higher component of the second sublayer 8002 is subjected to the compressive stress from the first sublayer 8001 and the third sublayer 8003 due to the large lattice constant, and the generated piezoelectric polarization electric field can enhance the electric field strength of the junction region, so that the tunneling distance of the junction region is small.
Third, the relatively higher In component of the second sublayer 8002 brings a lower forbidden bandwidth, reduces the forbidden bandwidth of the tunneling junction region, and further improves the carrier tunneling current.
More specifically, the thickness of the first sub-layer 8001 is greater than or equal to that of the third sub-layer 8003, and the thickness of the third sub-layer 8003 is greater than or equal to that of the second sub-layer 8002, by way of example and not limitation, the thickness of the first sub-layer 8001 is 2nm to 15nm, the thickness of the second sub-layer 8002 is 2nm to 8nm, and the thickness of the third sub-layer 8003 is 2nm to 15nm.
Specifically, the first P-type layer 6001 and the second P-type layer 6002 in the P-type composite layer are P-type GaN layers, and the electron blocking layer 70 is an AlInGaN layer, wherein the first P-type layer 6001 has a thickness of 5nm to 10nm, the electron blocking layer 70 has a thickness of 10nm to 40nm, and the second P-type layer 6002 has a thickness of 10nm to 40nm.
Specifically, the multiple quantum well layer 50 is an InGaN quantum well layer and an AlGaN quantum barrier layer that are stacked for N periods;
wherein N is a positive integer and the value range of N is 6-12, the thickness of the InGaN quantum well layer is 2nm-3.5nm, and the thickness of the AlGaN quantum barrier layer is 9nm-12nm.
Specifically, the undoped layer 30 is an undoped GaN layer, and the N-type layer is an N-type GaN layer;
wherein the thickness of the non-doped layer 30 is 1um-5um, and the thickness of the N-type layer is 2um-3um.
Specifically, the buffer layer 20 is an AlN buffer layer or a GaN buffer layer, and the thickness of the buffer layer 20 is 10nm to 30nm.
Specifically, the substrate 10 includes a substrate made of other material such as a sapphire substrate.
In summary, the utility model discloses a light emitting diode in the first implementation for traditional light emitting diode, has following beneficial effect at least:
1. in the light emitting diode, the composite ohmic contact layer 80 is arranged, so that the problem that the research and development of a GaN-based high-temperature high-power device are always limited due to the fact that low-resistance P-GaN ohmic contact is difficult to realize in the background technology is solved, and particularlyThe composite ohmic contact layer 80 includes a first sublayer 8001, a second sublayer 8002 and a third sublayer 8003, and the first sublayer 8001 is a P-type In layer x Ga 1-x N layer, the second sub-layer 8002 is undoped In y Ga 1-y The N layer, third sublayer 8003 is the N type GaN layer, third sublayer 8003 is used for being connected with the electrode, through insert the second sublayer 8002 of non-doping InGaN between first sublayer 8001 and third sublayer 8003, in some practical situations, the In component is cascaded increasing progressively In this non-doping InGaN's second sublayer 8002, the higher component of second sublayer 8002 receives the compressive stress from first sublayer 8001 and third sublayer 8003 because the lattice constant is great, and then the piezoelectricity polarization electric field that produces can strengthen the electric field intensity of junction region, thereby form the tunneling distance of less junction region and reduce the voltage of compound contact layer, compare traditional N type contact layer and can reduce holistic voltage, the problem that it is difficult to realize low resistance P-GaN ohmic contact among the background art has been solved.
2. Since a space charge depletion region may be formed among the first, second, and third sublayers 8001, 8002, and 8003, the larger the thickness of the space charge depletion region, the smaller the current, the larger the resistance, so by doping Mg In the first sublayer 8001, the Si is doped In the third sublayer 8003, and the In composition In the first sublayer 8001 gradually increases from one side close to the second P-type layer 6002 to the other side, and the second sublayer 8002 is an undoped In of N different In compositions y Ga 1-y The N layer, and the In component of the second sublayer 8002 is increased In a stepped manner from the second sublayer 8002 close to the first sublayer 8001 to the third sublayer 8003, this arrangement improves the crystal quality of the composite ohmic contact layer 80, and avoids the situation that the growth quality of the third sublayer 8003 causes poor contact with the metal electrode, and thus the voltage is increased.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The above embodiments only represent several embodiments of the present invention, and the description thereof is more specific and detailed, but not to be construed as limiting the scope of the present invention. It should be noted that, for those skilled in the art, without departing from the spirit of the present invention, several variations and modifications can be made, which are within the scope of the present invention. Therefore, the protection scope of the present invention should be subject to the appended claims.

Claims (10)

1. The light-emitting diode is characterized by comprising a composite ohmic contact layer, wherein the composite ohmic contact layer comprises a first sublayer, a second sublayer and a third sublayer which are sequentially laminated;
the first sublayer is a P-type InGaN layer, the second sublayer is an undoped InGaN layer, the third sublayer is an N-type GaN layer, and the third sublayer is used for being connected with an electrode.
2. The led of claim 1, wherein: the thickness of the first sub-layer is greater than or equal to that of the third sub-layer, and the thickness of the third sub-layer is greater than or equal to that of the second sub-layer.
3. The light-emitting diode according to claim 1 or 2, wherein: the thickness of the first sub-layer is 2nm-15nm, the thickness of the second sub-layer is 2nm-8nm, and the thickness of the third sub-layer is 2nm-15nm.
4. The led of claim 1, wherein: the composite ohmic contact layer is laminated on the P-type composite layer.
5. The light-emitting diode according to claim 4, wherein: the P-type composite layer comprises a first P-type layer, an electron blocking layer and a second P-type layer which are sequentially stacked, the first P-type layer and the second P-type layer are P-type GaN layers, and the electron blocking layer is an AlInGaN layer.
6. The light-emitting diode according to claim 5, wherein: in the P-type composite layer, the thickness of the first P-type layer is 5nm-10nm, the thickness of the electron blocking layer is 10nm-40nm, and the thickness of the second P-type layer is 10nm-40nm.
7. The light-emitting diode according to claim 4, wherein: the multiple quantum well layer is an InGaN quantum well layer and an AlGaN quantum barrier layer which are stacked in N periods;
wherein N is a positive integer and the value range of N is 6-12, the thickness of the InGaN quantum well layer is 2nm-3.5nm, and the thickness of the AlGaN quantum barrier layer is 9nm-12nm.
8. The light-emitting diode according to claim 4, wherein: the undoped layer is an undoped GaN layer, and the N-type layer is an N-type GaN layer;
wherein, the thickness of non-doping layer is 1um-5um, the thickness of N type layer is 2um-3um.
9. The light-emitting diode according to claim 4, wherein: the buffer layer is an AlN buffer layer or a GaN buffer layer, and the thickness of the buffer layer is 10nm-30nm.
10. The light-emitting diode according to claim 4, wherein: the substrate comprises a sapphire substrate.
CN202221911645.7U 2022-07-21 2022-07-21 Light-emitting diode Active CN217822841U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117637953A (en) * 2024-01-25 2024-03-01 江西兆驰半导体有限公司 LED epitaxial wafer, preparation method thereof and LED chip
CN119069595A (en) * 2024-11-04 2024-12-03 江西兆驰半导体有限公司 LED epitaxial wafer and preparation method thereof, LED chip

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117637953A (en) * 2024-01-25 2024-03-01 江西兆驰半导体有限公司 LED epitaxial wafer, preparation method thereof and LED chip
CN119069595A (en) * 2024-11-04 2024-12-03 江西兆驰半导体有限公司 LED epitaxial wafer and preparation method thereof, LED chip

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