CN212461672U - Chip through chip assembly and integrated circuit structure - Google Patents
Chip through chip assembly and integrated circuit structure Download PDFInfo
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- CN212461672U CN212461672U CN202021734843.1U CN202021734843U CN212461672U CN 212461672 U CN212461672 U CN 212461672U CN 202021734843 U CN202021734843 U CN 202021734843U CN 212461672 U CN212461672 U CN 212461672U
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- 230000008054 signal transmission Effects 0.000 claims description 18
- 230000005540 biological transmission Effects 0.000 abstract description 8
- 238000012858 packaging process Methods 0.000 abstract description 3
- 239000000853 adhesive Substances 0.000 description 7
- 230000001070 adhesive effect Effects 0.000 description 7
- 238000004806 packaging method and process Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 3
- 230000003247 decreasing effect Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
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Abstract
一种晶片导通片组件，晶片导通片组件包括第一导通片以及第二导通片，第一导通片的第一电极连接部的相对二表面分别设有第一突出区域以及第一凹陷区域，第一突出区域用于接触第一电极，第一电极连接部具有第一侧以及第二侧，第一凹陷区域由第一侧朝向第二侧延伸且与第二侧具有间距；第二导通片与第一导通片电性隔绝，第二导通片的第二电极连接部的相对二表面分别设有第二突出区域以及第二凹陷区域，第二突出区域用于接触第二电极，第二电极连接部具有第一侧边以及第二侧边，而第二凹陷区域由第一侧边朝向第二侧边延伸且与第二侧边具有间距。本实用新型大幅降低了传输阻抗，且简化晶片了的封装制程。
A chip conductive piece assembly, comprising a first conductive piece and a second conductive piece, wherein two opposite surfaces of a first electrode connecting portion of the first conductive piece are respectively provided with a first protruding area and a first recessed area, the first protruding area is used to contact a first electrode, the first electrode connecting portion has a first side and a second side, the first recessed area extends from the first side toward the second side and has a spacing with the second side; the second conductive piece is electrically isolated from the first conductive piece, and two opposite surfaces of a second electrode connecting portion of the second conductive piece are respectively provided with a second protruding area and a second recessed area, the second protruding area is used to contact a second electrode, the second electrode connecting portion has a first side edge and a second side edge, and the second recessed area extends from the first side edge toward the second side edge and has a spacing with the second side edge. The utility model greatly reduces the transmission impedance and simplifies the packaging process of the chip.
Description
Technical Field
The utility model relates to a wafer switches on piece subassembly and integrated circuit structure, especially a wafer that has two conduction pieces switches on piece subassembly and integrated circuit structure.
Background
The packaging structure of the die is critical to its performance. Generally, after the wafer is cut from the wafer, a packaging process is performed to protect the wafer from various physical damages or chemical corrosion. And corresponding electrical pins are further arranged, so that a user can conveniently use the chip or test the chip through the packaging structure.
In the conventional method, a chip is disposed on a base, and then wires are routed between the chip and the base by wire bonding, so that wires are connected between electrodes of the chip and electrical contacts of the base. However, the line width of the conductive line is limited, so that the impedance of the transmission structure formed by the conductive line is large, and if the interface structure is not designed specially, the impedance may be too large because the electrical connection is not reliable enough. When the impedance is too large, transmission loss cannot be reduced. In addition, the wire bonding method also causes inconvenience in packaging.
Accordingly, there is a need for an improved chip package structure to improve the above-mentioned disadvantages.
SUMMERY OF THE UTILITY MODEL
The utility model provides a wafer switches on piece subassembly and integrated circuit structure to replace the electrode of connecting the wafer with the routing mode in the past.
The utility model discloses the technical problem that solve is realized through following technical scheme:
an embodiment of the present invention discloses a chip on-chip module for connecting to a first electrode and a second electrode of a chip. The chip conducting sheet assembly comprises a first conducting sheet and a second conducting sheet, the first conducting sheet comprises a first electrode connecting part and a plurality of first signal transmission parts, two opposite surfaces of the first electrode connecting part are respectively provided with a first protruding area and a first recessed area, the first protruding area is used for contacting the first electrode, the first electrode connecting part is provided with a first side and a second side which are opposite, the first recessed area extends from the first side to the second side and has a first distance with the second side, and the first signal transmission parts are mutually spaced and are respectively connected to the first side. The second conducting sheet is electrically isolated from the first conducting sheet and comprises a second electrode connecting part and a second signal transmission part, a second protruding area and a second recessed area are respectively arranged on two opposite surfaces of the second electrode connecting part, the second protruding area is used for contacting the second electrode, the second electrode connecting part is provided with a first side edge and a second side edge which are opposite, the second recessed area extends from the first side edge to the second side edge and has a second distance with the second side edge, and the second signal transmission part is connected to the first side edge.
An embodiment of the present invention discloses an integrated circuit structure, which comprises a wafer conducting sheet assembly and a wafer, wherein the wafer conducting sheet assembly comprises a first conducting sheet and a second conducting sheet, and the wafer is provided with a first electrode and a second electrode. The first conducting sheet comprises a first electrode connecting part and a plurality of first signal transmission parts, wherein a first protruding area and a first recessed area are respectively arranged on two opposite surfaces of the first electrode connecting part, the first protruding area is in contact with the first electrode, the first electrode connecting part is provided with a first side and a second side which are opposite, the first recessed area extends from the first side to the second side and has a first distance with the second side, and the plurality of first signal transmission parts are mutually spaced and are respectively connected to the first side. The second conducting sheet is electrically isolated from the first conducting sheet and comprises a second electrode connecting part and a second signal transmission part, a second protruding area and a second recessed area are respectively arranged on two opposite surfaces of the second electrode connecting part, the second protruding area is in contact with the second electrode, the second electrode connecting part is provided with a first side edge and a second side edge which are opposite, the second recessed area extends from the first side edge to the second side edge and has a second distance with the second side edge, and the second signal transmission part is connected to the first side edge.
In other words, the present invention provides a wafer conducting sheet assembly for connecting to a first electrode and a second electrode of a wafer, the wafer conducting sheet assembly comprising:
a first conductive sheet including a first electrode connection portion and a plurality of first signal transmission portions, wherein a first protruding region and a first recessed region are respectively disposed on two opposite surfaces of the first electrode connection portion, the first protruding region is used for contacting the first electrode, the first electrode connection portion has a first side and a second side opposite to each other, the first recessed region extends from the first side to the second side and has a first distance from the second side, and the plurality of first signal transmission portions are spaced from each other and are respectively connected to the first side; and
a second conducting sheet electrically isolated from the first conducting sheet, the second conducting sheet comprising a second electrode connecting portion and a second signal transmitting portion, wherein two opposite surfaces of the second electrode connecting portion are respectively provided with a second protruding region and a second recessed region, the second protruding region is used for contacting the second electrode, the second electrode connecting portion has a first side and a second side opposite to each other, the second recessed region extends from the first side toward the second side and has a second distance from the second side, and the second signal transmitting portion is connected to the first side.
The first protruding area is provided with a first protruding block, the area of the first protruding block is smaller than that of the first protruding area, and the first protruding block is used for contacting the first electrode.
The second protruding area is provided with a second protruding block, the area of the second protruding block is smaller than that of the second protruding area, and the second protruding block is used for contacting the second electrode.
The first electrode connecting part is provided with a third side and a fourth side which are opposite, the third side and the fourth side are connected with the first side and the second side, the distance between the fourth side and the second electrode connecting part is less than that between the third side and the second electrode connecting part, the first protruding area is provided with a first protruding block, the area of the first protruding block is less than that of the first protruding area, and the first protruding block is connected with the fourth side.
The utility model also provides an integrated circuit structure contains:
a wafer having a first electrode and a second electrode; and
a chip-on-chip module, the chip-on-chip module comprising:
a first conductive sheet including a first electrode connecting portion and a plurality of first signal transmitting portions, wherein a first protruding region and a first recessed region are respectively disposed on two opposite surfaces of the first electrode connecting portion, the first protruding region contacts the first electrode, the first electrode connecting portion has a first side and a second side opposite to each other, the first recessed region extends from the first side to the second side and has a first distance from the second side, and the plurality of first signal transmitting portions are spaced from each other and are respectively connected to the first side; and
a second conductive sheet electrically isolated from the first conductive sheet, the second conductive sheet including a second electrode connecting portion and a second signal transmitting portion, two opposite surfaces of the second electrode connecting portion being respectively provided with a second protruding region and a second recessed region, the second protruding region contacting the second electrode, the second electrode connecting portion having a first side and a second side opposite to each other, the second recessed region extending from the first side toward the second side and having a second distance from the second side, the second signal transmitting portion being connected to the first side.
The first protruding area is provided with a first protruding block, the area of the first protruding block is smaller than that of the first protruding area, and the first protruding block is in contact with the first electrode.
The second protrusion area is provided with a second protrusion, the area of the second protrusion is smaller than that of the second protrusion area, and the second protrusion contacts the second electrode.
The first electrode connecting part is provided with a third side and a fourth side which are opposite, the third side and the fourth side are connected with the first side and the second side, the distance between the fourth side and the second electrode connecting part is less than that between the third side and the second electrode connecting part, the first protruding area is provided with a first protruding block, the area of the first protruding block is less than that of the first protruding area, and the first protruding block is connected with the fourth side.
The first protruding region covers a portion of the first electrode, and the second protruding region covers a portion of the second electrode.
It is above to synthesize, the utility model provides a wafer switches on piece subassembly and integrated circuit structure, switches on two electrodes of piece difference direct contact in the wafer via mutual electrically insulated's first conduction piece and second. Compare in the electrode of connecting the wafer with the routing mode in the past, the utility model provides a wafer switches on piece subassembly has simplified the encapsulation processing procedure of wafer owing to avoided carrying out the trouble of routing between wafer and base except having reduced transmission impedance by a wide margin.
The above description of the present invention and the following description of the embodiments are provided to illustrate and explain the spirit and principles of the present invention and to provide further explanation of the scope of the present invention.
Drawings
Fig. 1 is an exploded perspective view of an integrated circuit structure according to a first embodiment of the present invention;
FIG. 2 is a perspective view of the integrated circuit structure of FIG. 1 after packaging;
fig. 3 is a top view of the wafer via assembly, the wafer and the susceptor of fig. 1;
FIG. 4A is a cross-sectional view taken along line 4A of FIG. 3;
FIG. 4B is a cross-sectional view taken along line 4B of FIG. 3;
fig. 5 is an exploded perspective view of an integrated circuit structure according to a second embodiment of the present invention;
FIG. 6 is a top view of the wafer via assembly, the wafer and the susceptor of FIG. 5;
FIG. 7A is a cross-sectional view taken along line 7A of FIG. 6;
fig. 7B is a cross-sectional view taken along line 7B of fig. 6.
[ description of reference ]
100 integrated circuit structure
1 chip conducting sheet assembly
11 first conducting sheet
111 first electrode connection part
1111 first side
1112 second side
1113 third side
1114 fourth side
1115 first recess region
1116 first protruding region
1117a, 1117b first bump
112 first signal transmission part
1121 first transmission segment
1122 first inclined segment
1123 first contact section
12 second conducting sheet
121 second electrode connection part
1211 first side
1212 second side edge
1213 third side edge
1214 the fourth side edge
1215 second recessed region
1216 second projection area
1217 second bump
122 second signal transmission part
1221 second Transmission segment
1222 second inclined section
1223 second contact section
2 wafer
21 first electrode
22 second electrode
3 bearing seat
4 casing
Detailed Description
The detailed features and advantages of the present invention are described in detail in the following embodiments, which are sufficient for those skilled in the art to understand the technical contents of the present invention and to implement the present invention, and the related objects and advantages of the present invention can be easily understood by those skilled in the art from the contents, the protection scope and the attached drawings disclosed in the present specification. The following examples further illustrate the aspects of the present invention in detail, but are not intended to limit the scope of the invention in any way.
Fig. 1 is an exploded perspective view of an integrated circuit structure according to a first embodiment of the present invention, wherein the integrated circuit structure 100 includes a chip conducting sheet assembly 1, a chip 2 and a carrier 3, the chip conducting sheet assembly 1 includes a first conducting sheet 11 and a second conducting sheet 12 electrically insulated from each other, wherein the first conducting sheet 11 includes a first electrode connecting portion 111 and a plurality of first signal transmitting portions 112, and the plurality of first signal transmitting portions 112 are connected to one side of the first electrode connecting portion 111 at intervals. The second conductive sheet 12 includes a second electrode connecting portion 121 and a second signal transmitting portion 122, and the second signal transmitting portion 122 is connected to one side of the second electrode connecting portion 121. The upper surface of the wafer 2 is provided with a first electrode 21 (e.g. a source electrode) and a second electrode 22 (e.g. a gate electrode) spaced apart from each other, and the lower surface of the wafer 2 is provided with a third electrode (e.g. a drain electrode, not shown). The carrier 3 is made of a conductive material (e.g., copper), and the chip 2 is disposed between the chip pad assembly 1 and the carrier 3.
Fig. 2 is a perspective view of the integrated circuit structure of fig. 1 after packaging. Referring to fig. 1 and fig. 2 together, each of the first signal transmitting portions 112 includes a first transmitting section 1121, a first inclined section 1122, and a first contact section 1123. Two ends of the first transmission segment 1121 are respectively connected to the first electrode connecting portion 111 and one end of the first inclined segment 1122, and the other end of the first inclined segment 1122 is connected to the first contact segment 1123. The second signal transmitting portion 122 includes a second transmitting section 1221, a second inclined section 1222, and a second contact section 1223. Both ends of the second transmitting section 1221 are connected to the second electrode connecting part 121 and one end of the second tilting section 1222, respectively, and the other end of the second tilting section 1222 is connected to the second contact section 1223. After the chip package assembly 1, the chip 2 and the carrier 3 are subjected to the packaging process, the first electrode connecting portion 111 of the first conductive sheet 11, the second electrode connecting portion 121 of the second conductive sheet 12, the chip 2 and the carrier 3 are packaged in the housing 4. The plurality of first signal transmitting portions 112 of the first via 11 and the second signal transmitting portion 122 of the second via 12 extend out of the housing 4. The lower surface of the susceptor 3 away from the wafer 2 is exposed to the opening of the housing 4. The first contact 1123 of each first signal transmission portion 112, the second contact 1223 of the second signal transmission portion 122 and the carrier 3 are exposed on the lower surface of the opening of the housing 4 for connecting to the circuit substrate, and the signals from the circuit substrate can be transmitted to the first electrode 21 and the second electrode 21 of the chip 2 through the plurality of first signal transmission portions 112 and the plurality of second signal transmission portions 122.
Fig. 3 is a top view of the wafer via assembly, the wafer and the susceptor of fig. 1, and fig. 4A is a cross-sectional view taken along line 4A of fig. 3. Refer to fig. 1, 3 and 4A together. The area of the first electrode connecting portion 111 is designed to be suitable for an electronic device with larger output power, and the first electrode connecting portion 111 has a first side 1111 and a second side 1112 opposite to each other, a third side 1113 and a fourth side 1114 opposite to each other, and the third side 1113 and the fourth side 1114 are connected to the first side 1111 and the second side 1112. The first electrode connecting portion 111 has a first recessed area 1115 and a first protruding area 1116 on opposite surfaces thereof, and the first recessed area 1115 and the first protruding area 1116 can be formed by stamping the first electrode connecting portion 111. The first recess region 1115 extends from the first side 1111 of the first electrode connection portion 111 toward the second side 1112 of the first electrode connection portion 111 and has a first distance D1 from the second side 1112. The first protrusion 1116 of the first via 11 covers and contacts a portion of the second electrode 21 of the chip 2. A conductive adhesive may be disposed between the first protrusion region 1116 of the first via 11 and the first electrode 21 of the wafer 2, so that the first via 11 and the first electrode 21 of the wafer 2 can be stably electrically connected. The first electrode connecting portion 111 of the first via 11 is not completely flush with the first electrode 21 of the wafer 2 by the first protrusion region 1116. In this way, the conductive adhesive between the first conductive sheet 11 and the first electrode 21 can maintain a proper thickness, thereby preventing the conductive adhesive from decreasing its electrical connection and fixing function due to insufficient thickness
Fig. 4B is a cross-sectional view taken along line 4B of fig. 3. Referring to fig. 1, fig. 3 and fig. 4B together, the area of the second electrode connecting portion 121 is smaller than that of the first electrode connecting portion 111, the second electrode connecting portion 121 has a first side 1211 and a second side 1212 opposite to each other, and a third side 1213 and a fourth side 1214 opposite to each other, and the third side 1213 and the fourth side 1214 are connected to the first side 1211 and the second side 1212. Opposite surfaces of the second electrode connection part 121 are respectively provided with a second recessed region 1215 and a second protruding region 1216, and the second recessed region 1215 and the second protruding region 1216 are formed by punching the second electrode connection part 121. The second recessed region 1215 extends from the first side 1211 of the second electrode connector 121 toward the second side 1212 of the second electrode connector 121 and has a second distance D2 from the second side 1212, wherein the second distance D2 is smaller than the first distance D1. The second protrusion area 1216 of the second via 12 covers and contacts a portion of the second electrode 22 of the wafer 2. A conductive paste may be disposed between the second protrusion area 1216 of the second conductive tab 12 and the second electrode 22 of the wafer 2, so that the second conductive tab 12 and the first electrode 22 of the wafer 2 can stably maintain electrical connection. By the design of the second protrusion area 1216, the second electrode connecting portion 121 of the second conductive sheet 12 is not completely flush with the second electrode 22 of the wafer 2, so that the conductive adhesive between the second conductive sheet 12 and the second electrode 22 can maintain a proper thickness.
Fig. 5 is an exploded perspective view of an integrated circuit structure according to a second embodiment of the present invention, fig. 6 is a top view of the wafer via assembly, the wafer and the susceptor of fig. 5, and fig. 7A is a cross-sectional view of fig. 6 along line 7A. See fig. 5, 6, and 7A collectively. The first protrusion region 1116 is further provided with two first protrusions 1117a and 1117b spaced apart from each other, and the area of each of the first protrusions 1117a and 1117b is smaller than that of the first protrusion region 1116. The distance between the fourth side 1114 of the first electrode connection portion 111 and the second electrode connection portion 121 of the second conductive sheet 12 is smaller than the distance between the third side 1113 of the first electrode connection portion 111 and the second electrode connection portion 121, wherein the first protrusion 1117a is connected to the fourth side 1114 of the first electrode connection portion 111, and the distance between the other first protrusion 1117b and the third side 1113 of the first electrode connection portion 111 is smaller than the distance between the first protrusion 1117a and the third side 1113. The first bumps 1117a and 1117b contact the first electrode 21 of the wafer 2. A conductive adhesive may be disposed between the first protrusion region 1116 of the first via 11 and the first electrode 21 of the wafer 2, so that the first via 11 and the first electrode 21 of the wafer 2 can be stably electrically connected. The first electrode connecting portion 111 of the first via 11 is not completely flush with the first electrode 21 of the wafer 2 by the first protruding region 1116 and the first protrusions 1117a and 1117 b. In this way, the conductive adhesive between the first conductive sheet 11 and the first electrode 21 can maintain a proper thickness, thereby preventing the conductive adhesive from decreasing its electrical connection and fixing function due to insufficient thickness.
Fig. 7B is a cross-sectional view taken along line 7B of fig. 6. Referring to fig. 5, 6 and 7B, the second protrusion area 1216 is provided with a second protrusion 1217, the area of the second protrusion 1217 is smaller than that of the second protrusion area 1216, and the second protrusion 1217 contacts the second electrode 22 of the wafer 2. A conductive paste may be disposed between the second protrusion area 1216 of the second conductive tab 12 and the second electrode 22 of the wafer 2, so that the second conductive tab 12 and the first electrode 22 of the wafer 2 can stably maintain electrical connection. By the design of the second protrusion areas 1216 and the second protrusions 1217, the second electrode connecting portion 121 of the second via 12 is not completely flush with the second electrode 22 of the wafer 2, so that the conductive paste between the second via 12 and the second electrode 22 can maintain a proper thickness.
To sum up, the utility model provides a wafer switches on piece subassembly and integrated circuit structure, the wafer switches on the piece subassembly and switches on two electrodes of piece difference direct contact in the wafer via mutual electrically insulated's first switch-on piece and second. The utility model provides a wafer switches on piece subassembly and compares in the past with the electrode of routing mode connection wafer, except having reduced transmission impedance by a wide margin, owing to avoided carrying out the trouble of routing between wafer and base, can simplify the encapsulation processing procedure of wafer. In addition, the integrated circuit structure can be adapted to various electronic devices with different output powers by adjusting the area of the first electrode connecting part or the second electrode connecting part.
Claims (9)
1. A die via assembly for connecting to a first electrode and a second electrode of a die, the die via assembly comprising:
a first conductive sheet including a first electrode connection portion and a plurality of first signal transmission portions, wherein a first protruding region and a first recessed region are respectively disposed on two opposite surfaces of the first electrode connection portion, the first protruding region is used for contacting the first electrode, the first electrode connection portion has a first side and a second side opposite to each other, the first recessed region extends from the first side to the second side and has a first distance from the second side, and the plurality of first signal transmission portions are spaced from each other and are respectively connected to the first side; and
a second conducting sheet electrically isolated from the first conducting sheet, the second conducting sheet comprising a second electrode connecting portion and a second signal transmitting portion, wherein two opposite surfaces of the second electrode connecting portion are respectively provided with a second protruding region and a second recessed region, the second protruding region is used for contacting the second electrode, the second electrode connecting portion has a first side and a second side opposite to each other, the second recessed region extends from the first side toward the second side and has a second distance from the second side, and the second signal transmitting portion is connected to the first side.
2. The wafer via assembly of claim 1, wherein the first protruding region is provided with a first bump, the first bump having an area smaller than the first protruding region, the first bump for contacting the first electrode.
3. The wafer via assembly of claim 1, wherein the second protruding region is provided with a second bump, the second bump having an area smaller than the second protruding region, the second bump for contacting the second electrode.
4. The wafer via assembly of claim 1, wherein the first electrode connecting portion further has a third side and a fourth side opposite to each other, the third side and the fourth side are connected to the first side and the second side, a distance between the fourth side and the second electrode connecting portion is smaller than a distance between the third side and the second electrode connecting portion, the first protruding region is provided with a first protrusion, an area of the first protrusion is smaller than that of the first protruding region, and the first protrusion is connected to the fourth side.
5. An integrated circuit structure, comprising:
a wafer having a first electrode and a second electrode; and
a chip-on-chip module, the chip-on-chip module comprising:
a first conductive sheet including a first electrode connecting portion and a plurality of first signal transmitting portions, wherein a first protruding region and a first recessed region are respectively disposed on two opposite surfaces of the first electrode connecting portion, the first protruding region contacts the first electrode, the first electrode connecting portion has a first side and a second side opposite to each other, the first recessed region extends from the first side to the second side and has a first distance from the second side, and the plurality of first signal transmitting portions are spaced from each other and are respectively connected to the first side; and
a second conductive sheet electrically isolated from the first conductive sheet, the second conductive sheet including a second electrode connecting portion and a second signal transmitting portion, two opposite surfaces of the second electrode connecting portion being respectively provided with a second protruding region and a second recessed region, the second protruding region contacting the second electrode, the second electrode connecting portion having a first side and a second side opposite to each other, the second recessed region extending from the first side toward the second side and having a second distance from the second side, the second signal transmitting portion being connected to the first side.
6. The integrated circuit structure of claim 5, wherein the first protrusion area is provided with a first bump, the first bump having an area smaller than the first protrusion area, and the first bump contacting the first electrode.
7. The integrated circuit structure of claim 5, wherein the second protrusion area is provided with a second bump, the second bump having an area smaller than the second protrusion area, and the second bump contacts the second electrode.
8. The integrated circuit structure of claim 5, wherein the first electrode connecting portion further has a third side and a fourth side opposite to each other, the third side and the fourth side are connected to the first side and the second side, a distance between the fourth side and the second electrode connecting portion is smaller than a distance between the third side and the second electrode connecting portion, the first protruding region is provided with a first bump, an area of the first bump is smaller than that of the first protruding region, and the first bump is connected to the fourth side.
9. The integrated circuit structure of claim 5, wherein the first protruding region covers a portion of the first electrode, and the second protruding region covers a portion of the second electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021734843.1U CN212461672U (en) | 2020-08-19 | 2020-08-19 | Chip through chip assembly and integrated circuit structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021734843.1U CN212461672U (en) | 2020-08-19 | 2020-08-19 | Chip through chip assembly and integrated circuit structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN212461672U true CN212461672U (en) | 2021-02-02 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202021734843.1U Active CN212461672U (en) | 2020-08-19 | 2020-08-19 | Chip through chip assembly and integrated circuit structure |
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| CN (1) | CN212461672U (en) |
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