CN221057427U - Packaging structure - Google Patents

Abstract

At least one embodiment of the present disclosure provides a package structure including: packaging a substrate; the interposer is arranged on the first side of the packaging substrate and is electrically connected with the packaging substrate; the electronic chip module is arranged on one side of the intermediate layer far away from the packaging substrate and is electrically connected with the intermediate layer, wherein the electronic chip module comprises a system chip and a high-bandwidth memory chip; and an optical module disposed on the first side of the package substrate and on one side of the interposer in a direction parallel to a main surface of the package substrate, wherein the optical module is electrically connected to the electronic chip module through the package substrate and the interposer, wherein the optical module and the interposer overlap in a direction parallel to the main surface of the package substrate. The packaging structure integrates the optical module and the electronic chip module, so that communication and calculation can be more tightly combined, and communication calculation efficiency is improved.

Description

Package structure

Technical Field

An embodiment of the present disclosure relates to a packaging structure.

Background technique

Semiconductor packaging technology can integrate multiple electronic chips together, for example, it can integrate the system on chip (SoC) and memory chip together to provide high bandwidth to the system chip and achieve high-performance computing (HPC).

Optical modules are important components of communication systems. Generally speaking, optical modules are separate chip modules. However, such optical modules are packaged separately, which is costly. Moreover, when it is necessary to connect the optical module to the electronic chip, the signal transmission path between the separately packaged optical module and the electronic chip is long, and the communication computing efficiency is low.

Utility Model Content

The embodiments of the present disclosure provide a packaging structure that integrates an optical module and an electronic chip module, thereby enabling a closer integration of communication and computing, and improving communication and computing efficiency.

According to at least one embodiment of the present disclosure, a packaging structure is provided, characterized in that it includes: a packaging substrate; an interposer, which is arranged on a first side of the packaging substrate and is electrically connected to the packaging substrate; an electronic chip module, which is arranged on a side of the interposer away from the packaging substrate and is electrically connected to the interposer, wherein the electronic chip module includes a system chip and a high-bandwidth memory chip electrically connected to each other through the interposer, and the high-bandwidth memory chip includes a plurality of sub-chips stacked and electrically connected to each other in a direction perpendicular to a main surface of the packaging substrate; and an optical module, which is arranged on the first side of the packaging substrate and is located on one side of the interposer in a direction parallel to the main surface of the packaging substrate, wherein the optical module is electrically connected to the electronic chip module through the packaging substrate and the interposer, and wherein the optical module and the interposer overlap in a direction parallel to the main surface of the packaging substrate.

According to at least one embodiment of the present disclosure, the packaging structure provided is characterized in that an orthographic projection of the optical module on the main surface of the packaging substrate is staggered from an orthographic projection of the intermediate layer on the main surface of the packaging substrate.

According to at least one embodiment of the present disclosure, the packaging structure is characterized in that the orthographic projection of the optical module and the orthographic projection of the intermediate layer are adjacent to each other but do not overlap.

The packaging structure provided according to at least one embodiment of the present disclosure is characterized in that it also includes: an optical fiber coupled to the optical module and configured to achieve at least one of transmitting an optical signal to the optical module and receiving an optical signal from the optical module.

The packaging structure provided according to at least one embodiment of the present disclosure is characterized in that it also includes: a conductive terminal located on a second side of the packaging substrate opposite to the first side, wherein the packaging structure is electrically connected to a circuit substrate through the conductive terminal, and the circuit substrate is located on a side of the packaging substrate away from the optical module and the interposer.

According to at least one embodiment of the present disclosure, the packaging structure is characterized in that the orthographic projection of the optical module on the circuit substrate is located within the orthographic projection of the packaging substrate on the circuit substrate.

The packaging structure provided according to at least one embodiment of the present disclosure is characterized by further comprising: an encapsulation layer, which is arranged on a side of the intermediate layer away from the packaging substrate and surrounds and covers the electronic chip module.

According to at least one embodiment of the present disclosure, the packaging structure is characterized in that the orthographic projection of the encapsulation layer on the packaging substrate is located within the orthographic projection of the intermediate layer on the packaging substrate and is staggered with the orthographic projection of the optical module on the packaging substrate.

According to at least one embodiment of the present disclosure, the packaging structure is characterized in that the optical module includes: a substrate; and an optical device disposed on the substrate.

According to at least one embodiment of the present disclosure, the packaging structure is characterized in that the electronic chip module includes a processor for processing an electrical signal, and the electrical signal includes an electrical signal converted from an optical signal of the optical module.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, rather than limiting the present disclosure.

FIG. 1 is a schematic cross-sectional view showing a package structure according to some embodiments of the present disclosure.

FIG. 2 is a schematic cross-sectional view showing a packaging structure according to some embodiments of the present disclosure being mounted on a circuit substrate.

FIG. 3 is a schematic cross-sectional view showing a more detailed structure of a package structure according to some embodiments of the present disclosure.

Detailed ways

In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. "First", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

An embodiment of the present disclosure provides a packaging structure, comprising: a packaging substrate; an intermediary layer, arranged on a first side of the packaging substrate and electrically connected to the packaging substrate; an electronic chip module, arranged on a side of the intermediary layer away from the packaging substrate and electrically connected to the intermediary layer; and an optical module, arranged on the first side of the packaging substrate and located on one side of the intermediary layer in a direction parallel to the main surface of the packaging substrate, wherein the optical module is electrically connected to the electronic chip module through the packaging substrate and the intermediary layer.

In the packaging structure of the embodiment of the present disclosure, the optical module and the electronic chip module are integrated together, which improves the packaging integration, so that communication and computing can be more closely combined, thereby improving the communication and computing efficiency. The optical module and the electronic chip module are electrically connected through the packaging substrate and the intermediary layer in the packaging structure, which shortens the signal transmission distance between the optical module and the electronic chip module, reduces signal loss, and can improve bandwidth. Moreover, the electronic chip module is arranged on the side of the intermediary layer away from the packaging substrate, and the optical module and the intermediary layer are arranged side by side on the first side of the packaging substrate, which can avoid increasing the size of the intermediary layer and reduce the difficulty of integrating the optical module and the electronic chip module. On the other hand, when the packaging structure is installed on a circuit board such as a PCB, since the optical module and the electronic chip module are electrically connected through the packaging substrate and the intermediary layer in the packaging structure, the wiring used to connect the optical module and the electronic chip module can be reduced in the circuit substrate, so the wiring area of the circuit substrate can be reduced.

FIG. 1 is a schematic cross-sectional view showing a package structure according to some embodiments of the present disclosure; FIG. 2 is a schematic cross-sectional view showing a package structure connected to a circuit substrate according to some embodiments of the present disclosure.

1 , in some embodiments, a package structure 900 includes a package substrate 100, an interposer 200, an electronic chip module 300, and a photonics module 500. For example, the package structure 900 may be a chip-on-wafer-on-substrate (CoWoS) package. The package substrate 100 has a first side S1 and a second side S2 opposite to each other in a first direction D1, for example. The interposer 200 is disposed on the first side S1 of the package substrate 100 and is electrically connected to the package substrate 100. The electronic chip module 300 is disposed on a side of the interposer 200 away from the package substrate 100 and is electrically connected to the interposer 200. The optical module 500 is disposed on the first side S1 of the package substrate and is located on one side of the interposer 200 in a direction parallel to the main surface of the package substrate 100 (e.g., the second direction D2); for example, in some examples, as shown in FIG. 1 , the optical module 500 may be disposed on the left side of the interposer 200; in other examples, the optical module 500 may also be disposed on the right side of the interposer 200; it should be understood that the specific position of the optical module 500 on one side of the interposer 200 shown in the figure is only for illustration, and the present disclosure is not limited thereto, and the optical module 500 may be disposed at any suitable position on the side of the interposer 200 according to product requirements; the second direction D2 and the first direction D1 intersect with each other, for example, are substantially perpendicular to each other. The optical module 500 is electrically connected to the electronic chip module 300 through the package substrate 100 and the interposer 200.

That is, the electronic chip module 300 and the interposer 200 are stacked in the first direction D1, and the optical module 500 and the interposer 200 are arranged side by side in the second direction D2 and are located on the same side of the package substrate 100. In some embodiments, the orthographic projection of the electronic chip module 300 on the main surface of the package substrate 100 is located within the orthographic projection of the interposer 200 on the main surface of the package substrate 100; the orthographic projection of the optical module 500 on the main surface of the package substrate 100 is staggered from the orthographic projection of the interposer 200 on the main surface of the package substrate 100. In this article, the staggered orthographic projections of multiple components on the same reference plane refer to the orthographic projections of the multiple components not overlapping, and include the orthographic projections of the multiple components being spaced apart from each other and not overlapping, and also include the situation where the orthographic projections of the multiple components are adjacent to each other but not overlapping.

In some embodiments, the optical module 500 and the interposer 200 overlap in a direction parallel to the main surface of the package substrate 100 (e.g., the second direction D2); herein, the overlapping of multiple components in a certain direction means that the orthographic projections of the multiple components on a reference plane perpendicular to the direction overlap; that is, the orthographic projection of the optical module 500 on a reference plane perpendicular to the second direction D2 (e.g., an extension plane of the sidewall of the package substrate 100) overlaps with the orthographic projection of the interposer 200 on the reference plane. The main surface of the package substrate 100 may be a surface on a side thereof close to the interposer 200 and the optical module 500 (i.e., a surface on the first side) or a surface on the second side thereof, and extends in a horizontal direction in the illustrated diagram.

In some embodiments, the structure including the interposer 200 and the electronic chip module 300 may be referred to as a sub-package structure 350; for example, the package structure 900 is a CoWoS package, and the sub-package structure 350 may be a chip-on-wafer (CoW) package. That is, the optical module 500 and the sub-package structure 350 are arranged side by side on the first side S1 of the package substrate 100; the orthographic projection of the optical module 500 on the main surface of the package substrate 100 and the orthographic projection of the sub-package structure 350 on the main surface of the package substrate 100 are staggered. That is, in this embodiment, the optical module 500 is integrated into the CoWoS package to integrate the optical module 500 and the electronic chip module 300 together, but the optical module 500 is not integrated into the sub-package structure 350, so that the optical module 500 and the electronic chip module 300 can be structurally decoupled to a certain extent while integrating the two in the same package, and the difficulty of the integration process can also be reduced, saving costs.

In some embodiments, the packaging structure 900 further includes an optical fiber 600 , which is coupled to the optical module 500 and configured to at least one of transmit an optical signal to the optical module 500 and receive an optical signal from the optical module 500 .

For example, the optical module 500 can realize the conversion of optical signals and electrical signals, and the optical module 500 is electrically connected to the electronic chip module 300 through the packaging substrate 100 and the interposer 200, so that the electrical signal converted from the optical signal of the optical module 500 can be transmitted to the electronic chip module 300. In some embodiments, the electronic chip module 300 may include a processor, and the processor can be used for data processing, for example, can be used to process electrical signals, and the electrical signals include electrical signals converted from the optical signals of the optical module 500. In this way, the signal transmission path between the optical module and the electronic chip module can be shortened, the signal loss can be reduced, and the bandwidth can be increased. By integrating the optical module and the electronic chip module, the packaging structure 900 can realize the close integration of communication and computing and improve the communication and computing efficiency.

Continuing to refer to FIG. 1 , in some embodiments, the package structure 900 may further include a conductive terminal 120, which is disposed on the second side S2 of the package substrate 100 and is used for external connection of the package structure 900. The conductive terminal 120 is electrically connected to the electronic chip module 300 through the package substrate 100 and the interposer 200, and is electrically connected to the optical module 500 through the package substrate 100. The package structure 900 may be electrically connected to an external component through the conductive terminal 120; for example, the external component may be a circuit substrate.

2 , the package structure 900 is mounted on a circuit substrate 1000 and electrically connected to the circuit substrate 1000 through the conductive terminals 120. The circuit substrate 1000 is located on a side of the package substrate 100 away from the optical module 500 and the interposer 200. The circuit substrate 1000 is, for example, a printed circuit board (PCB).

The optical module 500 and the electronic chip module 300 are connected to each other through the packaging substrate 100 and the interposer 200, and are connected to the circuit substrate 1000 through the packaging substrate 100 and the conductive terminal 120. The orthographic projection of the optical module 500 on a reference plane parallel to the main surface of the packaging substrate 100 is located within the orthographic projection of the packaging substrate 100 on the reference plane; the reference plane is, for example, the main surface of the circuit substrate 1000, such as the surface of the circuit substrate 1000 close to the packaging substrate. That is, the orthographic projection of the optical module 500 on the main surface of the circuit substrate 1000 is located within the orthographic projection of the packaging substrate 100 on the main surface of the circuit substrate 1000. In some embodiments, the area of the orthographic projection of the packaging substrate 100 on the circuit substrate 1000 may be greater than or equal to the sum of the orthographic projection areas of the optical module 500 and the interposer 200 on the circuit substrate 1000.

In the embodiment of the present disclosure, the packaging structure 900 integrates the optical module 500 and the electronic chip module 300, so that the optical module 500 and the electronic chip module 300 are connected to each other through the packaging substrate and the intermediate layer in the packaging structure, thereby shortening the signal transmission distance between the optical module 500 and the electronic chip module 300, and reducing the wiring area of the circuit substrate 1000; for example, in some electronic devices, the optical module is packaged separately, and the packaging structure including the electronic chip is installed on a circuit substrate such as a printed circuit board, and the connection between the optical module and the electronic chip is realized through the circuit substrate. In such devices, the signal transmission distance between the optical module and the electronic chip is long, and the connection wiring between the optical module and the electronic chip must be set in the circuit substrate. Compared with such electronic devices in which the separate optical module and the electronic packaging structure including the electronic chip module are installed on the circuit substrate and the electrical connection between the optical module and the electronic chip module is realized through the circuit substrate, the packaging structure of the embodiment of the present disclosure can greatly shorten the signal transmission distance between the optical module and the electronic chip, reduce the wiring in the circuit substrate for connecting the optical module and the electronic chip module, and thus reduce the wiring area of the circuit substrate. For example, it is not necessary to set a wiring for connecting the optical module and the electronic chip module in the circuit substrate 1000 .

Referring to FIG. 1 and FIG. 2 , in some embodiments, the electronic chip module 300 may include one or more chips, for example, may include at least one of one or more logic chips and one or more memory chips, etc. The logic chip includes a logic circuit, and for example, may be or include a system on chip (SoC), and the memory chip may be or include a high bandwidth memory (HBM) chip. For example, the electronic chip module 300 may include a first chip 301 and a second chip 302, the first chip 301 is a logic chip such as SoC, and the second chip 302 may be a memory chip such as HBM.

FIG. 3 is a schematic cross-sectional view showing a more detailed structure of a package structure 900 according to some embodiments of the present disclosure.

Referring to FIG3 , in some embodiments, the optical module 500 may include one or more optical chips (photonicschip); for example, the optical chip includes a substrate and an optical device layer disposed on the substrate, and the optical device layer includes one or more optical devices disposed on the substrate, such as gratings, waveguides and other optical devices. FIG3 schematically shows a first substrate 51 of the optical module 500 and an optical device 52 disposed on the first substrate 51. It should be understood that the position, quantity, etc. of the optical device 52 shown in the figure are only for illustration, and the specific structure of the optical device is not shown. Appropriate optical devices can be provided according to product requirements.

For example, the first substrate 51 is located on a side of the optical device layer close to the packaging substrate 100, and a conductive component such as a through substrate via (TSV) may be provided in the first substrate 51, and the conductive component is connected to one or more optical devices of the optical device layer, and can be used for electrical connection between the optical module 500 and other conductive components (for example, the second conductive connector 520 described below). The optical device layer may also include other components such as an interconnection structure, and the interconnection structure is used to achieve at least one of the connection between multiple optical devices and the connection between the optical device and the substrate through hole. For example, the optical device layer is located on a side of the first substrate 51 away from the packaging substrate 100, and close to the optical fiber 600. However, the present disclosure is not limited to this.

In some embodiments, each chip in the electronic chip module 300 may include a substrate and a device layer disposed on the substrate. The substrate may be a semiconductor substrate, such as a silicon substrate, and the substrate may alternatively or additionally include other suitable semiconductor materials (such as germanium). For example, the device layer includes one or more electronic devices formed on the substrate, such as at least one of an active device and a passive device. Active devices include, for example, transistors, diodes, etc., and passive devices include, for example, capacitors, resistors, inductors, etc. For example, FIG. 3 schematically shows a second substrate 31 of a first chip 301 and a device layer including one or more electronic devices 32. It should be understood that the position, quantity, etc. of the electronic device 32 shown in the figure are only for illustration, and the specific structure of the device is not shown. Appropriate devices can be provided according to product requirements.

In some embodiments, an interconnection structure is also provided in the device layer; for example, the interconnection structure includes one or more layers of conductive traces embedded in a dielectric material. A plurality of electronic devices 32 may be connected via the interconnection structure to form a functional circuit. For example, the device layer of the first chip 301 is located on a side of the second substrate 31 close to the interposer 200, and a connector such as a conductive pad may be provided on a side of the interconnection structure away from the substrate for electrical connection between the first chip 301 and other conductive components (for example, the third conductive connector 320 described below). However, the present disclosure is not limited thereto.

In some embodiments, the second chip 302 may be an HBM memory chip, and may include a plurality of sub-memory chips stacked on each other, for example, a plurality of sub-chips 302a. The plurality of sub-chips 302a are stacked on each other in a direction perpendicular to the main surface of the package substrate (for example, the first direction D1), and may be connected to each other through conductive connectors such as microbumps, or may be bonded to each other and electrically connected through hybrid bonding or the like. Each sub-chip 302a may also have structures such as a substrate and a device layer, which will not be described in detail herein.

In some embodiments, a connection member is disposed in the interposer 200 to provide electrical connection between the multiple chips of the electronic chip module 300 and between the multiple chips and the package substrate 100 .

For example, the interposer 200 may include a substrate, a substrate through-hole, and an interconnection structure. The substrate may be a semiconductor substrate, such as a silicon substrate, but may alternatively or additionally include other suitable semiconductor materials. The interconnection structure is disposed on the substrate, for example, on a side of the substrate close to the electronic chip module. In some embodiments, the interconnection structure includes at least one of one or more layers of conductive traces and conductive vias embedded in the dielectric structure; in some embodiments, the interposer includes a conductive pad located on a side of the interconnection structure away from the substrate for connection with the chip. The substrate through-hole is electrically connected to the interconnection structure and extends through the substrate for electrical connection to the package substrate 100. Multiple chips can be connected to each other through the interconnection structure of the interposer, and are electrically connected to the package substrate 100 through the interconnection structure and the substrate through-hole.

In an alternative embodiment, the interposer 200 may include a dielectric layer and a redistribution structure; the dielectric layer may include an organic dielectric material such as polyimide, for example, and the redistribution structure is embedded in the dielectric layer and may include one or more redistribution layers. The redistribution structure provides electrical connections between multiple chips of the electronic chip module and between multiple chips and the packaging substrate.

In other embodiments, the interposer 200 may include a dielectric layer, a bridge chip, and a rewiring structure. The bridge chip and the rewiring structure are embedded in the dielectric layer, the bridge chip is used to provide a connection between multiple chips of the electronic chip module, and the rewiring structure is used to provide an electrical connection between the multiple chips and the packaging substrate, or it can also be partially used for the connection between chips.

The package substrate 100 includes conductive traces to provide electrical connection between the optical module 500 and the electronic chip module 300 of the sub-package structure 350. The package substrate 100 may also include connectors such as conductive pads located on the first side and the second side thereof, wherein the conductive pads are connected to the conductive traces and are used for electrical connection between the package substrate and other components.

3, in some embodiments, the optical module 500 is connected to the package substrate 100 via the second conductive connector 520, and the sub-package structure 350 is connected to the package substrate 100 via the first conductive connector 220. For example, the second conductive connector 520 is disposed between the optical module 500 and the package substrate 100 in a direction perpendicular to the main surface of the package substrate 100 (for example, between the substrate through-hole of the optical module 500 and the conductive pad of the package substrate 100), and the first conductive connector 220 is disposed between the interposer 200 and the package substrate 100 in a direction perpendicular to the main surface of the package substrate 100 (for example, between the connecting member of the interposer 200 and the conductive pad of the package substrate).

In some embodiments, the package structure 900 further includes a first underfill layer 230 and a second underfill layer 530. The first underfill layer 230 fills the space between the interposer 200 and the package substrate 100, and surrounds and protects the plurality of first conductive connectors 220. The second underfill layer 530 fills the space between the optical module 500 and the package substrate 100, and surrounds and protects the plurality of second conductive connectors 520. The first underfill layer 230 and the second underfill layer 530 may be spaced apart from each other, or may contact each other and be fused together.

In some embodiments, one or more chips (e.g., the first chip 301 and the second chip 302) in the electronic chip module 300 are each electrically connected to the interposer 200 through a third conductive connector 320, and a third bottom filling layer 330 is disposed between the one or more chips and the interposer 200. The third bottom filling layer 330 fills the space between the one or more chips and the interposer 200 and surrounds the plurality of third conductive connectors 320.

For example, the conductive connector and the conductive terminal may each be or include at least one of metal materials such as solder and copper. For example, the third conductive connector 320 may be or include a micro-bump, the first conductive connector 220 and the second conductive connector 520 may be or include a controlled collapsed chip connection (C4) bump, and the conductive terminal 120 may be or include a solder ball such as a ball grid array (BGA).

In some embodiments, the package structure 900 may further include an encapsulation layer 336. For example, the encapsulation layer 336 is included in the sub-package structure 350, and is disposed on a side of the interposer 200 away from the package substrate 100, and surrounds and encapsulates the electronic chip module 300. The encapsulation layer 336 may include a molding compound, such as an epoxy molding compound (EMC), but the present disclosure is not limited thereto. In some embodiments, a plurality of chips (e.g., a first chip 301, a second chip 302) are spaced apart from each other on the interposer 200, and the encapsulation layer 336 surrounds and encapsulates the sidewalls of the plurality of chips, fills the spaces between the plurality of chips, and may cover the sidewalls of the third bottom filling layer 330. In some embodiments, the surface of the encapsulation layer 336 away from the interposer may be substantially flush with the surface of the electronic chip module 300 away from the side of the interposer. In an alternative embodiment, the encapsulation layer 336 may also cover the surface of the electronic chip module 300 away from the side of the interposer. In some embodiments, the sidewall of the encapsulation layer 336 may be substantially aligned with the sidewall of the interposer 200 in a direction perpendicular to the main surface of the package substrate, but the disclosure is not limited thereto.

Since the optical module 500 is disposed on the packaging substrate 100 but not on the interposer 200, the encapsulation layer 336 disposed on the interposer 200 and surrounding the electronic chip module 300 may not encapsulate the optical module 500. For example, the orthographic projection of the encapsulation layer 336 on the packaging substrate 100 is located within the orthographic projection of the interposer 200 on the packaging substrate 100, and is staggered with the orthographic projection of the optical module 500 on the packaging substrate 100.

In some embodiments, an additional encapsulation layer may be further disposed on the packaging substrate 100 to surround and encapsulate the optical module 500, for example, to cover the sidewalls of the optical module 500 and the second bottom filling layer 530, but the present disclosure is not limited thereto. The additional encapsulation layer may not be disposed on the packaging substrate 100.

In the embodiments of the present disclosure, the packaging structure integrates the optical module and the electronic chip module together, so that communication and computing can be more closely combined, and the communication and computing efficiency can be improved; the connection between the optical module and the electronic chip module is realized through the packaging substrate and the intermediate layer, which can greatly shorten the signal transmission distance between the optical module and the electronic chip module, thereby reducing signal loss and improving bandwidth. In addition, since the optical module has been integrated into the packaging structure, it can save board-level resources of circuit substrates such as PCB and reduce the routing area in the PCB. Moreover, integrating the packaging of the optical module and the electronic chip module together can also reduce the packaging cost.

On the other hand, the optical module is mounted on the packaging substrate, while the electronic chip module is mounted on the interposer on the packaging substrate; compared with setting both the optical module and the electronic chip module on the interposer or stacking the optical module and the electronic chip module together, the disclosed embodiment can reduce the difficulty of the packaging process to a certain extent, save costs, and achieve structural decoupling of the optical module and the electronic chip module while integrating the optical module and the electronic chip in the same package; for example, the optical module and the electronic chip module can be tested separately, and when the optical module or the electronic chip module is damaged (failed), they can be repaired or replaced separately without affecting each other.

There are a few points to note:

(1) In the drawings of the embodiments of the present disclosure, only the structures related to the embodiments of the present disclosure are involved, and other structures can refer to the general design.

(2) Unless there is a conflict, the features of the same embodiment or different embodiments of the present disclosure may be combined with each other.

The above are only specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims (10)

1. A package structure, comprising:

packaging a substrate;

the interposer is arranged on the first side of the packaging substrate and is electrically connected with the packaging substrate;

An electronic chip module disposed on a side of the interposer remote from the package substrate and electrically connected to the interposer, wherein the electronic chip module includes a system chip and a high bandwidth memory chip electrically connected to each other through the interposer, and the high bandwidth memory chip includes a plurality of sub-chips stacked in a direction perpendicular to a main surface of the package substrate and electrically connected to each other; and

An optical module disposed on the first side of the package substrate and on one side of the interposer in a direction parallel to the main surface of the package substrate, wherein the optical module is electrically connected to the electronic chip module through the package substrate and the interposer,

Wherein the optical module and the interposer overlap in a direction parallel to the major surface of the package substrate.

2. The package structure of claim 1, wherein an orthographic projection of the optical module on the major surface of the package substrate is offset from an orthographic projection of the interposer on the major surface of the package substrate.

3. The package structure of claim 2, wherein the front projection of the optical module and the front projection of the interposer abut each other but do not overlap.

4. The package structure of claim 1, further comprising:

an optical fiber is coupled to the optical module and configured to at least one of transmit and receive optical signals to and from the optical module.

5. The package structure of claim 1, further comprising:

a conductive terminal located at a second side of the package substrate opposite to the first side,

The packaging structure is electrically connected to a circuit substrate through the conductive terminals, and the circuit substrate is located on one side of the packaging substrate, which is far away from the optical module and the interposer.

6. The package structure of claim 5, wherein the orthographic projection of the optical module on the wiring substrate is located within the orthographic projection of the package substrate on the wiring substrate.

7. The package structure of claim 1, further comprising:

and the encapsulation layer is arranged on one side of the intermediate layer far away from the encapsulation substrate and surrounds and encapsulates the electronic chip module.

8. The package structure of claim 7, wherein the orthographic projection of the encapsulation layer on the package substrate is within the orthographic projection of the interposer on the package substrate and is offset from the orthographic projection of the optical module on the package substrate.

9. The package structure according to any one of claims 1-8, wherein the optical module comprises:

A substrate; and

And an optical device disposed on the substrate.

10. The package structure according to any one of claims 1-8, wherein the electronic chip module comprises a processor for processing an electrical signal, and the electrical signal comprises an electrical signal converted from an optical signal of the optical module.