CN222234843U - Radio frequency front end module - Google Patents
Radio frequency front end module Download PDFInfo
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- CN222234843U CN222234843U CN202323640461.9U CN202323640461U CN222234843U CN 222234843 U CN222234843 U CN 222234843U CN 202323640461 U CN202323640461 U CN 202323640461U CN 222234843 U CN222234843 U CN 222234843U
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Abstract
本申请提供了一种射频前端模组，包括基板，基板包括第一金属层和第二金属层，并设有供电端口；第一射频芯片，设置于基板；第一匹配电路，设置于基板的第一区域，并与第一射频芯片连接；扼流电感，设置于基板的第二区域，并分别与供电端口和第一射频芯片连接；其中，扼流电感包括设置于第一金属层的第一线圈和设置于第二金属层的第二线圈，第一线圈和第二线圈通过第一导电过孔连接。通过把扼流电感与第一匹配电路布设在不同的区域，避免扼流电感与第一匹配电路中的电感元件产生耦合，使扼流电感免受干扰，从而提升射频前端模组的性能。
The present application provides a radio frequency front-end module, including a substrate, the substrate including a first metal layer and a second metal layer, and provided with a power supply port; a first radio frequency chip, arranged on the substrate; a first matching circuit, arranged in a first area of the substrate, and connected to the first radio frequency chip; a choke inductor, arranged in a second area of the substrate, and respectively connected to the power supply port and the first radio frequency chip; wherein the choke inductor includes a first coil arranged on the first metal layer and a second coil arranged on the second metal layer, and the first coil and the second coil are connected through a first conductive via. By arranging the choke inductor and the first matching circuit in different areas, coupling between the choke inductor and the inductance element in the first matching circuit is avoided, and the choke inductor is protected from interference, thereby improving the performance of the radio frequency front-end module.
Description
Technical Field
The application relates to the technical field of radio frequency, in particular to a radio frequency front end module.
Background
In the field of radio frequency technology, a choke inductance is usually arranged between a power supply and a radio frequency circuit, so as to avoid leakage of radio frequency signals to a power supply system.
In order to enable the dc power signal to pass through with low loss, the choke inductor needs to have a large inductance, which requires a long enough wiring, so that the choke inductor is usually disposed around other elements during layout, but this causes the choke inductor to be easily coupled with other inductance elements, so that interference is generated between the choke inductor and other inductance elements, and the performance of the radio frequency system is reduced.
Disclosure of utility model
The application provides a radio frequency front end module, which can avoid coupling between a choke inductor and an inductor in a matching circuit, so that the choke inductor is free from interference, and the performance of the radio frequency front end module is improved.
The embodiment of the application provides a radio frequency front end module, which comprises:
the substrate comprises a first metal layer and a second metal layer, and is provided with a power supply port;
The first radio frequency chip is arranged on the substrate;
The first matching circuit is arranged in a first area of the substrate and is connected with the first radio frequency chip;
The choke inductor is arranged in a second area of the substrate and is respectively connected with the power supply port and the first radio frequency chip, wherein the choke inductor comprises a first coil arranged on a first metal layer and a second coil arranged on a second metal layer, and the first coil and the second coil are connected through a first conductive via hole.
Optionally, the first matching circuit includes a first matching inductor, the first matching inductor is connected with the choke inductor, and a connection part of the first matching inductor and the choke inductor is connected with the first radio frequency chip through a bonding wire;
The first region comprises a first sub-region connected with the second region, and the first matching inductor is arranged in the first sub-region.
Optionally, the first matching circuit further includes at least one capacitor connected to the first matching inductor, and the first matching inductor is at least partially disposed around the capacitor.
Optionally, the first matching circuit further includes a second matching inductance, and the second matching inductance is connected to at least one capacitor;
the first region further comprises a second sub-region spaced apart from the second region, and the second matching inductor is arranged in the second sub-region.
Optionally, a first power amplifying circuit and a second power amplifying circuit are arranged in the first radio frequency chip, and the first matching circuit and the choke inductor are respectively connected with the first power amplifying circuit;
The radio frequency front end module further comprises a second matching circuit, and the second matching circuit is arranged in a third area of the substrate and is connected with the second power amplifying circuit.
Optionally, the substrate includes a first edge and a second edge that intersect, the first radio frequency chip includes a third edge and a fourth edge that intersect, and the third edge is parallel to the first edge, and the fourth edge is parallel to the second edge;
The first area is arranged between the first edge and the third edge, and the third area is arranged between the second edge and the fourth edge.
Optionally, the second power amplifying circuit is further connected to the power supply port, the power supply port is disposed on the second edge, and the second area is disposed adjacent to the second edge and the third area.
Optionally, the second matching circuit includes a first balun, the first balun includes a third coil disposed on the first metal layer and a fourth coil disposed on the second metal layer, and the third coil and the fourth coil are mutually coupled.
Optionally, the substrate further includes a third metal layer and a fourth metal layer, the first metal layer, the second metal layer, the third metal layer and the fourth metal layer are sequentially stacked, a trace is disposed on the third metal layer, and the fourth metal layer is used for grounding.
Optionally, the third metal layer is provided with a power supply wire, one end of the power supply wire is connected with the power supply port, and the other end of the power supply wire is connected with the second coil through a second conductive via hole.
Optionally, the radio frequency front end module further includes a first switch chip, where the first switch chip is disposed adjacent to the first edge and the second edge;
The first switch chip is internally provided with a first switch circuit and a second switch circuit, the first switch circuit is connected with the first matching circuit, and the second switch circuit is connected with the second matching circuit.
Optionally, the radio frequency front end module further comprises a second radio frequency chip and a third matching circuit, a third power amplifying circuit is integrated in the second radio frequency chip, and the third power amplifying circuit is connected with the third matching circuit;
The second radio frequency chip and the third matching circuit are arranged in a fourth area of the substrate, the fourth area is located at a first side of the first radio frequency chip, the first area and the second area are located at a second side of the first radio frequency chip, and the first side and the second side are opposite sides.
Optionally, the radio frequency front end module further comprises a second switch chip, wherein the second switch chip is connected with the third matching circuit, and the second switch chip is arranged in the fourth area and is located at one side, far away from the second radio frequency chip, of the third matching circuit.
Optionally, the radio frequency front end module further includes a control chip, and the control chip is disposed between the first radio frequency chip and the fourth area and is connected to the first radio frequency chip and the second radio frequency chip respectively.
According to the radio frequency front end module provided by the application, the coils of the choke inductor are layered on the plurality of metal layers, the inductance of at least two coils is overlapped to realize the inductance required by choke, the wiring length of the choke inductor on a single metal layer can be shortened, the wiring length of the choke inductor is not required to be increased in a mode of surrounding the first matching circuit, and therefore, the choke inductor and the first matching circuit can be arranged in different areas, and the choke inductor and the inductance element in the first matching circuit are prevented from being coupled. Therefore, the choke inductor can be prevented from being interfered by the first matching circuit, so that the performance of the radio frequency front-end module is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a radio frequency front end module according to an embodiment of the present application.
Fig. 2 shows a schematic structural diagram of a choke inductor according to an embodiment of the present application.
Fig. 3 is a schematic structural diagram of a radio frequency front end module according to an embodiment of the present application.
Fig. 4 is a schematic structural diagram of a radio frequency front end module according to an embodiment of the present application.
Fig. 5 shows a schematic structural diagram of a radio frequency front end module according to an embodiment of the present application.
Fig. 6 shows another schematic structural diagram of a choke inductor according to an embodiment of the present application.
Fig. 7 is a schematic structural diagram of a radio frequency front end module according to an embodiment of the present application.
Fig. 8 is a schematic structural diagram of a radio frequency front end module according to an embodiment of the present application.
Fig. 9 is a schematic structural diagram of a radio frequency front end module according to an embodiment of the present application.
Detailed Description
In order to enable those skilled in the art to better understand the present application, a clear and complete description of the technical solution in the present embodiment will be provided below with reference to the accompanying drawings in the present embodiment. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The terms "first," "second," and the like in this disclosure are used for distinguishing between different objects and not for describing a particular sequential order. The term "plurality" refers to two or more. The term "and/or" refers to at least one of the recited objects, e.g., "a and/or B" may be any of 3 cases including a but not B, including B but not a, and including a and B at the same time.
Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
With the development of the fifth generation mobile communication technology (5G), compared with the previous 4G or 3G technology, a radio frequency front end with higher frequency, larger bandwidth and higher order QAM modulation is required, and more stringent requirements are put on various performance indexes such as efficiency, power consumption, isolation and the like of a power amplifier in the radio frequency front end. However, in the related art, in order to make the choke inductance have a sufficiently long trace, the choke inductance is usually disposed around the matching circuit in the module when the choke inductance is laid out, and the matching inductance and the choke inductance are coupled to a certain extent due to the matching inductance in the matching circuit, so that the performance of the choke inductance and the matching circuit is affected.
In order to solve the problem, the application provides the radio frequency front end module, which can avoid the coupling between the choke inductor and the inductor in the matching circuit, so that the choke inductor is free from interference, and the performance of the radio frequency front end module is improved. The following detailed description will be given with reference to the accompanying drawings.
Referring to fig. 1 together, fig. 1 is a schematic structural diagram of a radio frequency front end module according to an embodiment of the application. The radio frequency front end module is a component which integrates two or more than two discrete devices such as a radio frequency switch, a low noise amplifier, a filter, a duplexer, a power amplifier and the like into a single module, can improve the integration level and the hardware performance, and can miniaturize the volume. Specifically, the radio frequency front end module can be applied to 4G and 5G communication equipment such as smart phones, tablet computers, smart watches and the like.
As shown in fig. 1, the rf front-end module 10 includes a substrate 11, a first rf chip 12, a first matching circuit 13, and a choke inductor 14. The first rf chip 12, the first matching circuit 13 and the choke inductor 14 are all disposed on the substrate 11, and the first matching circuit 13 and the choke inductor 14 are respectively connected to the first rf chip 12.
The substrate 11 is substantially rectangular and is used for fixedly supporting components (e.g., the first rf chip 12, the first matching circuit 13, the choke inductor 14, etc.) in the rf front-end module. Illustratively, the substrate 11 may be a copper clad laminate, and the circuit may be printed on the surface of the substrate 10 by performing a hole processing, electroless copper plating, electrolytic copper plating, etching, or the like on the copper clad laminate.
In this embodiment, the substrate 11 is provided with a power supply port Vcc 1, and the power supply port Vcc 1 is used for connecting an external power source, and the external power source supplies power to the components on the substrate 11, for example, the first rf chip 12, through the power supply port Vcc 1. The external power supply may provide a supply voltage Vcc1 through a supply port Vcc 1, and the supply voltage Vcc1 may be 3.3V, 5V, 12V, or the like, which is not particularly limited in this embodiment.
The power supply voltage required by the rf front-end module is a dc signal, and in order to suppress an ac noise signal entering the power supply port VCC 1 along with the power supply voltage VCC1, a choke inductor 14 is disposed between the power supply port VCC 1 and the first rf chip 12, and by using the characteristics of inductance resistance ac and dc, the ac noise signal can be prevented from being transmitted to the first rf chip 12. However, in order to achieve a good noise suppression effect, the inductance value of the choke inductance 14 is required to be large, and the routing of the choke inductance 14 needs to be long enough. Therefore, the choke inductor is usually disposed around other components in the module in the related art to extend the routing length of the choke inductor, but this introduces coupling interference.
To avoid coupling interference, embodiments of the present application provide choke inductance 14 in a separate area. Specifically, the choke inductor 14 is disposed in the second area A2 of the substrate. Referring to fig. 2, fig. 2 is a schematic structural diagram of the choke inductor 14. As shown in fig. 2, the substrate 11 includes a first metal layer M1 and a second metal layer M2, and the choke inductor 14 is layered on the second area A2 of the substrate. Specifically, the choke inductor 14 includes a first coil 141 and a second coil 142, the first coil 141 is disposed on the first metal layer M1, the second coil 142 is disposed on the second metal layer M2, and one end of the first coil 141 is connected to one end of the second coil 142 through a conductive via 143 penetrating the first metal layer M1 and the second metal layer M2, so as to realize series connection of the first coil 141 and the second coil 142. In this way, the inductance of the choke inductor 14 is the superposition of the inductance of the first coil 141 and the inductance of the second coil 142, so that the requirement of the choke coil for the inductance can be satisfied. Alternatively, the line width of the first coil 141 may be the same as or different from the line width of the second coil 142.
The first rf chip 12 is disposed on the substrate 11, and is configured to amplify an input rf signal. Alternatively, the first rf chip may be attached to the substrate 11, or may be inserted into the substrate 11, or may be soldered (e.g., soldered) to the substrate 11.
In order to match the impedance of the input port of the first rf chip 12 with the impedance of the front stage circuit or match the impedance of the output port of the first rf chip 12 with the impedance of the rear stage circuit, the embodiment of the present application further provides a first matching circuit 13. Specifically, the first matching circuit 13 is disposed in the first area A1 of the substrate and connected to the first rf chip 12, and is configured to convert the impedance of the input port or the output port of the first rf chip 12, so that the impedance of the input port or the output port of the first rf chip 12 is matched with the impedance of the front stage circuit or the rear stage circuit, thereby reducing the loss of the rf signal in the transmission process. The factors influencing the impedance value include resistance, inductance and capacitance, and for radio frequency signals, the inductance of the inductance has a larger influence on the impedance value, so that, as an embodiment, the first matching circuit 13 includes at least one inductance, and the impedance value can be influenced by changing the inductance. Since the first matching circuit 13 and the choke inductor 14 are located in different areas of the substrate, the inductor in the first matching circuit 13 is not easy to couple with the choke inductor 14, and interference to the choke inductor 14 is avoided.
According to the embodiment of the application, the coils of the choke inductor 14 are arranged on the first metal layer M1 and the second metal layer M2 in a layered manner, the inductance of at least two coils is overlapped to realize the inductance required by choke, the wiring length of the choke inductor on a single metal layer can be shortened, the choke inductor 14 does not need to be increased in a mode of being arranged around the first matching circuit 13, and therefore the choke inductor 14 and the first matching circuit 13 can be arranged in different areas, and the choke inductor 14 and the inductance element in the first matching circuit 13 are prevented from being coupled. In this way, the choke inductor 14 can be prevented from being interfered by the first matching circuit 13, so as to improve the performance of the rf front-end module.
In some embodiments, the first rf chip 12 is configured to power amplify an rf signal, and has a first power amplifying circuit integrated therein, where the first power amplifying circuit includes one or more amplifying transistors connected in parallel. Alternatively, the amplifying Transistor may be a MOS Transistor (Metal Oxide Semiconductor FIELD EFFECT Transistor) or an HBT (Heterojunction bipolar Transistor ). The grid electrode of the MOS tube or the base electrode of the HBT is an input end of the first power amplifying circuit and is used for receiving radio frequency input signals. The source/drain electrode of the MOS tube or the collector electrode of the HBT is an output end of the first power amplifying circuit and is used for outputting the amplified radio frequency signals.
In the embodiment of the present application, the source/drain of the MOS transistor or the collector of the HBT is further configured to receive the supply voltage VCC1, that is, the choke inductor 14 is connected to the source/drain of the MOS transistor or the collector of the HBT. When the first matching circuit 13 is used as an output impedance matching circuit of the first rf chip, the first matching circuit 13 is connected to an output port of the first rf chip 12, that is, also connected to a source/drain of each MOS transistor or a collector of each HBT in the first power amplifying circuit. Therefore, the first matching circuit 13 and the choke inductor 14 need to be connected to the same port of the first rf chip.
As an embodiment, as shown in fig. 3, the first matching circuit 13 includes a first matching inductance L1. One end of the first matching inductance L1 is connected to the output end of the first radio frequency chip 12, and the other end of the first matching inductance L1 is connected to other elements in the first matching circuit 13 or to a subsequent circuit.
Considering that the first matching inductor L1 and the choke inductor 14 need to be connected to the same port of the first radio frequency chip, the embodiment of the application sets the first matching inductor L1 in the first sub-area a11 connected to the second area A2 in the first area A1, so that the first matching inductor L1 and the choke inductor 14 are connected, and the connection part of the first matching inductor L1 and the choke inductor 14 is connected to the first radio frequency chip through a bonding wire. In other words, the trace of the first matching inductance L1 on the substrate and the trace of the choke inductance 14 on the substrate are connected to each other, and the bonding wire is disposed at the connection between the first matching inductance L1 and the choke inductance 14 when the first radio frequency chip is bonded to the substrate. Therefore, the processing difficulty of mounting the first radio frequency chip on the substrate can be reduced, the number of bonding wires is reduced, and the production cost is saved.
As an embodiment, the first matching circuit further comprises at least one capacitor, such as capacitor C1, connected to the first matching inductance L1. Optionally, the capacitor C1 may be connected in series between the other end of the first matching inductor L1 and other circuits, or may be connected between the other end of the first matching inductor L1 and the ground, which may be specifically set according to the requirement of impedance matching, which is not limited in the present application.
The capacitor C1, the first matching inductance L1 and the capacitor C1 are added to participate in the impedance matching of the first radio frequency chip 12, so that the impedance of the output end of the first radio frequency chip 12 can be more accurately adjusted, and a better matching effect is achieved.
Optionally, the first matching circuit 13 may further include other inductors and/or capacitors besides the first matching inductor L1 and the capacitor C1, and the inductors and/or capacitors may be connected in series or in parallel according to the requirement of impedance matching, which is not limited in the present application.
As an embodiment, the first matching inductance L1 is arranged at least partially around the capacitance C1. When the first matching circuit 13 includes more capacitors, the first matching inductance L1 may also entirely or partially surround the other capacitors. Therefore, the layout of the first matching circuit 13 is more compact, the substrate area occupied by the first matching circuit 13 is reduced, and other components can be more reasonable in layout.
As an embodiment, as shown in fig. 4, the first matching circuit 13 further includes a second matching inductance L2, where the second matching inductance L2 is connected to at least one capacitor. Illustratively, the second matching inductance L2 is connected in series with the first matching inductance L1 through a capacitance C2. The first area A1 of the substrate 11 further includes a second sub-area a12 spaced from the second area A2, and the second matching inductor L2 is disposed in the second sub-area a12, that is, has a certain interval with the first matching inductor L1 and the choke inductor 14, so that the second matching inductor L2 and the first matching inductor L1 or the choke inductor 14 can be prevented from being coupled, and interference caused by coupling can be avoided.
As an implementation manner, at least one inductor and at least one capacitor in the first matching circuit 13 may also form an LC resonant network, so that, while impedance matching is implemented, harmonic signals, which are carried in the output signal of the first radio frequency chip 12 and are close to the resonant frequency of the LC resonant network, may also be suppressed, so as to improve the working efficiency of the first radio frequency chip 12.
In some embodiments, as shown in fig. 5, a first power amplifying circuit 121 and a second power amplifying circuit 122 are integrated in the first radio frequency chip, where the first power amplifying circuit 121 and the second power amplifying circuit 122 may be used for power amplifying radio frequency signals in different frequency bands. Illustratively, the first power amplification circuit 121 is configured to power amplify, for example, a radio frequency signal having a low frequency (e.g., a frequency less than 300 kHz), and the second power amplification circuit 122 is configured to power amplify a radio frequency signal having an intermediate frequency (e.g., a frequency greater than 3MHz and less than 30 MHz). By integrating the first power amplifying circuit 121 and the second power amplifying circuit 122 in the same chip, the integration level of the chip can be improved, and the area of the radio frequency front end module can be reduced.
In this embodiment, the rf front-end module further includes a second matching circuit 15 in addition to the first matching circuit 13, where the first matching circuit 13 is connected to the first power amplifying circuit 121 to convert the output impedance of the first power amplifying circuit 121 to match the impedance of the subsequent circuit. The second matching circuit 15 is connected to the second power amplifying circuit 122 to convert the output impedance of the second power amplifying circuit 122 to match the impedance of the subsequent circuit. Because the working frequency bands of the first power amplifying circuit 121 and the second power amplifying circuit 122 are different, circuit parameters required in impedance matching are different, and the application respectively sets independent matching circuits for the first power amplifying circuit 121 and the second power amplifying circuit 122, so that better impedance matching effect can be obtained for the first power amplifying circuit 121 and the second power amplifying circuit 122. The second matching circuit 15 also includes one or more coils or windings, and the second matching circuit 15 is disposed in the third area A3 of the substrate and is located in a different area from the first matching circuit 13 and the choke inductance A2, so that the coils or windings in the second matching circuit 15 and the choke inductance A2 or the inductance in the first matching circuit 13 can be prevented from being coupled, interference caused by coupling is avoided, and performance of the radio frequency front end module is improved.
The first power amplifying circuit 121 is powered by a power supply port Vcc 1, and the choke inductor 14 is connected to the first power amplifying circuit 121 to inhibit an ac interference signal carried in the power supply voltage Vcc1 from entering the first power amplifying circuit 121.
As an embodiment, the supply voltage required by the second power amplifying circuit 122 is the same as that of the first power amplifying circuit 121, and the second power amplifying circuit 122 is also supplied by the supply port Vcc 1, at this time, the second power amplifying circuit 122 may be connected to the supply port Vcc 1 through another choke inductor, so as to inhibit the ac interference signal carried in the supply voltage Vcc1 from entering the second power amplifying circuit 122.
As an embodiment, the supply voltage required by the second power amplifying circuit 122 is the same as or different from that of the first power amplifying circuit 121, and the second power amplifying circuit 122 may receive the supply voltage through another supply port, at this time, the second power amplifying circuit 122 may be connected to another supply port through another choke inductor, so as to inhibit the ac interference signal from entering the second power amplifying circuit 122.
As an embodiment, as shown in fig. 5, the substrate 11 includes a first edge E1 and a second edge E2 that intersect, the first radio frequency chip 12 includes a third edge E3 and a fourth edge E4 that intersect, and the third edge E3 is parallel to the first edge E1, and the fourth edge E4 is parallel to the second edge E2, where the first area A1 is disposed between the first edge E1 and the third edge E3, and the third area A3 is disposed between the second edge E2 and the fourth edge E4. That is, the first area A1 and the third area A3 are disposed on different sides of the first rf chip 12, and both are close to the edge of the first rf chip 12 and are in a substantially diagonal relationship, so that the design is more compact and neat, and the first matching circuit 13 and the second matching circuit 15 can be conveniently connected with the first rf chip 12 respectively.
As an embodiment, when the second power amplifying circuit 122 is also supplied by the power supply port Vcc 1, the second power amplifying circuit 122 is connected to the power supply port Vcc 1, the power supply port Vcc 1 is disposed on the second edge E2 of the substrate 11, and the second area A2 is disposed adjacent to the second edge E2 and the third area A3, so that the choke inductor 14 and the second power amplifying circuit 122 can be connected to the power supply port Vcc 1, respectively.
As an embodiment, the second power amplifying circuit 122 is a differential power amplifying circuit, and the post-stage circuit of the second power amplifying circuit 122 is a single-ended input circuit, and the second matching circuit 15 is further configured to convert the balanced radio frequency signal output by the second power amplifying circuit 122 into an unbalanced radio frequency signal. Specifically, the second matching circuit 15 includes a first balun, where the first balun includes a primary coil and a secondary coil that are coupled to each other, and two ends of the primary coil are respectively connected to differential output ends of the second power amplifying circuit 122 and used to receive the balanced radio frequency signal output by the second power amplifying circuit 122, and one end of the secondary coil is grounded, and the other end of the secondary coil is connected to a secondary circuit and used to output an unbalanced radio frequency signal generated based on coupling with the primary coil to the secondary circuit. Based on the first balun, the second matching circuit 15 can simultaneously realize impedance matching and balance-unbalance conversion of the output signal of the second power amplification circuit 122 in a smaller area, so that the cost of the radio frequency front end module is effectively saved.
Alternatively, the primary and secondary coils of the first balun may be located on the same metal layer, e.g., both disposed on the first metal layer of the substrate, or both disposed on the second metal layer of the substrate, or the primary and secondary coils of the first balun may be located on different metal layers, e.g., one of them is located on the first metal layer of the substrate and the other is located on the second metal layer of the substrate.
The first balun includes a third coil disposed on the first metal layer and a fourth coil disposed on the second metal layer, the third coil and the fourth coil being coupled to each other. One of the third coil and the fourth coil is a main stage coil, and the other is a secondary stage coil. For example, the third coil is a primary coil and the fourth coil is a secondary coil, or the third coil is a secondary coil and the fourth coil is a primary coil. The primary coil and the secondary coil of the first balun are arranged on different metal layers, so that the substrate area occupied by the first balun can be saved, and the layout of other circuits is facilitated.
As an embodiment, the primary winding of the first balun is further connected to the power supply port Vcc 1 through a trace, i.e., the power supply port Vcc 1 powers the second power amplifying circuit 122 through the primary winding of the first balun. In this way, the inductance characteristic of the balun primary coil is utilized, and the balun primary coil is multiplexed as a choke coil between the second power amplifying circuit 122 and the power supply port Vcc 1, so that the alternating current interference signal of an external power supply can be restrained from entering the second power amplifying circuit 122 while no additional circuit is added, and the performance of the radio frequency front end module is improved. Illustratively, connecting the midpoint of the first balun primary coil to the supply port Vcc 1 can promote the balance of the second power amplifying circuit 122.
In some embodiments, the second matching circuit may comprise other circuit elements in addition to the first balun, such as at least one inductor and/or at least one capacitor. The at least one inductor and/or the at least one capacitor and the first balun are/is involved in the impedance matching of the second power amplification circuit, so that the impedance matching result is more accurate, and the performance of the radio frequency front end module is further improved.
In some embodiments, the substrate further includes a third metal layer and a fourth metal layer in addition to the first metal layer and the second metal layer, where the first metal layer, the second metal layer, the third metal layer, and the fourth metal layer are sequentially stacked, and a trace is disposed on the third metal layer, and the fourth metal layer is used for grounding. In general, the metal area of the grounding layer is large, and the coupling with other layers is easy to generate, but the third metal layer is arranged between the first metal layer, the second metal layer and the fourth metal layer for grounding, so that the distance between the first metal layer, the second metal layer and the fourth metal layer is increased, the coupling between elements in the first metal layer and the second metal layer and the fourth metal layer can be effectively weakened, and the influence of the fourth metal layer on circuits/elements such as a first matching circuit, a second matching circuit, a choke inductor and the like is avoided. The layout and connection of the circuits/elements of the first matching circuit, the second matching circuit, the choke inductor and the like are also facilitated by arranging some wirings on the third metal layer.
As an embodiment, as shown in fig. 6, the third metal layer M3 is provided with a power supply trace 144, one end of the power supply trace 144 is connected to the power supply port Vcc 1, and the other end of the power supply trace 144 is connected to the second coil 142 of the choke inductor 14 through a second conductive via 145 penetrating through the third metal layer M3 and the second metal layer M2. Since the trace also has a certain inductance value, the supply trace 144 can act together with the choke inductance 14 as a choke. In this embodiment, the power supply trace 144 may also be considered as part of the choke inductance 14. Illustratively, the line width of the power supply trace 144 is the same as or similar to the line width of the first coil 141 or the second coil 142.
In some embodiments, as shown in fig. 7, the radio frequency front end module further includes a first switch chip 16, a first switch circuit 161 and a second switch circuit 162 are disposed in the first switch chip 16, the first switch circuit 161 is connected to the first matching circuit 13, and the second switch circuit 162 is connected to the second matching circuit 15.
Specifically, the first switch circuit 161 and the second switch circuit 162 are respectively used for connecting to an antenna outside the rf front-end module through a corresponding output port on the substrate, for example, the first switch circuit 161 is used for connecting to the first antenna through the first output port LB, and the second switch circuit 162 is used for connecting to the second antenna through the second output port MB. When the first switch circuit 161 turns on the path between the first matching circuit 13 and the first antenna, the radio frequency signal amplified by the first power amplifying circuit 121 is sequentially transmitted to the first antenna through the first matching circuit 13, the first switch circuit 161 and the first output port LB, and is emitted through the first antenna. When the second switch circuit 162 turns on the path between the second matching circuit 15 and the second antenna, the radio frequency signal amplified by the second power amplifying circuit 122 is transmitted to the second antenna through the second matching circuit 15, the second switch circuit 162 and the second output port MB in sequence, and is emitted through the second antenna. By integrating the first switch circuit 161 and the second switch circuit 162 in the same chip, the integration level of the rf front-end module can be improved, so that the volume of the rf front-end module is more miniaturized.
The first switching chip 16 is disposed adjacent to the first and second edges E1 and E2 of the substrate, i.e., the first switching chip 16 is disposed at a corner formed by the intersection of the first and second edges E1 and E2 of the substrate. This can facilitate the connection of the first matching circuit 13 and the second matching circuit 15 with the first switch chip 16, respectively.
Alternatively, since the first switch chip 16 has an insulating package housing, which has little effect on other circuits/elements on the substrate, such as the first matching circuit and the second matching circuit, the layout area of the first switch chip 16 may overlap with the second area and/or the first area, to further save substrate area. In addition, the transmission distance between the first radio frequency chip 12 and the first switch chip 16 can be shortened, the insertion loss and interference in the radio frequency signal transmission process are reduced, and the output quality of the radio frequency signal is improved.
In some embodiments, as shown in fig. 8, the rf front-end module further includes a second rf chip 17 and a third matching circuit 18, where a third power amplifying circuit is integrated in the second rf chip 17, and the third power amplifying circuit is connected to the third matching circuit 18. Illustratively, the third power amplifying circuit may be configured to power amplify a radio frequency signal having a high frequency (e.g., a frequency greater than 300 MHz), and the third matching circuit 18 may be configured to convert an output impedance of the third power amplifying circuit to match an impedance of a subsequent circuit, thereby reducing losses during transmission of the radio frequency signal.
In this embodiment, the second rf chip 17 and the third matching circuit 18 are disposed in a fourth area A4 of the substrate, the fourth area A4 is located on a first side of the first rf chip 12, the first area A1 and the second area A2 are located on a second side of the first rf chip 12, and the first side and the second side are opposite sides. The third power amplifying circuit which is higher in working frequency band and easier to be interfered is independently integrated in one chip and is arranged at intervals with the first area A1 and the second area A2, so that interference caused by signals in middle and low frequency bands can be effectively avoided, and the signal output quality of the third power amplifying circuit is improved.
As an embodiment, the third matching circuit 18 may include a second balun, and the implementation of the second balun is similar to that of the first balun, and will not be described herein. Optionally, the third matching circuit 18 may also include at least one inductor and/or at least one capacitor. The at least one inductor and/or the at least one capacitor and the second balun are/is involved in the impedance matching of the third power amplification circuit, so that the impedance matching result is more accurate, and the performance of the radio frequency front end module is further improved.
As an embodiment, the second rf chip 17 receives the supply voltage through the port Vcc 2, and between the second rf chip 17 and the port Vcc2, an additional choke inductance may be provided to suppress the ac interference signal carried by the external power source from entering the second rf chip 17, or a coil in the second balun may be multiplexed as a choke coil.
As an embodiment, the radio frequency front end module further comprises a second switch chip 19, the second switch chip 19 is connected to the third matching circuit 19, and the second switch chip 19 is further configured to be connected to the third antenna through a corresponding output port on the substrate, such as the third output port HB. When the second switch chip 19 turns on the path between the third matching circuit 18 and the third antenna, the radio frequency signal amplified by the third power amplifying circuit is transmitted to the third antenna through the third matching circuit 18, the second switch chip 19 and the third output port HB in sequence, and is emitted through the third antenna. The second switch chip 19 is disposed in the fourth area A4 and is located at a side of the third matching circuit 18 away from the second rf chip 17, so that a transmission distance between the rf signal from the second rf chip 17 to the second switch chip 19 can be shortened, insertion loss and interference in a transmission process of the rf signal can be reduced, and output quality of the rf signal can be improved.
In some embodiments, as shown in fig. 9, the rf front-end module further includes a control chip 20, where the control chip 20 is disposed between the first rf chip 12 and the fourth area A4 and is connected to the first rf chip 12 and the second rf chip 17, respectively. Specifically, the control chip 20 may be connected to one or more control ports on the substrate, and receive a control command sent from the outside through the control ports, and control the operating states of the first rf chip 11, the first switch chip 16, the second rf chip 17, and the second switch chip 19 based on the control command. The control chip 20 is arranged between the first radio frequency chip 12 and the fourth area A4, so that the connection of the first radio frequency chip 12 and the second radio frequency chip 17 with the control chip 20 can be facilitated, and the layout of the radio frequency front end module is more compact.
According to the embodiment of the application, the radio frequency front end module layer-distributes the coils of the choke inductor 14 on a plurality of metal layers, and the inductance of at least two coils is overlapped to realize the inductance required by choke, so that the wiring length of the choke inductor on a single metal layer can be shortened, the choke inductor 14 does not need to be increased in a mode of being arranged around the first matching circuit 13, and therefore, the choke inductor 14 and the first matching circuit 13 can be distributed in different areas, and the choke inductor 14 and the inductance element in the first matching circuit 13 are prevented from being coupled. In this way, the choke inductor 14 can be prevented from being interfered by the first matching circuit 13, so as to improve the performance of the rf front-end module.
Although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art will understand that modifications may be made to the technical solutions described in the foregoing embodiments or equivalents may be substituted for some of the technical features thereof, and these modifications or substitutions do not drive the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims (14)
1. A radio frequency front end module, comprising:
the substrate comprises a first metal layer and a second metal layer, and is provided with a power supply port;
The first radio frequency chip is arranged on the substrate;
The first matching circuit is arranged in a first area of the substrate and is connected with the first radio frequency chip;
The choke inductor is arranged in a second area of the substrate and is respectively connected with the power supply port and the first radio frequency chip, wherein the choke inductor comprises a first coil arranged on a first metal layer and a second coil arranged on a second metal layer, and the first coil and the second coil are connected through a first conductive via hole.
2. The radio frequency front end module of claim 1, wherein the first matching circuit comprises a first matching inductor, the first matching inductor is connected with the choke inductor, and a connection part of the first matching inductor and the choke inductor is connected with the first radio frequency chip through a bonding wire;
The first region comprises a first sub-region connected with the second region, and the first matching inductor is arranged in the first sub-region.
3. The rf front-end module of claim 2, wherein the first matching circuit further comprises at least one capacitor coupled to the first matching inductance, the first matching inductance being disposed at least partially around the capacitor.
4. The rf front-end module of claim 3, wherein the first matching circuit further comprises a second matching inductance connected to at least one of the capacitors;
the first region further comprises a second sub-region spaced apart from the second region, and the second matching inductor is arranged in the second sub-region.
5. The radio frequency front end module according to claim 1, wherein a first power amplifying circuit and a second power amplifying circuit are arranged in the first radio frequency chip, and the first matching circuit and the choke inductor are respectively connected with the first power amplifying circuit;
The radio frequency front end module further comprises a second matching circuit, and the second matching circuit is arranged in a third area of the substrate and is connected with the second power amplifying circuit.
6. The rf front-end module of claim 5, wherein the substrate comprises intersecting first and second edges, the first rf chip comprises intersecting third and fourth edges, and the third edge is parallel to the first edge and the fourth edge is parallel to the second edge;
The first area is arranged between the first edge and the third edge, and the third area is arranged between the second edge and the fourth edge.
7. The rf front-end module of claim 6, wherein the second power amplifier circuit is further coupled to the power port, the power port is disposed at the second edge, and the second region is disposed adjacent to the second edge and the third region.
8. The radio frequency front end module of claim 5, wherein the second matching circuit comprises a first balun comprising a third coil disposed on the first metal layer and a fourth coil disposed on the second metal layer, the third coil and the fourth coil being coupled to each other.
9. The radio frequency front end module according to any one of claims 1-8, wherein the substrate further comprises a third metal layer and a fourth metal layer, the first metal layer, the second metal layer, the third metal layer and the fourth metal layer are sequentially stacked, a trace is provided on the third metal layer, and the fourth metal layer is used for grounding.
10. The radio frequency front end module according to claim 9, wherein the third metal layer is provided with a power supply trace, one end of the power supply trace is connected to the power supply port, and the other end of the power supply trace is connected to the second coil through a second conductive via.
11. The rf front-end module of claim 6, further comprising a first switch chip disposed adjacent to the first edge and the second edge;
The first switch chip is internally provided with a first switch circuit and a second switch circuit, the first switch circuit is connected with the first matching circuit, and the second switch circuit is connected with the second matching circuit.
12. The radio frequency front end module according to claim 1, further comprising a second radio frequency chip and a third matching circuit, wherein a third power amplifying circuit is integrated in the second radio frequency chip, and the third power amplifying circuit is connected with the third matching circuit;
The second radio frequency chip and the third matching circuit are arranged in a fourth area of the substrate, the fourth area is located at a first side of the first radio frequency chip, the first area and the second area are located at a second side of the first radio frequency chip, and the first side and the second side are opposite sides.
13. The radio frequency front end module of claim 12, further comprising a second switch chip, the second switch chip being connected to the third matching circuit;
the second switch chip is arranged in the fourth area and is positioned at one side of the third matching circuit far away from the second radio frequency chip.
14. The rf front-end module of claim 12, further comprising a control chip disposed between the first rf chip and the fourth region and connected to the first rf chip and the second rf chip, respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202323640461.9U CN222234843U (en) | 2023-12-29 | 2023-12-29 | Radio frequency front end module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202323640461.9U CN222234843U (en) | 2023-12-29 | 2023-12-29 | Radio frequency front end module |
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| Publication Number | Publication Date |
|---|---|
| CN222234843U true CN222234843U (en) | 2024-12-24 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202323640461.9U Active CN222234843U (en) | 2023-12-29 | 2023-12-29 | Radio frequency front end module |
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| Country | Link |
|---|---|
| CN (1) | CN222234843U (en) |
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2023
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Address after: No. 6 Mingli Road, Longxing Town, Liangjiang New District, Yubei District, Chongqing 401120, China Patentee after: Ruishi Chuangxin (Chongqing) Technology Co.,Ltd. Country or region after: China Address before: 2001, Building 3, Shenzhen New Generation Industrial Park, No. 136 Zhongkang Road, Meidu Community, Meilin Street, Futian District, Shenzhen, Guangdong Province Patentee before: Ruishi Chuangxin (Shenzhen) Technology Co.,Ltd. Country or region before: China |